llvm::MCSubtargetInfo Member List

This is the complete list of members for llvm::MCSubtargetInfo, including all inherited members.

getFeatureBits() const	llvm::MCSubtargetInfo	[inline]
getInstrItineraryForCPU(StringRef CPU) const	llvm::MCSubtargetInfo
getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, unsigned WriteResID) const	llvm::MCSubtargetInfo	[inline]
getSchedModel() const	llvm::MCSubtargetInfo	[inline]
getSchedModelForCPU(StringRef CPU) const	llvm::MCSubtargetInfo
getTargetTriple() const	llvm::MCSubtargetInfo	[inline]
getWriteLatencyEntry(const MCSchedClassDesc *SC, unsigned DefIdx) const	llvm::MCSubtargetInfo	[inline]
getWriteProcResBegin(const MCSchedClassDesc *SC) const	llvm::MCSubtargetInfo	[inline]
getWriteProcResEnd(const MCSchedClassDesc *SC) const	llvm::MCSubtargetInfo	[inline]
InitCPUSchedModel(StringRef CPU)	llvm::MCSubtargetInfo
initInstrItins(InstrItineraryData &InstrItins) const	llvm::MCSubtargetInfo
InitMCProcessorInfo(StringRef CPU, StringRef FS)	llvm::MCSubtargetInfo
InitMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS, ArrayRef< SubtargetFeatureKV > PF, ArrayRef< SubtargetFeatureKV > PD, const SubtargetInfoKV *ProcSched, const MCWriteProcResEntry *WPR, const MCWriteLatencyEntry *WL, const MCReadAdvanceEntry *RA, const InstrStage *IS, const unsigned *OC, const unsigned *FP)	llvm::MCSubtargetInfo
setFeatureBits(uint64_t FeatureBits_)	llvm::MCSubtargetInfo	[inline]
ToggleFeature(uint64_t FB)	llvm::MCSubtargetInfo
ToggleFeature(StringRef FS)	llvm::MCSubtargetInfo