LLVM API Documentation

llvm::TargetLoweringBase Member List
This is the complete list of members for llvm::TargetLoweringBase, including all inherited members.
addBypassSlowDiv(unsigned int SlowBitWidth, unsigned int FastBitWidth)llvm::TargetLoweringBase [inline, protected]
AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT)llvm::TargetLoweringBase [inline, protected]
addRegisterClass(MVT VT, const TargetRegisterClass *RC)llvm::TargetLoweringBase [inline, protected]
allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace=0, unsigned Align=1, bool *=nullptr) const llvm::TargetLoweringBase [inline, virtual]
allowTruncateForTailCall(Type *, Type *) const llvm::TargetLoweringBase [inline, virtual]
BooleanContent enum namellvm::TargetLoweringBase
canOpTrap(unsigned Op, EVT VT) const llvm::TargetLoweringBase [virtual]
clearOperationActions()llvm::TargetLoweringBase [inline, protected]
clearRegisterClasses()llvm::TargetLoweringBase [inline, protected]
computeRegisterProperties()llvm::TargetLoweringBase [protected]
Custom enum valuellvm::TargetLoweringBase
emitLeadingFence(IRBuilder<> &Builder, AtomicOrdering Ord, bool IsStore, bool IsLoad) const llvm::TargetLoweringBase [inline, virtual]
emitLoadLinked(IRBuilder<> &Builder, Value *Addr, AtomicOrdering Ord) const llvm::TargetLoweringBase [inline, virtual]
emitPatchPoint(MachineInstr *MI, MachineBasicBlock *MBB) const llvm::TargetLoweringBase [protected]
emitStoreConditional(IRBuilder<> &Builder, Value *Val, Value *Addr, AtomicOrdering Ord) const llvm::TargetLoweringBase [inline, virtual]
emitTrailingFence(IRBuilder<> &Builder, AtomicOrdering Ord, bool IsStore, bool IsLoad) const llvm::TargetLoweringBase [inline, virtual]
Expand enum valuellvm::TargetLoweringBase
findRepresentativeClass(MVT VT) const llvm::TargetLoweringBase [protected, virtual]
GetAddrModeArguments(IntrinsicInst *, SmallVectorImpl< Value * > &, Type *&) const llvm::TargetLoweringBase [inline, virtual]
getBooleanContents(bool isVec, bool isFloat) const llvm::TargetLoweringBase [inline]
getBooleanContents(EVT Type) const llvm::TargetLoweringBase [inline]
getBypassSlowDivWidths() const llvm::TargetLoweringBase [inline]
getByValTypeAlignment(Type *Ty) const llvm::TargetLoweringBase [virtual]
getCmpLibcallCC(RTLIB::Libcall Call) const llvm::TargetLoweringBase [inline]
getCmpLibcallReturnType() const llvm::TargetLoweringBase [virtual]
getCondCodeAction(ISD::CondCode CC, MVT VT) const llvm::TargetLoweringBase [inline]
getDataLayout() const llvm::TargetLoweringBase [inline]
getExceptionPointerRegister() const llvm::TargetLoweringBase [inline]
getExceptionSelectorRegister() const llvm::TargetLoweringBase [inline]
getExtendForContent(BooleanContent Content)llvm::TargetLoweringBase [inline, static]
getIndexedLoadAction(unsigned IdxMode, MVT VT) const llvm::TargetLoweringBase [inline]
getIndexedStoreAction(unsigned IdxMode, MVT VT) const llvm::TargetLoweringBase [inline]
getInsertFencesForAtomic() const llvm::TargetLoweringBase [inline]
getJumpBufAlignment() const llvm::TargetLoweringBase [inline]
getJumpBufSize() const llvm::TargetLoweringBase [inline]
getLibcallCallingConv(RTLIB::Libcall Call) const llvm::TargetLoweringBase [inline]
getLibcallName(RTLIB::Libcall Call) const llvm::TargetLoweringBase [inline]
getLoadExtAction(unsigned ExtType, EVT VT) const llvm::TargetLoweringBase [inline]
getMaximalGlobalOffset() const llvm::TargetLoweringBase [inline, virtual]
getMaxStoresPerMemcpy(bool OptSize) const llvm::TargetLoweringBase [inline]
getMaxStoresPerMemmove(bool OptSize) const llvm::TargetLoweringBase [inline]
getMaxStoresPerMemset(bool OptSize) const llvm::TargetLoweringBase [inline]
getMinFunctionAlignment() const llvm::TargetLoweringBase [inline]
getMinimumJumpTableEntries() const llvm::TargetLoweringBase [inline]
getMinStackArgumentAlignment() const llvm::TargetLoweringBase [inline]
getNumRegisters(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBase [inline]
getObjFileLowering() const llvm::TargetLoweringBase [inline]
getOperationAction(unsigned Op, EVT VT) const llvm::TargetLoweringBase [inline]
getOptimalMemOpType(uint64_t, unsigned, unsigned, bool, bool, bool, MachineFunction &) const llvm::TargetLoweringBase [inline, virtual]
getPointerSizeInBits(uint32_t AS=0) const llvm::TargetLoweringBase
getPointerTy(uint32_t=0) const llvm::TargetLoweringBase [virtual]
getPointerTypeSizeInBits(Type *Ty) const llvm::TargetLoweringBase
getPreferredVectorAction(EVT VT) const llvm::TargetLoweringBase [inline, virtual]
getPrefFunctionAlignment() const llvm::TargetLoweringBase [inline]
getPrefLoopAlignment() const llvm::TargetLoweringBase [inline]
getRegClassFor(MVT VT) const llvm::TargetLoweringBase [inline, virtual]
getRegisterType(MVT VT) const llvm::TargetLoweringBase [inline]
getRegisterType(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBase [inline]
getRepRegClassCostFor(MVT VT) const llvm::TargetLoweringBase [inline, virtual]
getRepRegClassFor(MVT VT) const llvm::TargetLoweringBase [inline, virtual]
getScalarShiftAmountTy(EVT LHSTy) const llvm::TargetLoweringBase [virtual]
getScalingFactorCost(const AddrMode &AM, Type *Ty) const llvm::TargetLoweringBase [inline, virtual]
getSchedulingPreference() const llvm::TargetLoweringBase [inline]
getSchedulingPreference(SDNode *) const llvm::TargetLoweringBase [inline, virtual]
getSetCCResultType(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBase [virtual]
getShiftAmountTy(EVT LHSTy) const llvm::TargetLoweringBase
getSimpleValueType(Type *Ty, bool AllowUnknown=false) const llvm::TargetLoweringBase [inline]
getStackCookieLocation(unsigned &, unsigned &) const llvm::TargetLoweringBase [inline, virtual]
getStackPointerRegisterToSaveRestore() const llvm::TargetLoweringBase [inline]
getTargetMachine() const llvm::TargetLoweringBase [inline]
getTgtMemIntrinsic(IntrinsicInfo &, const CallInst &, unsigned) const llvm::TargetLoweringBase [inline, virtual]
getTruncStoreAction(EVT ValVT, EVT MemVT) const llvm::TargetLoweringBase [inline]
getTypeAction(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBase [inline]
getTypeAction(MVT VT) const llvm::TargetLoweringBase [inline]
getTypeConversion(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBase [inline]
getTypeLegalizationCost(Type *Ty) const llvm::TargetLoweringBase
getTypeToExpandTo(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBase [inline]
getTypeToPromoteTo(unsigned Op, MVT VT) const llvm::TargetLoweringBase [inline]
getTypeToTransformTo(LLVMContext &Context, EVT VT) const llvm::TargetLoweringBase [inline]
getValueType(Type *Ty, bool AllowUnknown=false) const llvm::TargetLoweringBase [inline]
getValueTypeActions() const llvm::TargetLoweringBase [inline]
getVectorIdxTy() const llvm::TargetLoweringBase [inline, virtual]
getVectorTypeBreakdown(LLVMContext &Context, EVT VT, EVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT) const llvm::TargetLoweringBase
hasBigEndianPartOrdering(EVT VT) const llvm::TargetLoweringBase [inline]
hasExtractBitsInsn() const llvm::TargetLoweringBase [inline]
hasFloatingPointExceptions() const llvm::TargetLoweringBase [inline]
hasLoadLinkedStoreConditional() const llvm::TargetLoweringBase [inline, virtual]
hasMultipleConditionRegisters() const llvm::TargetLoweringBase [inline]
hasPairedLoad(Type *, unsigned &) const llvm::TargetLoweringBase [inline, virtual]
hasPairedLoad(EVT, unsigned &) const llvm::TargetLoweringBase [inline, virtual]
hasTargetDAGCombine(ISD::NodeType NT) const llvm::TargetLoweringBase [inline]
initActions()llvm::TargetLoweringBase [protected]
InstructionOpcodeToISD(unsigned Opcode) const llvm::TargetLoweringBase
isBigEndian() const llvm::TargetLoweringBase [inline]
isCondCodeLegal(ISD::CondCode CC, MVT VT) const llvm::TargetLoweringBase [inline]
isFAbsFree(EVT VT) const llvm::TargetLoweringBase [inline, virtual]
isFMAFasterThanFMulAndFAdd(EVT) const llvm::TargetLoweringBase [inline, virtual]
isFNegFree(EVT VT) const llvm::TargetLoweringBase [inline, virtual]
isFPImmLegal(const APFloat &, EVT) const llvm::TargetLoweringBase [inline, virtual]
isIndexedLoadLegal(unsigned IdxMode, EVT VT) const llvm::TargetLoweringBase [inline]
isIndexedStoreLegal(unsigned IdxMode, EVT VT) const llvm::TargetLoweringBase [inline]
isIntDivCheap() const llvm::TargetLoweringBase [inline]
isJumpExpensive() const llvm::TargetLoweringBase [inline]
isLegalAddImmediate(int64_t) const llvm::TargetLoweringBase [inline, virtual]
isLegalAddressingMode(const AddrMode &AM, Type *Ty) const llvm::TargetLoweringBase [virtual]
isLegalICmpImmediate(int64_t) const llvm::TargetLoweringBase [inline, virtual]
isLegalRC(const TargetRegisterClass *RC) const llvm::TargetLoweringBase [protected]
isLittleEndian() const llvm::TargetLoweringBase [inline]
isLoadBitCastBeneficial(EVT, EVT) const llvm::TargetLoweringBase [inline, virtual]
isLoadExtLegal(unsigned ExtType, EVT VT) const llvm::TargetLoweringBase [inline]
isMaskAndBranchFoldingLegal() const llvm::TargetLoweringBase [inline]
isNarrowingProfitable(EVT, EVT) const llvm::TargetLoweringBase [inline, virtual]
isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const llvm::TargetLoweringBase [inline, virtual]
isOperationExpand(unsigned Op, EVT VT) const llvm::TargetLoweringBase [inline]
isOperationLegal(unsigned Op, EVT VT) const llvm::TargetLoweringBase [inline]
isOperationLegalOrCustom(unsigned Op, EVT VT) const llvm::TargetLoweringBase [inline]
isOperationLegalOrPromote(unsigned Op, EVT VT) const llvm::TargetLoweringBase [inline]
isPow2SDivCheap() const llvm::TargetLoweringBase [inline]
isPredictableSelectExpensive() const llvm::TargetLoweringBase [inline]
isSafeMemOpType(MVT) const llvm::TargetLoweringBase [inline, virtual]
isSelectExpensive() const llvm::TargetLoweringBase [inline]
isSelectSupported(SelectSupportKind) const llvm::TargetLoweringBase [inline, virtual]
isShuffleMaskLegal(const SmallVectorImpl< int > &, EVT) const llvm::TargetLoweringBase [inline, virtual]
isSlowDivBypassed() const llvm::TargetLoweringBase [inline]
isTruncateFree(Type *, Type *) const llvm::TargetLoweringBase [inline, virtual]
isTruncateFree(EVT, EVT) const llvm::TargetLoweringBase [inline, virtual]
isTruncStoreLegal(EVT ValVT, EVT MemVT) const llvm::TargetLoweringBase [inline]
isTypeLegal(EVT VT) const llvm::TargetLoweringBase [inline]
isVectorClearMaskLegal(const SmallVectorImpl< int > &, EVT) const llvm::TargetLoweringBase [inline, virtual]
isVectorShiftByScalarCheap(Type *Ty) const llvm::TargetLoweringBase [inline, virtual]
isZExtFree(Type *, Type *) const llvm::TargetLoweringBase [inline, virtual]
isZExtFree(EVT, EVT) const llvm::TargetLoweringBase [inline, virtual]
isZExtFree(SDValue Val, EVT VT2) const llvm::TargetLoweringBase [inline, virtual]
Legal enum valuellvm::TargetLoweringBase
LegalizeAction enum namellvm::TargetLoweringBase
LegalizeKind typedefllvm::TargetLoweringBase
LegalizeTypeAction enum namellvm::TargetLoweringBase
MaskAndBranchFoldingIsLegalllvm::TargetLoweringBase [protected]
MaxStoresPerMemcpyllvm::TargetLoweringBase [protected]
MaxStoresPerMemcpyOptSizellvm::TargetLoweringBase [protected]
MaxStoresPerMemmovellvm::TargetLoweringBase [protected]
MaxStoresPerMemmoveOptSizellvm::TargetLoweringBase [protected]
MaxStoresPerMemsetllvm::TargetLoweringBase [protected]
MaxStoresPerMemsetOptSizellvm::TargetLoweringBase [protected]
PredictableSelectIsExpensivellvm::TargetLoweringBase [protected]
Promote enum valuellvm::TargetLoweringBase
resetOperationActions()llvm::TargetLoweringBase [inline, virtual]
ScalarCondVectorVal enum valuellvm::TargetLoweringBase
ScalarValSelect enum valuellvm::TargetLoweringBase
SelectSupportKind enum namellvm::TargetLoweringBase
setBooleanContents(BooleanContent Ty)llvm::TargetLoweringBase [inline, protected]
setBooleanContents(BooleanContent IntTy, BooleanContent FloatTy)llvm::TargetLoweringBase [inline, protected]
setBooleanVectorContents(BooleanContent Ty)llvm::TargetLoweringBase [inline, protected]
setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC)llvm::TargetLoweringBase [inline]
setCondCodeAction(ISD::CondCode CC, MVT VT, LegalizeAction Action)llvm::TargetLoweringBase [inline, protected]
setExceptionPointerRegister(unsigned R)llvm::TargetLoweringBase [inline, protected]
setExceptionSelectorRegister(unsigned R)llvm::TargetLoweringBase [inline, protected]
setHasExtractBitsInsn(bool hasExtractInsn=true)llvm::TargetLoweringBase [inline, protected]
setHasFloatingPointExceptions(bool FPExceptions=true)llvm::TargetLoweringBase [inline, protected]
setHasMultipleConditionRegisters(bool hasManyRegs=true)llvm::TargetLoweringBase [inline, protected]
setIndexedLoadAction(unsigned IdxMode, MVT VT, LegalizeAction Action)llvm::TargetLoweringBase [inline, protected]
setIndexedStoreAction(unsigned IdxMode, MVT VT, LegalizeAction Action)llvm::TargetLoweringBase [inline, protected]
setInsertFencesForAtomic(bool fence)llvm::TargetLoweringBase [inline, protected]
setIntDivIsCheap(bool isCheap=true)llvm::TargetLoweringBase [inline, protected]
setJumpBufAlignment(unsigned Align)llvm::TargetLoweringBase [inline, protected]
setJumpBufSize(unsigned Size)llvm::TargetLoweringBase [inline, protected]
setJumpIsExpensive(bool isExpensive=true)llvm::TargetLoweringBase [inline, protected]
setLibcallCallingConv(RTLIB::Libcall Call, CallingConv::ID CC)llvm::TargetLoweringBase [inline]
setLibcallName(RTLIB::Libcall Call, const char *Name)llvm::TargetLoweringBase [inline]
setLoadExtAction(unsigned ExtType, MVT VT, LegalizeAction Action)llvm::TargetLoweringBase [inline, protected]
setMinFunctionAlignment(unsigned Align)llvm::TargetLoweringBase [inline, protected]
setMinimumJumpTableEntries(int Val)llvm::TargetLoweringBase [inline, protected]
setMinStackArgumentAlignment(unsigned Align)llvm::TargetLoweringBase [inline, protected]
setOperationAction(unsigned Op, MVT VT, LegalizeAction Action)llvm::TargetLoweringBase [inline, protected]
setPow2SDivIsCheap(bool isCheap=true)llvm::TargetLoweringBase [inline, protected]
setPrefFunctionAlignment(unsigned Align)llvm::TargetLoweringBase [inline, protected]
setPrefLoopAlignment(unsigned Align)llvm::TargetLoweringBase [inline, protected]
setSchedulingPreference(Sched::Preference Pref)llvm::TargetLoweringBase [inline, protected]
setSelectIsExpensive(bool isExpensive=true)llvm::TargetLoweringBase [inline, protected]
setStackPointerRegisterToSaveRestore(unsigned R)llvm::TargetLoweringBase [inline, protected]
setTargetDAGCombine(ISD::NodeType NT)llvm::TargetLoweringBase [inline, protected]
setTruncStoreAction(MVT ValVT, MVT MemVT, LegalizeAction Action)llvm::TargetLoweringBase [inline, protected]
setUseUnderscoreLongJmp(bool Val)llvm::TargetLoweringBase [inline, protected]
setUseUnderscoreSetJmp(bool Val)llvm::TargetLoweringBase [inline, protected]
shouldConvertConstantLoadToIntImm(const APInt &Imm, Type *Ty) const llvm::TargetLoweringBase [inline, virtual]
shouldExpandAtomicLoadInIR(LoadInst *LI) const llvm::TargetLoweringBase [inline, virtual]
shouldExpandAtomicRMWInIR(AtomicRMWInst *RMWI) const llvm::TargetLoweringBase [inline, virtual]
shouldExpandAtomicStoreInIR(StoreInst *SI) const llvm::TargetLoweringBase [inline, virtual]
shouldExpandBuildVectorWithShuffles(EVT, unsigned DefinedValues) const llvm::TargetLoweringBase [inline, virtual]
ShouldShrinkFPConstant(EVT) const llvm::TargetLoweringBase [inline, virtual]
TargetLoweringBase(const TargetMachine &TM, const TargetLoweringObjectFile *TLOF)llvm::TargetLoweringBase [explicit]
TypeExpandFloat enum valuellvm::TargetLoweringBase
TypeExpandInteger enum valuellvm::TargetLoweringBase
TypeLegal enum valuellvm::TargetLoweringBase
TypePromoteInteger enum valuellvm::TargetLoweringBase
TypeScalarizeVector enum valuellvm::TargetLoweringBase
TypeSoftenFloat enum valuellvm::TargetLoweringBase
TypeSplitVector enum valuellvm::TargetLoweringBase
TypeWidenVector enum valuellvm::TargetLoweringBase
UndefinedBooleanContent enum valuellvm::TargetLoweringBase
usesUnderscoreLongJmp() const llvm::TargetLoweringBase [inline]
usesUnderscoreSetJmp() const llvm::TargetLoweringBase [inline]
VectorMaskSelect enum valuellvm::TargetLoweringBase
ZeroOrNegativeOneBooleanContent enum valuellvm::TargetLoweringBase
ZeroOrOneBooleanContent enum valuellvm::TargetLoweringBase
~TargetLoweringBase()llvm::TargetLoweringBase [virtual]