Enumerations

enum {
FIRST_NUMBER = ISD::BUILTIN_OP_END, CALL, UMUL, RET_FLAG,
BRANCH_COND, DWORDADDR, FRACT, CLAMP,
MAD, COS_HW, SIN_HW, FMAX,
SMAX, UMAX, FMIN, SMIN,
UMIN, URECIP, DIV_SCALE, DIV_FMAS,
DIV_FIXUP, TRIG_PREOP, RCP, RSQ,
RSQ_LEGACY, RSQ_CLAMPED, LDEXP, DOT4,
BFE_U32, BFE_I32, BFI, BFM,
BREV, MUL_U24, MUL_I24, MAD_U24,
MAD_I24, TEXTURE_FETCH, EXPORT, CONST_ADDRESS,
REGISTER_LOAD, REGISTER_STORE, LOAD_INPUT, SAMPLE,
SAMPLEB, SAMPLED, SAMPLEL, CVT_F32_UBYTE0,
CVT_F32_UBYTE1, CVT_F32_UBYTE2, CVT_F32_UBYTE3, BUILD_VERTICAL_VECTOR,
CONST_DATA_PTR, FIRST_MEM_OPCODE_NUMBER = ISD::FIRST_TARGET_MEMORY_OPCODE, STORE_MSKOR, LOAD_CONSTANT,
TBUFFER_STORE_FORMAT, LAST_AMDGPU_ISD_NUMBER
}

Enumeration Type Documentation

anonymous enum

Enumerator:

FIRST_NUMBER
CALL
UMUL
RET_FLAG
BRANCH_COND
DWORDADDR
FRACT
CLAMP
MAD
COS_HW
SIN_HW
FMAX
SMAX
UMAX
FMIN
SMIN
UMIN
URECIP
DIV_SCALE
DIV_FMAS
DIV_FIXUP
TRIG_PREOP
RCP
RSQ
RSQ_LEGACY
RSQ_CLAMPED
LDEXP
DOT4
BFE_U32
BFE_I32
BFI
BFM
BREV
MUL_U24
MUL_I24
MAD_U24
MAD_I24
TEXTURE_FETCH
EXPORT
CONST_ADDRESS
REGISTER_LOAD
REGISTER_STORE
LOAD_INPUT
SAMPLE
SAMPLEB
SAMPLED
SAMPLEL
CVT_F32_UBYTE0
CVT_F32_UBYTE1
CVT_F32_UBYTE2
CVT_F32_UBYTE3
BUILD_VERTICAL_VECTOR	This node is for VLIW targets and it is used to represent a vector that is stored in consecutive registers with the same channel. For example: \|X \|Y\|Z\|W\| T0\|v.x\| \| \| \| T1\|v.y\| \| \| \| T2\|v.z\| \| \| \| T3\|v.w\| \| \| \|
CONST_DATA_PTR	Pointer to the start of the shader's constant data.
FIRST_MEM_OPCODE_NUMBER
STORE_MSKOR
LOAD_CONSTANT
TBUFFER_STORE_FORMAT
LAST_AMDGPU_ISD_NUMBER

Definition at line 171 of file AMDGPUISelLowering.h.