#include <linux/hdlc.h>
#include <linux/interrupt.h>
#include <linux/netdevice.h>
#include <linux/pci.h>
#include <linux/io.h>
#include "ctrl.h"

Data Structures
struct	t3e3_rx_desc_t

struct	t3e3_tx_desc_t

struct	channel

struct	card

Macros
#define	SBE_2T3E3_21143_REG_BUS_MODE 0

#define	SBE_2T3E3_21143_REG_TRANSMIT_POLL_DEMAND 1

#define	SBE_2T3E3_21143_REG_RECEIVE_POLL_DEMAND 2

#define	SBE_2T3E3_21143_REG_RECEIVE_LIST_BASE_ADDRESS 3

#define	SBE_2T3E3_21143_REG_TRANSMIT_LIST_BASE_ADDRESS 4

#define	SBE_2T3E3_21143_REG_STATUS 5

#define	SBE_2T3E3_21143_REG_OPERATION_MODE 6

#define	SBE_2T3E3_21143_REG_INTERRUPT_ENABLE 7

#define	SBE_2T3E3_21143_REG_MISSED_FRAMES_AND_OVERFLOW_COUNTER 8

#define	SBE_2T3E3_21143_REG_BOOT_ROM_SERIAL_ROM_AND_MII_MANAGEMENT 9

#define	SBE_2T3E3_21143_REG_BOOT_ROM_PROGRAMMING_ADDRESS 10

#define	SBE_2T3E3_21143_REG_GENERAL_PURPOSE_TIMER_AND_INTERRUPT_MITIGATION_CONTROL 11

#define	SBE_2T3E3_21143_REG_SIA_STATUS 12

#define	SBE_2T3E3_21143_REG_SIA_CONNECTIVITY 13

#define	SBE_2T3E3_21143_REG_SIA_TRANSMIT_AND_RECEIVE 14

#define	SBE_2T3E3_21143_REG_SIA_AND_GENERAL_PURPOSE_PORT 15

#define	SBE_2T3E3_21143_REG_MAX 16

#define	SBE_2T3E3_21143_VAL_WRITE_AND_INVALIDATE_ENABLE 0x01000000

#define	SBE_2T3E3_21143_VAL_READ_LINE_ENABLE 0x00800000

#define	SBE_2T3E3_21143_VAL_READ_MULTIPLE_ENABLE 0x00200000

#define	SBE_2T3E3_21143_VAL_TRANSMIT_AUTOMATIC_POLLING_200us 0x00020000

#define	SBE_2T3E3_21143_VAL_TRANSMIT_AUTOMATIC_POLLING_DISABLED 0x00000000

#define	SBE_2T3E3_21143_VAL_CACHE_ALIGNMENT_32 0x0000c000

#define	SBE_2T3E3_21143_VAL_CACHE_ALIGNMENT_16 0x00008000

#define	SBE_2T3E3_21143_VAL_CACHE_ALIGNMENT_8 0x00004000

#define	SBE_2T3E3_21143_VAL_BUS_ARBITRATION_RR 0x00000002

#define	SBE_2T3E3_21143_VAL_SOFTWARE_RESET 0x00000001

#define	SBE_2T3E3_21143_VAL_GENERAL_PURPOSE_PORT_INTERRUPT 0x04000000

#define	SBE_2T3E3_21143_VAL_ERROR_BITS 0x03800000

#define	SBE_2T3E3_21143_VAL_PARITY_ERROR 0x00000000

#define	SBE_2T3E3_21143_VAL_MASTER_ABORT 0x00800000

#define	SBE_2T3E3_21143_VAL_TARGET_ABORT 0x01000000

#define	SBE_2T3E3_21143_VAL_TRANSMISSION_PROCESS_STATE 0x00700000

#define	SBE_2T3E3_21143_VAL_TX_STOPPED 0x00000000

#define	SBE_2T3E3_21143_VAL_TX_SUSPENDED 0x00600000

#define	SBE_2T3E3_21143_VAL_RECEIVE_PROCESS_STATE 0x000e0000

#define	SBE_2T3E3_21143_VAL_RX_STOPPED 0x00000000

#define	SBE_2T3E3_21143_VAL_RX_SUSPENDED 0x000a0000

#define	SBE_2T3E3_21143_VAL_NORMAL_INTERRUPT_SUMMARY 0x00010000

#define	SBE_2T3E3_21143_VAL_ABNORMAL_INTERRUPT_SUMMARY 0x00008000

#define	SBE_2T3E3_21143_VAL_EARLY_RECEIVE_INTERRUPT 0x00004000

#define	SBE_2T3E3_21143_VAL_FATAL_BUS_ERROR 0x00002000

#define	SBE_2T3E3_21143_VAL_GENERAL_PURPOSE_TIMER_EXPIRED 0x00000800

#define	SBE_2T3E3_21143_VAL_EARLY_TRANSMIT_INTERRUPT 0x00000400

#define	SBE_2T3E3_21143_VAL_RECEIVE_WATCHDOG_TIMEOUT 0x00000200

#define	SBE_2T3E3_21143_VAL_RECEIVE_PROCESS_STOPPED 0x00000100

#define	SBE_2T3E3_21143_VAL_RECEIVE_BUFFER_UNAVAILABLE 0x00000080

#define	SBE_2T3E3_21143_VAL_RECEIVE_INTERRUPT 0x00000040

#define	SBE_2T3E3_21143_VAL_TRANSMIT_UNDERFLOW 0x00000020

#define	SBE_2T3E3_21143_VAL_TRANSMIT_JABBER_TIMEOUT 0x00000008

#define	SBE_2T3E3_21143_VAL_TRANSMIT_BUFFER_UNAVAILABLE 0x00000004

#define	SBE_2T3E3_21143_VAL_TRANSMIT_PROCESS_STOPPED 0x00000002

#define	SBE_2T3E3_21143_VAL_TRANSMIT_INTERRUPT 0x00000001

#define	SBE_2T3E3_21143_VAL_SPECIAL_CAPTURE_EFFECT_ENABLE 0x80000000

#define	SBE_2T3E3_21143_VAL_RECEIVE_ALL 0x40000000

#define	SBE_2T3E3_21143_VAL_MUST_BE_ONE 0x02000000

#define	SBE_2T3E3_21143_VAL_SCRAMBLER_MODE 0x01000000

#define	SBE_2T3E3_21143_VAL_PCS_FUNCTION 0x00800000

#define	SBE_2T3E3_21143_VAL_TRANSMIT_THRESHOLD_MODE_10Mbs 0x00400000

#define	SBE_2T3E3_21143_VAL_TRANSMIT_THRESHOLD_MODE_100Mbs 0x00000000

#define	SBE_2T3E3_21143_VAL_STORE_AND_FORWARD 0x00200000

#define	SBE_2T3E3_21143_VAL_HEARTBEAT_DISABLE 0x00080000

#define	SBE_2T3E3_21143_VAL_PORT_SELECT 0x00040000

#define	SBE_2T3E3_21143_VAL_CAPTURE_EFFECT_ENABLE 0x00020000

#define	SBE_2T3E3_21143_VAL_THRESHOLD_CONTROL_BITS 0x0000c000

#define	SBE_2T3E3_21143_VAL_THRESHOLD_CONTROL_BITS_1 0x00000000

#define	SBE_2T3E3_21143_VAL_THRESHOLD_CONTROL_BITS_2 0x00004000

#define	SBE_2T3E3_21143_VAL_THRESHOLD_CONTROL_BITS_3 0x00008000

#define	SBE_2T3E3_21143_VAL_THRESHOLD_CONTROL_BITS_4 0x0000c000

#define	SBE_2T3E3_21143_VAL_TRANSMISSION_START 0x00002000

#define	SBE_2T3E3_21143_VAL_OPERATING_MODE 0x00000c00

#define	SBE_2T3E3_21143_VAL_LOOPBACK_OFF 0x00000000

#define	SBE_2T3E3_21143_VAL_LOOPBACK_EXTERNAL 0x00000800

#define	SBE_2T3E3_21143_VAL_LOOPBACK_INTERNAL 0x00000400

#define	SBE_2T3E3_21143_VAL_FULL_DUPLEX_MODE 0x00000200

#define	SBE_2T3E3_21143_VAL_PASS_ALL_MULTICAST 0x00000080

#define	SBE_2T3E3_21143_VAL_PROMISCUOUS_MODE 0x00000040

#define	SBE_2T3E3_21143_VAL_PASS_BAD_FRAMES 0x00000008

#define	SBE_2T3E3_21143_VAL_RECEIVE_START 0x00000002

#define	SBE_2T3E3_21143_VAL_LINK_CHANGED_ENABLE 0x08000000

#define	SBE_2T3E3_21143_VAL_GENERAL_PURPOSE_PORT_ENABLE 0x04000000

#define	SBE_2T3E3_21143_VAL_NORMAL_INTERRUPT_SUMMARY_ENABLE 0x00010000

#define	SBE_2T3E3_21143_VAL_ABNORMAL_INTERRUPT_SUMMARY_ENABLE 0x00008000

#define	SBE_2T3E3_21143_VAL_EARLY_RECEIVE_INTERRUPT_ENABLE 0x00004000

#define	SBE_2T3E3_21143_VAL_FATAL_BUS_ERROR_ENABLE 0x00002000

#define	SBE_2T3E3_21143_VAL_LINK_FAIL_ENABLE 0x00001000

#define	SBE_2T3E3_21143_VAL_GENERAL_PURPOSE_TIMER_ENABLE 0x00000800

#define	SBE_2T3E3_21143_VAL_EARLY_TRANSMIT_INTERRUPT_ENABLE 0x00000400

#define	SBE_2T3E3_21143_VAL_RECEIVE_WATCHDOG_TIMEOUT_ENABLE 0x00000200

#define	SBE_2T3E3_21143_VAL_RECEIVE_STOPPED_ENABLE 0x00000100

#define	SBE_2T3E3_21143_VAL_RECEIVE_BUFFER_UNAVAILABLE_ENABLE 0x00000080

#define	SBE_2T3E3_21143_VAL_RECEIVE_INTERRUPT_ENABLE 0x00000040

#define	SBE_2T3E3_21143_VAL_TRANSMIT_UNDERFLOW_INTERRUPT_ENABLE 0x00000020

#define	SBE_2T3E3_21143_VAL_TRANSMIT_JABBER_TIMEOUT_ENABLE 0x00000008

#define	SBE_2T3E3_21143_VAL_TRANSMIT_BUFFER_UNAVAILABLE_ENABLE 0x00000004

#define	SBE_2T3E3_21143_VAL_TRANSMIT_STOPPED_ENABLE 0x00000002

#define	SBE_2T3E3_21143_VAL_TRANSMIT_INTERRUPT_ENABLE 0x00000001

#define	SBE_2T3E3_21143_VAL_OVERFLOW_COUNTER_OVERFLOW 0x10000000

#define	SBE_2T3E3_21143_VAL_OVERFLOW_COUNTER 0x0ffe0000

#define	SBE_2T3E3_21143_VAL_MISSED_FRAME_OVERFLOW 0x00010000

#define	SBE_2T3E3_21143_VAL_MISSED_FRAMES_COUNTER 0x0000ffff

#define	SBE_2T3E3_21143_VAL_MII_MANAGEMENT_DATA_IN 0x00080000

#define	SBE_2T3E3_21143_VAL_MII_MANAGEMENT_READ_MODE 0x00040000

#define	SBE_2T3E3_21143_VAL_MII_MANAGEMENT_DATA_OUT 0x00020000

#define	SBE_2T3E3_21143_VAL_MII_MANAGEMENT_CLOCK 0x00010000

#define	SBE_2T3E3_21143_VAL_READ_OPERATION 0x00004000

#define	SBE_2T3E3_21143_VAL_WRITE_OPERATION 0x00002000

#define	SBE_2T3E3_21143_VAL_BOOT_ROM_SELECT 0x00001000

#define	SBE_2T3E3_21143_VAL_SERIAL_ROM_SELECT 0x00000800

#define	SBE_2T3E3_21143_VAL_BOOT_ROM_DATA 0x000000ff

#define	SBE_2T3E3_21143_VAL_SERIAL_ROM_DATA_OUT 0x00000008

#define	SBE_2T3E3_21143_VAL_SERIAL_ROM_DATA_IN 0x00000004

#define	SBE_2T3E3_21143_VAL_SERIAL_ROM_CLOCK 0x00000002

#define	SBE_2T3E3_21143_VAL_SERIAL_ROM_CHIP_SELECT 0x00000001

#define	SBE_2T3E3_21143_VAL_CYCLE_SIZE 0x80000000

#define	SBE_2T3E3_21143_VAL_TRANSMIT_TIMER 0x78000000

#define	SBE_2T3E3_21143_VAL_NUMBER_OF_TRANSMIT_PACKETS 0x07000000

#define	SBE_2T3E3_21143_VAL_RECEIVE_TIMER 0x00f00000

#define	SBE_2T3E3_21143_VAL_NUMBER_OF_RECEIVE_PACKETS 0x000e0000

#define	SBE_2T3E3_21143_VAL_CONTINUOUS_MODE 0x00010000

#define	SBE_2T3E3_21143_VAL_TIMER_VALUE 0x0000ffff

#define	SBE_2T3E3_21143_VAL_10BASE_T_RECEIVE_PORT_ACTIVITY 0x00000200

#define	SBE_2T3E3_21143_VAL_AUI_RECEIVE_PORT_ACTIVITY 0x00000100

#define	SBE_2T3E3_21143_VAL_10Mbs_LINK_STATUS 0x00000004

#define	SBE_2T3E3_21143_VAL_100Mbs_LINK_STATUS 0x00000002

#define	SBE_2T3E3_21143_VAL_MII_RECEIVE_PORT_ACTIVITY 0x00000001

#define	SBE_2T3E3_21143_VAL_10BASE_T_OR_AUI 0x00000008

#define	SBE_2T3E3_21143_VAL_SIA_RESET 0x00000001

#define	SBE_2T3E3_21143_VAL_100BASE_TX_FULL_DUPLEX 0x00020000

#define	SBE_2T3E3_21143_VAL_COLLISION_DETECT_ENABLE 0x00000400

#define	SBE_2T3E3_21143_VAL_COLLISION_SQUELCH_ENABLE 0x00000200

#define	SBE_2T3E3_21143_VAL_RECEIVE_SQUELCH_ENABLE 0x00000100

#define	SBE_2T3E3_21143_VAL_LINK_PULSE_SEND_ENABLE 0x00000004

#define	SBE_2T3E3_21143_VAL_ENCODER_ENABLE 0x00000001

#define	SBE_2T3E3_21143_VAL_RECEIVE_WATCHDOG_DISABLE 0x00000010

#define	SBE_2T3E3_21143_VAL_AUI_BNC_MODE 0x00000008

#define	SBE_2T3E3_21143_VAL_HOST_UNJAB 0x00000002

#define	SBE_2T3E3_21143_VAL_JABBER_DISABLE 0x00000001

#define	SBE_2T3E3_CPLD_REG_PCRA 0

#define	SBE_2T3E3_CPLD_REG_PCRB 1

#define	SBE_2T3E3_CPLD_REG_PLCR 2

#define	SBE_2T3E3_CPLD_REG_PLTR 3

#define	SBE_2T3E3_CPLD_REG_PPFR 4

#define	SBE_2T3E3_CPLD_REG_BOARD_ID 5

#define	SBE_2T3E3_CPLD_REG_FPGA_VERSION 6

#define	SBE_2T3E3_CPLD_REG_FRAMER_BASE_ADDRESS 7

#define	SBE_2T3E3_CPLD_REG_SERIAL_CHIP_SELECT 8

#define	SBE_2T3E3_CPLD_REG_STATIC_RESET 9

#define	SBE_2T3E3_CPLD_REG_PULSE_RESET 10

#define	SBE_2T3E3_CPLD_REG_FPGA_RECONFIGURATION 11

#define	SBE_2T3E3_CPLD_REG_LEDR 12

#define	SBE_2T3E3_CPLD_REG_PICSR 13

#define	SBE_2T3E3_CPLD_REG_PIER 14

#define	SBE_2T3E3_CPLD_REG_PCRC 15

#define	SBE_2T3E3_CPLD_REG_PBWF 16

#define	SBE_2T3E3_CPLD_REG_PBWL 17

#define	SBE_2T3E3_CPLD_REG_MAX 18

#define	SBE_2T3E3_CPLD_VAL_LIU_SELECT 0

#define	SBE_2T3E3_CPLD_VAL_DAC_SELECT 1

#define	SBE_2T3E3_CPLD_VAL_LOOP_TIMING_SOURCE 2

#define	SBE_2T3E3_CPLD_VAL_LIU_FRAMER_RESET 3

#define	SBE_2T3E3_CPLD_VAL_CRC32 0x40

#define	SBE_2T3E3_CPLD_VAL_TRANSPARENT_MODE 0x20

#define	SBE_2T3E3_CPLD_VAL_REAR_PANEL 0x10

#define	SBE_2T3E3_CPLD_VAL_RAW_MODE 0x08

#define	SBE_2T3E3_CPLD_VAL_ALT 0x04

#define	SBE_2T3E3_CPLD_VAL_LOOP_TIMING 0x02

#define	SBE_2T3E3_CPLD_VAL_LOCAL_CLOCK_E3 0x01

#define	SBE_2T3E3_CPLD_VAL_PAD_COUNT 0x30

#define	SBE_2T3E3_CPLD_VAL_PAD_COUNT_1 0x00

#define	SBE_2T3E3_CPLD_VAL_PAD_COUNT_2 0x10

#define	SBE_2T3E3_CPLD_VAL_PAD_COUNT_3 0x20

#define	SBE_2T3E3_CPLD_VAL_PAD_COUNT_4 0x30

#define	SBE_2T3E3_CPLD_VAL_SCRAMBLER_TYPE 0x02

#define	SBE_2T3E3_CPLD_VAL_SCRAMBLER_ENABLE 0x01

#define	SBE_2T3E3_CPLD_VAL_FRACTIONAL_MODE_NONE 0x00

#define	SBE_2T3E3_CPLD_VAL_FRACTIONAL_MODE_0 0x01

#define	SBE_2T3E3_CPLD_VAL_FRACTIONAL_MODE_1 0x11

#define	SBE_2T3E3_CPLD_VAL_FRACTIONAL_MODE_2 0x21

#define	SBE_2T3E3_CPLD_VAL_LCV_COUNTER 0xff

#define	SBE_2T3E3_CPLD_VAL_EEPROM_SELECT 0x10

#define	SBE_2T3E3_CPLD_VAL_LOSS_OF_SIGNAL_THRESHOLD_LEVEL_1 0x80

#define	SBE_2T3E3_CPLD_VAL_RECEIVE_LOSS_OF_SIGNAL_CHANGE 0x40

#define	SBE_2T3E3_CPLD_VAL_INTERRUPT_FROM_ETHERNET_ASSERTED 0x20

#define	SBE_2T3E3_CPLD_VAL_INTERRUPT_FROM_FRAMER_ASSERTED 0x10

#define	SBE_2T3E3_CPLD_VAL_LCV_LIMIT_EXCEEDED 0x08

#define	SBE_2T3E3_CPLD_VAL_DMO_SIGNAL_DETECTED 0x04

#define	SBE_2T3E3_CPLD_VAL_RECEIVE_LOSS_OF_LOCK_DETECTED 0x02

#define	SBE_2T3E3_CPLD_VAL_RECEIVE_LOSS_OF_SIGNAL_DETECTED 0x01

#define	SBE_2T3E3_CPLD_VAL_RECEIVE_LOS_CHANGE_ENABLE 0x40

#define	SBE_2T3E3_CPLD_VAL_INTERRUPT_FROM_ETHERNET_ENABLE 0x20

#define	SBE_2T3E3_CPLD_VAL_INTERRUPT_FROM_FRAMER_ENABLE 0x10

#define	SBE_2T3E3_CPLD_VAL_LCV_INTERRUPT_ENABLE 0x08

#define	SBE_2T3E3_CPLD_VAL_DMO_ENABLE 0x04

#define	SBE_2T3E3_CPLD_VAL_RECEIVE_LOSS_OF_LOCK_ENABLE 0x02

#define	SBE_2T3E3_CPLD_VAL_RECEIVE_LOSS_OF_SIGNAL_ENABLE 0x01

#define	SBE_2T3E3_FRAMER_REG_OPERATING_MODE 0

#define	SBE_2T3E3_FRAMER_REG_IO_CONTROL 1

#define	SBE_2T3E3_FRAMER_REG_BLOCK_INTERRUPT_ENABLE 2

#define	SBE_2T3E3_FRAMER_REG_BLOCK_INTERRUPT_STATUS 3

#define	SBE_2T3E3_FRAMER_REG_PMON_LCV_EVENT_COUNT_MSB 28

#define	SBE_2T3E3_FRAMER_REG_PMON_LCV_EVENT_COUNT_LSB 29

#define	SBE_2T3E3_FRAMER_REG_PMON_FRAMING_BIT_ERROR_EVENT_COUNT_MSB 30

#define	SBE_2T3E3_FRAMER_REG_PMON_FRAMING_BIT_ERROR_EVENT_COUNT_LSB 31

#define	SBE_2T3E3_FRAMER_REG_PMON_PARITY_ERROR_EVENT_COUNT_MSB 32

#define	SBE_2T3E3_FRAMER_REG_PMON_PARITY_ERROR_EVENT_COUNT_LSB 33

#define	SBE_2T3E3_FRAMER_REG_PMON_FEBE_EVENT_COUNT_MSB 34

#define	SBE_2T3E3_FRAMER_REG_PMON_FEBE_EVENT_COUNT_LSB 35

#define	SBE_2T3E3_FRAMER_REG_PMON_CP_BIT_ERROR_EVENT_COUNT_MSB 36

#define	SBE_2T3E3_FRAMER_REG_PMON_CP_BIT_ERROR_EVENT_COUNT_LSB 37

#define	SBE_2T3E3_FRAMER_REG_PMON_HOLDING_REGISTER 38

#define	SBE_2T3E3_FRAMER_REG_ONE_SECOND_ERROR_STATUS 39

#define	SBE_2T3E3_FRAMER_REG_LCV_ONE_SECOND_ACCUMULATOR_MSB 40

#define	SBE_2T3E3_FRAMER_REG_LCV_ONE_SECOND_ACCUMULATOR_LSB 41

#define	SBE_2T3E3_FRAMER_REG_FRAME_PARITY_ERROR_ONE_SECOND_ACCUMULATOR_MSB 42

#define	SBE_2T3E3_FRAMER_REG_FRAME_PARITY_ERROR_ONE_SECOND_ACCUMULATOR_LSB 43

#define	SBE_2T3E3_FRAMER_REG_FRAME_CP_BIT_ERROR_ONE_SECOND_ACCUMULATOR_MSB 44

#define	SBE_2T3E3_FRAMER_REG_FRAME_CP_BIT_ERROR_ONE_SECOND_ACCUMULATOR_LSB 45

#define	SBE_2T3E3_FRAMER_REG_LINE_INTERFACE_DRIVE 46

#define	SBE_2T3E3_FRAMER_REG_LINE_INTERFACE_SCAN 47

#define	SBE_2T3E3_FRAMER_REG_T3_RX_CONFIGURATION_STATUS 4

#define	SBE_2T3E3_FRAMER_REG_T3_RX_STATUS 5

#define	SBE_2T3E3_FRAMER_REG_T3_RX_INTERRUPT_ENABLE 6

#define	SBE_2T3E3_FRAMER_REG_T3_RX_INTERRUPT_STATUS 7

#define	SBE_2T3E3_FRAMER_REG_T3_RX_SYNC_DETECT_ENABLE 8

#define	SBE_2T3E3_FRAMER_REG_T3_RX_FEAC 10

#define	SBE_2T3E3_FRAMER_REG_T3_RX_FEAC_INTERRUPT_ENABLE_STATUS 11

#define	SBE_2T3E3_FRAMER_REG_T3_RX_LAPD_CONTROL 12

#define	SBE_2T3E3_FRAMER_REG_T3_RX_LAPD_STATUS 13

#define	SBE_2T3E3_FRAMER_REG_T3_TX_CONFIGURATION 16

#define	SBE_2T3E3_FRAMER_REG_T3_TX_FEAC_CONFIGURATION_STATUS 17

#define	SBE_2T3E3_FRAMER_REG_T3_TX_FEAC 18

#define	SBE_2T3E3_FRAMER_REG_T3_TX_LAPD_CONFIGURATION 19

#define	SBE_2T3E3_FRAMER_REG_T3_TX_LAPD_STATUS 20

#define	SBE_2T3E3_FRAMER_REG_T3_TX_MBIT_MASK 21

#define	SBE_2T3E3_FRAMER_REG_T3_TX_FBIT_MASK 22

#define	SBE_2T3E3_FRAMER_REG_T3_TX_FBIT_MASK_2 23

#define	SBE_2T3E3_FRAMER_REG_T3_TX_FBIT_MASK_3 24

#define	SBE_2T3E3_FRAMER_REG_E3_RX_CONFIGURATION_STATUS_1 4

#define	SBE_2T3E3_FRAMER_REG_E3_RX_CONFIGURATION_STATUS_2 5

#define	SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_ENABLE_1 6

#define	SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_ENABLE_2 7

#define	SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_STATUS_1 8

#define	SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_STATUS_2 9

#define	SBE_2T3E3_FRAMER_REG_E3_RX_LAPD_CONTROL 12

#define	SBE_2T3E3_FRAMER_REG_E3_RX_LAPD_STATUS 13

#define	SBE_2T3E3_FRAMER_REG_E3_RX_NR_BYTE 14

#define	SBE_2T3E3_FRAMER_REG_E3_RX_SERVICE_BITS 14

#define	SBE_2T3E3_FRAMER_REG_E3_RX_GC_BYTE 15

#define	SBE_2T3E3_FRAMER_REG_E3_TX_CONFIGURATION 16

#define	SBE_2T3E3_FRAMER_REG_E3_TX_LAPD_CONFIGURATION 19

#define	SBE_2T3E3_FRAMER_REG_E3_TX_LAPD_STATUS 19

#define	SBE_2T3E3_FRAMER_REG_E3_TX_GC_BYTE 21

#define	SBE_2T3E3_FRAMER_REG_E3_TX_SERVICE_BITS 21

#define	SBE_2T3E3_FRAMER_REG_E3_TX_MA_BYTE 22

#define	SBE_2T3E3_FRAMER_REG_E3_TX_NR_BYTE 23

#define	SBE_2T3E3_FRAMER_REG_E3_TX_FA1_ERROR_MASK 25

#define	SBE_2T3E3_FRAMER_REG_E3_TX_FAS_ERROR_MASK_UPPER 25

#define	SBE_2T3E3_FRAMER_REG_E3_TX_FA2_ERROR_MASK 26

#define	SBE_2T3E3_FRAMER_REG_E3_TX_FAS_ERROR_MASK_LOWER 26

#define	SBE_2T3E3_FRAMER_REG_E3_TX_BIP8_MASK 27

#define	SBE_2T3E3_FRAMER_REG_E3_TX_BIP4_MASK 27

#define	SBE_2T3E3_FRAMER_REG_MAX 48

#define	SBE_2T3E3_FRAMER_VAL_LOCAL_LOOPBACK_MODE 0x80

#define	SBE_2T3E3_FRAMER_VAL_T3_E3_SELECT 0x40

#define	SBE_2T3E3_FRAMER_VAL_INTERNAL_LOS_ENABLE 0x20

#define	SBE_2T3E3_FRAMER_VAL_RESET 0x10

#define	SBE_2T3E3_FRAMER_VAL_INTERRUPT_ENABLE_RESET 0x08

#define	SBE_2T3E3_FRAMER_VAL_FRAME_FORMAT_SELECT 0x04

#define	SBE_2T3E3_FRAMER_VAL_TIMING_ASYNCH_TXINCLK 0x03

#define	SBE_2T3E3_FRAMER_VAL_E3_G751 0x00

#define	SBE_2T3E3_FRAMER_VAL_E3_G832 0x04

#define	SBE_2T3E3_FRAMER_VAL_T3_CBIT 0x40

#define	SBE_2T3E3_FRAMER_VAL_T3_M13 0x44

#define	SBE_2T3E3_FRAMER_VAL_LOOPBACK_ON 0x80

#define	SBE_2T3E3_FRAMER_VAL_LOOPBACK_OFF 0x00

#define	SBE_2T3E3_FRAMER_VAL_DISABLE_TX_LOSS_OF_CLOCK 0x80

#define	SBE_2T3E3_FRAMER_VAL_LOSS_OF_CLOCK_STATUS 0x40

#define	SBE_2T3E3_FRAMER_VAL_DISABLE_RX_LOSS_OF_CLOCK 0x20

#define	SBE_2T3E3_FRAMER_VAL_AMI_LINE_CODE 0x10

#define	SBE_2T3E3_FRAMER_VAL_UNIPOLAR 0x08

#define	SBE_2T3E3_FRAMER_VAL_TX_LINE_CLOCK_INVERT 0x04

#define	SBE_2T3E3_FRAMER_VAL_RX_LINE_CLOCK_INVERT 0x02

#define	SBE_2T3E3_FRAMER_VAL_REFRAME 0x01

#define	SBE_2T3E3_FRAMER_VAL_RX_INTERRUPT_ENABLE 0x80

#define	SBE_2T3E3_FRAMER_VAL_TX_INTERRUPT_ENABLE 0x02

#define	SBE_2T3E3_FRAMER_VAL_ONE_SECOND_INTERRUPT_ENABLE 0x01

#define	SBE_2T3E3_FRAMER_VAL_RX_INTERRUPT_STATUS 0x80

#define	SBE_2T3E3_FRAMER_VAL_TX_INTERRUPT_STATUS 0x02

#define	SBE_2T3E3_FRAMER_VAL_ONE_SECOND_INTERRUPT_STATUS 0x01

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_AIS 0x80

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_LOS 0x40

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_IDLE 0x20

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_OOF 0x10

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_FRAMING_ON_PARITY 0x04

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_F_SYNC_ALGO 0x02

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_M_SYNC_ALGO 0x01

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_FERF 0x10

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_AIC 0x04

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_FEBE 0x07

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_CP_BIT_ERROR_INTERRUPT_ENABLE 0x80

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_ENABLE 0x40

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_AIS_INTERRUPT_ENABLE 0x20

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_IDLE_INTERRUPT_ENABLE 0x10

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_FERF_INTERRUPT_ENABLE 0x08

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_AIC_INTERRUPT_ENABLE 0x04

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_ENABLE 0x02

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_P_BIT_INTERRUPT_ENABLE 0x01

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_CP_BIT_ERROR_INTERRUPT_STATUS 0x80

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_STATUS 0x40

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_AIS_INTERRUPT_STATUS 0x20

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_IDLE_INTERRUPT_STATUS 0x10

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_FERF_INTERRUPT_STATUS 0x08

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_AIC_INTERRUPT_STATUS 0x04

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_STATUS 0x02

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_P_BIT_INTERRUPT_STATUS 0x01

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_VALID 0x10

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_REMOVE_INTERRUPT_ENABLE 0x08

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_REMOVE_INTERRUPT_STATUS 0x04

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_VALID_INTERRUPT_ENABLE 0x02

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_VALID_INTERRUPT_STATUS 0x01

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_LAPD_ENABLE 0x04

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_LAPD_INTERRUPT_ENABLE 0x02

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_LAPD_INTERRUPT_STATUS 0x01

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_ABORT 0x40

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_LAPD_TYPE 0x30

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_CR_TYPE 0x08

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_FCS_ERROR 0x04

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_END_OF_MESSAGE 0x02

#define	SBE_2T3E3_FRAMER_VAL_T3_RX_FLAG_PRESENT 0x01

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_YELLOW_ALARM 0x80

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_X_BIT 0x40

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_IDLE 0x20

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_AIS 0x10

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_LOS 0x08

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_FERF_ON_LOS 0x04

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_FERF_ON_OOF 0x02

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_FERF_ON_AIS 0x01

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_FEAC_INTERRUPT_ENABLE 0x10

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_FEAC_INTERRUPT_STATUS 0x08

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_FEAC_ENABLE 0x04

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_FEAC_GO 0x02

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_FEAC_BUSY 0x01

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_DL_START 0x08

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_DL_BUSY 0x04

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_LAPD_INTERRUPT_ENABLE 0x02

#define	SBE_2T3E3_FRAMER_VAL_T3_TX_LAPD_INTERRUPT_STATUS 0x01

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_PAYLOAD_TYPE 0xe0

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_FERF_ALGO 0x10

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_T_MARK_ALGO 0x08

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_PAYLOAD_EXPECTED 0x07

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_BIP4 0x01

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_LOF_ALGO 0x80

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_LOF 0x40

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_OOF 0x20

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_LOS 0x10

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_AIS 0x08

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_PAYLOAD_UNSTABLE 0x04

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_T_MARK 0x02

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_FERF 0x01

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_COFA_INTERRUPT_ENABLE 0x10

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_ENABLE 0x08

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_LOF_INTERRUPT_ENABLE 0x04

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_ENABLE 0x02

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_AIS_INTERRUPT_ENABLE 0x01

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_TTB_CHANGE_INTERRUPT_ENABLE 0x40

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_FEBE_INTERRUPT_ENABLE 0x10

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_FERF_INTERRUPT_ENABLE 0x08

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_BIP8_ERROR_INTERRUPT_ENABLE 0x04

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_BIP4_ERROR_INTERRUPT_ENABLE 0x04

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_FRAMING_BYTE_ERROR_INTERRUPT_ENABLE 0x02

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_PAYLOAD_MISMATCH_INTERRUPT_ENABLE 0x01

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_COFA_INTERRUPT_STATUS 0x10

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_STATUS 0x08

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_LOF_INTERRUPT_STATUS 0x04

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_STATUS 0x02

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_AIS_INTERRUPT_STATUS 0x01

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_TTB_CHANGE_INTERRUPT_STATUS 0x40

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_FEBE_INTERRUPT_STATUS 0x10

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_FERF_INTERRUPT_STATUS 0x08

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_BIP8_ERROR_INTERRUPT_STATUS 0x04

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_BIP4_ERROR_INTERRUPT_STATUS 0x04

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_FRAMING_BYTE_ERROR_INTERRUPT_STATUS 0x02

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_PAYLOAD_MISMATCH_INTERRUPT_STATUS 0x01

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_DL_FROM_NR 0x08

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_LAPD_ENABLE 0x04

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_LAPD_INTERRUPT_ENABLE 0x02

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_LAPD_INTERRUPT_STATUS 0x01

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_ABORT 0x40

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_LAPD_TYPE 0x30

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_CR_TYPE 0x08

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_FCS_ERROR 0x04

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_END_OF_MESSAGE 0x02

#define	SBE_2T3E3_FRAMER_VAL_E3_RX_FLAG_PRESENT 0x01

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_BIP4_ENABLE 0x80

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_A_SOURCE_SELECT 0x60

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_DL_IN_NR 0x10

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_N_SOURCE_SELECT 0x18

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_AIS_ENABLE 0x04

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_LOS_ENABLE 0x02

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_MA_RX 0x01

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_FAS_SOURCE_SELECT 0x01

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_AUTO_RETRANSMIT 0x08

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_LAPD_MESSAGE_LENGTH 0x02

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_LAPD_ENABLE 0x01

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_DL_START 0x08

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_DL_BUSY 0x04

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_LAPD_INTERRUPT_ENABLE 0x02

#define	SBE_2T3E3_FRAMER_VAL_E3_TX_LAPD_INTERRUPT_STATUS 0x01

#define	SBE_2T3E3_LIU_REG_REG0 0

#define	SBE_2T3E3_LIU_REG_REG1 1

#define	SBE_2T3E3_LIU_REG_REG2 2

#define	SBE_2T3E3_LIU_REG_REG3 3

#define	SBE_2T3E3_LIU_REG_REG4 4

#define	SBE_2T3E3_LIU_REG_MAX 5

#define	SBE_2T3E3_LIU_VAL_RECEIVE_LOSS_OF_LOCK_STATUS 0x10

#define	SBE_2T3E3_LIU_VAL_RECEIVE_LOSS_OF_SIGNAL_STATUS 0x08

#define	SBE_2T3E3_LIU_VAL_ANALOG_LOSS_OF_SIGNAL_STATUS 0x04

#define	SBE_2T3E3_LIU_VAL_DIGITAL_LOSS_OF_SIGNAL_STATUS 0x02

#define	SBE_2T3E3_LIU_VAL_DMO_STATUS 0x01

#define	SBE_2T3E3_LIU_VAL_TRANSMITTER_OFF 0x10

#define	SBE_2T3E3_LIU_VAL_TRANSMIT_ALL_ONES 0x08

#define	SBE_2T3E3_LIU_VAL_TRANSMIT_CLOCK_INVERT 0x04

#define	SBE_2T3E3_LIU_VAL_TRANSMIT_LEVEL_SELECT 0x02

#define	SBE_2T3E3_LIU_VAL_TRANSMIT_BINARY_DATA 0x01

#define	SBE_2T3E3_LIU_VAL_DECODER_DISABLE 0x10

#define	SBE_2T3E3_LIU_VAL_ENCODER_DISABLE 0x08

#define	SBE_2T3E3_LIU_VAL_ANALOG_LOSS_OF_SIGNAL_DISABLE 0x04

#define	SBE_2T3E3_LIU_VAL_DIGITAL_LOSS_OF_SIGNAL_DISABLE 0x02

#define	SBE_2T3E3_LIU_VAL_RECEIVE_EQUALIZATION_DISABLE 0x01

#define	SBE_2T3E3_LIU_VAL_RECEIVE_BINARY_DATA 0x10

#define	SBE_2T3E3_LIU_VAL_RECOVERED_DATA_MUTING 0x08

#define	SBE_2T3E3_LIU_VAL_RECEIVE_CLOCK_OUTPUT_2 0x04

#define	SBE_2T3E3_LIU_VAL_INVERT_RECEIVE_CLOCK_2 0x02

#define	SBE_2T3E3_LIU_VAL_INVERT_RECEIVE_CLOCK_1 0x01

#define	SBE_2T3E3_LIU_VAL_T3_MODE_SELECT 0x00

#define	SBE_2T3E3_LIU_VAL_E3_MODE_SELECT 0x04

#define	SBE_2T3E3_LIU_VAL_LOCAL_LOOPBACK 0x02

#define	SBE_2T3E3_LIU_VAL_REMOTE_LOOPBACK 0x01

#define	SBE_2T3E3_LIU_VAL_LOOPBACK_OFF 0x00

#define	SBE_2T3E3_LIU_VAL_LOOPBACK_REMOTE 0x01

#define	SBE_2T3E3_LIU_VAL_LOOPBACK_ANALOG 0x02

#define	SBE_2T3E3_LIU_VAL_LOOPBACK_DIGITAL 0x03

#define	SBE_2T3E3_RX_DESC_RING_SIZE 64

#define	SBE_2T3E3_RX_DESC_21143_OWN 0X80000000

#define	SBE_2T3E3_RX_DESC_FRAME_LENGTH 0x3fff0000

#define	SBE_2T3E3_RX_DESC_FRAME_LENGTH_SHIFT 16

#define	SBE_2T3E3_RX_DESC_ERROR_SUMMARY 0x00008000

#define	SBE_2T3E3_RX_DESC_DESC_ERROR 0x00004000

#define	SBE_2T3E3_RX_DESC_DATA_TYPE 0x00003000

#define	SBE_2T3E3_RX_DESC_RUNT_FRAME 0x00000800

#define	SBE_2T3E3_RX_DESC_FIRST_DESC 0x00000200

#define	SBE_2T3E3_RX_DESC_LAST_DESC 0x00000100

#define	SBE_2T3E3_RX_DESC_FRAME_TOO_LONG 0x00000080

#define	SBE_2T3E3_RX_DESC_COLLISION_SEEN 0x00000040

#define	SBE_2T3E3_RX_DESC_FRAME_TYPE 0x00000020

#define	SBE_2T3E3_RX_DESC_RECEIVE_WATCHDOG 0x00000010

#define	SBE_2T3E3_RX_DESC_MII_ERROR 0x00000008

#define	SBE_2T3E3_RX_DESC_DRIBBLING_BIT 0x00000004

#define	SBE_2T3E3_RX_DESC_CRC_ERROR 0x00000002

#define	SBE_2T3E3_RX_DESC_END_OF_RING 0x02000000

#define	SBE_2T3E3_RX_DESC_SECOND_ADDRESS_CHAINED 0x01000000

#define	SBE_2T3E3_RX_DESC_BUFFER_2_SIZE 0x003ff800

#define	SBE_2T3E3_RX_DESC_BUFFER_1_SIZE 0x000007ff

#define	SBE_2T3E3_TX_DESC_RING_SIZE 256

#define	SBE_2T3E3_TX_DESC_21143_OWN 0x80000000

#define	SBE_2T3E3_TX_DESC_ERROR_SUMMARY 0x00008000

#define	SBE_2T3E3_TX_DESC_TRANSMIT_JABBER_TIMEOUT 0x00004000

#define	SBE_2T3E3_TX_DESC_LOSS_OF_CARRIER 0x00000800

#define	SBE_2T3E3_TX_DESC_NO_CARRIER 0x00000400

#define	SBE_2T3E3_TX_DESC_LINK_FAIL_REPORT 0x00000004

#define	SBE_2T3E3_TX_DESC_UNDERFLOW_ERROR 0x00000002

#define	SBE_2T3E3_TX_DESC_DEFFERED 0x00000001

#define	SBE_2T3E3_TX_DESC_INTERRUPT_ON_COMPLETION 0x80000000

#define	SBE_2T3E3_TX_DESC_LAST_SEGMENT 0x40000000

#define	SBE_2T3E3_TX_DESC_FIRST_SEGMENT 0x20000000

#define	SBE_2T3E3_TX_DESC_CRC_DISABLE 0x04000000

#define	SBE_2T3E3_TX_DESC_END_OF_RING 0x02000000

#define	SBE_2T3E3_TX_DESC_SECOND_ADDRESS_CHAINED 0x01000000

#define	SBE_2T3E3_TX_DESC_DISABLE_PADDING 0x00800000

#define	SBE_2T3E3_TX_DESC_BUFFER_2_SIZE 0x003ff800

#define	SBE_2T3E3_TX_DESC_BUFFER_1_SIZE 0x000007ff

#define	SBE_2T3E3_MTU 1600

#define	SBE_2T3E3_CRC16_LENGTH 2

#define	SBE_2T3E3_CRC32_LENGTH 4

#define	MCLBYTES (SBE_2T3E3_MTU + 128)

#define	SBE_2T3E3_FLAG_NETWORK_UP 0x00000001

#define	SBE_2T3E3_FLAG_NO_ERROR_MESSAGES 0x00000002

#define	dev_to_priv(dev) ((struct channel ) ((hdlc_device)(dev) + 1))

#define	CPLD_MAP_REG(reg, sc) (cpld_reg_map[(reg)][(sc)->h.slot])

#define	exar7250_set_bit(sc, reg, bit)

#define	exar7250_clear_bit(sc, reg, bit)

#define	exar7300_set_bit(sc, reg, bit)

#define	exar7300_clear_bit(sc, reg, bit)

Functions
void	t3e3_init (struct channel *)

void	t3e3_if_up (struct channel *)

void	t3e3_if_down (struct channel *)

int	t3e3_if_start_xmit (struct sk_buff skb, struct net_device dev)

void	t3e3_if_config (struct channel , u32, char , t3e3_resp_t , int )

void	t3e3_set_frame_type (struct channel *, u32)

u32	t3e3_eeprom_read_word (struct channel *, u32)

void	t3e3_read_card_serial_number (struct channel *)

irqreturn_t	t3e3_intr (int irq, void *dev_instance)

void	dc_intr (struct channel *)

void	dc_intr_rx (struct channel *)

void	dc_intr_tx (struct channel *)

void	dc_intr_tx_underflow (struct channel *)

void	exar7250_intr (struct channel *)

void	exar7250_E3_intr (struct channel *, u32)

void	exar7250_T3_intr (struct channel *, u32)

u32	bootrom_read (struct channel *, u32)

void	bootrom_write (struct channel *, u32, u32)

void	dc_init (struct channel *)

void	dc_start (struct channel *)

void	dc_stop (struct channel *)

void	dc_start_intr (struct channel *)

void	dc_stop_intr (struct channel *)

void	dc_reset (struct channel *)

void	dc_restart (struct channel *)

void	dc_receiver_onoff (struct channel *, u32)

void	dc_transmitter_onoff (struct channel *, u32)

void	dc_set_loopback (struct channel *, u32)

void	dc_clear_descriptor_list (struct channel *)

void	dc_drop_descriptor_list (struct channel *)

void	dc_set_output_port (struct channel *)

void	t3e3_sc_init (struct channel *)

void	cpld_init (struct channel *sc)

u32	cpld_read (struct channel *sc, u32 reg)

void	cpld_set_crc (struct channel *, u32)

void	cpld_start_intr (struct channel *)

void	cpld_stop_intr (struct channel *)

void	cpld_set_clock (struct channel *sc, u32 mode)

void	cpld_set_scrambler (struct channel *, u32)

void	cpld_select_panel (struct channel *, u32)

void	cpld_set_frame_mode (struct channel *, u32)

void	cpld_set_frame_type (struct channel *, u32)

void	cpld_set_pad_count (struct channel *, u32)

void	cpld_set_fractional_mode (struct channel *, u32, u32, u32)

void	cpld_LOS_update (struct channel *)

u32	exar7250_read (struct channel *, u32)

void	exar7250_write (struct channel *, u32, u32)

void	exar7250_init (struct channel *)

void	exar7250_start_intr (struct channel *, u32)

void	exar7250_stop_intr (struct channel *, u32)

void	exar7250_set_frame_type (struct channel *, u32)

void	exar7250_set_loopback (struct channel *, u32)

void	exar7250_unipolar_onoff (struct channel *, u32)

u32	exar7300_read (struct channel *, u32)

void	exar7300_write (struct channel *, u32, u32)

void	exar7300_init (struct channel *)

void	exar7300_line_build_out_onoff (struct channel *, u32)

void	exar7300_set_frame_type (struct channel *, u32)

void	exar7300_set_loopback (struct channel *, u32)

void	exar7300_transmit_all_ones_onoff (struct channel *, u32)

void	exar7300_receive_equalization_onoff (struct channel *, u32)

void	exar7300_unipolar_onoff (struct channel *, u32)

void	update_led (struct channel *, int)

int	setup_device (struct net_device dev, struct channel sc)

Variables
const u32	cpld_reg_map [][2]

const u32	cpld_val_map [][2]

const u32	t3e3_framer_reg_map []

const u32	t3e3_liu_reg_map []

Macro Definition Documentation

#define CPLD_MAP_REG	(	reg,
		sc
	)	(cpld_reg_map[(reg)][(sc)->h.slot])

Definition at line 863 of file 2t3e3.h.

#define dev_to_priv ( dev ) (*(struct channel **) ((hdlc_device*)(dev) + 1))

Definition at line 841 of file 2t3e3.h.

#define exar7250_clear_bit	(	sc,
		reg,
		bit
	)

Value:

exar7250_write((sc), (reg), \

exar7250_read(sc, reg) & ~(bit))

Definition at line 877 of file 2t3e3.h.

#define exar7250_set_bit	(	sc,
		reg,
		bit
	)

Value:

exar7250_write((sc), (reg), \

exar7250_read(sc, reg) | (bit))

Definition at line 873 of file 2t3e3.h.

#define exar7300_clear_bit	(	sc,
		reg,
		bit
	)

Value:

exar7300_write((sc), (reg), \

exar7300_read(sc, reg) & ~(bit))

Definition at line 885 of file 2t3e3.h.

#define exar7300_set_bit	(	sc,
		reg,
		bit
	)

Value:

exar7300_write((sc), (reg), \

exar7300_read(sc, reg) | (bit))

Definition at line 881 of file 2t3e3.h.

#define MCLBYTES (SBE_2T3E3_MTU + 128)

Definition at line 686 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_BOOT_ROM_PROGRAMMING_ADDRESS 10

Definition at line 38 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_BOOT_ROM_SERIAL_ROM_AND_MII_MANAGEMENT 9

Definition at line 37 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_BUS_MODE 0

Definition at line 28 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_GENERAL_PURPOSE_TIMER_AND_INTERRUPT_MITIGATION_CONTROL 11

Definition at line 39 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_INTERRUPT_ENABLE 7

Definition at line 35 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_MAX 16

Definition at line 44 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_MISSED_FRAMES_AND_OVERFLOW_COUNTER 8

Definition at line 36 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_OPERATION_MODE 6

Definition at line 34 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_RECEIVE_LIST_BASE_ADDRESS 3

Definition at line 31 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_RECEIVE_POLL_DEMAND 2

Definition at line 30 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_SIA_AND_GENERAL_PURPOSE_PORT 15

Definition at line 43 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_SIA_CONNECTIVITY 13

Definition at line 41 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_SIA_STATUS 12

Definition at line 40 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_SIA_TRANSMIT_AND_RECEIVE 14

Definition at line 42 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_STATUS 5

Definition at line 33 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_TRANSMIT_LIST_BASE_ADDRESS 4

Definition at line 32 of file 2t3e3.h.

#define SBE_2T3E3_21143_REG_TRANSMIT_POLL_DEMAND 1

Definition at line 29 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_100BASE_TX_FULL_DUPLEX 0x00020000

Definition at line 176 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_100Mbs_LINK_STATUS 0x00000002

Definition at line 168 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_10BASE_T_OR_AUI 0x00000008

Definition at line 172 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_10BASE_T_RECEIVE_PORT_ACTIVITY 0x00000200

Definition at line 165 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_10Mbs_LINK_STATUS 0x00000004

Definition at line 167 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_ABNORMAL_INTERRUPT_SUMMARY 0x00008000

Definition at line 71 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_ABNORMAL_INTERRUPT_SUMMARY_ENABLE 0x00008000

Definition at line 118 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_AUI_BNC_MODE 0x00000008

Definition at line 185 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_AUI_RECEIVE_PORT_ACTIVITY 0x00000100

Definition at line 166 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_BOOT_ROM_DATA 0x000000ff

Definition at line 149 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_BOOT_ROM_SELECT 0x00001000

Definition at line 147 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_BUS_ARBITRATION_RR 0x00000002

Definition at line 55 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_CACHE_ALIGNMENT_16 0x00008000

Definition at line 53 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_CACHE_ALIGNMENT_32 0x0000c000

Definition at line 52 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_CACHE_ALIGNMENT_8 0x00004000

Definition at line 54 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_CAPTURE_EFFECT_ENABLE 0x00020000

Definition at line 97 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_COLLISION_DETECT_ENABLE 0x00000400

Definition at line 177 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_COLLISION_SQUELCH_ENABLE 0x00000200

Definition at line 178 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_CONTINUOUS_MODE 0x00010000

Definition at line 161 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_CYCLE_SIZE 0x80000000

Definition at line 156 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_EARLY_RECEIVE_INTERRUPT 0x00004000

Definition at line 72 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_EARLY_RECEIVE_INTERRUPT_ENABLE 0x00004000

Definition at line 119 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_EARLY_TRANSMIT_INTERRUPT 0x00000400

Definition at line 75 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_EARLY_TRANSMIT_INTERRUPT_ENABLE 0x00000400

Definition at line 123 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_ENCODER_ENABLE 0x00000001

Definition at line 181 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_ERROR_BITS 0x03800000

Definition at line 60 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_FATAL_BUS_ERROR 0x00002000

Definition at line 73 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_FATAL_BUS_ERROR_ENABLE 0x00002000

Definition at line 120 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_FULL_DUPLEX_MODE 0x00000200

Definition at line 108 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_GENERAL_PURPOSE_PORT_ENABLE 0x04000000

Definition at line 116 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_GENERAL_PURPOSE_PORT_INTERRUPT 0x04000000

Definition at line 59 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_GENERAL_PURPOSE_TIMER_ENABLE 0x00000800

Definition at line 122 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_GENERAL_PURPOSE_TIMER_EXPIRED 0x00000800

Definition at line 74 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_HEARTBEAT_DISABLE 0x00080000

Definition at line 95 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_HOST_UNJAB 0x00000002

Definition at line 186 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_JABBER_DISABLE 0x00000001

Definition at line 187 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_LINK_CHANGED_ENABLE 0x08000000

Definition at line 115 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_LINK_FAIL_ENABLE 0x00001000

Definition at line 121 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_LINK_PULSE_SEND_ENABLE 0x00000004

Definition at line 180 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_LOOPBACK_EXTERNAL 0x00000800

Definition at line 106 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_LOOPBACK_INTERNAL 0x00000400

Definition at line 107 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_LOOPBACK_OFF 0x00000000

Definition at line 105 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_MASTER_ABORT 0x00800000

Definition at line 62 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_MII_MANAGEMENT_CLOCK 0x00010000

Definition at line 144 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_MII_MANAGEMENT_DATA_IN 0x00080000

Definition at line 141 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_MII_MANAGEMENT_DATA_OUT 0x00020000

Definition at line 143 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_MII_MANAGEMENT_READ_MODE 0x00040000

Definition at line 142 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_MII_RECEIVE_PORT_ACTIVITY 0x00000001

Definition at line 169 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_MISSED_FRAME_OVERFLOW 0x00010000

Definition at line 137 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_MISSED_FRAMES_COUNTER 0x0000ffff

Definition at line 138 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_MUST_BE_ONE 0x02000000

Definition at line 89 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_NORMAL_INTERRUPT_SUMMARY 0x00010000

Definition at line 70 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_NORMAL_INTERRUPT_SUMMARY_ENABLE 0x00010000

Definition at line 117 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_NUMBER_OF_RECEIVE_PACKETS 0x000e0000

Definition at line 160 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_NUMBER_OF_TRANSMIT_PACKETS 0x07000000

Definition at line 158 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_OPERATING_MODE 0x00000c00

Definition at line 104 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_OVERFLOW_COUNTER 0x0ffe0000

Definition at line 136 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_OVERFLOW_COUNTER_OVERFLOW 0x10000000

Definition at line 135 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_PARITY_ERROR 0x00000000

Definition at line 61 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_PASS_ALL_MULTICAST 0x00000080

Definition at line 109 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_PASS_BAD_FRAMES 0x00000008

Definition at line 111 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_PCS_FUNCTION 0x00800000

Definition at line 91 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_PORT_SELECT 0x00040000

Definition at line 96 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_PROMISCUOUS_MODE 0x00000040

Definition at line 110 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_READ_LINE_ENABLE 0x00800000

Definition at line 48 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_READ_MULTIPLE_ENABLE 0x00200000

Definition at line 49 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_READ_OPERATION 0x00004000

Definition at line 145 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_ALL 0x40000000

Definition at line 88 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_BUFFER_UNAVAILABLE 0x00000080

Definition at line 78 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_BUFFER_UNAVAILABLE_ENABLE 0x00000080

Definition at line 126 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_INTERRUPT 0x00000040

Definition at line 79 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_INTERRUPT_ENABLE 0x00000040

Definition at line 127 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_PROCESS_STATE 0x000e0000

Definition at line 67 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_PROCESS_STOPPED 0x00000100

Definition at line 77 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_SQUELCH_ENABLE 0x00000100

Definition at line 179 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_START 0x00000002

Definition at line 112 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_STOPPED_ENABLE 0x00000100

Definition at line 125 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_TIMER 0x00f00000

Definition at line 159 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_WATCHDOG_DISABLE 0x00000010

Definition at line 184 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_WATCHDOG_TIMEOUT 0x00000200

Definition at line 76 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RECEIVE_WATCHDOG_TIMEOUT_ENABLE 0x00000200

Definition at line 124 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RX_STOPPED 0x00000000

Definition at line 68 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_RX_SUSPENDED 0x000a0000

Definition at line 69 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_SCRAMBLER_MODE 0x01000000

Definition at line 90 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_SERIAL_ROM_CHIP_SELECT 0x00000001

Definition at line 153 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_SERIAL_ROM_CLOCK 0x00000002

Definition at line 152 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_SERIAL_ROM_DATA_IN 0x00000004

Definition at line 151 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_SERIAL_ROM_DATA_OUT 0x00000008

Definition at line 150 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_SERIAL_ROM_SELECT 0x00000800

Definition at line 148 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_SIA_RESET 0x00000001

Definition at line 173 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_SOFTWARE_RESET 0x00000001

Definition at line 56 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_SPECIAL_CAPTURE_EFFECT_ENABLE 0x80000000

Definition at line 87 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_STORE_AND_FORWARD 0x00200000

Definition at line 94 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TARGET_ABORT 0x01000000

Definition at line 63 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_THRESHOLD_CONTROL_BITS 0x0000c000

Definition at line 98 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_THRESHOLD_CONTROL_BITS_1 0x00000000

Definition at line 99 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_THRESHOLD_CONTROL_BITS_2 0x00004000

Definition at line 100 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_THRESHOLD_CONTROL_BITS_3 0x00008000

Definition at line 101 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_THRESHOLD_CONTROL_BITS_4 0x0000c000

Definition at line 102 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TIMER_VALUE 0x0000ffff

Definition at line 162 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMISSION_PROCESS_STATE 0x00700000

Definition at line 64 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMISSION_START 0x00002000

Definition at line 103 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_AUTOMATIC_POLLING_200us 0x00020000

Definition at line 50 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_AUTOMATIC_POLLING_DISABLED 0x00000000

Definition at line 51 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_BUFFER_UNAVAILABLE 0x00000004

Definition at line 82 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_BUFFER_UNAVAILABLE_ENABLE 0x00000004

Definition at line 130 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_INTERRUPT 0x00000001

Definition at line 84 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_INTERRUPT_ENABLE 0x00000001

Definition at line 132 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_JABBER_TIMEOUT 0x00000008

Definition at line 81 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_JABBER_TIMEOUT_ENABLE 0x00000008

Definition at line 129 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_PROCESS_STOPPED 0x00000002

Definition at line 83 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_STOPPED_ENABLE 0x00000002

Definition at line 131 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_THRESHOLD_MODE_100Mbs 0x00000000

Definition at line 93 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_THRESHOLD_MODE_10Mbs 0x00400000

Definition at line 92 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_TIMER 0x78000000

Definition at line 157 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_UNDERFLOW 0x00000020

Definition at line 80 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TRANSMIT_UNDERFLOW_INTERRUPT_ENABLE 0x00000020

Definition at line 128 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TX_STOPPED 0x00000000

Definition at line 65 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_TX_SUSPENDED 0x00600000

Definition at line 66 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_WRITE_AND_INVALIDATE_ENABLE 0x01000000

Definition at line 47 of file 2t3e3.h.

#define SBE_2T3E3_21143_VAL_WRITE_OPERATION 0x00002000

Definition at line 146 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_BOARD_ID 5

Definition at line 199 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_FPGA_RECONFIGURATION 11

Definition at line 205 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_FPGA_VERSION 6

Definition at line 200 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_FRAMER_BASE_ADDRESS 7

Definition at line 201 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_LEDR 12

Definition at line 206 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_MAX 18

Definition at line 213 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_PBWF 16

Definition at line 210 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_PBWL 17

Definition at line 211 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_PCRA 0

Definition at line 194 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_PCRB 1

Definition at line 195 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_PCRC 15

Definition at line 209 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_PICSR 13

Definition at line 207 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_PIER 14

Definition at line 208 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_PLCR 2

Definition at line 196 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_PLTR 3

Definition at line 197 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_PPFR 4

Definition at line 198 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_PULSE_RESET 10

Definition at line 204 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_SERIAL_CHIP_SELECT 8

Definition at line 202 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_REG_STATIC_RESET 9

Definition at line 203 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_ALT 0x04

Definition at line 228 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_CRC32 0x40

Definition at line 224 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_DAC_SELECT 1

Definition at line 219 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_DMO_ENABLE 0x04

Definition at line 268 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_DMO_SIGNAL_DETECTED 0x04

Definition at line 259 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_EEPROM_SELECT 0x10

Definition at line 251 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_FRACTIONAL_MODE_0 0x01

Definition at line 243 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_FRACTIONAL_MODE_1 0x11

Definition at line 244 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_FRACTIONAL_MODE_2 0x21

Definition at line 245 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_FRACTIONAL_MODE_NONE 0x00

Definition at line 242 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_INTERRUPT_FROM_ETHERNET_ASSERTED 0x20

Definition at line 256 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_INTERRUPT_FROM_ETHERNET_ENABLE 0x20

Definition at line 265 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_INTERRUPT_FROM_FRAMER_ASSERTED 0x10

Definition at line 257 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_INTERRUPT_FROM_FRAMER_ENABLE 0x10

Definition at line 266 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_LCV_COUNTER 0xff

Definition at line 248 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_LCV_INTERRUPT_ENABLE 0x08

Definition at line 267 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_LCV_LIMIT_EXCEEDED 0x08

Definition at line 258 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_LIU_FRAMER_RESET 3

Definition at line 221 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_LIU_SELECT 0

Definition at line 218 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_LOCAL_CLOCK_E3 0x01

Definition at line 230 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_LOOP_TIMING 0x02

Definition at line 229 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_LOOP_TIMING_SOURCE 2

Definition at line 220 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_LOSS_OF_SIGNAL_THRESHOLD_LEVEL_1 0x80

Definition at line 254 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_PAD_COUNT 0x30

Definition at line 233 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_PAD_COUNT_1 0x00

Definition at line 234 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_PAD_COUNT_2 0x10

Definition at line 235 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_PAD_COUNT_3 0x20

Definition at line 236 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_PAD_COUNT_4 0x30

Definition at line 237 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_RAW_MODE 0x08

Definition at line 227 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_REAR_PANEL 0x10

Definition at line 226 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_RECEIVE_LOS_CHANGE_ENABLE 0x40

Definition at line 264 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_RECEIVE_LOSS_OF_LOCK_DETECTED 0x02

Definition at line 260 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_RECEIVE_LOSS_OF_LOCK_ENABLE 0x02

Definition at line 269 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_RECEIVE_LOSS_OF_SIGNAL_CHANGE 0x40

Definition at line 255 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_RECEIVE_LOSS_OF_SIGNAL_DETECTED 0x01

Definition at line 261 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_RECEIVE_LOSS_OF_SIGNAL_ENABLE 0x01

Definition at line 270 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_SCRAMBLER_ENABLE 0x01

Definition at line 239 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_SCRAMBLER_TYPE 0x02

Definition at line 238 of file 2t3e3.h.

#define SBE_2T3E3_CPLD_VAL_TRANSPARENT_MODE 0x20

Definition at line 225 of file 2t3e3.h.

#define SBE_2T3E3_CRC16_LENGTH 2

Definition at line 683 of file 2t3e3.h.

#define SBE_2T3E3_CRC32_LENGTH 4

Definition at line 684 of file 2t3e3.h.

#define SBE_2T3E3_FLAG_NETWORK_UP 0x00000001

Definition at line 751 of file 2t3e3.h.

#define SBE_2T3E3_FLAG_NO_ERROR_MESSAGES 0x00000002

Definition at line 752 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_BLOCK_INTERRUPT_ENABLE 2

Definition at line 280 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_BLOCK_INTERRUPT_STATUS 3

Definition at line 281 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_RX_CONFIGURATION_STATUS_1 4

Definition at line 324 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_RX_CONFIGURATION_STATUS_2 5

Definition at line 325 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_RX_GC_BYTE 15

Definition at line 334 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_ENABLE_1 6

Definition at line 326 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_ENABLE_2 7

Definition at line 327 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_STATUS_1 8

Definition at line 328 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_RX_INTERRUPT_STATUS_2 9

Definition at line 329 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_RX_LAPD_CONTROL 12

Definition at line 330 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_RX_LAPD_STATUS 13

Definition at line 331 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_RX_NR_BYTE 14

Definition at line 332 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_RX_SERVICE_BITS 14

Definition at line 333 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_BIP4_MASK 27

Definition at line 347 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_BIP8_MASK 27

Definition at line 346 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_CONFIGURATION 16

Definition at line 335 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_FA1_ERROR_MASK 25

Definition at line 342 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_FA2_ERROR_MASK 26

Definition at line 344 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_FAS_ERROR_MASK_LOWER 26

Definition at line 345 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_FAS_ERROR_MASK_UPPER 25

Definition at line 343 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_GC_BYTE 21

Definition at line 338 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_LAPD_CONFIGURATION 19

Definition at line 336 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_LAPD_STATUS 19

Definition at line 337 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_MA_BYTE 22

Definition at line 340 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_NR_BYTE 23

Definition at line 341 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_E3_TX_SERVICE_BITS 21

Definition at line 339 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_FRAME_CP_BIT_ERROR_ONE_SECOND_ACCUMULATOR_LSB 45

Definition at line 299 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_FRAME_CP_BIT_ERROR_ONE_SECOND_ACCUMULATOR_MSB 44

Definition at line 298 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_FRAME_PARITY_ERROR_ONE_SECOND_ACCUMULATOR_LSB 43

Definition at line 297 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_FRAME_PARITY_ERROR_ONE_SECOND_ACCUMULATOR_MSB 42

Definition at line 296 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_IO_CONTROL 1

Definition at line 279 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_LCV_ONE_SECOND_ACCUMULATOR_LSB 41

Definition at line 295 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_LCV_ONE_SECOND_ACCUMULATOR_MSB 40

Definition at line 294 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_LINE_INTERFACE_DRIVE 46

Definition at line 300 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_LINE_INTERFACE_SCAN 47

Definition at line 301 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_MAX 48

Definition at line 349 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_ONE_SECOND_ERROR_STATUS 39

Definition at line 293 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_OPERATING_MODE 0

Definition at line 278 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_PMON_CP_BIT_ERROR_EVENT_COUNT_LSB 37

Definition at line 291 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_PMON_CP_BIT_ERROR_EVENT_COUNT_MSB 36

Definition at line 290 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_PMON_FEBE_EVENT_COUNT_LSB 35

Definition at line 289 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_PMON_FEBE_EVENT_COUNT_MSB 34

Definition at line 288 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_PMON_FRAMING_BIT_ERROR_EVENT_COUNT_LSB 31

Definition at line 285 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_PMON_FRAMING_BIT_ERROR_EVENT_COUNT_MSB 30

Definition at line 284 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_PMON_HOLDING_REGISTER 38

Definition at line 292 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_PMON_LCV_EVENT_COUNT_LSB 29

Definition at line 283 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_PMON_LCV_EVENT_COUNT_MSB 28

Definition at line 282 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_PMON_PARITY_ERROR_EVENT_COUNT_LSB 33

Definition at line 287 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_PMON_PARITY_ERROR_EVENT_COUNT_MSB 32

Definition at line 286 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_RX_CONFIGURATION_STATUS 4

Definition at line 304 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_RX_FEAC 10

Definition at line 309 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_RX_FEAC_INTERRUPT_ENABLE_STATUS 11

Definition at line 310 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_RX_INTERRUPT_ENABLE 6

Definition at line 306 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_RX_INTERRUPT_STATUS 7

Definition at line 307 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_RX_LAPD_CONTROL 12

Definition at line 311 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_RX_LAPD_STATUS 13

Definition at line 312 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_RX_STATUS 5

Definition at line 305 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_RX_SYNC_DETECT_ENABLE 8

Definition at line 308 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_TX_CONFIGURATION 16

Definition at line 313 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_TX_FBIT_MASK 22

Definition at line 319 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_TX_FBIT_MASK_2 23

Definition at line 320 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_TX_FBIT_MASK_3 24

Definition at line 321 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_TX_FEAC 18

Definition at line 315 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_TX_FEAC_CONFIGURATION_STATUS 17

Definition at line 314 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_TX_LAPD_CONFIGURATION 19

Definition at line 316 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_TX_LAPD_STATUS 20

Definition at line 317 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_REG_T3_TX_MBIT_MASK 21

Definition at line 318 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_AMI_LINE_CODE 0x10

Definition at line 372 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_DISABLE_RX_LOSS_OF_CLOCK 0x20

Definition at line 371 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_DISABLE_TX_LOSS_OF_CLOCK 0x80

Definition at line 369 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_G751 0x00

Definition at line 361 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_G832 0x04

Definition at line 362 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_ABORT 0x40

Definition at line 525 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_AIS 0x08

Definition at line 481 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_AIS_INTERRUPT_ENABLE 0x01

Definition at line 491 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_AIS_INTERRUPT_STATUS 0x01

Definition at line 507 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_BIP4 0x01

Definition at line 474 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_BIP4_ERROR_INTERRUPT_ENABLE 0x04

Definition at line 498 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_BIP4_ERROR_INTERRUPT_STATUS 0x04

Definition at line 514 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_BIP8_ERROR_INTERRUPT_ENABLE 0x04

Definition at line 497 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_BIP8_ERROR_INTERRUPT_STATUS 0x04

Definition at line 513 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_COFA_INTERRUPT_ENABLE 0x10

Definition at line 487 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_COFA_INTERRUPT_STATUS 0x10

Definition at line 503 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_CR_TYPE 0x08

Definition at line 527 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_DL_FROM_NR 0x08

Definition at line 519 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_END_OF_MESSAGE 0x02

Definition at line 529 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_FCS_ERROR 0x04

Definition at line 528 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_FEBE_INTERRUPT_ENABLE 0x10

Definition at line 495 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_FEBE_INTERRUPT_STATUS 0x10

Definition at line 511 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_FERF 0x01

Definition at line 484 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_FERF_ALGO 0x10

Definition at line 471 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_FERF_INTERRUPT_ENABLE 0x08

Definition at line 496 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_FERF_INTERRUPT_STATUS 0x08

Definition at line 512 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_FLAG_PRESENT 0x01

Definition at line 530 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_FRAMING_BYTE_ERROR_INTERRUPT_ENABLE 0x02

Definition at line 499 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_FRAMING_BYTE_ERROR_INTERRUPT_STATUS 0x02

Definition at line 515 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_LAPD_ENABLE 0x04

Definition at line 520 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_LAPD_INTERRUPT_ENABLE 0x02

Definition at line 521 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_LAPD_INTERRUPT_STATUS 0x01

Definition at line 522 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_LAPD_TYPE 0x30

Definition at line 526 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_LOF 0x40

Definition at line 478 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_LOF_ALGO 0x80

Definition at line 477 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_LOF_INTERRUPT_ENABLE 0x04

Definition at line 489 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_LOF_INTERRUPT_STATUS 0x04

Definition at line 505 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_LOS 0x10

Definition at line 480 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_ENABLE 0x02

Definition at line 490 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_LOS_INTERRUPT_STATUS 0x02

Definition at line 506 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_OOF 0x20

Definition at line 479 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_ENABLE 0x08

Definition at line 488 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_OOF_INTERRUPT_STATUS 0x08

Definition at line 504 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_PAYLOAD_EXPECTED 0x07

Definition at line 473 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_PAYLOAD_MISMATCH_INTERRUPT_ENABLE 0x01

Definition at line 500 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_PAYLOAD_MISMATCH_INTERRUPT_STATUS 0x01

Definition at line 516 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_PAYLOAD_TYPE 0xe0

Definition at line 470 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_PAYLOAD_UNSTABLE 0x04

Definition at line 482 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_T_MARK 0x02

Definition at line 483 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_T_MARK_ALGO 0x08

Definition at line 472 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_TTB_CHANGE_INTERRUPT_ENABLE 0x40

Definition at line 494 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_RX_TTB_CHANGE_INTERRUPT_STATUS 0x40

Definition at line 510 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_A_SOURCE_SELECT 0x60

Definition at line 534 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_AIS_ENABLE 0x04

Definition at line 537 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_AUTO_RETRANSMIT 0x08

Definition at line 543 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_BIP4_ENABLE 0x80

Definition at line 533 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_DL_BUSY 0x04

Definition at line 549 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_DL_IN_NR 0x10

Definition at line 535 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_DL_START 0x08

Definition at line 548 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_FAS_SOURCE_SELECT 0x01

Definition at line 540 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_LAPD_ENABLE 0x01

Definition at line 545 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_LAPD_INTERRUPT_ENABLE 0x02

Definition at line 550 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_LAPD_INTERRUPT_STATUS 0x01

Definition at line 551 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_LAPD_MESSAGE_LENGTH 0x02

Definition at line 544 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_LOS_ENABLE 0x02

Definition at line 538 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_MA_RX 0x01

Definition at line 539 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_E3_TX_N_SOURCE_SELECT 0x18

Definition at line 536 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_FRAME_FORMAT_SELECT 0x04

Definition at line 359 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_INTERNAL_LOS_ENABLE 0x20

Definition at line 356 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_INTERRUPT_ENABLE_RESET 0x08

Definition at line 358 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_LOCAL_LOOPBACK_MODE 0x80

Definition at line 354 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_LOOPBACK_OFF 0x00

Definition at line 366 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_LOOPBACK_ON 0x80

Definition at line 365 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_LOSS_OF_CLOCK_STATUS 0x40

Definition at line 370 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_ONE_SECOND_INTERRUPT_ENABLE 0x01

Definition at line 381 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_ONE_SECOND_INTERRUPT_STATUS 0x01

Definition at line 386 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_REFRAME 0x01

Definition at line 376 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_RESET 0x10

Definition at line 357 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_RX_INTERRUPT_ENABLE 0x80

Definition at line 379 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_RX_INTERRUPT_STATUS 0x80

Definition at line 384 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_RX_LINE_CLOCK_INVERT 0x02

Definition at line 375 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_CBIT 0x40

Definition at line 363 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_E3_SELECT 0x40

Definition at line 355 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_M13 0x44

Definition at line 364 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_ABORT 0x40

Definition at line 437 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_AIC 0x04

Definition at line 401 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_AIC_INTERRUPT_ENABLE 0x04

Definition at line 410 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_AIC_INTERRUPT_STATUS 0x04

Definition at line 420 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_AIS 0x80

Definition at line 391 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_AIS_INTERRUPT_ENABLE 0x20

Definition at line 407 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_AIS_INTERRUPT_STATUS 0x20

Definition at line 417 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_CP_BIT_ERROR_INTERRUPT_ENABLE 0x80

Definition at line 405 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_CP_BIT_ERROR_INTERRUPT_STATUS 0x80

Definition at line 415 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_CR_TYPE 0x08

Definition at line 439 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_END_OF_MESSAGE 0x02

Definition at line 441 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_F_SYNC_ALGO 0x02

Definition at line 396 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_FCS_ERROR 0x04

Definition at line 440 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_REMOVE_INTERRUPT_ENABLE 0x08

Definition at line 426 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_REMOVE_INTERRUPT_STATUS 0x04

Definition at line 427 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_VALID 0x10

Definition at line 425 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_VALID_INTERRUPT_ENABLE 0x02

Definition at line 428 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_FEAC_VALID_INTERRUPT_STATUS 0x01

Definition at line 429 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_FEBE 0x07

Definition at line 402 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_FERF 0x10

Definition at line 400 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_FERF_INTERRUPT_ENABLE 0x08

Definition at line 409 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_FERF_INTERRUPT_STATUS 0x08

Definition at line 419 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_FLAG_PRESENT 0x01

Definition at line 442 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_FRAMING_ON_PARITY 0x04

Definition at line 395 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_IDLE 0x20

Definition at line 393 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_IDLE_INTERRUPT_ENABLE 0x10

Definition at line 408 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_IDLE_INTERRUPT_STATUS 0x10

Definition at line 418 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_LAPD_ENABLE 0x04

Definition at line 432 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_LAPD_INTERRUPT_ENABLE 0x02

Definition at line 433 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_LAPD_INTERRUPT_STATUS 0x01

Definition at line 434 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_LAPD_TYPE 0x30

Definition at line 438 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_LOS 0x40

Definition at line 392 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_ENABLE 0x40

Definition at line 406 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_LOS_INTERRUPT_STATUS 0x40

Definition at line 416 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_M_SYNC_ALGO 0x01

Definition at line 397 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_OOF 0x10

Definition at line 394 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_ENABLE 0x02

Definition at line 411 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_OOF_INTERRUPT_STATUS 0x02

Definition at line 421 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_P_BIT_INTERRUPT_ENABLE 0x01

Definition at line 412 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_RX_P_BIT_INTERRUPT_STATUS 0x01

Definition at line 422 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_AIS 0x10

Definition at line 448 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_DL_BUSY 0x04

Definition at line 463 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_DL_START 0x08

Definition at line 462 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_FEAC_BUSY 0x01

Definition at line 459 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_FEAC_ENABLE 0x04

Definition at line 457 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_FEAC_GO 0x02

Definition at line 458 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_FEAC_INTERRUPT_ENABLE 0x10

Definition at line 455 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_FEAC_INTERRUPT_STATUS 0x08

Definition at line 456 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_FERF_ON_AIS 0x01

Definition at line 452 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_FERF_ON_LOS 0x04

Definition at line 450 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_FERF_ON_OOF 0x02

Definition at line 451 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_IDLE 0x20

Definition at line 447 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_LAPD_INTERRUPT_ENABLE 0x02

Definition at line 464 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_LAPD_INTERRUPT_STATUS 0x01

Definition at line 465 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_LOS 0x08

Definition at line 449 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_X_BIT 0x40

Definition at line 446 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_T3_TX_YELLOW_ALARM 0x80

Definition at line 445 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_TIMING_ASYNCH_TXINCLK 0x03

Definition at line 360 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_TX_INTERRUPT_ENABLE 0x02

Definition at line 380 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_TX_INTERRUPT_STATUS 0x02

Definition at line 385 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_TX_LINE_CLOCK_INVERT 0x04

Definition at line 374 of file 2t3e3.h.

#define SBE_2T3E3_FRAMER_VAL_UNIPOLAR 0x08

Definition at line 373 of file 2t3e3.h.

#define SBE_2T3E3_LIU_REG_MAX 5

Definition at line 569 of file 2t3e3.h.

#define SBE_2T3E3_LIU_REG_REG0 0

Definition at line 563 of file 2t3e3.h.

#define SBE_2T3E3_LIU_REG_REG1 1

Definition at line 564 of file 2t3e3.h.

#define SBE_2T3E3_LIU_REG_REG2 2

Definition at line 565 of file 2t3e3.h.

#define SBE_2T3E3_LIU_REG_REG3 3

Definition at line 566 of file 2t3e3.h.

#define SBE_2T3E3_LIU_REG_REG4 4

Definition at line 567 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_ANALOG_LOSS_OF_SIGNAL_DISABLE 0x04

Definition at line 590 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_ANALOG_LOSS_OF_SIGNAL_STATUS 0x04

Definition at line 576 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_DECODER_DISABLE 0x10

Definition at line 588 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_DIGITAL_LOSS_OF_SIGNAL_DISABLE 0x02

Definition at line 591 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_DIGITAL_LOSS_OF_SIGNAL_STATUS 0x02

Definition at line 577 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_DMO_STATUS 0x01

Definition at line 578 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_E3_MODE_SELECT 0x04

Definition at line 603 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_ENCODER_DISABLE 0x08

Definition at line 589 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_INVERT_RECEIVE_CLOCK_1 0x01

Definition at line 599 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_INVERT_RECEIVE_CLOCK_2 0x02

Definition at line 598 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_LOCAL_LOOPBACK 0x02

Definition at line 604 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_LOOPBACK_ANALOG 0x02

Definition at line 608 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_LOOPBACK_DIGITAL 0x03

Definition at line 609 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_LOOPBACK_OFF 0x00

Definition at line 606 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_LOOPBACK_REMOTE 0x01

Definition at line 607 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_RECEIVE_BINARY_DATA 0x10

Definition at line 595 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_RECEIVE_CLOCK_OUTPUT_2 0x04

Definition at line 597 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_RECEIVE_EQUALIZATION_DISABLE 0x01

Definition at line 592 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_RECEIVE_LOSS_OF_LOCK_STATUS 0x10

Definition at line 574 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_RECEIVE_LOSS_OF_SIGNAL_STATUS 0x08

Definition at line 575 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_RECOVERED_DATA_MUTING 0x08

Definition at line 596 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_REMOTE_LOOPBACK 0x01

Definition at line 605 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_T3_MODE_SELECT 0x00

Definition at line 602 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_TRANSMIT_ALL_ONES 0x08

Definition at line 582 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_TRANSMIT_BINARY_DATA 0x01

Definition at line 585 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_TRANSMIT_CLOCK_INVERT 0x04

Definition at line 583 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_TRANSMIT_LEVEL_SELECT 0x02

Definition at line 584 of file 2t3e3.h.

#define SBE_2T3E3_LIU_VAL_TRANSMITTER_OFF 0x10

Definition at line 581 of file 2t3e3.h.

#define SBE_2T3E3_MTU 1600

Definition at line 682 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_21143_OWN 0X80000000

Definition at line 626 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_BUFFER_1_SIZE 0x000007ff

Definition at line 647 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_BUFFER_2_SIZE 0x003ff800

Definition at line 646 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_COLLISION_SEEN 0x00000040

Definition at line 636 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_CRC_ERROR 0x00000002

Definition at line 641 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_DATA_TYPE 0x00003000

Definition at line 631 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_DESC_ERROR 0x00004000

Definition at line 630 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_DRIBBLING_BIT 0x00000004

Definition at line 640 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_END_OF_RING 0x02000000

Definition at line 644 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_ERROR_SUMMARY 0x00008000

Definition at line 629 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_FIRST_DESC 0x00000200

Definition at line 633 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_FRAME_LENGTH 0x3fff0000

Definition at line 627 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_FRAME_LENGTH_SHIFT 16

Definition at line 628 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_FRAME_TOO_LONG 0x00000080

Definition at line 635 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_FRAME_TYPE 0x00000020

Definition at line 637 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_LAST_DESC 0x00000100

Definition at line 634 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_MII_ERROR 0x00000008

Definition at line 639 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_RECEIVE_WATCHDOG 0x00000010

Definition at line 638 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_RING_SIZE 64

Definition at line 623 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_RUNT_FRAME 0x00000800

Definition at line 632 of file 2t3e3.h.

#define SBE_2T3E3_RX_DESC_SECOND_ADDRESS_CHAINED 0x01000000

Definition at line 645 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_21143_OWN 0x80000000

Definition at line 661 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_BUFFER_1_SIZE 0x000007ff

Definition at line 679 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_BUFFER_2_SIZE 0x003ff800

Definition at line 678 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_CRC_DISABLE 0x04000000

Definition at line 674 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_DEFFERED 0x00000001

Definition at line 668 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_DISABLE_PADDING 0x00800000

Definition at line 677 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_END_OF_RING 0x02000000

Definition at line 675 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_ERROR_SUMMARY 0x00008000

Definition at line 662 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_FIRST_SEGMENT 0x20000000

Definition at line 673 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_INTERRUPT_ON_COMPLETION 0x80000000

Definition at line 671 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_LAST_SEGMENT 0x40000000

Definition at line 672 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_LINK_FAIL_REPORT 0x00000004

Definition at line 666 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_LOSS_OF_CARRIER 0x00000800

Definition at line 664 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_NO_CARRIER 0x00000400

Definition at line 665 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_RING_SIZE 256

Definition at line 658 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_SECOND_ADDRESS_CHAINED 0x01000000

Definition at line 676 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_TRANSMIT_JABBER_TIMEOUT 0x00004000

Definition at line 663 of file 2t3e3.h.

#define SBE_2T3E3_TX_DESC_UNDERFLOW_ERROR 0x00000002

Definition at line 667 of file 2t3e3.h.

Function Documentation

u32 bootrom_read	(	struct channel *	,
		u32
	)

Definition at line 39 of file io.c.

void bootrom_write	(	struct channel *	,
		u32	,
		u32
	)

Definition at line 63 of file io.c.

void cpld_init ( struct channel * sc )

Definition at line 41 of file cpld.c.

void cpld_LOS_update ( struct channel * )

Definition at line 294 of file cpld.c.

u32 cpld_read	(	struct channel *	sc,
		u32	reg
	)

Definition at line 24 of file io.c.

void cpld_select_panel	(	struct channel *	,
		u32
	)

Definition at line 220 of file cpld.c.

void cpld_set_clock	(	struct channel *	sc,
		u32	mode
	)

Definition at line 243 of file cpld.c.

void cpld_set_crc	(	struct channel *	,
		u32
	)

Definition at line 198 of file cpld.c.

void cpld_set_fractional_mode	(	struct channel *	,
		u32	,
		u32	,
		u32
	)

Definition at line 311 of file cpld.c.

void cpld_set_frame_mode	(	struct channel *	,
		u32
	)

Definition at line 115 of file cpld.c.

void cpld_set_frame_type	(	struct channel *	,
		u32
	)

Definition at line 150 of file cpld.c.

void cpld_set_pad_count	(	struct channel *	,
		u32
	)

Definition at line 264 of file cpld.c.

void cpld_set_scrambler	(	struct channel *	,
		u32
	)

Definition at line 168 of file cpld.c.

void cpld_start_intr ( struct channel * )

Definition at line 96 of file cpld.c.

void cpld_stop_intr ( struct channel * )

Definition at line 106 of file cpld.c.

void dc_clear_descriptor_list ( struct channel * )

Definition at line 399 of file dc.c.

void dc_drop_descriptor_list ( struct channel * )

Definition at line 416 of file dc.c.

void dc_init ( struct channel * )

Definition at line 22 of file dc.c.

void dc_intr ( struct channel * )

Definition at line 55 of file intr.c.

void dc_intr_rx ( struct channel * )

Definition at line 117 of file intr.c.

void dc_intr_tx ( struct channel * )

Definition at line 291 of file intr.c.

void dc_intr_tx_underflow ( struct channel * )

Definition at line 397 of file intr.c.

void dc_receiver_onoff	(	struct channel *	,
		u32
	)

Definition at line 206 of file dc.c.

void dc_reset ( struct channel * )

Definition at line 181 of file dc.c.

void dc_restart ( struct channel * )

Definition at line 454 of file dc.c.

void dc_set_loopback	(	struct channel *	,
		u32
	)

Definition at line 286 of file dc.c.

void dc_set_output_port ( struct channel * )

Definition at line 437 of file dc.c.

void dc_start ( struct channel * )

Definition at line 89 of file dc.c.

void dc_start_intr ( struct channel * )

Definition at line 150 of file dc.c.

void dc_stop ( struct channel * )

Definition at line 126 of file dc.c.

void dc_stop_intr ( struct channel * )

Definition at line 175 of file dc.c.

void dc_transmitter_onoff	(	struct channel *	,
		u32
	)

Definition at line 246 of file dc.c.

void exar7250_E3_intr	(	struct channel *	,
		u32
	)

Definition at line 535 of file intr.c.

void exar7250_init ( struct channel * )

Definition at line 16 of file exar7250.c.

void exar7250_intr ( struct channel * )

Definition at line 433 of file intr.c.

u32 exar7250_read	(	struct channel *	,
		u32
	)

Definition at line 197 of file io.c.

void exar7250_set_frame_type	(	struct channel *	,
		u32
	)

Definition at line 32 of file exar7250.c.

void exar7250_set_loopback	(	struct channel *	,
		u32
	)

Definition at line 173 of file exar7250.c.

void exar7250_start_intr	(	struct channel *	,
		u32
	)

Definition at line 73 of file exar7250.c.

void exar7250_stop_intr	(	struct channel *	,
		u32
	)

Definition at line 122 of file exar7250.c.

void exar7250_T3_intr	(	struct channel *	,
		u32
	)

Definition at line 480 of file intr.c.

void exar7250_unipolar_onoff	(	struct channel *	,
		u32
	)

Definition at line 159 of file exar7250.c.

void exar7250_write	(	struct channel *	,
		u32	,
		u32
	)

Definition at line 212 of file io.c.

void exar7300_init ( struct channel * )

Definition at line 16 of file exar7300.c.

void exar7300_line_build_out_onoff	(	struct channel *	,
		u32
	)

Definition at line 125 of file exar7300.c.

u32 exar7300_read	(	struct channel *	,
		u32
	)

Definition at line 232 of file io.c.

void exar7300_receive_equalization_onoff	(	struct channel *	,
		u32
	)

Definition at line 104 of file exar7300.c.

void exar7300_set_frame_type	(	struct channel *	,
		u32
	)

Definition at line 48 of file exar7300.c.

void exar7300_set_loopback	(	struct channel *	,
		u32
	)

Definition at line 28 of file exar7300.c.

void exar7300_transmit_all_ones_onoff	(	struct channel *	,
		u32
	)

Definition at line 83 of file exar7300.c.

void exar7300_unipolar_onoff	(	struct channel *	,
		u32
	)

Definition at line 149 of file exar7300.c.

void exar7300_write	(	struct channel *	,
		u32	,
		u32
	)

Definition at line 279 of file io.c.

int setup_device	(	struct net_device *	dev,
		struct channel *	sc
	)

Definition at line 126 of file netdev.c.

u32 t3e3_eeprom_read_word	(	struct channel *	,
		u32
	)

Definition at line 144 of file io.c.

void t3e3_if_config	(	struct channel *	,
		u32	,
		char *	,
		t3e3_resp_t *	,
		int *
	)

Definition at line 290 of file ctrl.c.

void t3e3_if_down ( struct channel * )

int t3e3_if_start_xmit	(	struct sk_buff *	skb,
		struct net_device *	dev
	)

Definition at line 26 of file main.c.

void t3e3_if_up ( struct channel * )

void t3e3_init ( struct channel * )

Definition at line 17 of file main.c.

irqreturn_t t3e3_intr	(	int	irq,
		void *	dev_instance
	)

Definition at line 18 of file intr.c.

void t3e3_read_card_serial_number ( struct channel * )

Definition at line 131 of file main.c.

void t3e3_sc_init ( struct channel * )

Definition at line 333 of file ctrl.c.

void t3e3_set_frame_type	(	struct channel *	,
		u32
	)

Definition at line 17 of file ctrl.c.

void update_led	(	struct channel *	,
		int
	)

Definition at line 157 of file main.c.

Variable Documentation

const u32 cpld_reg_map[][2]

Definition at line 16 of file maps.c.

const u32 cpld_val_map[][2]

Definition at line 38 of file maps.c.

const u32 t3e3_framer_reg_map[]

Definition at line 46 of file maps.c.

const u32 t3e3_liu_reg_map[]

Definition at line 97 of file maps.c.

Data Structures

Macros

Functions

Variables

Macro Definition Documentation

Function Documentation

Variable Documentation