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#define | DSP_IsaSlaveControl 0x0000 /* ISA slave control register */ |
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#define | DSP_IsaSlaveStatus 0x0001 /* ISA slave status register */ |
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#define | DSP_ConfigAddress 0x0002 /* General config address register */ |
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#define | DSP_ConfigData 0x0003 /* General config data register */ |
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#define | DSP_HBridgeControl 0x0002 /* HBridge control register */ |
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#define | DSP_MsaAddrLow 0x0004 /* MSP System Address, low word */ |
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#define | DSP_MsaAddrHigh 0x0006 /* MSP System Address, high word */ |
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#define | DSP_MsaDataDSISHigh 0x0008 /* MSA data register: d-store word or high byte of i-store */ |
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#define | DSP_MsaDataISLow 0x000A /* MSA data register: low word of i-store */ |
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#define | DSP_ReadAndClear 0x000C /* MSA read and clear data register */ |
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#define | DSP_Interrupt 0x000E /* Interrupt register (IPC source) */ |
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#define | DSP_UartCfg1Index 0x0003 /* UART config register 1 */ |
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#define | DSP_UartCfg2Index 0x0004 /* UART config register 2 */ |
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#define | DSP_HBridgeCfg1Index 0x0007 /* HBridge config register 1 */ |
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#define | DSP_HBridgeCfg2Index 0x0008 /* HBridge config register 2 */ |
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#define | DSP_BusMasterCfg1Index 0x0009 /* ISA bus master config register 1 */ |
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#define | DSP_BusMasterCfg2Index 0x000A /* ISA bus master config register 2 */ |
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#define | DSP_IsaProtCfgIndex 0x000F /* ISA protocol control register */ |
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#define | DSP_PowerMgCfgIndex 0x0010 /* Low poser suspend/resume enable */ |
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#define | DSP_HBusTimerCfgIndex 0x0011 /* HBUS timer load value */ |
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#define | DSP_ChipID 0x80000000 |
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#define | DSP_MspBootDomain 0x80000580 |
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#define | DSP_LBusTimeoutDisable 0x80000580 |
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#define | DSP_ClockControl_1 0x8000058A |
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#define | DSP_ClockControl_2 0x8000058C |
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#define | DSP_ChipReset 0x80000588 |
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#define | DSP_GpioModeControl_15_8 0x80000082 |
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#define | DSP_GpioDriverEnable_15_8 0x80000076 |
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#define | DSP_GpioOutputData_15_8 0x80000072 |
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#define | MW_ADC_MASK 0x0001 |
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#define | MW_AIC2_MASK 0x0006 |
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#define | MW_MIDI_MASK 0x0008 |
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#define | MW_CDDAC_MASK 0x8001 |
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#define | MW_AIC1_MASK 0xE006 |
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#define | MW_UART_MASK 0xE00A |
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#define | MW_ACI_MASK 0xE00B |
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#define | MKWORD(var) (*((unsigned short *)(&var))) |
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#define | MKBYTE(var) (*((unsigned char *)(&var))) |
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#define | WriteMsaCfg(addr, value) dsp3780I_WriteMsaCfg(usDspBaseIO,addr,value) |
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#define | ReadMsaCfg(addr) dsp3780I_ReadMsaCfg(usDspBaseIO,addr) |
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#define | WriteGenCfg(index, value) dsp3780I_WriteGenCfg(usDspBaseIO,index,value) |
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#define | ReadGenCfg(index) dsp3780I_ReadGenCfg(usDspBaseIO,index) |
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#define | InWordDsp(index) inw(usDspBaseIO+index) |
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#define | InByteDsp(index) inb(usDspBaseIO+index) |
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#define | OutWordDsp(index, value) outw(value,usDspBaseIO+index) |
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#define | OutByteDsp(index, value) outb(value,usDspBaseIO+index) |
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int | dsp3780I_EnableDSP (DSP_3780I_CONFIG_SETTINGS *pSettings, unsigned short *pIrqMap, unsigned short *pDmaMap) |
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int | dsp3780I_DisableDSP (DSP_3780I_CONFIG_SETTINGS *pSettings) |
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int | dsp3780I_Reset (DSP_3780I_CONFIG_SETTINGS *pSettings) |
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int | dsp3780I_Run (DSP_3780I_CONFIG_SETTINGS *pSettings) |
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int | dsp3780I_ReadDStore (unsigned short usDspBaseIO, void __user *pvBuffer, unsigned uCount, unsigned long ulDSPAddr) |
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int | dsp3780I_ReadAndClearDStore (unsigned short usDspBaseIO, void __user *pvBuffer, unsigned uCount, unsigned long ulDSPAddr) |
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int | dsp3780I_WriteDStore (unsigned short usDspBaseIO, void __user *pvBuffer, unsigned uCount, unsigned long ulDSPAddr) |
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int | dsp3780I_ReadIStore (unsigned short usDspBaseIO, void __user *pvBuffer, unsigned uCount, unsigned long ulDSPAddr) |
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int | dsp3780I_WriteIStore (unsigned short usDspBaseIO, void __user *pvBuffer, unsigned uCount, unsigned long ulDSPAddr) |
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unsigned short | dsp3780I_ReadMsaCfg (unsigned short usDspBaseIO, unsigned long ulMsaAddr) |
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void | dsp3780I_WriteMsaCfg (unsigned short usDspBaseIO, unsigned long ulMsaAddr, unsigned short usValue) |
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int | dsp3780I_GetIPCSource (unsigned short usDspBaseIO, unsigned short *pusIPCSource) |
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