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ab8500-gpadc.c
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1 /*
2  * Copyright (C) ST-Ericsson SA 2010
3  *
4  * License Terms: GNU General Public License v2
5  * Author: Arun R Murthy <[email protected]>
6  * Author: Daniel Willerud <[email protected]>
7  * Author: Johan Palsson <[email protected]>
8  */
9 #include <linux/init.h>
10 #include <linux/module.h>
11 #include <linux/device.h>
12 #include <linux/interrupt.h>
13 #include <linux/spinlock.h>
14 #include <linux/delay.h>
15 #include <linux/platform_device.h>
16 #include <linux/completion.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/err.h>
19 #include <linux/slab.h>
20 #include <linux/list.h>
21 #include <linux/mfd/abx500.h>
22 #include <linux/mfd/abx500/ab8500.h>
23 #include <linux/mfd/abx500/ab8500-gpadc.h>
24 
25 /*
26  * GPADC register offsets
27  * Bank : 0x0A
28  */
29 #define AB8500_GPADC_CTRL1_REG 0x00
30 #define AB8500_GPADC_CTRL2_REG 0x01
31 #define AB8500_GPADC_CTRL3_REG 0x02
32 #define AB8500_GPADC_AUTO_TIMER_REG 0x03
33 #define AB8500_GPADC_STAT_REG 0x04
34 #define AB8500_GPADC_MANDATAL_REG 0x05
35 #define AB8500_GPADC_MANDATAH_REG 0x06
36 #define AB8500_GPADC_AUTODATAL_REG 0x07
37 #define AB8500_GPADC_AUTODATAH_REG 0x08
38 #define AB8500_GPADC_MUX_CTRL_REG 0x09
39 
40 /*
41  * OTP register offsets
42  * Bank : 0x15
43  */
44 #define AB8500_GPADC_CAL_1 0x0F
45 #define AB8500_GPADC_CAL_2 0x10
46 #define AB8500_GPADC_CAL_3 0x11
47 #define AB8500_GPADC_CAL_4 0x12
48 #define AB8500_GPADC_CAL_5 0x13
49 #define AB8500_GPADC_CAL_6 0x14
50 #define AB8500_GPADC_CAL_7 0x15
51 
52 /* gpadc constants */
53 #define EN_VINTCORE12 0x04
54 #define EN_VTVOUT 0x02
55 #define EN_GPADC 0x01
56 #define DIS_GPADC 0x00
57 #define SW_AVG_16 0x60
58 #define ADC_SW_CONV 0x04
59 #define EN_ICHAR 0x80
60 #define BTEMP_PULL_UP 0x08
61 #define EN_BUF 0x40
62 #define DIS_ZERO 0x00
63 #define GPADC_BUSY 0x01
64 
65 /* GPADC constants from AB8500 spec, UM0836 */
66 #define ADC_RESOLUTION 1024
67 #define ADC_CH_BTEMP_MIN 0
68 #define ADC_CH_BTEMP_MAX 1350
69 #define ADC_CH_DIETEMP_MIN 0
70 #define ADC_CH_DIETEMP_MAX 1350
71 #define ADC_CH_CHG_V_MIN 0
72 #define ADC_CH_CHG_V_MAX 20030
73 #define ADC_CH_ACCDET2_MIN 0
74 #define ADC_CH_ACCDET2_MAX 2500
75 #define ADC_CH_VBAT_MIN 2300
76 #define ADC_CH_VBAT_MAX 4800
77 #define ADC_CH_CHG_I_MIN 0
78 #define ADC_CH_CHG_I_MAX 1500
79 #define ADC_CH_BKBAT_MIN 0
80 #define ADC_CH_BKBAT_MAX 3200
81 
82 /* This is used to not lose precision when dividing to get gain and offset */
83 #define CALIB_SCALE 1000
84 
85 enum cal_channels {
86  ADC_INPUT_VMAIN = 0,
87  ADC_INPUT_BTEMP,
88  ADC_INPUT_VBAT,
89  NBR_CAL_INPUTS,
90 };
91 
98 struct adc_cal_data {
99  u64 gain;
100  u64 offset;
101 };
102 
116 struct ab8500_gpadc {
117  u8 chip_id;
118  struct device *dev;
119  struct list_head node;
120  struct completion ab8500_gpadc_complete;
121  struct mutex ab8500_gpadc_lock;
122  struct regulator *regu;
123  int irq;
124  struct adc_cal_data cal_data[NBR_CAL_INPUTS];
125 };
126 
127 static LIST_HEAD(ab8500_gpadc_list);
128 
133 struct ab8500_gpadc *ab8500_gpadc_get(char *name)
134 {
135  struct ab8500_gpadc *gpadc;
136 
137  list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
138  if (!strcmp(name, dev_name(gpadc->dev)))
139  return gpadc;
140  }
141 
142  return ERR_PTR(-ENOENT);
143 }
144 EXPORT_SYMBOL(ab8500_gpadc_get);
145 
149 int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 channel,
150  int ad_value)
151 {
152  int res;
153 
154  switch (channel) {
155  case MAIN_CHARGER_V:
156  /* For some reason we don't have calibrated data */
157  if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
158  res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
159  ADC_CH_CHG_V_MIN) * ad_value /
160  ADC_RESOLUTION;
161  break;
162  }
163  /* Here we can use the calibrated data */
164  res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
165  gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
166  break;
167 
168  case BAT_CTRL:
169  case BTEMP_BALL:
170  case ACC_DETECT1:
171  case ADC_AUX1:
172  case ADC_AUX2:
173  /* For some reason we don't have calibrated data */
174  if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
175  res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
176  ADC_CH_BTEMP_MIN) * ad_value /
177  ADC_RESOLUTION;
178  break;
179  }
180  /* Here we can use the calibrated data */
181  res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
182  gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
183  break;
184 
185  case MAIN_BAT_V:
186  /* For some reason we don't have calibrated data */
187  if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
188  res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
189  ADC_CH_VBAT_MIN) * ad_value /
190  ADC_RESOLUTION;
191  break;
192  }
193  /* Here we can use the calibrated data */
194  res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
195  gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
196  break;
197 
198  case DIE_TEMP:
199  res = ADC_CH_DIETEMP_MIN +
200  (ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
201  ADC_RESOLUTION;
202  break;
203 
204  case ACC_DETECT2:
205  res = ADC_CH_ACCDET2_MIN +
206  (ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
207  ADC_RESOLUTION;
208  break;
209 
210  case VBUS_V:
211  res = ADC_CH_CHG_V_MIN +
212  (ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
213  ADC_RESOLUTION;
214  break;
215 
216  case MAIN_CHARGER_C:
217  case USB_CHARGER_C:
218  res = ADC_CH_CHG_I_MIN +
219  (ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
220  ADC_RESOLUTION;
221  break;
222 
223  case BK_BAT_V:
224  res = ADC_CH_BKBAT_MIN +
225  (ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
226  ADC_RESOLUTION;
227  break;
228 
229  default:
230  dev_err(gpadc->dev,
231  "unknown channel, not possible to convert\n");
232  res = -EINVAL;
233  break;
234 
235  }
236  return res;
237 }
238 EXPORT_SYMBOL(ab8500_gpadc_ad_to_voltage);
239 
247 int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 channel)
248 {
249  int ad_value;
250  int voltage;
251 
252  ad_value = ab8500_gpadc_read_raw(gpadc, channel);
253  if (ad_value < 0) {
254  dev_err(gpadc->dev, "GPADC raw value failed ch: %d\n", channel);
255  return ad_value;
256  }
257 
258  voltage = ab8500_gpadc_ad_to_voltage(gpadc, channel, ad_value);
259 
260  if (voltage < 0)
261  dev_err(gpadc->dev, "GPADC to voltage conversion failed ch:"
262  " %d AD: 0x%x\n", channel, ad_value);
263 
264  return voltage;
265 }
266 EXPORT_SYMBOL(ab8500_gpadc_convert);
267 
275 int ab8500_gpadc_read_raw(struct ab8500_gpadc *gpadc, u8 channel)
276 {
277  int ret;
278  int looplimit = 0;
279  u8 val, low_data, high_data;
280 
281  if (!gpadc)
282  return -ENODEV;
283 
284  mutex_lock(&gpadc->ab8500_gpadc_lock);
285  /* Enable VTVout LDO this is required for GPADC */
286  regulator_enable(gpadc->regu);
287 
288  /* Check if ADC is not busy, lock and proceed */
289  do {
290  ret = abx500_get_register_interruptible(gpadc->dev,
291  AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
292  if (ret < 0)
293  goto out;
294  if (!(val & GPADC_BUSY))
295  break;
296  msleep(10);
297  } while (++looplimit < 10);
298  if (looplimit >= 10 && (val & GPADC_BUSY)) {
299  dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
300  ret = -EINVAL;
301  goto out;
302  }
303 
304  /* Enable GPADC */
305  ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
306  AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
307  if (ret < 0) {
308  dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
309  goto out;
310  }
311 
312  /* Select the channel source and set average samples to 16 */
313  ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
314  AB8500_GPADC_CTRL2_REG, (channel | SW_AVG_16));
315  if (ret < 0) {
316  dev_err(gpadc->dev,
317  "gpadc_conversion: set avg samples failed\n");
318  goto out;
319  }
320 
321  /*
322  * Enable ADC, buffering, select rising edge and enable ADC path
323  * charging current sense if it needed, ABB 3.0 needs some special
324  * treatment too.
325  */
326  switch (channel) {
327  case MAIN_CHARGER_C:
328  case USB_CHARGER_C:
329  ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
330  AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
331  EN_BUF | EN_ICHAR,
332  EN_BUF | EN_ICHAR);
333  break;
334  case BTEMP_BALL:
335  if (gpadc->chip_id >= AB8500_CUT3P0) {
336  /* Turn on btemp pull-up on ABB 3.0 */
337  ret = abx500_mask_and_set_register_interruptible(
338  gpadc->dev,
339  AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
340  EN_BUF | BTEMP_PULL_UP,
341  EN_BUF | BTEMP_PULL_UP);
342 
343  /*
344  * Delay might be needed for ABB8500 cut 3.0, if not, remove
345  * when hardware will be available
346  */
347  msleep(1);
348  break;
349  }
350  /* Intentional fallthrough */
351  default:
352  ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
353  AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
354  break;
355  }
356  if (ret < 0) {
357  dev_err(gpadc->dev,
358  "gpadc_conversion: select falling edge failed\n");
359  goto out;
360  }
361 
362  ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
363  AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
364  if (ret < 0) {
365  dev_err(gpadc->dev,
366  "gpadc_conversion: start s/w conversion failed\n");
367  goto out;
368  }
369  /* wait for completion of conversion */
370  if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete, 2*HZ)) {
371  dev_err(gpadc->dev,
372  "timeout: didn't receive GPADC conversion interrupt\n");
373  ret = -EINVAL;
374  goto out;
375  }
376 
377  /* Read the converted RAW data */
378  ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
379  AB8500_GPADC_MANDATAL_REG, &low_data);
380  if (ret < 0) {
381  dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
382  goto out;
383  }
384 
385  ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
386  AB8500_GPADC_MANDATAH_REG, &high_data);
387  if (ret < 0) {
388  dev_err(gpadc->dev,
389  "gpadc_conversion: read high data failed\n");
390  goto out;
391  }
392 
393  /* Disable GPADC */
394  ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
395  AB8500_GPADC_CTRL1_REG, DIS_GPADC);
396  if (ret < 0) {
397  dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
398  goto out;
399  }
400  /* Disable VTVout LDO this is required for GPADC */
401  regulator_disable(gpadc->regu);
402  mutex_unlock(&gpadc->ab8500_gpadc_lock);
403 
404  return (high_data << 8) | low_data;
405 
406 out:
407  /*
408  * It has shown to be needed to turn off the GPADC if an error occurs,
409  * otherwise we might have problem when waiting for the busy bit in the
410  * GPADC status register to go low. In V1.1 there wait_for_completion
411  * seems to timeout when waiting for an interrupt.. Not seen in V2.0
412  */
413  (void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
414  AB8500_GPADC_CTRL1_REG, DIS_GPADC);
415  regulator_disable(gpadc->regu);
416  mutex_unlock(&gpadc->ab8500_gpadc_lock);
417  dev_err(gpadc->dev,
418  "gpadc_conversion: Failed to AD convert channel %d\n", channel);
419  return ret;
420 }
421 EXPORT_SYMBOL(ab8500_gpadc_read_raw);
422 
433 static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
434 {
435  struct ab8500_gpadc *gpadc = _gpadc;
436 
437  complete(&gpadc->ab8500_gpadc_complete);
438 
439  return IRQ_HANDLED;
440 }
441 
442 static int otp_cal_regs[] = {
443  AB8500_GPADC_CAL_1,
444  AB8500_GPADC_CAL_2,
445  AB8500_GPADC_CAL_3,
446  AB8500_GPADC_CAL_4,
447  AB8500_GPADC_CAL_5,
448  AB8500_GPADC_CAL_6,
449  AB8500_GPADC_CAL_7,
450 };
451 
452 static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
453 {
454  int i;
455  int ret[ARRAY_SIZE(otp_cal_regs)];
456  u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
457 
458  int vmain_high, vmain_low;
459  int btemp_high, btemp_low;
460  int vbat_high, vbat_low;
461 
462  /* First we read all OTP registers and store the error code */
463  for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
464  ret[i] = abx500_get_register_interruptible(gpadc->dev,
465  AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
466  if (ret[i] < 0)
467  dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
468  __func__, otp_cal_regs[i]);
469  }
470 
471  /*
472  * The ADC calibration data is stored in OTP registers.
473  * The layout of the calibration data is outlined below and a more
474  * detailed description can be found in UM0836
475  *
476  * vm_h/l = vmain_high/low
477  * bt_h/l = btemp_high/low
478  * vb_h/l = vbat_high/low
479  *
480  * Data bits:
481  * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
482  * |.......|.......|.......|.......|.......|.......|.......|.......
483  * | | vm_h9 | vm_h8
484  * |.......|.......|.......|.......|.......|.......|.......|.......
485  * | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
486  * |.......|.......|.......|.......|.......|.......|.......|.......
487  * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
488  * |.......|.......|.......|.......|.......|.......|.......|.......
489  * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
490  * |.......|.......|.......|.......|.......|.......|.......|.......
491  * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
492  * |.......|.......|.......|.......|.......|.......|.......|.......
493  * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
494  * |.......|.......|.......|.......|.......|.......|.......|.......
495  * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
496  * |.......|.......|.......|.......|.......|.......|.......|.......
497  *
498  *
499  * Ideal output ADC codes corresponding to injected input voltages
500  * during manufacturing is:
501  *
502  * vmain_high: Vin = 19500mV / ADC ideal code = 997
503  * vmain_low: Vin = 315mV / ADC ideal code = 16
504  * btemp_high: Vin = 1300mV / ADC ideal code = 985
505  * btemp_low: Vin = 21mV / ADC ideal code = 16
506  * vbat_high: Vin = 4700mV / ADC ideal code = 982
507  * vbat_low: Vin = 2380mV / ADC ideal code = 33
508  */
509 
510  /* Calculate gain and offset for VMAIN if all reads succeeded */
511  if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
512  vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
513  ((gpadc_cal[1] & 0x3F) << 2) |
514  ((gpadc_cal[2] & 0xC0) >> 6));
515 
516  vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
517 
518  gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
519  (19500 - 315) / (vmain_high - vmain_low);
520 
521  gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
522  (CALIB_SCALE * (19500 - 315) /
523  (vmain_high - vmain_low)) * vmain_high;
524  } else {
525  gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
526  }
527 
528  /* Calculate gain and offset for BTEMP if all reads succeeded */
529  if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
530  btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
531  (gpadc_cal[3] << 1) |
532  ((gpadc_cal[4] & 0x80) >> 7));
533 
534  btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
535 
536  gpadc->cal_data[ADC_INPUT_BTEMP].gain =
537  CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
538 
539  gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
540  (CALIB_SCALE * (1300 - 21) /
541  (btemp_high - btemp_low)) * btemp_high;
542  } else {
543  gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
544  }
545 
546  /* Calculate gain and offset for VBAT if all reads succeeded */
547  if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
548  vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
549  vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
550 
551  gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
552  (4700 - 2380) / (vbat_high - vbat_low);
553 
554  gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
555  (CALIB_SCALE * (4700 - 2380) /
556  (vbat_high - vbat_low)) * vbat_high;
557  } else {
558  gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
559  }
560 
561  dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
562  gpadc->cal_data[ADC_INPUT_VMAIN].gain,
563  gpadc->cal_data[ADC_INPUT_VMAIN].offset);
564 
565  dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
566  gpadc->cal_data[ADC_INPUT_BTEMP].gain,
567  gpadc->cal_data[ADC_INPUT_BTEMP].offset);
568 
569  dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
570  gpadc->cal_data[ADC_INPUT_VBAT].gain,
571  gpadc->cal_data[ADC_INPUT_VBAT].offset);
572 }
573 
574 static int __devinit ab8500_gpadc_probe(struct platform_device *pdev)
575 {
576  int ret = 0;
577  struct ab8500_gpadc *gpadc;
578 
579  gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
580  if (!gpadc) {
581  dev_err(&pdev->dev, "Error: No memory\n");
582  return -ENOMEM;
583  }
584 
585  gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
586  if (gpadc->irq < 0) {
587  dev_err(&pdev->dev, "failed to get platform irq-%d\n",
588  gpadc->irq);
589  ret = gpadc->irq;
590  goto fail;
591  }
592 
593  gpadc->dev = &pdev->dev;
594  mutex_init(&gpadc->ab8500_gpadc_lock);
595 
596  /* Initialize completion used to notify completion of conversion */
597  init_completion(&gpadc->ab8500_gpadc_complete);
598 
599  /* Register interrupt - SwAdcComplete */
600  ret = request_threaded_irq(gpadc->irq, NULL,
601  ab8500_bm_gpswadcconvend_handler,
602  IRQF_ONESHOT | IRQF_NO_SUSPEND | IRQF_SHARED,
603  "ab8500-gpadc", gpadc);
604  if (ret < 0) {
605  dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
606  gpadc->irq);
607  goto fail;
608  }
609 
610  /* Get Chip ID of the ABB ASIC */
611  ret = abx500_get_chip_id(gpadc->dev);
612  if (ret < 0) {
613  dev_err(gpadc->dev, "failed to get chip ID\n");
614  goto fail_irq;
615  }
616  gpadc->chip_id = (u8) ret;
617 
618  /* VTVout LDO used to power up ab8500-GPADC */
619  gpadc->regu = regulator_get(&pdev->dev, "vddadc");
620  if (IS_ERR(gpadc->regu)) {
621  ret = PTR_ERR(gpadc->regu);
622  dev_err(gpadc->dev, "failed to get vtvout LDO\n");
623  goto fail_irq;
624  }
625  ab8500_gpadc_read_calibration_data(gpadc);
626  list_add_tail(&gpadc->node, &ab8500_gpadc_list);
627  dev_dbg(gpadc->dev, "probe success\n");
628  return 0;
629 fail_irq:
630  free_irq(gpadc->irq, gpadc);
631 fail:
632  kfree(gpadc);
633  gpadc = NULL;
634  return ret;
635 }
636 
637 static int __devexit ab8500_gpadc_remove(struct platform_device *pdev)
638 {
639  struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
640 
641  /* remove this gpadc entry from the list */
642  list_del(&gpadc->node);
643  /* remove interrupt - completion of Sw ADC conversion */
644  free_irq(gpadc->irq, gpadc);
645  /* disable VTVout LDO that is being used by GPADC */
646  regulator_put(gpadc->regu);
647  kfree(gpadc);
648  gpadc = NULL;
649  return 0;
650 }
651 
652 static struct platform_driver ab8500_gpadc_driver = {
653  .probe = ab8500_gpadc_probe,
654  .remove = __devexit_p(ab8500_gpadc_remove),
655  .driver = {
656  .name = "ab8500-gpadc",
657  .owner = THIS_MODULE,
658  },
659 };
660 
661 static int __init ab8500_gpadc_init(void)
662 {
663  return platform_driver_register(&ab8500_gpadc_driver);
664 }
665 
666 static void __exit ab8500_gpadc_exit(void)
667 {
668  platform_driver_unregister(&ab8500_gpadc_driver);
669 }
670 
671 subsys_initcall_sync(ab8500_gpadc_init);
672 module_exit(ab8500_gpadc_exit);
673 
674 MODULE_LICENSE("GPL v2");
675 MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
676 MODULE_ALIAS("platform:ab8500_gpadc");
677 MODULE_DESCRIPTION("AB8500 GPADC driver");
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