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amd5536udc.h File Reference

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Data Structures

struct  udc_csrs
 
struct  udc_regs
 
struct  udc_ep_regs
 
struct  udc_stp_dma
 
struct  udc_data_dma
 
struct  udc_request
 
struct  udc_ep
 
struct  udc
 
union  udc_setup_data
 

Macros

#define UDC_RDE_TIMER_SECONDS   1
 
#define UDC_RDE_TIMER_DIV   10
 
#define UDC_POLLSTALL_TIMER_USECONDS   500
 
#define UDC_HSA0_REV   1
 
#define UDC_HSB1_REV   2
 
#define UDC_SETCONFIG_DWORD0   0x00000900
 
#define UDC_SETCONFIG_DWORD0_VALUE_MASK   0xffff0000
 
#define UDC_SETCONFIG_DWORD0_VALUE_OFS   16
 
#define UDC_SETCONFIG_DWORD1   0x00000000
 
#define UDC_SETINTF_DWORD0   0x00000b00
 
#define UDC_SETINTF_DWORD0_ALT_MASK   0xffff0000
 
#define UDC_SETINTF_DWORD0_ALT_OFS   16
 
#define UDC_SETINTF_DWORD1   0x00000000
 
#define UDC_SETINTF_DWORD1_INTF_MASK   0x0000ffff
 
#define UDC_SETINTF_DWORD1_INTF_OFS   0
 
#define UDC_MSCRES_DWORD0   0x0000ff21
 
#define UDC_MSCRES_DWORD1   0x00000000
 
#define UDC_CSR_ADDR   0x500
 
#define UDC_CSR_NE_NUM_MASK   0x0000000f
 
#define UDC_CSR_NE_NUM_OFS   0
 
#define UDC_CSR_NE_DIR_MASK   0x00000010
 
#define UDC_CSR_NE_DIR_OFS   4
 
#define UDC_CSR_NE_TYPE_MASK   0x00000060
 
#define UDC_CSR_NE_TYPE_OFS   5
 
#define UDC_CSR_NE_CFG_MASK   0x00000780
 
#define UDC_CSR_NE_CFG_OFS   7
 
#define UDC_CSR_NE_INTF_MASK   0x00007800
 
#define UDC_CSR_NE_INTF_OFS   11
 
#define UDC_CSR_NE_ALT_MASK   0x00078000
 
#define UDC_CSR_NE_ALT_OFS   15
 
#define UDC_CSR_NE_MAX_PKT_MASK   0x3ff80000
 
#define UDC_CSR_NE_MAX_PKT_OFS   19
 
#define UDC_DEVCFG_ADDR   0x400
 
#define UDC_DEVCFG_SOFTRESET   31
 
#define UDC_DEVCFG_HNPSFEN   30
 
#define UDC_DEVCFG_DMARST   29
 
#define UDC_DEVCFG_SET_DESC   18
 
#define UDC_DEVCFG_CSR_PRG   17
 
#define UDC_DEVCFG_STATUS   7
 
#define UDC_DEVCFG_DIR   6
 
#define UDC_DEVCFG_PI   5
 
#define UDC_DEVCFG_SS   4
 
#define UDC_DEVCFG_SP   3
 
#define UDC_DEVCFG_RWKP   2
 
#define UDC_DEVCFG_SPD_MASK   0x3
 
#define UDC_DEVCFG_SPD_OFS   0
 
#define UDC_DEVCFG_SPD_HS   0x0
 
#define UDC_DEVCFG_SPD_FS   0x1
 
#define UDC_DEVCFG_SPD_LS   0x2
 
#define UDC_DEVCTL_ADDR   0x404
 
#define UDC_DEVCTL_THLEN_MASK   0xff000000
 
#define UDC_DEVCTL_THLEN_OFS   24
 
#define UDC_DEVCTL_BRLEN_MASK   0x00ff0000
 
#define UDC_DEVCTL_BRLEN_OFS   16
 
#define UDC_DEVCTL_CSR_DONE   13
 
#define UDC_DEVCTL_DEVNAK   12
 
#define UDC_DEVCTL_SD   10
 
#define UDC_DEVCTL_MODE   9
 
#define UDC_DEVCTL_BREN   8
 
#define UDC_DEVCTL_THE   7
 
#define UDC_DEVCTL_BF   6
 
#define UDC_DEVCTL_BE   5
 
#define UDC_DEVCTL_DU   4
 
#define UDC_DEVCTL_TDE   3
 
#define UDC_DEVCTL_RDE   2
 
#define UDC_DEVCTL_RES   0
 
#define UDC_DEVSTS_ADDR   0x408
 
#define UDC_DEVSTS_TS_MASK   0xfffc0000
 
#define UDC_DEVSTS_TS_OFS   18
 
#define UDC_DEVSTS_SESSVLD   17
 
#define UDC_DEVSTS_PHY_ERROR   16
 
#define UDC_DEVSTS_RXFIFO_EMPTY   15
 
#define UDC_DEVSTS_ENUM_SPEED_MASK   0x00006000
 
#define UDC_DEVSTS_ENUM_SPEED_OFS   13
 
#define UDC_DEVSTS_ENUM_SPEED_FULL   1
 
#define UDC_DEVSTS_ENUM_SPEED_HIGH   0
 
#define UDC_DEVSTS_SUSP   12
 
#define UDC_DEVSTS_ALT_MASK   0x00000f00
 
#define UDC_DEVSTS_ALT_OFS   8
 
#define UDC_DEVSTS_INTF_MASK   0x000000f0
 
#define UDC_DEVSTS_INTF_OFS   4
 
#define UDC_DEVSTS_CFG_MASK   0x0000000f
 
#define UDC_DEVSTS_CFG_OFS   0
 
#define UDC_DEVINT_ADDR   0x40c
 
#define UDC_DEVINT_SVC   7
 
#define UDC_DEVINT_ENUM   6
 
#define UDC_DEVINT_SOF   5
 
#define UDC_DEVINT_US   4
 
#define UDC_DEVINT_UR   3
 
#define UDC_DEVINT_ES   2
 
#define UDC_DEVINT_SI   1
 
#define UDC_DEVINT_SC   0
 
#define UDC_DEVINT_MSK_ADDR   0x410
 
#define UDC_DEVINT_MSK   0x7f
 
#define UDC_EPINT_ADDR   0x414
 
#define UDC_EPINT_OUT_MASK   0xffff0000
 
#define UDC_EPINT_OUT_OFS   16
 
#define UDC_EPINT_IN_MASK   0x0000ffff
 
#define UDC_EPINT_IN_OFS   0
 
#define UDC_EPINT_IN_EP0   0
 
#define UDC_EPINT_IN_EP1   1
 
#define UDC_EPINT_IN_EP2   2
 
#define UDC_EPINT_IN_EP3   3
 
#define UDC_EPINT_OUT_EP0   16
 
#define UDC_EPINT_OUT_EP1   17
 
#define UDC_EPINT_OUT_EP2   18
 
#define UDC_EPINT_OUT_EP3   19
 
#define UDC_EPINT_EP0_ENABLE_MSK   0x001e001e
 
#define UDC_EPINT_MSK_ADDR   0x418
 
#define UDC_EPINT_OUT_MSK_MASK   0xffff0000
 
#define UDC_EPINT_OUT_MSK_OFS   16
 
#define UDC_EPINT_IN_MSK_MASK   0x0000ffff
 
#define UDC_EPINT_IN_MSK_OFS   0
 
#define UDC_EPINT_MSK_DISABLE_ALL   0xffffffff
 
#define UDC_EPDATAINT_MSK_DISABLE   0xfffefffe
 
#define UDC_DEV_MSK_DISABLE   0x7f
 
#define UDC_EPREGS_ADDR   0x0
 
#define UDC_EPIN_REGS_ADDR   0x0
 
#define UDC_EPOUT_REGS_ADDR   0x200
 
#define UDC_EPCTL_ADDR   0x0
 
#define UDC_EPCTL_RRDY   9
 
#define UDC_EPCTL_CNAK   8
 
#define UDC_EPCTL_SNAK   7
 
#define UDC_EPCTL_NAK   6
 
#define UDC_EPCTL_ET_MASK   0x00000030
 
#define UDC_EPCTL_ET_OFS   4
 
#define UDC_EPCTL_ET_CONTROL   0
 
#define UDC_EPCTL_ET_ISO   1
 
#define UDC_EPCTL_ET_BULK   2
 
#define UDC_EPCTL_ET_INTERRUPT   3
 
#define UDC_EPCTL_P   3
 
#define UDC_EPCTL_SN   2
 
#define UDC_EPCTL_F   1
 
#define UDC_EPCTL_S   0
 
#define UDC_EPSTS_ADDR   0x4
 
#define UDC_EPSTS_RX_PKT_SIZE_MASK   0x007ff800
 
#define UDC_EPSTS_RX_PKT_SIZE_OFS   11
 
#define UDC_EPSTS_TDC   10
 
#define UDC_EPSTS_HE   9
 
#define UDC_EPSTS_BNA   7
 
#define UDC_EPSTS_IN   6
 
#define UDC_EPSTS_OUT_MASK   0x00000030
 
#define UDC_EPSTS_OUT_OFS   4
 
#define UDC_EPSTS_OUT_DATA   1
 
#define UDC_EPSTS_OUT_DATA_CLEAR   0x10
 
#define UDC_EPSTS_OUT_SETUP   2
 
#define UDC_EPSTS_OUT_SETUP_CLEAR   0x20
 
#define UDC_EPSTS_OUT_CLEAR   0x30
 
#define UDC_EPIN_BUFF_SIZE_ADDR   0x8
 
#define UDC_EPOUT_FRAME_NUMBER_ADDR   0x8
 
#define UDC_EPIN_BUFF_SIZE_MASK   0x0000ffff
 
#define UDC_EPIN_BUFF_SIZE_OFS   0
 
#define UDC_EPIN0_BUFF_SIZE   32
 
#define UDC_FS_EPIN0_BUFF_SIZE   32
 
#define UDC_EPIN_BUFF_SIZE_MULT   2
 
#define UDC_EPIN_BUFF_SIZE   256
 
#define UDC_EPIN_SMALLINT_BUFF_SIZE   32
 
#define UDC_FS_EPIN_BUFF_SIZE   32
 
#define UDC_EPOUT_FRAME_NUMBER_MASK   0x0000ffff
 
#define UDC_EPOUT_FRAME_NUMBER_OFS   0
 
#define UDC_EPOUT_BUFF_SIZE_ADDR   0x0c
 
#define UDC_EP_MAX_PKT_SIZE_ADDR   0x0c
 
#define UDC_EPOUT_BUFF_SIZE_MASK   0xffff0000
 
#define UDC_EPOUT_BUFF_SIZE_OFS   16
 
#define UDC_EP_MAX_PKT_SIZE_MASK   0x0000ffff
 
#define UDC_EP_MAX_PKT_SIZE_OFS   0
 
#define UDC_EP0IN_MAX_PKT_SIZE   64
 
#define UDC_EP0OUT_MAX_PKT_SIZE   64
 
#define UDC_FS_EP0IN_MAX_PKT_SIZE   64
 
#define UDC_FS_EP0OUT_MAX_PKT_SIZE   64
 
#define UDC_DMA_STP_STS_CFG_MASK   0x0fff0000
 
#define UDC_DMA_STP_STS_CFG_OFS   16
 
#define UDC_DMA_STP_STS_CFG_ALT_MASK   0x000f0000
 
#define UDC_DMA_STP_STS_CFG_ALT_OFS   16
 
#define UDC_DMA_STP_STS_CFG_INTF_MASK   0x00f00000
 
#define UDC_DMA_STP_STS_CFG_INTF_OFS   20
 
#define UDC_DMA_STP_STS_CFG_NUM_MASK   0x0f000000
 
#define UDC_DMA_STP_STS_CFG_NUM_OFS   24
 
#define UDC_DMA_STP_STS_RX_MASK   0x30000000
 
#define UDC_DMA_STP_STS_RX_OFS   28
 
#define UDC_DMA_STP_STS_BS_MASK   0xc0000000
 
#define UDC_DMA_STP_STS_BS_OFS   30
 
#define UDC_DMA_STP_STS_BS_HOST_READY   0
 
#define UDC_DMA_STP_STS_BS_DMA_BUSY   1
 
#define UDC_DMA_STP_STS_BS_DMA_DONE   2
 
#define UDC_DMA_STP_STS_BS_HOST_BUSY   3
 
#define UDC_DMA_IN_STS_TXBYTES_MASK   0x0000ffff
 
#define UDC_DMA_IN_STS_TXBYTES_OFS   0
 
#define UDC_DMA_IN_STS_FRAMENUM_MASK   0x07ff0000
 
#define UDC_DMA_IN_STS_FRAMENUM_OFS   0
 
#define UDC_DMA_IN_STS_L   27
 
#define UDC_DMA_IN_STS_TX_MASK   0x30000000
 
#define UDC_DMA_IN_STS_TX_OFS   28
 
#define UDC_DMA_IN_STS_BS_MASK   0xc0000000
 
#define UDC_DMA_IN_STS_BS_OFS   30
 
#define UDC_DMA_IN_STS_BS_HOST_READY   0
 
#define UDC_DMA_IN_STS_BS_DMA_BUSY   1
 
#define UDC_DMA_IN_STS_BS_DMA_DONE   2
 
#define UDC_DMA_IN_STS_BS_HOST_BUSY   3
 
#define UDC_DMA_OUT_STS_RXBYTES_MASK   0x0000ffff
 
#define UDC_DMA_OUT_STS_RXBYTES_OFS   0
 
#define UDC_DMA_OUT_STS_FRAMENUM_MASK   0x07ff0000
 
#define UDC_DMA_OUT_STS_FRAMENUM_OFS   0
 
#define UDC_DMA_OUT_STS_L   27
 
#define UDC_DMA_OUT_STS_RX_MASK   0x30000000
 
#define UDC_DMA_OUT_STS_RX_OFS   28
 
#define UDC_DMA_OUT_STS_BS_MASK   0xc0000000
 
#define UDC_DMA_OUT_STS_BS_OFS   30
 
#define UDC_DMA_OUT_STS_BS_HOST_READY   0
 
#define UDC_DMA_OUT_STS_BS_DMA_BUSY   1
 
#define UDC_DMA_OUT_STS_BS_DMA_DONE   2
 
#define UDC_DMA_OUT_STS_BS_HOST_BUSY   3
 
#define UDC_EP0IN_MAXPACKET   1000
 
#define UDC_DMA_MAXPACKET   65536
 
#define DMA_DONT_USE   (~(dma_addr_t) 0 )
 
#define UDC_EP_SUBPTR_ADDR   0x10
 
#define UDC_EP_DESPTR_ADDR   0x14
 
#define UDC_EP_WRITE_CONFIRM_ADDR   0x1c
 
#define UDC_EP_NUM   32
 
#define UDC_EPIN_NUM   16
 
#define UDC_EPIN_NUM_USED   5
 
#define UDC_EPOUT_NUM   16
 
#define UDC_USED_EP_NUM   9
 
#define UDC_CSR_EP_OUT_IX_OFS   12
 
#define UDC_EP0OUT_IX   16
 
#define UDC_EP0IN_IX   0
 
#define UDC_RXFIFO_ADDR   0x800
 
#define UDC_RXFIFO_SIZE   0x400
 
#define UDC_TXFIFO_ADDR   0xc00
 
#define UDC_TXFIFO_SIZE   0x600
 
#define UDC_EPIN_STATUS_IX   1
 
#define UDC_EPIN_IX   2
 
#define UDC_EPOUT_IX   18
 
#define UDC_DWORD_BYTES   4
 
#define UDC_BITS_PER_BYTE_SHIFT   3
 
#define UDC_BYTE_MASK   0xff
 
#define UDC_BITS_PER_BYTE   8
 
#define AMD_ADDBITS(u32Val, bitfield_val, bitfield_stub_name)
 
#define AMD_INIT_SETBITS(u32Val, bitfield_val, bitfield_stub_name)
 
#define AMD_GETBITS(u32Val, bitfield_stub_name)
 
#define AMD_BIT(bit_stub_name)   (1 << bit_stub_name)
 
#define AMD_UNMASK_BIT(bit_stub_name)   (~AMD_BIT(bit_stub_name))
 
#define AMD_CLEAR_BIT(bit_stub_name)   (~AMD_BIT(bit_stub_name))
 
#define DBG(udc, args...)   dev_dbg(&(udc)->pdev->dev, args)
 
#define VDBG(udc, args...)   do {} while (0)
 

Functions

struct udc_csrs __attribute__ ((packed))
 
struct udc_stp_dma __attribute__ ((aligned(16)))
 

Variables

u32 sca
 
u32 ne [UDC_USED_EP_NUM]
 
u32 cfg
 
u32 ctl
 
u32 sts
 
u32 irqsts
 
u32 irqmsk
 
u32 ep_irqsts
 
u32 ep_irqmsk
 
u32 bufin_framenum
 
u32 bufout_maxpkt
 
u32 subptr
 
u32 desptr
 
u32 reserved
 
u32 confirm
 
u32 status
 
u32 _reserved
 
u32 data12
 
u32 data34
 
u32 bufptr
 
u32 next
 
struct udc_request __attribute__
 

Macro Definition Documentation

#define AMD_ADDBITS (   u32Val,
  bitfield_val,
  bitfield_stub_name 
)
Value:
(((u32Val) & (((u32) ~((u32) bitfield_stub_name##_MASK)))) \
| (((bitfield_val) << ((u32) bitfield_stub_name##_OFS)) \
& ((u32) bitfield_stub_name##_MASK)))

Definition at line 582 of file amd5536udc.h.

#define AMD_BIT (   bit_stub_name)    (1 << bit_stub_name)

Definition at line 602 of file amd5536udc.h.

#define AMD_CLEAR_BIT (   bit_stub_name)    (~AMD_BIT(bit_stub_name))

Definition at line 604 of file amd5536udc.h.

#define AMD_GETBITS (   u32Val,
  bitfield_stub_name 
)
Value:
((u32Val & ((u32) bitfield_stub_name##_MASK)) \
>> ((u32) bitfield_stub_name##_OFS))

Definition at line 597 of file amd5536udc.h.

#define AMD_INIT_SETBITS (   u32Val,
  bitfield_val,
  bitfield_stub_name 
)
Value:
((u32Val) \
| (((bitfield_val) << ((u32) bitfield_stub_name##_OFS)) \
& ((u32) bitfield_stub_name##_MASK)))

Definition at line 591 of file amd5536udc.h.

#define AMD_UNMASK_BIT (   bit_stub_name)    (~AMD_BIT(bit_stub_name))

Definition at line 603 of file amd5536udc.h.

#define DBG (   udc,
  args... 
)    dev_dbg(&(udc)->pdev->dev, args)

Definition at line 608 of file amd5536udc.h.

#define DMA_DONT_USE   (~(dma_addr_t) 0 )

Definition at line 340 of file amd5536udc.h.

#define UDC_BITS_PER_BYTE   8

Definition at line 377 of file amd5536udc.h.

#define UDC_BITS_PER_BYTE_SHIFT   3

Definition at line 375 of file amd5536udc.h.

#define UDC_BYTE_MASK   0xff

Definition at line 376 of file amd5536udc.h.

#define UDC_CSR_ADDR   0x500

Definition at line 51 of file amd5536udc.h.

#define UDC_CSR_EP_OUT_IX_OFS   12

Definition at line 355 of file amd5536udc.h.

#define UDC_CSR_NE_ALT_MASK   0x00078000

Definition at line 70 of file amd5536udc.h.

#define UDC_CSR_NE_ALT_OFS   15

Definition at line 71 of file amd5536udc.h.

#define UDC_CSR_NE_CFG_MASK   0x00000780

Definition at line 64 of file amd5536udc.h.

#define UDC_CSR_NE_CFG_OFS   7

Definition at line 65 of file amd5536udc.h.

#define UDC_CSR_NE_DIR_MASK   0x00000010

Definition at line 58 of file amd5536udc.h.

#define UDC_CSR_NE_DIR_OFS   4

Definition at line 59 of file amd5536udc.h.

#define UDC_CSR_NE_INTF_MASK   0x00007800

Definition at line 67 of file amd5536udc.h.

#define UDC_CSR_NE_INTF_OFS   11

Definition at line 68 of file amd5536udc.h.

#define UDC_CSR_NE_MAX_PKT_MASK   0x3ff80000

Definition at line 74 of file amd5536udc.h.

#define UDC_CSR_NE_MAX_PKT_OFS   19

Definition at line 75 of file amd5536udc.h.

#define UDC_CSR_NE_NUM_MASK   0x0000000f

Definition at line 55 of file amd5536udc.h.

#define UDC_CSR_NE_NUM_OFS   0

Definition at line 56 of file amd5536udc.h.

#define UDC_CSR_NE_TYPE_MASK   0x00000060

Definition at line 61 of file amd5536udc.h.

#define UDC_CSR_NE_TYPE_OFS   5

Definition at line 62 of file amd5536udc.h.

#define UDC_DEV_MSK_DISABLE   0x7f

Definition at line 198 of file amd5536udc.h.

#define UDC_DEVCFG_ADDR   0x400

Definition at line 78 of file amd5536udc.h.

#define UDC_DEVCFG_CSR_PRG   17

Definition at line 84 of file amd5536udc.h.

#define UDC_DEVCFG_DIR   6

Definition at line 86 of file amd5536udc.h.

#define UDC_DEVCFG_DMARST   29

Definition at line 82 of file amd5536udc.h.

#define UDC_DEVCFG_HNPSFEN   30

Definition at line 81 of file amd5536udc.h.

#define UDC_DEVCFG_PI   5

Definition at line 87 of file amd5536udc.h.

#define UDC_DEVCFG_RWKP   2

Definition at line 90 of file amd5536udc.h.

#define UDC_DEVCFG_SET_DESC   18

Definition at line 83 of file amd5536udc.h.

#define UDC_DEVCFG_SOFTRESET   31

Definition at line 80 of file amd5536udc.h.

#define UDC_DEVCFG_SP   3

Definition at line 89 of file amd5536udc.h.

#define UDC_DEVCFG_SPD_FS   0x1

Definition at line 95 of file amd5536udc.h.

#define UDC_DEVCFG_SPD_HS   0x0

Definition at line 94 of file amd5536udc.h.

#define UDC_DEVCFG_SPD_LS   0x2

Definition at line 96 of file amd5536udc.h.

#define UDC_DEVCFG_SPD_MASK   0x3

Definition at line 92 of file amd5536udc.h.

#define UDC_DEVCFG_SPD_OFS   0

Definition at line 93 of file amd5536udc.h.

#define UDC_DEVCFG_SS   4

Definition at line 88 of file amd5536udc.h.

#define UDC_DEVCFG_STATUS   7

Definition at line 85 of file amd5536udc.h.

#define UDC_DEVCTL_ADDR   0x404

Definition at line 101 of file amd5536udc.h.

#define UDC_DEVCTL_BE   5

Definition at line 116 of file amd5536udc.h.

#define UDC_DEVCTL_BF   6

Definition at line 115 of file amd5536udc.h.

#define UDC_DEVCTL_BREN   8

Definition at line 113 of file amd5536udc.h.

#define UDC_DEVCTL_BRLEN_MASK   0x00ff0000

Definition at line 106 of file amd5536udc.h.

#define UDC_DEVCTL_BRLEN_OFS   16

Definition at line 107 of file amd5536udc.h.

#define UDC_DEVCTL_CSR_DONE   13

Definition at line 109 of file amd5536udc.h.

#define UDC_DEVCTL_DEVNAK   12

Definition at line 110 of file amd5536udc.h.

#define UDC_DEVCTL_DU   4

Definition at line 117 of file amd5536udc.h.

#define UDC_DEVCTL_MODE   9

Definition at line 112 of file amd5536udc.h.

#define UDC_DEVCTL_RDE   2

Definition at line 119 of file amd5536udc.h.

#define UDC_DEVCTL_RES   0

Definition at line 120 of file amd5536udc.h.

#define UDC_DEVCTL_SD   10

Definition at line 111 of file amd5536udc.h.

#define UDC_DEVCTL_TDE   3

Definition at line 118 of file amd5536udc.h.

#define UDC_DEVCTL_THE   7

Definition at line 114 of file amd5536udc.h.

#define UDC_DEVCTL_THLEN_MASK   0xff000000

Definition at line 103 of file amd5536udc.h.

#define UDC_DEVCTL_THLEN_OFS   24

Definition at line 104 of file amd5536udc.h.

#define UDC_DEVINT_ADDR   0x40c

Definition at line 151 of file amd5536udc.h.

#define UDC_DEVINT_ENUM   6

Definition at line 154 of file amd5536udc.h.

#define UDC_DEVINT_ES   2

Definition at line 158 of file amd5536udc.h.

#define UDC_DEVINT_MSK   0x7f

Definition at line 165 of file amd5536udc.h.

#define UDC_DEVINT_MSK_ADDR   0x410

Definition at line 163 of file amd5536udc.h.

#define UDC_DEVINT_SC   0

Definition at line 160 of file amd5536udc.h.

#define UDC_DEVINT_SI   1

Definition at line 159 of file amd5536udc.h.

#define UDC_DEVINT_SOF   5

Definition at line 155 of file amd5536udc.h.

#define UDC_DEVINT_SVC   7

Definition at line 153 of file amd5536udc.h.

#define UDC_DEVINT_UR   3

Definition at line 157 of file amd5536udc.h.

#define UDC_DEVINT_US   4

Definition at line 156 of file amd5536udc.h.

#define UDC_DEVSTS_ADDR   0x408

Definition at line 124 of file amd5536udc.h.

#define UDC_DEVSTS_ALT_MASK   0x00000f00

Definition at line 140 of file amd5536udc.h.

#define UDC_DEVSTS_ALT_OFS   8

Definition at line 141 of file amd5536udc.h.

#define UDC_DEVSTS_CFG_MASK   0x0000000f

Definition at line 146 of file amd5536udc.h.

#define UDC_DEVSTS_CFG_OFS   0

Definition at line 147 of file amd5536udc.h.

#define UDC_DEVSTS_ENUM_SPEED_FULL   1

Definition at line 135 of file amd5536udc.h.

#define UDC_DEVSTS_ENUM_SPEED_HIGH   0

Definition at line 136 of file amd5536udc.h.

#define UDC_DEVSTS_ENUM_SPEED_MASK   0x00006000

Definition at line 133 of file amd5536udc.h.

#define UDC_DEVSTS_ENUM_SPEED_OFS   13

Definition at line 134 of file amd5536udc.h.

#define UDC_DEVSTS_INTF_MASK   0x000000f0

Definition at line 143 of file amd5536udc.h.

#define UDC_DEVSTS_INTF_OFS   4

Definition at line 144 of file amd5536udc.h.

#define UDC_DEVSTS_PHY_ERROR   16

Definition at line 130 of file amd5536udc.h.

#define UDC_DEVSTS_RXFIFO_EMPTY   15

Definition at line 131 of file amd5536udc.h.

#define UDC_DEVSTS_SESSVLD   17

Definition at line 129 of file amd5536udc.h.

#define UDC_DEVSTS_SUSP   12

Definition at line 138 of file amd5536udc.h.

#define UDC_DEVSTS_TS_MASK   0xfffc0000

Definition at line 126 of file amd5536udc.h.

#define UDC_DEVSTS_TS_OFS   18

Definition at line 127 of file amd5536udc.h.

#define UDC_DMA_IN_STS_BS_DMA_BUSY   1

Definition at line 317 of file amd5536udc.h.

#define UDC_DMA_IN_STS_BS_DMA_DONE   2

Definition at line 318 of file amd5536udc.h.

#define UDC_DMA_IN_STS_BS_HOST_BUSY   3

Definition at line 319 of file amd5536udc.h.

#define UDC_DMA_IN_STS_BS_HOST_READY   0

Definition at line 316 of file amd5536udc.h.

#define UDC_DMA_IN_STS_BS_MASK   0xc0000000

Definition at line 314 of file amd5536udc.h.

#define UDC_DMA_IN_STS_BS_OFS   30

Definition at line 315 of file amd5536udc.h.

#define UDC_DMA_IN_STS_FRAMENUM_MASK   0x07ff0000

Definition at line 309 of file amd5536udc.h.

#define UDC_DMA_IN_STS_FRAMENUM_OFS   0

Definition at line 310 of file amd5536udc.h.

#define UDC_DMA_IN_STS_L   27

Definition at line 311 of file amd5536udc.h.

#define UDC_DMA_IN_STS_TX_MASK   0x30000000

Definition at line 312 of file amd5536udc.h.

#define UDC_DMA_IN_STS_TX_OFS   28

Definition at line 313 of file amd5536udc.h.

#define UDC_DMA_IN_STS_TXBYTES_MASK   0x0000ffff

Definition at line 307 of file amd5536udc.h.

#define UDC_DMA_IN_STS_TXBYTES_OFS   0

Definition at line 308 of file amd5536udc.h.

#define UDC_DMA_MAXPACKET   65536

Definition at line 337 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_BS_DMA_BUSY   1

Definition at line 331 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_BS_DMA_DONE   2

Definition at line 332 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_BS_HOST_BUSY   3

Definition at line 333 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_BS_HOST_READY   0

Definition at line 330 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_BS_MASK   0xc0000000

Definition at line 328 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_BS_OFS   30

Definition at line 329 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_FRAMENUM_MASK   0x07ff0000

Definition at line 323 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_FRAMENUM_OFS   0

Definition at line 324 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_L   27

Definition at line 325 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_RX_MASK   0x30000000

Definition at line 326 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_RX_OFS   28

Definition at line 327 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_RXBYTES_MASK   0x0000ffff

Definition at line 321 of file amd5536udc.h.

#define UDC_DMA_OUT_STS_RXBYTES_OFS   0

Definition at line 322 of file amd5536udc.h.

#define UDC_DMA_STP_STS_BS_DMA_BUSY   1

Definition at line 303 of file amd5536udc.h.

#define UDC_DMA_STP_STS_BS_DMA_DONE   2

Definition at line 304 of file amd5536udc.h.

#define UDC_DMA_STP_STS_BS_HOST_BUSY   3

Definition at line 305 of file amd5536udc.h.

#define UDC_DMA_STP_STS_BS_HOST_READY   0

Definition at line 302 of file amd5536udc.h.

#define UDC_DMA_STP_STS_BS_MASK   0xc0000000

Definition at line 300 of file amd5536udc.h.

#define UDC_DMA_STP_STS_BS_OFS   30

Definition at line 301 of file amd5536udc.h.

#define UDC_DMA_STP_STS_CFG_ALT_MASK   0x000f0000

Definition at line 292 of file amd5536udc.h.

#define UDC_DMA_STP_STS_CFG_ALT_OFS   16

Definition at line 293 of file amd5536udc.h.

#define UDC_DMA_STP_STS_CFG_INTF_MASK   0x00f00000

Definition at line 294 of file amd5536udc.h.

#define UDC_DMA_STP_STS_CFG_INTF_OFS   20

Definition at line 295 of file amd5536udc.h.

#define UDC_DMA_STP_STS_CFG_MASK   0x0fff0000

Definition at line 290 of file amd5536udc.h.

#define UDC_DMA_STP_STS_CFG_NUM_MASK   0x0f000000

Definition at line 296 of file amd5536udc.h.

#define UDC_DMA_STP_STS_CFG_NUM_OFS   24

Definition at line 297 of file amd5536udc.h.

#define UDC_DMA_STP_STS_CFG_OFS   16

Definition at line 291 of file amd5536udc.h.

#define UDC_DMA_STP_STS_RX_MASK   0x30000000

Definition at line 298 of file amd5536udc.h.

#define UDC_DMA_STP_STS_RX_OFS   28

Definition at line 299 of file amd5536udc.h.

#define UDC_DWORD_BYTES   4

Definition at line 374 of file amd5536udc.h.

#define UDC_EP0IN_IX   0

Definition at line 358 of file amd5536udc.h.

#define UDC_EP0IN_MAX_PKT_SIZE   64

Definition at line 277 of file amd5536udc.h.

#define UDC_EP0IN_MAXPACKET   1000

Definition at line 335 of file amd5536udc.h.

#define UDC_EP0OUT_IX   16

Definition at line 357 of file amd5536udc.h.

#define UDC_EP0OUT_MAX_PKT_SIZE   64

Definition at line 279 of file amd5536udc.h.

#define UDC_EP_DESPTR_ADDR   0x14

Definition at line 344 of file amd5536udc.h.

#define UDC_EP_MAX_PKT_SIZE_ADDR   0x0c

Definition at line 270 of file amd5536udc.h.

#define UDC_EP_MAX_PKT_SIZE_MASK   0x0000ffff

Definition at line 274 of file amd5536udc.h.

#define UDC_EP_MAX_PKT_SIZE_OFS   0

Definition at line 275 of file amd5536udc.h.

#define UDC_EP_NUM   32

Definition at line 348 of file amd5536udc.h.

#define UDC_EP_SUBPTR_ADDR   0x10

Definition at line 343 of file amd5536udc.h.

#define UDC_EP_WRITE_CONFIRM_ADDR   0x1c

Definition at line 345 of file amd5536udc.h.

#define UDC_EPCTL_ADDR   0x0

Definition at line 205 of file amd5536udc.h.

#define UDC_EPCTL_CNAK   8

Definition at line 208 of file amd5536udc.h.

#define UDC_EPCTL_ET_BULK   2

Definition at line 216 of file amd5536udc.h.

#define UDC_EPCTL_ET_CONTROL   0

Definition at line 214 of file amd5536udc.h.

#define UDC_EPCTL_ET_INTERRUPT   3

Definition at line 217 of file amd5536udc.h.

#define UDC_EPCTL_ET_ISO   1

Definition at line 215 of file amd5536udc.h.

#define UDC_EPCTL_ET_MASK   0x00000030

Definition at line 212 of file amd5536udc.h.

#define UDC_EPCTL_ET_OFS   4

Definition at line 213 of file amd5536udc.h.

#define UDC_EPCTL_F   1

Definition at line 221 of file amd5536udc.h.

#define UDC_EPCTL_NAK   6

Definition at line 210 of file amd5536udc.h.

#define UDC_EPCTL_P   3

Definition at line 219 of file amd5536udc.h.

#define UDC_EPCTL_RRDY   9

Definition at line 207 of file amd5536udc.h.

#define UDC_EPCTL_S   0

Definition at line 222 of file amd5536udc.h.

#define UDC_EPCTL_SN   2

Definition at line 220 of file amd5536udc.h.

#define UDC_EPCTL_SNAK   7

Definition at line 209 of file amd5536udc.h.

#define UDC_EPDATAINT_MSK_DISABLE   0xfffefffe

Definition at line 196 of file amd5536udc.h.

#define UDC_EPIN0_BUFF_SIZE   32

Definition at line 250 of file amd5536udc.h.

#define UDC_EPIN_BUFF_SIZE   256

Definition at line 258 of file amd5536udc.h.

#define UDC_EPIN_BUFF_SIZE_ADDR   0x8

Definition at line 244 of file amd5536udc.h.

#define UDC_EPIN_BUFF_SIZE_MASK   0x0000ffff

Definition at line 247 of file amd5536udc.h.

#define UDC_EPIN_BUFF_SIZE_MULT   2

Definition at line 255 of file amd5536udc.h.

#define UDC_EPIN_BUFF_SIZE_OFS   0

Definition at line 248 of file amd5536udc.h.

#define UDC_EPIN_IX   2

Definition at line 370 of file amd5536udc.h.

#define UDC_EPIN_NUM   16

Definition at line 349 of file amd5536udc.h.

#define UDC_EPIN_NUM_USED   5

Definition at line 350 of file amd5536udc.h.

#define UDC_EPIN_REGS_ADDR   0x0

Definition at line 202 of file amd5536udc.h.

#define UDC_EPIN_SMALLINT_BUFF_SIZE   32

Definition at line 260 of file amd5536udc.h.

#define UDC_EPIN_STATUS_IX   1

Definition at line 369 of file amd5536udc.h.

#define UDC_EPINT_ADDR   0x414

Definition at line 168 of file amd5536udc.h.

#define UDC_EPINT_EP0_ENABLE_MSK   0x001e001e

Definition at line 184 of file amd5536udc.h.

#define UDC_EPINT_IN_EP0   0

Definition at line 175 of file amd5536udc.h.

#define UDC_EPINT_IN_EP1   1

Definition at line 176 of file amd5536udc.h.

#define UDC_EPINT_IN_EP2   2

Definition at line 177 of file amd5536udc.h.

#define UDC_EPINT_IN_EP3   3

Definition at line 178 of file amd5536udc.h.

#define UDC_EPINT_IN_MASK   0x0000ffff

Definition at line 172 of file amd5536udc.h.

#define UDC_EPINT_IN_MSK_MASK   0x0000ffff

Definition at line 191 of file amd5536udc.h.

#define UDC_EPINT_IN_MSK_OFS   0

Definition at line 192 of file amd5536udc.h.

#define UDC_EPINT_IN_OFS   0

Definition at line 173 of file amd5536udc.h.

#define UDC_EPINT_MSK_ADDR   0x418

Definition at line 187 of file amd5536udc.h.

#define UDC_EPINT_MSK_DISABLE_ALL   0xffffffff

Definition at line 194 of file amd5536udc.h.

#define UDC_EPINT_OUT_EP0   16

Definition at line 179 of file amd5536udc.h.

#define UDC_EPINT_OUT_EP1   17

Definition at line 180 of file amd5536udc.h.

#define UDC_EPINT_OUT_EP2   18

Definition at line 181 of file amd5536udc.h.

#define UDC_EPINT_OUT_EP3   19

Definition at line 182 of file amd5536udc.h.

#define UDC_EPINT_OUT_MASK   0xffff0000

Definition at line 170 of file amd5536udc.h.

#define UDC_EPINT_OUT_MSK_MASK   0xffff0000

Definition at line 189 of file amd5536udc.h.

#define UDC_EPINT_OUT_MSK_OFS   16

Definition at line 190 of file amd5536udc.h.

#define UDC_EPINT_OUT_OFS   16

Definition at line 171 of file amd5536udc.h.

#define UDC_EPOUT_BUFF_SIZE_ADDR   0x0c

Definition at line 269 of file amd5536udc.h.

#define UDC_EPOUT_BUFF_SIZE_MASK   0xffff0000

Definition at line 272 of file amd5536udc.h.

#define UDC_EPOUT_BUFF_SIZE_OFS   16

Definition at line 273 of file amd5536udc.h.

#define UDC_EPOUT_FRAME_NUMBER_ADDR   0x8

Definition at line 245 of file amd5536udc.h.

#define UDC_EPOUT_FRAME_NUMBER_MASK   0x0000ffff

Definition at line 265 of file amd5536udc.h.

#define UDC_EPOUT_FRAME_NUMBER_OFS   0

Definition at line 266 of file amd5536udc.h.

#define UDC_EPOUT_IX   18

Definition at line 371 of file amd5536udc.h.

#define UDC_EPOUT_NUM   16

Definition at line 351 of file amd5536udc.h.

#define UDC_EPOUT_REGS_ADDR   0x200

Definition at line 203 of file amd5536udc.h.

#define UDC_EPREGS_ADDR   0x0

Definition at line 201 of file amd5536udc.h.

#define UDC_EPSTS_ADDR   0x4

Definition at line 225 of file amd5536udc.h.

#define UDC_EPSTS_BNA   7

Definition at line 232 of file amd5536udc.h.

#define UDC_EPSTS_HE   9

Definition at line 231 of file amd5536udc.h.

#define UDC_EPSTS_IN   6

Definition at line 233 of file amd5536udc.h.

#define UDC_EPSTS_OUT_CLEAR   0x30

Definition at line 241 of file amd5536udc.h.

#define UDC_EPSTS_OUT_DATA   1

Definition at line 237 of file amd5536udc.h.

#define UDC_EPSTS_OUT_DATA_CLEAR   0x10

Definition at line 238 of file amd5536udc.h.

#define UDC_EPSTS_OUT_MASK   0x00000030

Definition at line 235 of file amd5536udc.h.

#define UDC_EPSTS_OUT_OFS   4

Definition at line 236 of file amd5536udc.h.

#define UDC_EPSTS_OUT_SETUP   2

Definition at line 239 of file amd5536udc.h.

#define UDC_EPSTS_OUT_SETUP_CLEAR   0x20

Definition at line 240 of file amd5536udc.h.

#define UDC_EPSTS_RX_PKT_SIZE_MASK   0x007ff800

Definition at line 227 of file amd5536udc.h.

#define UDC_EPSTS_RX_PKT_SIZE_OFS   11

Definition at line 228 of file amd5536udc.h.

#define UDC_EPSTS_TDC   10

Definition at line 230 of file amd5536udc.h.

#define UDC_FS_EP0IN_MAX_PKT_SIZE   64

Definition at line 281 of file amd5536udc.h.

#define UDC_FS_EP0OUT_MAX_PKT_SIZE   64

Definition at line 283 of file amd5536udc.h.

#define UDC_FS_EPIN0_BUFF_SIZE   32

Definition at line 252 of file amd5536udc.h.

#define UDC_FS_EPIN_BUFF_SIZE   32

Definition at line 263 of file amd5536udc.h.

#define UDC_HSA0_REV   1

Definition at line 22 of file amd5536udc.h.

#define UDC_HSB1_REV   2

Definition at line 23 of file amd5536udc.h.

#define UDC_MSCRES_DWORD0   0x0000ff21

Definition at line 47 of file amd5536udc.h.

#define UDC_MSCRES_DWORD1   0x00000000

Definition at line 48 of file amd5536udc.h.

#define UDC_POLLSTALL_TIMER_USECONDS   500

Definition at line 19 of file amd5536udc.h.

#define UDC_RDE_TIMER_DIV   10

Definition at line 18 of file amd5536udc.h.

#define UDC_RDE_TIMER_SECONDS   1

Definition at line 17 of file amd5536udc.h.

#define UDC_RXFIFO_ADDR   0x800

Definition at line 361 of file amd5536udc.h.

#define UDC_RXFIFO_SIZE   0x400

Definition at line 362 of file amd5536udc.h.

#define UDC_SETCONFIG_DWORD0   0x00000900

Definition at line 31 of file amd5536udc.h.

#define UDC_SETCONFIG_DWORD0_VALUE_MASK   0xffff0000

Definition at line 32 of file amd5536udc.h.

#define UDC_SETCONFIG_DWORD0_VALUE_OFS   16

Definition at line 33 of file amd5536udc.h.

#define UDC_SETCONFIG_DWORD1   0x00000000

Definition at line 35 of file amd5536udc.h.

#define UDC_SETINTF_DWORD0   0x00000b00

Definition at line 38 of file amd5536udc.h.

#define UDC_SETINTF_DWORD0_ALT_MASK   0xffff0000

Definition at line 39 of file amd5536udc.h.

#define UDC_SETINTF_DWORD0_ALT_OFS   16

Definition at line 40 of file amd5536udc.h.

#define UDC_SETINTF_DWORD1   0x00000000

Definition at line 42 of file amd5536udc.h.

#define UDC_SETINTF_DWORD1_INTF_MASK   0x0000ffff

Definition at line 43 of file amd5536udc.h.

#define UDC_SETINTF_DWORD1_INTF_OFS   0

Definition at line 44 of file amd5536udc.h.

#define UDC_TXFIFO_ADDR   0xc00

Definition at line 365 of file amd5536udc.h.

#define UDC_TXFIFO_SIZE   0x600

Definition at line 366 of file amd5536udc.h.

#define UDC_USED_EP_NUM   9

Definition at line 353 of file amd5536udc.h.

#define VDBG (   udc,
  args... 
)    do {} while (0)

Definition at line 613 of file amd5536udc.h.

Function Documentation

struct udc_csrs __attribute__ ( (packed)  )
read

mcontroller : adapter info structure for old mimd_t apps

: base address : irq number : number of logical drives : pci bus : pci device : pci function : pci id : vendor id : slot number : unique id

Definition at line 171 of file esd_usb2.c.

Variable Documentation

u32 _reserved

Definition at line 458 of file amd5536udc.h.

u32 bufin_framenum

Definition at line 451 of file amd5536udc.h.

u32 bufout_maxpkt

Definition at line 454 of file amd5536udc.h.

u32 bufptr

Definition at line 472 of file amd5536udc.h.

u32 cfg

Definition at line 416 of file amd5536udc.h.

u32 confirm

Definition at line 466 of file amd5536udc.h.

u32 ctl

Definition at line 419 of file amd5536udc.h.

u32 data12

Definition at line 460 of file amd5536udc.h.

u32 data34

Definition at line 462 of file amd5536udc.h.

u32 desptr

Definition at line 460 of file amd5536udc.h.

u32 ep_irqmsk

Definition at line 434 of file amd5536udc.h.

u32 ep_irqsts

Definition at line 431 of file amd5536udc.h.

u32 irqmsk

Definition at line 428 of file amd5536udc.h.

u32 irqsts

Definition at line 425 of file amd5536udc.h.

Definition at line 394 of file amd5536udc.h.

u32 next

Definition at line 474 of file amd5536udc.h.

u32 reserved

Definition at line 463 of file amd5536udc.h.

u32 sca

Definition at line 391 of file amd5536udc.h.

Definition at line 456 of file amd5536udc.h.

u32 sts

Definition at line 422 of file amd5536udc.h.

u32 subptr

Definition at line 457 of file amd5536udc.h.