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amplc_pci224.c File Reference
#include <linux/interrupt.h>
#include <linux/slab.h>
#include "../comedidev.h"
#include "comedi_fc.h"
#include "8253.h"

Go to the source code of this file.

Data Structures

struct  pci224_board
 
struct  pci224_private
 

Macros

#define DRIVER_NAME   "amplc_pci224"
 
#define PCI_VENDOR_ID_AMPLICON   0x14dc
 
#define PCI_DEVICE_ID_AMPLICON_PCI224   0x0007
 
#define PCI_DEVICE_ID_AMPLICON_PCI234   0x0008
 
#define PCI_DEVICE_ID_INVALID   0xffff
 
#define PCI224_IO1_SIZE   0x20 /* Size of i/o space 1 (8-bit registers) */
 
#define PCI224_Z2_CT0   0x14 /* 82C54 counter/timer 0 */
 
#define PCI224_Z2_CT1   0x15 /* 82C54 counter/timer 1 */
 
#define PCI224_Z2_CT2   0x16 /* 82C54 counter/timer 2 */
 
#define PCI224_Z2_CTC   0x17 /* 82C54 counter/timer control word */
 
#define PCI224_ZCLK_SCE   0x1A /* Group Z Clock Configuration Register */
 
#define PCI224_ZGAT_SCE   0x1D /* Group Z Gate Configuration Register */
 
#define PCI224_INT_SCE   0x1E /* ISR Interrupt source mask register */
 
#define PCI224_IO2_SIZE   0x10 /* Size of i/o space 2 (16-bit registers). */
 
#define PCI224_DACDATA   0x00 /* (w-o) DAC FIFO data. */
 
#define PCI224_SOFTTRIG   0x00 /* (r-o) DAC software scan trigger. */
 
#define PCI224_DACCON   0x02 /* (r/w) DAC status/configuration. */
 
#define PCI224_FIFOSIZ   0x04 /* (w-o) FIFO size for wraparound mode. */
 
#define PCI224_DACCEN   0x06 /* (w-o) DAC channel enable register. */
 
#define PCI224_DACCON_TRIG_MASK   (7 << 0)
 
#define PCI224_DACCON_TRIG_NONE   (0 << 0) /* none */
 
#define PCI224_DACCON_TRIG_SW   (1 << 0) /* software trig */
 
#define PCI224_DACCON_TRIG_EXTP   (2 << 0) /* ext +ve edge */
 
#define PCI224_DACCON_TRIG_EXTN   (3 << 0) /* ext -ve edge */
 
#define PCI224_DACCON_TRIG_Z2CT0   (4 << 0) /* Z2 CT0 out */
 
#define PCI224_DACCON_TRIG_Z2CT1   (5 << 0) /* Z2 CT1 out */
 
#define PCI224_DACCON_TRIG_Z2CT2   (6 << 0) /* Z2 CT2 out */
 
#define PCI224_DACCON_POLAR_MASK   (1 << 3)
 
#define PCI224_DACCON_POLAR_UNI   (0 << 3) /* range [0,Vref] */
 
#define PCI224_DACCON_POLAR_BI   (1 << 3) /* range [-Vref,Vref] */
 
#define PCI224_DACCON_VREF_MASK   (3 << 4)
 
#define PCI224_DACCON_VREF_1_25   (0 << 4) /* Vref = 1.25V */
 
#define PCI224_DACCON_VREF_2_5   (1 << 4) /* Vref = 2.5V */
 
#define PCI224_DACCON_VREF_5   (2 << 4) /* Vref = 5V */
 
#define PCI224_DACCON_VREF_10   (3 << 4) /* Vref = 10V */
 
#define PCI224_DACCON_FIFOWRAP   (1 << 7)
 
#define PCI224_DACCON_FIFOENAB   (1 << 8)
 
#define PCI224_DACCON_FIFOINTR_MASK   (7 << 9)
 
#define PCI224_DACCON_FIFOINTR_EMPTY   (0 << 9) /* when empty */
 
#define PCI224_DACCON_FIFOINTR_NEMPTY   (1 << 9) /* when not empty */
 
#define PCI224_DACCON_FIFOINTR_NHALF   (2 << 9) /* when not half full */
 
#define PCI224_DACCON_FIFOINTR_HALF   (3 << 9) /* when half full */
 
#define PCI224_DACCON_FIFOINTR_NFULL   (4 << 9) /* when not full */
 
#define PCI224_DACCON_FIFOINTR_FULL   (5 << 9) /* when full */
 
#define PCI224_DACCON_FIFOFL_MASK   (7 << 12)
 
#define PCI224_DACCON_FIFOFL_EMPTY   (1 << 12) /* 0 */
 
#define PCI224_DACCON_FIFOFL_ONETOHALF   (0 << 12) /* [1,2048] */
 
#define PCI224_DACCON_FIFOFL_HALFTOFULL   (4 << 12) /* [2049,4095] */
 
#define PCI224_DACCON_FIFOFL_FULL   (6 << 12) /* 4096 */
 
#define PCI224_DACCON_BUSY   (1 << 15)
 
#define PCI224_DACCON_FIFORESET   (1 << 12)
 
#define PCI224_DACCON_GLOBALRESET   (1 << 13)
 
#define PCI224_FIFO_SIZE   4096
 
#define PCI224_FIFO_ROOM_EMPTY   PCI224_FIFO_SIZE
 
#define PCI224_FIFO_ROOM_ONETOHALF   (PCI224_FIFO_SIZE / 2)
 
#define PCI224_FIFO_ROOM_HALFTOFULL   1
 
#define PCI224_FIFO_ROOM_FULL   0
 
#define CLK_CLK   0 /* reserved (channel-specific clock) */
 
#define CLK_10MHZ   1 /* internal 10 MHz clock */
 
#define CLK_1MHZ   2 /* internal 1 MHz clock */
 
#define CLK_100KHZ   3 /* internal 100 kHz clock */
 
#define CLK_10KHZ   4 /* internal 10 kHz clock */
 
#define CLK_1KHZ   5 /* internal 1 kHz clock */
 
#define CLK_OUTNM1   6 /* output of channel-1 modulo total */
 
#define CLK_EXT   7 /* external clock */
 
#define CLK_CONFIG(chan, src)   ((((chan) & 3) << 3) | ((src) & 7))
 
#define TIMEBASE_10MHZ   100
 
#define TIMEBASE_1MHZ   1000
 
#define TIMEBASE_100KHZ   10000
 
#define TIMEBASE_10KHZ   100000
 
#define TIMEBASE_1KHZ   1000000
 
#define GAT_VCC   0 /* VCC (i.e. enabled) */
 
#define GAT_GND   1 /* GND (i.e. disabled) */
 
#define GAT_EXT   2 /* reserved (external gate input) */
 
#define GAT_NOUTNM2   3 /* inverted output of channel-2 modulo total */
 
#define GAT_CONFIG(chan, src)   ((((chan) & 3) << 3) | ((src) & 7))
 
#define PCI224_INTR_EXT   0x01 /* rising edge on external input */
 
#define PCI224_INTR_DAC   0x04 /* DAC (FIFO) interrupt */
 
#define PCI224_INTR_Z2CT1   0x20 /* rising edge on Z2-CT1 output */
 
#define PCI224_INTR_EDGE_BITS   (PCI224_INTR_EXT | PCI224_INTR_Z2CT1)
 
#define PCI224_INTR_LEVEL_BITS   PCI224_INTR_DACFIFO
 
#define COMBINE(old, new, mask)   (((old) & ~(mask)) | ((new) & (mask)))
 
#define THISCPU   smp_processor_id()
 
#define AO_CMD_STARTED   0
 
#define MAX_SCAN_PERIOD   0xFFFFFFFFU
 
#define MIN_SCAN_PERIOD   2500
 
#define CONVERT_PERIOD   625
 

Enumerations

enum  pci224_model { any_model, pci224_model, pci234_model }
 

Functions

 MODULE_DEVICE_TABLE (pci, amplc_pci224_pci_table)
 
 module_comedi_pci_driver (amplc_pci224_driver, amplc_pci224_pci_driver)
 
 MODULE_AUTHOR ("Comedi http://www.comedi.org")
 
 MODULE_DESCRIPTION ("Comedi low-level driver")
 
 MODULE_LICENSE ("GPL")
 

Macro Definition Documentation

#define AO_CMD_STARTED   0

Definition at line 272 of file amplc_pci224.c.

#define CLK_100KHZ   3 /* internal 100 kHz clock */

Definition at line 215 of file amplc_pci224.c.

#define CLK_10KHZ   4 /* internal 10 kHz clock */

Definition at line 216 of file amplc_pci224.c.

#define CLK_10MHZ   1 /* internal 10 MHz clock */

Definition at line 213 of file amplc_pci224.c.

#define CLK_1KHZ   5 /* internal 1 kHz clock */

Definition at line 217 of file amplc_pci224.c.

#define CLK_1MHZ   2 /* internal 1 MHz clock */

Definition at line 214 of file amplc_pci224.c.

#define CLK_CLK   0 /* reserved (channel-specific clock) */

Definition at line 212 of file amplc_pci224.c.

#define CLK_CONFIG (   chan,
  src 
)    ((((chan) & 3) << 3) | ((src) & 7))

Definition at line 221 of file amplc_pci224.c.

#define CLK_EXT   7 /* external clock */

Definition at line 219 of file amplc_pci224.c.

#define CLK_OUTNM1   6 /* output of channel-1 modulo total */

Definition at line 218 of file amplc_pci224.c.

#define COMBINE (   old,
  new,
  mask 
)    (((old) & ~(mask)) | ((new) & (mask)))

Definition at line 266 of file amplc_pci224.c.

#define CONVERT_PERIOD   625

Definition at line 710 of file amplc_pci224.c.

#define DRIVER_NAME   "amplc_pci224"

Definition at line 114 of file amplc_pci224.c.

#define GAT_CONFIG (   chan,
  src 
)    ((((chan) & 3) << 3) | ((src) & 7))

Definition at line 237 of file amplc_pci224.c.

#define GAT_EXT   2 /* reserved (external gate input) */

Definition at line 234 of file amplc_pci224.c.

#define GAT_GND   1 /* GND (i.e. disabled) */

Definition at line 233 of file amplc_pci224.c.

#define GAT_NOUTNM2   3 /* inverted output of channel-2 modulo total */

Definition at line 235 of file amplc_pci224.c.

#define GAT_VCC   0 /* VCC (i.e. enabled) */

Definition at line 232 of file amplc_pci224.c.

#define MAX_SCAN_PERIOD   0xFFFFFFFFU

Definition at line 708 of file amplc_pci224.c.

#define MIN_SCAN_PERIOD   2500

Definition at line 709 of file amplc_pci224.c.

#define PCI224_DACCEN   0x06 /* (w-o) DAC channel enable register. */

Definition at line 145 of file amplc_pci224.c.

#define PCI224_DACCON   0x02 /* (r/w) DAC status/configuration. */

Definition at line 143 of file amplc_pci224.c.

#define PCI224_DACCON_BUSY   (1 << 15)

Definition at line 188 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOENAB   (1 << 8)

Definition at line 172 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOFL_EMPTY   (1 << 12) /* 0 */

Definition at line 183 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOFL_FULL   (6 << 12) /* 4096 */

Definition at line 186 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOFL_HALFTOFULL   (4 << 12) /* [2049,4095] */

Definition at line 185 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOFL_MASK   (7 << 12)

Definition at line 182 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOFL_ONETOHALF   (0 << 12) /* [1,2048] */

Definition at line 184 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOINTR_EMPTY   (0 << 9) /* when empty */

Definition at line 175 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOINTR_FULL   (5 << 9) /* when full */

Definition at line 180 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOINTR_HALF   (3 << 9) /* when half full */

Definition at line 178 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOINTR_MASK   (7 << 9)

Definition at line 174 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOINTR_NEMPTY   (1 << 9) /* when not empty */

Definition at line 176 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOINTR_NFULL   (4 << 9) /* when not full */

Definition at line 179 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOINTR_NHALF   (2 << 9) /* when not half full */

Definition at line 177 of file amplc_pci224.c.

#define PCI224_DACCON_FIFORESET   (1 << 12)

Definition at line 190 of file amplc_pci224.c.

#define PCI224_DACCON_FIFOWRAP   (1 << 7)

Definition at line 170 of file amplc_pci224.c.

#define PCI224_DACCON_GLOBALRESET   (1 << 13)

Definition at line 192 of file amplc_pci224.c.

#define PCI224_DACCON_POLAR_BI   (1 << 3) /* range [-Vref,Vref] */

Definition at line 162 of file amplc_pci224.c.

#define PCI224_DACCON_POLAR_MASK   (1 << 3)

Definition at line 160 of file amplc_pci224.c.

#define PCI224_DACCON_POLAR_UNI   (0 << 3) /* range [0,Vref] */

Definition at line 161 of file amplc_pci224.c.

#define PCI224_DACCON_TRIG_EXTN   (3 << 0) /* ext -ve edge */

Definition at line 155 of file amplc_pci224.c.

#define PCI224_DACCON_TRIG_EXTP   (2 << 0) /* ext +ve edge */

Definition at line 154 of file amplc_pci224.c.

#define PCI224_DACCON_TRIG_MASK   (7 << 0)

Definition at line 151 of file amplc_pci224.c.

#define PCI224_DACCON_TRIG_NONE   (0 << 0) /* none */

Definition at line 152 of file amplc_pci224.c.

#define PCI224_DACCON_TRIG_SW   (1 << 0) /* software trig */

Definition at line 153 of file amplc_pci224.c.

#define PCI224_DACCON_TRIG_Z2CT0   (4 << 0) /* Z2 CT0 out */

Definition at line 156 of file amplc_pci224.c.

#define PCI224_DACCON_TRIG_Z2CT1   (5 << 0) /* Z2 CT1 out */

Definition at line 157 of file amplc_pci224.c.

#define PCI224_DACCON_TRIG_Z2CT2   (6 << 0) /* Z2 CT2 out */

Definition at line 158 of file amplc_pci224.c.

#define PCI224_DACCON_VREF_10   (3 << 4) /* Vref = 10V */

Definition at line 168 of file amplc_pci224.c.

#define PCI224_DACCON_VREF_1_25   (0 << 4) /* Vref = 1.25V */

Definition at line 165 of file amplc_pci224.c.

#define PCI224_DACCON_VREF_2_5   (1 << 4) /* Vref = 2.5V */

Definition at line 166 of file amplc_pci224.c.

#define PCI224_DACCON_VREF_5   (2 << 4) /* Vref = 5V */

Definition at line 167 of file amplc_pci224.c.

#define PCI224_DACCON_VREF_MASK   (3 << 4)

Definition at line 164 of file amplc_pci224.c.

#define PCI224_DACDATA   0x00 /* (w-o) DAC FIFO data. */

Definition at line 141 of file amplc_pci224.c.

#define PCI224_FIFO_ROOM_EMPTY   PCI224_FIFO_SIZE

Definition at line 204 of file amplc_pci224.c.

#define PCI224_FIFO_ROOM_FULL   0

Definition at line 207 of file amplc_pci224.c.

#define PCI224_FIFO_ROOM_HALFTOFULL   1

Definition at line 206 of file amplc_pci224.c.

#define PCI224_FIFO_ROOM_ONETOHALF   (PCI224_FIFO_SIZE / 2)

Definition at line 205 of file amplc_pci224.c.

#define PCI224_FIFO_SIZE   4096

Definition at line 197 of file amplc_pci224.c.

#define PCI224_FIFOSIZ   0x04 /* (w-o) FIFO size for wraparound mode. */

Definition at line 144 of file amplc_pci224.c.

#define PCI224_INT_SCE   0x1E /* ISR Interrupt source mask register */

Definition at line 134 of file amplc_pci224.c.

#define PCI224_INTR_DAC   0x04 /* DAC (FIFO) interrupt */

Definition at line 255 of file amplc_pci224.c.

#define PCI224_INTR_EDGE_BITS   (PCI224_INTR_EXT | PCI224_INTR_Z2CT1)

Definition at line 258 of file amplc_pci224.c.

#define PCI224_INTR_EXT   0x01 /* rising edge on external input */

Definition at line 254 of file amplc_pci224.c.

#define PCI224_INTR_LEVEL_BITS   PCI224_INTR_DACFIFO

Definition at line 259 of file amplc_pci224.c.

#define PCI224_INTR_Z2CT1   0x20 /* rising edge on Z2-CT1 output */

Definition at line 256 of file amplc_pci224.c.

#define PCI224_IO1_SIZE   0x20 /* Size of i/o space 1 (8-bit registers) */

Definition at line 127 of file amplc_pci224.c.

#define PCI224_IO2_SIZE   0x10 /* Size of i/o space 2 (16-bit registers). */

Definition at line 140 of file amplc_pci224.c.

#define PCI224_SOFTTRIG   0x00 /* (r-o) DAC software scan trigger. */

Definition at line 142 of file amplc_pci224.c.

#define PCI224_Z2_CT0   0x14 /* 82C54 counter/timer 0 */

Definition at line 128 of file amplc_pci224.c.

#define PCI224_Z2_CT1   0x15 /* 82C54 counter/timer 1 */

Definition at line 129 of file amplc_pci224.c.

#define PCI224_Z2_CT2   0x16 /* 82C54 counter/timer 2 */

Definition at line 130 of file amplc_pci224.c.

#define PCI224_Z2_CTC   0x17 /* 82C54 counter/timer control word */

Definition at line 131 of file amplc_pci224.c.

#define PCI224_ZCLK_SCE   0x1A /* Group Z Clock Configuration Register */

Definition at line 132 of file amplc_pci224.c.

#define PCI224_ZGAT_SCE   0x1D /* Group Z Gate Configuration Register */

Definition at line 133 of file amplc_pci224.c.

#define PCI_DEVICE_ID_AMPLICON_PCI224   0x0007

Definition at line 120 of file amplc_pci224.c.

#define PCI_DEVICE_ID_AMPLICON_PCI234   0x0008

Definition at line 121 of file amplc_pci224.c.

#define PCI_DEVICE_ID_INVALID   0xffff

Definition at line 122 of file amplc_pci224.c.

#define PCI_VENDOR_ID_AMPLICON   0x14dc

Definition at line 119 of file amplc_pci224.c.

#define THISCPU   smp_processor_id()

Definition at line 269 of file amplc_pci224.c.

#define TIMEBASE_100KHZ   10000

Definition at line 225 of file amplc_pci224.c.

#define TIMEBASE_10KHZ   100000

Definition at line 226 of file amplc_pci224.c.

#define TIMEBASE_10MHZ   100

Definition at line 223 of file amplc_pci224.c.

#define TIMEBASE_1KHZ   1000000

Definition at line 227 of file amplc_pci224.c.

#define TIMEBASE_1MHZ   1000

Definition at line 224 of file amplc_pci224.c.

Enumeration Type Documentation

Enumerator:
any_model 
pci224_model 
pci234_model 

Definition at line 345 of file amplc_pci224.c.

Function Documentation

MODULE_AUTHOR ( "Comedi http://www.comedi.org"  )
module_comedi_pci_driver ( amplc_pci224_driver  ,
amplc_pci224_pci_driver   
)
MODULE_DESCRIPTION ( "Comedi low-level driver )
MODULE_DEVICE_TABLE ( pci  ,
amplc_pci224_pci_table   
)
MODULE_LICENSE ( "GPL"  )