irq.h File Reference

#include <mach/irqs.h>

Go to the source code of this file.

Macros
#define	NR_IRQS_LEGACY   16
#define	irq_canonicalize(i)   (i)
#define	NO_IRQ   ((unsigned int)(-1))

Functions
void	migrate_irqs (void)
void	asm_do_IRQ (unsigned int, struct pt_regs *)
void	handle_IRQ (unsigned int, struct pt_regs *)
void	init_IRQ (void)

Macro Definition Documentation

#define irq_canonicalize

(

i

)

(i)

Definition at line 13 of file irq.h.

#define NO_IRQ   ((unsigned int)(-1))

Definition at line 21 of file irq.h.

#define NR_IRQS_LEGACY   16

Definition at line 4 of file irq.h.

Function Documentation

void asm_do_IRQ	(	unsigned	int,
		struct pt_regs *
	)

Definition at line 90 of file irq.c.

void handle_IRQ	(	unsigned	int,
		struct pt_regs *
	)

Definition at line 64 of file irq.c.

void init_IRQ

(

void

)

The hexagon core comes with a first-level interrupt controller with 32 total possible interrupts. When the core is embedded into different systems/platforms, it is typically wrapped by macro cells that provide one or more second-level interrupt controllers that are cascaded into one or more of the first-level interrupts handled here. The precise wiring of these other irqs varies from platform to platform, and are set up & configured in the platform-specific files.

The first-level interrupt controller is wrapped by the VM, which virtualizes the interrupt controller for us. It provides a very simple, fast & efficient API, and so the fasteoi handler is appropriate for this case.

Definition at line 109 of file irq_alpha.c.

void migrate_irqs

(

void

)