hardware.h File Reference

#include <asm/sizes.h>
#include <mach/at91rm9200.h>
#include <mach/at91sam9260.h>
#include <mach/at91sam9261.h>
#include <mach/at91sam9263.h>
#include <mach/at91sam9rl.h>
#include <mach/at91sam9g45.h>
#include <mach/at91sam9x5.h>
#include <mach/at91sam9n12.h>

Go to the source code of this file.

Macros
#define	AT91_BASE_DBGU0   0xfffff200
#define	AT91_BASE_DBGU1   0xffffee00
#define	AT91_BASE_SYS   0xffffc000
#define	AT91_AIC   0xfffff000
#define	AT91_PMC   0xfffffc00
#define	AT91_ID_FIQ   0 /* Advanced Interrupt Controller (FIQ) */
#define	AT91_ID_SYS   1 /* System Peripherals */
#define	AT91_IO_PHYS_BASE   AT91_BASE_SYS
#define	AT91_IO_VIRT_BASE   IOMEM(AT91_IO_PHYS_BASE)
#define	AT91_IO_SIZE   (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
#define	AT91_IO_P2V(x)   ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
#define	AT91_VA_BASE_SYS   AT91_IO_P2V(AT91_BASE_SYS)
#define	AT91_SRAM_MAX   SZ_1M
#define	AT91_VIRT_BASE   (AT91_IO_VIRT_BASE - AT91_SRAM_MAX)
#define	ATMEL_MAX_UART   7 /* 6 USART3's and one DBGU port (SAM9260) */
#define	AT91_CHIPSELECT_0   0x10000000
#define	AT91_CHIPSELECT_1   0x20000000
#define	AT91_CHIPSELECT_2   0x30000000
#define	AT91_CHIPSELECT_3   0x40000000
#define	AT91_CHIPSELECT_4   0x50000000
#define	AT91_CHIPSELECT_5   0x60000000
#define	AT91_CHIPSELECT_6   0x70000000
#define	AT91_CHIPSELECT_7   0x80000000
#define	AT91_SLOW_CLOCK   32768 /* slow clock */

Macro Definition Documentation

#define AT91_AIC   0xfffff000

Definition at line 55 of file hardware.h.

#define AT91_BASE_DBGU0   0xfffff200

Definition at line 21 of file hardware.h.

#define AT91_BASE_DBGU1   0xffffee00

Definition at line 23 of file hardware.h.

#define AT91_BASE_SYS   0xffffc000

Definition at line 48 of file hardware.h.

#define AT91_CHIPSELECT_0   0x10000000

Definition at line 97 of file hardware.h.

#define AT91_CHIPSELECT_1   0x20000000

Definition at line 98 of file hardware.h.

#define AT91_CHIPSELECT_2   0x30000000

Definition at line 99 of file hardware.h.

#define AT91_CHIPSELECT_3   0x40000000

Definition at line 100 of file hardware.h.

#define AT91_CHIPSELECT_4   0x50000000

Definition at line 101 of file hardware.h.

#define AT91_CHIPSELECT_5   0x60000000

Definition at line 102 of file hardware.h.

#define AT91_CHIPSELECT_6   0x70000000

Definition at line 103 of file hardware.h.

#define AT91_CHIPSELECT_7   0x80000000

Definition at line 104 of file hardware.h.

#define AT91_ID_FIQ   0 /* Advanced Interrupt Controller (FIQ) */

Definition at line 61 of file hardware.h.

#define AT91_ID_SYS   1 /* System Peripherals */

Definition at line 62 of file hardware.h.

#define AT91_IO_P2V

(

x

)

((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)

Definition at line 82 of file hardware.h.

#define AT91_IO_PHYS_BASE   AT91_BASE_SYS

Definition at line 75 of file hardware.h.

#define AT91_IO_SIZE   (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)

Definition at line 79 of file hardware.h.

#define AT91_IO_VIRT_BASE   IOMEM(AT91_IO_PHYS_BASE)

Definition at line 76 of file hardware.h.

#define AT91_PMC   0xfffffc00

Definition at line 56 of file hardware.h.

#define AT91_SLOW_CLOCK   32768 /* slow clock */

Definition at line 107 of file hardware.h.

#define AT91_SRAM_MAX   SZ_1M

Definition at line 90 of file hardware.h.

#define AT91_VA_BASE_SYS   AT91_IO_P2V(AT91_BASE_SYS)

Definition at line 87 of file hardware.h.

#define AT91_VIRT_BASE   (AT91_IO_VIRT_BASE - AT91_SRAM_MAX)

Definition at line 91 of file hardware.h.

#define ATMEL_MAX_UART   7 /* 6 USART3's and one DBGU port (SAM9260) */

Definition at line 94 of file hardware.h.