Linux Kernel
3.7.1
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Go to the source code of this file.
Macros | |
#define | MMU_IO(a, b) (b) |
#define | XBUS_SIZE 0x00100000 |
#define | XBUS_BASE MMU_IO(0xff800000, 0x40000000) |
#define | ARMCSR_SIZE 0x00100000 |
#define | ARMCSR_BASE MMU_IO(0xfe000000, 0x42000000) |
#define | WFLUSH_SIZE 0x00100000 |
#define | WFLUSH_BASE MMU_IO(0xfd000000, 0x78000000) |
#define | PCIIACK_SIZE 0x00100000 |
#define | PCIIACK_BASE MMU_IO(0xfc000000, 0x79000000) |
#define | PCICFG1_SIZE 0x01000000 |
#define | PCICFG1_BASE MMU_IO(0xfb000000, 0x7a000000) |
#define | PCICFG0_SIZE 0x01000000 |
#define | PCICFG0_BASE MMU_IO(0xfa000000, 0x7b000000) |
#define | PCIMEM_SIZE 0x01000000 |
#define | PCIMEM_BASE MMU_IO(0xf0000000, 0x80000000) |
#define | XBUS_LEDS ((volatile unsigned char *)(XBUS_BASE + 0x12000)) |
#define | XBUS_LED_AMBER (1 << 0) |
#define | XBUS_LED_GREEN (1 << 1) |
#define | XBUS_LED_RED (1 << 2) |
#define | XBUS_LED_TOGGLE (1 << 8) |
#define | XBUS_SWITCH ((volatile unsigned char *)(XBUS_BASE + 0x12000)) |
#define | XBUS_SWITCH_SWITCH ((*XBUS_SWITCH) & 15) |
#define | XBUS_SWITCH_J17_13 ((*XBUS_SWITCH) & (1 << 4)) |
#define | XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5)) |
#define | XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6)) |
#define | UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108) |
#define | PIC_LO 0x20 |
#define | PIC_MASK_LO 0x21 |
#define | PIC_HI 0xA0 |
#define | PIC_MASK_HI 0xA1 |
#define | GPIO_CCLK 0x800 |
#define | GPIO_DSCLK 0x400 |
#define | GPIO_E2CLK 0x200 |
#define | GPIO_IOLOAD 0x100 |
#define | GPIO_RED_LED 0x080 |
#define | GPIO_WDTIMER 0x040 |
#define | GPIO_DATA 0x020 |
#define | GPIO_IOCLK 0x010 |
#define | GPIO_DONE 0x008 |
#define | GPIO_FAN 0x004 |
#define | GPIO_GREEN_LED 0x002 |
#define | GPIO_RESET 0x001 |
#define | CPLD_DS_ENABLE 8 |
#define | CPLD_7111_DISABLE 4 |
#define | CPLD_UNMUTE 2 |
#define | CPLD_FLASH_WR_ENABLE 1 |
Functions | |
void | nw_gpio_modify_op (unsigned int mask, unsigned int set) |
void | nw_gpio_modify_io (unsigned int mask, unsigned int in) |
unsigned int | nw_gpio_read (void) |
void | nw_cpld_modify (unsigned int mask, unsigned int set) |
Variables | |
raw_spinlock_t | nw_gpio_lock |
#define ARMCSR_BASE MMU_IO(0xfe000000, 0x42000000) |
Definition at line 37 of file hardware.h.
#define ARMCSR_SIZE 0x00100000 |
Definition at line 36 of file hardware.h.
#define CPLD_7111_DISABLE 4 |
Definition at line 91 of file hardware.h.
#define CPLD_DS_ENABLE 8 |
Definition at line 90 of file hardware.h.
#define CPLD_FLASH_WR_ENABLE 1 |
Definition at line 93 of file hardware.h.
#define CPLD_UNMUTE 2 |
Definition at line 92 of file hardware.h.
#define GPIO_CCLK 0x800 |
Definition at line 76 of file hardware.h.
#define GPIO_DATA 0x020 |
Definition at line 82 of file hardware.h.
#define GPIO_DONE 0x008 |
Definition at line 84 of file hardware.h.
#define GPIO_DSCLK 0x400 |
Definition at line 77 of file hardware.h.
#define GPIO_E2CLK 0x200 |
Definition at line 78 of file hardware.h.
#define GPIO_FAN 0x004 |
Definition at line 85 of file hardware.h.
#define GPIO_GREEN_LED 0x002 |
Definition at line 86 of file hardware.h.
#define GPIO_IOCLK 0x010 |
Definition at line 83 of file hardware.h.
#define GPIO_IOLOAD 0x100 |
Definition at line 79 of file hardware.h.
#define GPIO_RED_LED 0x080 |
Definition at line 80 of file hardware.h.
#define GPIO_RESET 0x001 |
Definition at line 87 of file hardware.h.
#define GPIO_WDTIMER 0x040 |
Definition at line 81 of file hardware.h.
Definition at line 30 of file hardware.h.
#define PCICFG0_BASE MMU_IO(0xfa000000, 0x7b000000) |
Definition at line 49 of file hardware.h.
#define PCICFG0_SIZE 0x01000000 |
Definition at line 48 of file hardware.h.
#define PCICFG1_BASE MMU_IO(0xfb000000, 0x7a000000) |
Definition at line 46 of file hardware.h.
#define PCICFG1_SIZE 0x01000000 |
Definition at line 45 of file hardware.h.
#define PCIIACK_BASE MMU_IO(0xfc000000, 0x79000000) |
Definition at line 43 of file hardware.h.
#define PCIIACK_SIZE 0x00100000 |
Definition at line 42 of file hardware.h.
#define PCIMEM_BASE MMU_IO(0xf0000000, 0x80000000) |
Definition at line 52 of file hardware.h.
#define PCIMEM_SIZE 0x01000000 |
Definition at line 51 of file hardware.h.
#define PIC_HI 0xA0 |
Definition at line 72 of file hardware.h.
#define PIC_LO 0x20 |
Definition at line 70 of file hardware.h.
#define PIC_MASK_HI 0xA1 |
Definition at line 73 of file hardware.h.
#define PIC_MASK_LO 0x21 |
Definition at line 71 of file hardware.h.
#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108) |
Definition at line 66 of file hardware.h.
#define WFLUSH_BASE MMU_IO(0xfd000000, 0x78000000) |
Definition at line 40 of file hardware.h.
#define WFLUSH_SIZE 0x00100000 |
Definition at line 39 of file hardware.h.
#define XBUS_BASE MMU_IO(0xff800000, 0x40000000) |
Definition at line 34 of file hardware.h.
#define XBUS_LED_AMBER (1 << 0) |
Definition at line 55 of file hardware.h.
#define XBUS_LED_GREEN (1 << 1) |
Definition at line 56 of file hardware.h.
#define XBUS_LED_RED (1 << 2) |
Definition at line 57 of file hardware.h.
#define XBUS_LED_TOGGLE (1 << 8) |
Definition at line 58 of file hardware.h.
Definition at line 54 of file hardware.h.
#define XBUS_SIZE 0x00100000 |
Definition at line 33 of file hardware.h.
Definition at line 60 of file hardware.h.
#define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5)) |
Definition at line 63 of file hardware.h.
#define XBUS_SWITCH_J17_13 ((*XBUS_SWITCH) & (1 << 4)) |
Definition at line 62 of file hardware.h.
#define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6)) |
Definition at line 64 of file hardware.h.
#define XBUS_SWITCH_SWITCH ((*XBUS_SWITCH) & 15) |
Definition at line 61 of file hardware.h.
Definition at line 362 of file netwinder-hw.c.
Definition at line 119 of file netwinder-hw.c.
Definition at line 73 of file netwinder-hw.c.
Definition at line 131 of file netwinder-hw.c.
raw_spinlock_t nw_gpio_lock |