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Macros
platform.h File Reference

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Macros

#define INTEGRATOR_BOOT_ROM_LO   0x00000000
 
#define INTEGRATOR_BOOT_ROM_HI   0x20000000
 
#define INTEGRATOR_BOOT_ROM_BASE   INTEGRATOR_BOOT_ROM_HI /* Normal position */
 
#define INTEGRATOR_BOOT_ROM_SIZE   SZ_512K
 
#define INTEGRATOR_SSRAM_BASE   0x00000000
 
#define INTEGRATOR_SSRAM_ALIAS_BASE   0x10800000
 
#define INTEGRATOR_SSRAM_SIZE   SZ_256K
 
#define INTEGRATOR_FLASH_BASE   0x24000000
 
#define INTEGRATOR_FLASH_SIZE   SZ_32M
 
#define INTEGRATOR_MBRD_SSRAM_BASE   0x28000000
 
#define INTEGRATOR_MBRD_SSRAM_SIZE   SZ_512K
 
#define INTEGRATOR_SDRAM_BASE   0x00040000
 
#define INTEGRATOR_SDRAM_ALIAS_BASE   0x80000000
 
#define INTEGRATOR_HDR0_SDRAM_BASE   0x80000000
 
#define INTEGRATOR_HDR1_SDRAM_BASE   0x90000000
 
#define INTEGRATOR_HDR2_SDRAM_BASE   0xA0000000
 
#define INTEGRATOR_HDR3_SDRAM_BASE   0xB0000000
 
#define INTEGRATOR_LOGIC_MODULES_BASE   0xC0000000
 
#define INTEGRATOR_LOGIC_MODULE0_BASE   0xC0000000
 
#define INTEGRATOR_LOGIC_MODULE1_BASE   0xD0000000
 
#define INTEGRATOR_LOGIC_MODULE2_BASE   0xE0000000
 
#define INTEGRATOR_LOGIC_MODULE3_BASE   0xF0000000
 
#define INTEGRATOR_HDR_ID_OFFSET   0x00
 
#define INTEGRATOR_HDR_PROC_OFFSET   0x04
 
#define INTEGRATOR_HDR_OSC_OFFSET   0x08
 
#define INTEGRATOR_HDR_CTRL_OFFSET   0x0C
 
#define INTEGRATOR_HDR_STAT_OFFSET   0x10
 
#define INTEGRATOR_HDR_LOCK_OFFSET   0x14
 
#define INTEGRATOR_HDR_SDRAM_OFFSET   0x20
 
#define INTEGRATOR_HDR_INIT_OFFSET   0x24 /* CM9x6 */
 
#define INTEGRATOR_HDR_IC_OFFSET   0x40
 
#define INTEGRATOR_HDR_SPDBASE_OFFSET   0x100
 
#define INTEGRATOR_HDR_SPDTOP_OFFSET   0x200
 
#define INTEGRATOR_HDR_BASE   0x10000000
 
#define INTEGRATOR_HDR_ID   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_ID_OFFSET)
 
#define INTEGRATOR_HDR_PROC   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_PROC_OFFSET)
 
#define INTEGRATOR_HDR_OSC   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_OSC_OFFSET)
 
#define INTEGRATOR_HDR_CTRL   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_CTRL_OFFSET)
 
#define INTEGRATOR_HDR_STAT   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_STAT_OFFSET)
 
#define INTEGRATOR_HDR_LOCK   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_LOCK_OFFSET)
 
#define INTEGRATOR_HDR_SDRAM   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SDRAM_OFFSET)
 
#define INTEGRATOR_HDR_INIT   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_INIT_OFFSET)
 
#define INTEGRATOR_HDR_IC   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_IC_OFFSET)
 
#define INTEGRATOR_HDR_SPDBASE   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SPDBASE_OFFSET)
 
#define INTEGRATOR_HDR_SPDTOP   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SPDTOP_OFFSET)
 
#define INTEGRATOR_HDR_CTRL_LED   0x01
 
#define INTEGRATOR_HDR_CTRL_MBRD_DETECH   0x02
 
#define INTEGRATOR_HDR_CTRL_REMAP   0x04
 
#define INTEGRATOR_HDR_CTRL_RESET   0x08
 
#define INTEGRATOR_HDR_CTRL_HIGHVECTORS   0x10
 
#define INTEGRATOR_HDR_CTRL_BIG_ENDIAN   0x20
 
#define INTEGRATOR_HDR_CTRL_FASTBUS   0x40
 
#define INTEGRATOR_HDR_CTRL_SYNC   0x80
 
#define INTEGRATOR_HDR_OSC_CORE_10MHz   0x102
 
#define INTEGRATOR_HDR_OSC_CORE_15MHz   0x107
 
#define INTEGRATOR_HDR_OSC_CORE_20MHz   0x10C
 
#define INTEGRATOR_HDR_OSC_CORE_25MHz   0x111
 
#define INTEGRATOR_HDR_OSC_CORE_30MHz   0x116
 
#define INTEGRATOR_HDR_OSC_CORE_35MHz   0x11B
 
#define INTEGRATOR_HDR_OSC_CORE_40MHz   0x120
 
#define INTEGRATOR_HDR_OSC_CORE_45MHz   0x125
 
#define INTEGRATOR_HDR_OSC_CORE_50MHz   0x12A
 
#define INTEGRATOR_HDR_OSC_CORE_55MHz   0x12F
 
#define INTEGRATOR_HDR_OSC_CORE_60MHz   0x134
 
#define INTEGRATOR_HDR_OSC_CORE_65MHz   0x139
 
#define INTEGRATOR_HDR_OSC_CORE_70MHz   0x13E
 
#define INTEGRATOR_HDR_OSC_CORE_75MHz   0x143
 
#define INTEGRATOR_HDR_OSC_CORE_80MHz   0x148
 
#define INTEGRATOR_HDR_OSC_CORE_85MHz   0x14D
 
#define INTEGRATOR_HDR_OSC_CORE_90MHz   0x152
 
#define INTEGRATOR_HDR_OSC_CORE_95MHz   0x157
 
#define INTEGRATOR_HDR_OSC_CORE_100MHz   0x15C
 
#define INTEGRATOR_HDR_OSC_CORE_105MHz   0x161
 
#define INTEGRATOR_HDR_OSC_CORE_110MHz   0x166
 
#define INTEGRATOR_HDR_OSC_CORE_115MHz   0x16B
 
#define INTEGRATOR_HDR_OSC_CORE_120MHz   0x170
 
#define INTEGRATOR_HDR_OSC_CORE_125MHz   0x175
 
#define INTEGRATOR_HDR_OSC_CORE_130MHz   0x17A
 
#define INTEGRATOR_HDR_OSC_CORE_135MHz   0x17F
 
#define INTEGRATOR_HDR_OSC_CORE_140MHz   0x184
 
#define INTEGRATOR_HDR_OSC_CORE_145MHz   0x189
 
#define INTEGRATOR_HDR_OSC_CORE_150MHz   0x18E
 
#define INTEGRATOR_HDR_OSC_CORE_155MHz   0x193
 
#define INTEGRATOR_HDR_OSC_CORE_160MHz   0x198
 
#define INTEGRATOR_HDR_OSC_CORE_MASK   0x7FF
 
#define INTEGRATOR_HDR_OSC_MEM_10MHz   0x10C000
 
#define INTEGRATOR_HDR_OSC_MEM_15MHz   0x116000
 
#define INTEGRATOR_HDR_OSC_MEM_20MHz   0x120000
 
#define INTEGRATOR_HDR_OSC_MEM_25MHz   0x12A000
 
#define INTEGRATOR_HDR_OSC_MEM_30MHz   0x134000
 
#define INTEGRATOR_HDR_OSC_MEM_33MHz   0x13A000
 
#define INTEGRATOR_HDR_OSC_MEM_40MHz   0x148000
 
#define INTEGRATOR_HDR_OSC_MEM_50MHz   0x15C000
 
#define INTEGRATOR_HDR_OSC_MEM_60MHz   0x170000
 
#define INTEGRATOR_HDR_OSC_MEM_66MHz   0x17C000
 
#define INTEGRATOR_HDR_OSC_MEM_MASK   0x7FF000
 
#define INTEGRATOR_HDR_OSC_BUS_MODE_CM7x0   0x0
 
#define INTEGRATOR_HDR_OSC_BUS_MODE_CM9x0   0x0800000
 
#define INTEGRATOR_HDR_OSC_BUS_MODE_CM9x6   0x1000000
 
#define INTEGRATOR_HDR_OSC_BUS_MODE_CM10x00   0x1800000
 
#define INTEGRATOR_HDR_OSC_BUS_MODE_MASK   0x1800000
 
#define INTEGRATOR_HDR_SDRAM_SPD_OK   (1 << 5)
 
#define INTEGRATOR_SC_ID_OFFSET   0x00
 
#define INTEGRATOR_SC_OSC_OFFSET   0x04
 
#define INTEGRATOR_SC_CTRLS_OFFSET   0x08
 
#define INTEGRATOR_SC_CTRLC_OFFSET   0x0C
 
#define INTEGRATOR_SC_DEC_OFFSET   0x10
 
#define INTEGRATOR_SC_ARB_OFFSET   0x14
 
#define INTEGRATOR_SC_PCIENABLE_OFFSET   0x18
 
#define INTEGRATOR_SC_LOCK_OFFSET   0x1C
 
#define INTEGRATOR_SC_BASE   0x11000000
 
#define INTEGRATOR_SC_ID   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_ID_OFFSET)
 
#define INTEGRATOR_SC_OSC   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_OSC_OFFSET)
 
#define INTEGRATOR_SC_CTRLS   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_CTRLS_OFFSET)
 
#define INTEGRATOR_SC_CTRLC   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_CTRLC_OFFSET)
 
#define INTEGRATOR_SC_DEC   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_DEC_OFFSET)
 
#define INTEGRATOR_SC_ARB   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_ARB_OFFSET)
 
#define INTEGRATOR_SC_PCIENABLE   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_PCIENABLE_OFFSET)
 
#define INTEGRATOR_SC_LOCK   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_LOCK_OFFSET)
 
#define INTEGRATOR_SC_OSC_SYS_10MHz   0x20
 
#define INTEGRATOR_SC_OSC_SYS_15MHz   0x34
 
#define INTEGRATOR_SC_OSC_SYS_20MHz   0x48
 
#define INTEGRATOR_SC_OSC_SYS_25MHz   0x5C
 
#define INTEGRATOR_SC_OSC_SYS_33MHz   0x7C
 
#define INTEGRATOR_SC_OSC_SYS_MASK   0xFF
 
#define INTEGRATOR_SC_OSC_PCI_25MHz   0x100
 
#define INTEGRATOR_SC_OSC_PCI_33MHz   0x0
 
#define INTEGRATOR_SC_OSC_PCI_MASK   0x100
 
#define INTEGRATOR_SC_CTRL_SOFTRST   (1 << 0)
 
#define INTEGRATOR_SC_CTRL_nFLVPPEN   (1 << 1)
 
#define INTEGRATOR_SC_CTRL_nFLWP   (1 << 2)
 
#define INTEGRATOR_SC_CTRL_URTS0   (1 << 4)
 
#define INTEGRATOR_SC_CTRL_UDTR0   (1 << 5)
 
#define INTEGRATOR_SC_CTRL_URTS1   (1 << 6)
 
#define INTEGRATOR_SC_CTRL_UDTR1   (1 << 7)
 
#define INTEGRATOR_EBI_BASE   0x12000000
 
#define INTEGRATOR_EBI_CSR0_OFFSET   0x00
 
#define INTEGRATOR_EBI_CSR1_OFFSET   0x04
 
#define INTEGRATOR_EBI_CSR2_OFFSET   0x08
 
#define INTEGRATOR_EBI_CSR3_OFFSET   0x0C
 
#define INTEGRATOR_EBI_LOCK_OFFSET   0x20
 
#define INTEGRATOR_EBI_CSR0   (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR0_OFFSET)
 
#define INTEGRATOR_EBI_CSR1   (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET)
 
#define INTEGRATOR_EBI_CSR2   (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR2_OFFSET)
 
#define INTEGRATOR_EBI_CSR3   (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR3_OFFSET)
 
#define INTEGRATOR_EBI_LOCK   (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET)
 
#define INTEGRATOR_EBI_8_BIT   0x00
 
#define INTEGRATOR_EBI_16_BIT   0x01
 
#define INTEGRATOR_EBI_32_BIT   0x02
 
#define INTEGRATOR_EBI_WRITE_ENABLE   0x04
 
#define INTEGRATOR_EBI_SYNC   0x08
 
#define INTEGRATOR_EBI_WS_2   0x00
 
#define INTEGRATOR_EBI_WS_3   0x10
 
#define INTEGRATOR_EBI_WS_4   0x20
 
#define INTEGRATOR_EBI_WS_5   0x30
 
#define INTEGRATOR_EBI_WS_6   0x40
 
#define INTEGRATOR_EBI_WS_7   0x50
 
#define INTEGRATOR_EBI_WS_8   0x60
 
#define INTEGRATOR_EBI_WS_9   0x70
 
#define INTEGRATOR_EBI_WS_10   0x80
 
#define INTEGRATOR_EBI_WS_11   0x90
 
#define INTEGRATOR_EBI_WS_12   0xA0
 
#define INTEGRATOR_EBI_WS_13   0xB0
 
#define INTEGRATOR_EBI_WS_14   0xC0
 
#define INTEGRATOR_EBI_WS_15   0xD0
 
#define INTEGRATOR_EBI_WS_16   0xE0
 
#define INTEGRATOR_EBI_WS_17   0xF0
 
#define INTEGRATOR_CT_BASE   0x13000000 /* Counter/Timers */
 
#define INTEGRATOR_IC_BASE   0x14000000 /* Interrupt Controller */
 
#define INTEGRATOR_RTC_BASE   0x15000000 /* Real Time Clock */
 
#define INTEGRATOR_UART0_BASE   0x16000000 /* UART 0 */
 
#define INTEGRATOR_UART1_BASE   0x17000000 /* UART 1 */
 
#define INTEGRATOR_KBD_BASE   0x18000000 /* Keyboard */
 
#define INTEGRATOR_MOUSE_BASE   0x19000000 /* Mouse */
 
#define INTEGRATOR_DBG_ALPHA_OFFSET   0x00
 
#define INTEGRATOR_DBG_LEDS_OFFSET   0x04
 
#define INTEGRATOR_DBG_SWITCH_OFFSET   0x08
 
#define INTEGRATOR_DBG_BASE   0x1A000000
 
#define INTEGRATOR_DBG_ALPHA   (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_ALPHA_OFFSET)
 
#define INTEGRATOR_DBG_LEDS   (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_LEDS_OFFSET)
 
#define INTEGRATOR_DBG_SWITCH   (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_SWITCH_OFFSET)
 
#define INTEGRATOR_AP_GPIO_BASE   0x1B000000 /* GPIO */
 
#define INTEGRATOR_CP_MMC_BASE   0x1C000000 /* MMC */
 
#define INTEGRATOR_CP_AACI_BASE   0x1D000000 /* AACI */
 
#define INTEGRATOR_CP_ETH_BASE   0xC8000000 /* Ethernet */
 
#define INTEGRATOR_CP_GPIO_BASE   0xC9000000 /* GPIO */
 
#define INTEGRATOR_CP_SIC_BASE   0xCA000000 /* SIC */
 
#define INTEGRATOR_CP_CTL_BASE   0xCB000000 /* CP system control */
 
#define KMI0_BASE   INTEGRATOR_KBD_BASE
 
#define KMI1_BASE   INTEGRATOR_MOUSE_BASE
 
#define PHYS_PCI_MEM_BASE   0x40000000 /* 512M to xxx */
 
#define PHYS_PCI_IO_BASE   0x60000000 /* 16M to xxx */
 
#define PHYS_PCI_CONFIG_BASE   0x61000000 /* 16M to xxx */
 
#define PHYS_PCI_V3_BASE   0x62000000
 
#define PCI_MEMORY_VADDR   IOMEM(0xe8000000)
 
#define PCI_CONFIG_VADDR   IOMEM(0xec000000)
 
#define PCI_V3_VADDR   IOMEM(0xed000000)
 
#define IRQ_STATUS   0
 
#define IRQ_RAW_STATUS   0x04
 
#define IRQ_ENABLE   0x08
 
#define IRQ_ENABLE_SET   0x08
 
#define IRQ_ENABLE_CLEAR   0x0C
 
#define INT_SOFT_SET   0x10
 
#define INT_SOFT_CLEAR   0x14
 
#define FIQ_STATUS   0x20
 
#define FIQ_RAW_STATUS   0x24
 
#define FIQ_ENABLE   0x28
 
#define FIQ_ENABLE_SET   0x28
 
#define FIQ_ENABLE_CLEAR   0x2C
 
#define GREEN_LED   0x01
 
#define YELLOW_LED   0x02
 
#define RED_LED   0x04
 
#define GREEN_LED_2   0x08
 
#define ALL_LEDS   0x0F
 
#define LED_BANK   INTEGRATOR_DBG_LEDS
 
#define INTEGRATOR_TIMER0_BASE   INTEGRATOR_CT_BASE
 
#define INTEGRATOR_TIMER1_BASE   (INTEGRATOR_CT_BASE + 0x100)
 
#define INTEGRATOR_TIMER2_BASE   (INTEGRATOR_CT_BASE + 0x200)
 
#define INTEGRATOR_CSR_BASE   0x10000000
 
#define INTEGRATOR_CSR_SIZE   0x10000000
 

Macro Definition Documentation

#define ALL_LEDS   0x0F

Definition at line 386 of file platform.h.

#define FIQ_ENABLE   0x28

Definition at line 357 of file platform.h.

#define FIQ_ENABLE_CLEAR   0x2C

Definition at line 359 of file platform.h.

#define FIQ_ENABLE_SET   0x28

Definition at line 358 of file platform.h.

#define FIQ_RAW_STATUS   0x24

Definition at line 356 of file platform.h.

#define FIQ_STATUS   0x20

Definition at line 355 of file platform.h.

#define GREEN_LED   0x01

Definition at line 382 of file platform.h.

#define GREEN_LED_2   0x08

Definition at line 385 of file platform.h.

#define INT_SOFT_CLEAR   0x14

Definition at line 353 of file platform.h.

#define INT_SOFT_SET   0x10

Definition at line 352 of file platform.h.

#define INTEGRATOR_AP_GPIO_BASE   0x1B000000 /* GPIO */

Definition at line 287 of file platform.h.

#define INTEGRATOR_BOOT_ROM_BASE   INTEGRATOR_BOOT_ROM_HI /* Normal position */

Definition at line 39 of file platform.h.

#define INTEGRATOR_BOOT_ROM_HI   0x20000000

Definition at line 38 of file platform.h.

#define INTEGRATOR_BOOT_ROM_LO   0x00000000

Definition at line 37 of file platform.h.

#define INTEGRATOR_BOOT_ROM_SIZE   SZ_512K

Definition at line 40 of file platform.h.

#define INTEGRATOR_CP_AACI_BASE   0x1D000000 /* AACI */

Definition at line 290 of file platform.h.

#define INTEGRATOR_CP_CTL_BASE   0xCB000000 /* CP system control */

Definition at line 294 of file platform.h.

#define INTEGRATOR_CP_ETH_BASE   0xC8000000 /* Ethernet */

Definition at line 291 of file platform.h.

#define INTEGRATOR_CP_GPIO_BASE   0xC9000000 /* GPIO */

Definition at line 292 of file platform.h.

#define INTEGRATOR_CP_MMC_BASE   0x1C000000 /* MMC */

Definition at line 289 of file platform.h.

#define INTEGRATOR_CP_SIC_BASE   0xCA000000 /* SIC */

Definition at line 293 of file platform.h.

#define INTEGRATOR_CSR_BASE   0x10000000

Definition at line 403 of file platform.h.

#define INTEGRATOR_CSR_SIZE   0x10000000

Definition at line 404 of file platform.h.

#define INTEGRATOR_CT_BASE   0x13000000 /* Counter/Timers */

Definition at line 266 of file platform.h.

#define INTEGRATOR_DBG_ALPHA   (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_ALPHA_OFFSET)

Definition at line 283 of file platform.h.

#define INTEGRATOR_DBG_ALPHA_OFFSET   0x00

Definition at line 278 of file platform.h.

#define INTEGRATOR_DBG_BASE   0x1A000000

Definition at line 282 of file platform.h.

#define INTEGRATOR_DBG_LEDS   (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_LEDS_OFFSET)

Definition at line 284 of file platform.h.

#define INTEGRATOR_DBG_LEDS_OFFSET   0x04

Definition at line 279 of file platform.h.

#define INTEGRATOR_DBG_SWITCH   (INTEGRATOR_DBG_BASE + INTEGRATOR_DBG_SWITCH_OFFSET)

Definition at line 285 of file platform.h.

#define INTEGRATOR_DBG_SWITCH_OFFSET   0x08

Definition at line 280 of file platform.h.

#define INTEGRATOR_EBI_16_BIT   0x01

Definition at line 244 of file platform.h.

#define INTEGRATOR_EBI_32_BIT   0x02

Definition at line 245 of file platform.h.

#define INTEGRATOR_EBI_8_BIT   0x00

Definition at line 243 of file platform.h.

#define INTEGRATOR_EBI_BASE   0x12000000

Definition at line 229 of file platform.h.

#define INTEGRATOR_EBI_CSR0   (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR0_OFFSET)

Definition at line 237 of file platform.h.

#define INTEGRATOR_EBI_CSR0_OFFSET   0x00

Definition at line 231 of file platform.h.

#define INTEGRATOR_EBI_CSR1   (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR1_OFFSET)

Definition at line 238 of file platform.h.

#define INTEGRATOR_EBI_CSR1_OFFSET   0x04

Definition at line 232 of file platform.h.

#define INTEGRATOR_EBI_CSR2   (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR2_OFFSET)

Definition at line 239 of file platform.h.

#define INTEGRATOR_EBI_CSR2_OFFSET   0x08

Definition at line 233 of file platform.h.

#define INTEGRATOR_EBI_CSR3   (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_CSR3_OFFSET)

Definition at line 240 of file platform.h.

#define INTEGRATOR_EBI_CSR3_OFFSET   0x0C

Definition at line 234 of file platform.h.

#define INTEGRATOR_EBI_LOCK   (INTEGRATOR_EBI_BASE + INTEGRATOR_EBI_LOCK_OFFSET)

Definition at line 241 of file platform.h.

#define INTEGRATOR_EBI_LOCK_OFFSET   0x20

Definition at line 235 of file platform.h.

#define INTEGRATOR_EBI_SYNC   0x08

Definition at line 247 of file platform.h.

#define INTEGRATOR_EBI_WRITE_ENABLE   0x04

Definition at line 246 of file platform.h.

#define INTEGRATOR_EBI_WS_10   0x80

Definition at line 256 of file platform.h.

#define INTEGRATOR_EBI_WS_11   0x90

Definition at line 257 of file platform.h.

#define INTEGRATOR_EBI_WS_12   0xA0

Definition at line 258 of file platform.h.

#define INTEGRATOR_EBI_WS_13   0xB0

Definition at line 259 of file platform.h.

#define INTEGRATOR_EBI_WS_14   0xC0

Definition at line 260 of file platform.h.

#define INTEGRATOR_EBI_WS_15   0xD0

Definition at line 261 of file platform.h.

#define INTEGRATOR_EBI_WS_16   0xE0

Definition at line 262 of file platform.h.

#define INTEGRATOR_EBI_WS_17   0xF0

Definition at line 263 of file platform.h.

#define INTEGRATOR_EBI_WS_2   0x00

Definition at line 248 of file platform.h.

#define INTEGRATOR_EBI_WS_3   0x10

Definition at line 249 of file platform.h.

#define INTEGRATOR_EBI_WS_4   0x20

Definition at line 250 of file platform.h.

#define INTEGRATOR_EBI_WS_5   0x30

Definition at line 251 of file platform.h.

#define INTEGRATOR_EBI_WS_6   0x40

Definition at line 252 of file platform.h.

#define INTEGRATOR_EBI_WS_7   0x50

Definition at line 253 of file platform.h.

#define INTEGRATOR_EBI_WS_8   0x60

Definition at line 254 of file platform.h.

#define INTEGRATOR_EBI_WS_9   0x70

Definition at line 255 of file platform.h.

#define INTEGRATOR_FLASH_BASE   0x24000000

Definition at line 56 of file platform.h.

#define INTEGRATOR_FLASH_SIZE   SZ_32M

Definition at line 57 of file platform.h.

#define INTEGRATOR_HDR0_SDRAM_BASE   0x80000000

Definition at line 69 of file platform.h.

#define INTEGRATOR_HDR1_SDRAM_BASE   0x90000000

Definition at line 70 of file platform.h.

#define INTEGRATOR_HDR2_SDRAM_BASE   0xA0000000

Definition at line 71 of file platform.h.

#define INTEGRATOR_HDR3_SDRAM_BASE   0xB0000000

Definition at line 72 of file platform.h.

#define INTEGRATOR_HDR_BASE   0x10000000

Definition at line 101 of file platform.h.

#define INTEGRATOR_HDR_CTRL   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_CTRL_OFFSET)

Definition at line 105 of file platform.h.

#define INTEGRATOR_HDR_CTRL_BIG_ENDIAN   0x20

Definition at line 119 of file platform.h.

#define INTEGRATOR_HDR_CTRL_FASTBUS   0x40

Definition at line 120 of file platform.h.

#define INTEGRATOR_HDR_CTRL_HIGHVECTORS   0x10

Definition at line 118 of file platform.h.

#define INTEGRATOR_HDR_CTRL_LED   0x01

Definition at line 114 of file platform.h.

#define INTEGRATOR_HDR_CTRL_MBRD_DETECH   0x02

Definition at line 115 of file platform.h.

#define INTEGRATOR_HDR_CTRL_OFFSET   0x0C

Definition at line 92 of file platform.h.

#define INTEGRATOR_HDR_CTRL_REMAP   0x04

Definition at line 116 of file platform.h.

#define INTEGRATOR_HDR_CTRL_RESET   0x08

Definition at line 117 of file platform.h.

#define INTEGRATOR_HDR_CTRL_SYNC   0x80

Definition at line 121 of file platform.h.

#define INTEGRATOR_HDR_IC   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_IC_OFFSET)

Definition at line 110 of file platform.h.

#define INTEGRATOR_HDR_IC_OFFSET   0x40

Definition at line 97 of file platform.h.

#define INTEGRATOR_HDR_ID   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_ID_OFFSET)

Definition at line 102 of file platform.h.

#define INTEGRATOR_HDR_ID_OFFSET   0x00

Definition at line 89 of file platform.h.

#define INTEGRATOR_HDR_INIT   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_INIT_OFFSET)

Definition at line 109 of file platform.h.

#define INTEGRATOR_HDR_INIT_OFFSET   0x24 /* CM9x6 */

Definition at line 96 of file platform.h.

#define INTEGRATOR_HDR_LOCK   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_LOCK_OFFSET)

Definition at line 107 of file platform.h.

#define INTEGRATOR_HDR_LOCK_OFFSET   0x14

Definition at line 94 of file platform.h.

#define INTEGRATOR_HDR_OSC   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_OSC_OFFSET)

Definition at line 104 of file platform.h.

#define INTEGRATOR_HDR_OSC_BUS_MODE_CM10x00   0x1800000

Definition at line 171 of file platform.h.

#define INTEGRATOR_HDR_OSC_BUS_MODE_CM7x0   0x0

Definition at line 168 of file platform.h.

#define INTEGRATOR_HDR_OSC_BUS_MODE_CM9x0   0x0800000

Definition at line 169 of file platform.h.

#define INTEGRATOR_HDR_OSC_BUS_MODE_CM9x6   0x1000000

Definition at line 170 of file platform.h.

#define INTEGRATOR_HDR_OSC_BUS_MODE_MASK   0x1800000

Definition at line 172 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_100MHz   0x15C

Definition at line 141 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_105MHz   0x161

Definition at line 142 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_10MHz   0x102

Definition at line 123 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_110MHz   0x166

Definition at line 143 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_115MHz   0x16B

Definition at line 144 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_120MHz   0x170

Definition at line 145 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_125MHz   0x175

Definition at line 146 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_130MHz   0x17A

Definition at line 147 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_135MHz   0x17F

Definition at line 148 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_140MHz   0x184

Definition at line 149 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_145MHz   0x189

Definition at line 150 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_150MHz   0x18E

Definition at line 151 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_155MHz   0x193

Definition at line 152 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_15MHz   0x107

Definition at line 124 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_160MHz   0x198

Definition at line 153 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_20MHz   0x10C

Definition at line 125 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_25MHz   0x111

Definition at line 126 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_30MHz   0x116

Definition at line 127 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_35MHz   0x11B

Definition at line 128 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_40MHz   0x120

Definition at line 129 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_45MHz   0x125

Definition at line 130 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_50MHz   0x12A

Definition at line 131 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_55MHz   0x12F

Definition at line 132 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_60MHz   0x134

Definition at line 133 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_65MHz   0x139

Definition at line 134 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_70MHz   0x13E

Definition at line 135 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_75MHz   0x143

Definition at line 136 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_80MHz   0x148

Definition at line 137 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_85MHz   0x14D

Definition at line 138 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_90MHz   0x152

Definition at line 139 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_95MHz   0x157

Definition at line 140 of file platform.h.

#define INTEGRATOR_HDR_OSC_CORE_MASK   0x7FF

Definition at line 154 of file platform.h.

#define INTEGRATOR_HDR_OSC_MEM_10MHz   0x10C000

Definition at line 156 of file platform.h.

#define INTEGRATOR_HDR_OSC_MEM_15MHz   0x116000

Definition at line 157 of file platform.h.

#define INTEGRATOR_HDR_OSC_MEM_20MHz   0x120000

Definition at line 158 of file platform.h.

#define INTEGRATOR_HDR_OSC_MEM_25MHz   0x12A000

Definition at line 159 of file platform.h.

#define INTEGRATOR_HDR_OSC_MEM_30MHz   0x134000

Definition at line 160 of file platform.h.

#define INTEGRATOR_HDR_OSC_MEM_33MHz   0x13A000

Definition at line 161 of file platform.h.

#define INTEGRATOR_HDR_OSC_MEM_40MHz   0x148000

Definition at line 162 of file platform.h.

#define INTEGRATOR_HDR_OSC_MEM_50MHz   0x15C000

Definition at line 163 of file platform.h.

#define INTEGRATOR_HDR_OSC_MEM_60MHz   0x170000

Definition at line 164 of file platform.h.

#define INTEGRATOR_HDR_OSC_MEM_66MHz   0x17C000

Definition at line 165 of file platform.h.

#define INTEGRATOR_HDR_OSC_MEM_MASK   0x7FF000

Definition at line 166 of file platform.h.

#define INTEGRATOR_HDR_OSC_OFFSET   0x08

Definition at line 91 of file platform.h.

#define INTEGRATOR_HDR_PROC   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_PROC_OFFSET)

Definition at line 103 of file platform.h.

#define INTEGRATOR_HDR_PROC_OFFSET   0x04

Definition at line 90 of file platform.h.

#define INTEGRATOR_HDR_SDRAM   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SDRAM_OFFSET)

Definition at line 108 of file platform.h.

#define INTEGRATOR_HDR_SDRAM_OFFSET   0x20

Definition at line 95 of file platform.h.

#define INTEGRATOR_HDR_SDRAM_SPD_OK   (1 << 5)

Definition at line 174 of file platform.h.

#define INTEGRATOR_HDR_SPDBASE   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SPDBASE_OFFSET)

Definition at line 111 of file platform.h.

#define INTEGRATOR_HDR_SPDBASE_OFFSET   0x100

Definition at line 98 of file platform.h.

#define INTEGRATOR_HDR_SPDTOP   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_SPDTOP_OFFSET)

Definition at line 112 of file platform.h.

#define INTEGRATOR_HDR_SPDTOP_OFFSET   0x200

Definition at line 99 of file platform.h.

#define INTEGRATOR_HDR_STAT   (INTEGRATOR_HDR_BASE + INTEGRATOR_HDR_STAT_OFFSET)

Definition at line 106 of file platform.h.

#define INTEGRATOR_HDR_STAT_OFFSET   0x10

Definition at line 93 of file platform.h.

#define INTEGRATOR_IC_BASE   0x14000000 /* Interrupt Controller */

Definition at line 267 of file platform.h.

#define INTEGRATOR_KBD_BASE   0x18000000 /* Keyboard */

Definition at line 271 of file platform.h.

#define INTEGRATOR_LOGIC_MODULE0_BASE   0xC0000000

Definition at line 79 of file platform.h.

#define INTEGRATOR_LOGIC_MODULE1_BASE   0xD0000000

Definition at line 80 of file platform.h.

#define INTEGRATOR_LOGIC_MODULE2_BASE   0xE0000000

Definition at line 81 of file platform.h.

#define INTEGRATOR_LOGIC_MODULE3_BASE   0xF0000000

Definition at line 82 of file platform.h.

#define INTEGRATOR_LOGIC_MODULES_BASE   0xC0000000

Definition at line 78 of file platform.h.

#define INTEGRATOR_MBRD_SSRAM_BASE   0x28000000

Definition at line 59 of file platform.h.

#define INTEGRATOR_MBRD_SSRAM_SIZE   SZ_512K

Definition at line 60 of file platform.h.

#define INTEGRATOR_MOUSE_BASE   0x19000000 /* Mouse */

Definition at line 272 of file platform.h.

#define INTEGRATOR_RTC_BASE   0x15000000 /* Real Time Clock */

Definition at line 268 of file platform.h.

#define INTEGRATOR_SC_ARB   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_ARB_OFFSET)

Definition at line 202 of file platform.h.

#define INTEGRATOR_SC_ARB_OFFSET   0x14

Definition at line 192 of file platform.h.

#define INTEGRATOR_SC_BASE   0x11000000

Definition at line 196 of file platform.h.

#define INTEGRATOR_SC_CTRL_nFLVPPEN   (1 << 1)

Definition at line 218 of file platform.h.

#define INTEGRATOR_SC_CTRL_nFLWP   (1 << 2)

Definition at line 219 of file platform.h.

#define INTEGRATOR_SC_CTRL_SOFTRST   (1 << 0)

Definition at line 217 of file platform.h.

#define INTEGRATOR_SC_CTRL_UDTR0   (1 << 5)

Definition at line 221 of file platform.h.

#define INTEGRATOR_SC_CTRL_UDTR1   (1 << 7)

Definition at line 223 of file platform.h.

#define INTEGRATOR_SC_CTRL_URTS0   (1 << 4)

Definition at line 220 of file platform.h.

#define INTEGRATOR_SC_CTRL_URTS1   (1 << 6)

Definition at line 222 of file platform.h.

#define INTEGRATOR_SC_CTRLC   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_CTRLC_OFFSET)

Definition at line 200 of file platform.h.

#define INTEGRATOR_SC_CTRLC_OFFSET   0x0C

Definition at line 190 of file platform.h.

#define INTEGRATOR_SC_CTRLS   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_CTRLS_OFFSET)

Definition at line 199 of file platform.h.

#define INTEGRATOR_SC_CTRLS_OFFSET   0x08

Definition at line 189 of file platform.h.

#define INTEGRATOR_SC_DEC   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_DEC_OFFSET)

Definition at line 201 of file platform.h.

#define INTEGRATOR_SC_DEC_OFFSET   0x10

Definition at line 191 of file platform.h.

#define INTEGRATOR_SC_ID   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_ID_OFFSET)

Definition at line 197 of file platform.h.

#define INTEGRATOR_SC_ID_OFFSET   0x00

Definition at line 187 of file platform.h.

#define INTEGRATOR_SC_LOCK   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_LOCK_OFFSET)

Definition at line 204 of file platform.h.

#define INTEGRATOR_SC_LOCK_OFFSET   0x1C

Definition at line 194 of file platform.h.

#define INTEGRATOR_SC_OSC   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_OSC_OFFSET)

Definition at line 198 of file platform.h.

#define INTEGRATOR_SC_OSC_OFFSET   0x04

Definition at line 188 of file platform.h.

#define INTEGRATOR_SC_OSC_PCI_25MHz   0x100

Definition at line 213 of file platform.h.

#define INTEGRATOR_SC_OSC_PCI_33MHz   0x0

Definition at line 214 of file platform.h.

#define INTEGRATOR_SC_OSC_PCI_MASK   0x100

Definition at line 215 of file platform.h.

#define INTEGRATOR_SC_OSC_SYS_10MHz   0x20

Definition at line 206 of file platform.h.

#define INTEGRATOR_SC_OSC_SYS_15MHz   0x34

Definition at line 207 of file platform.h.

#define INTEGRATOR_SC_OSC_SYS_20MHz   0x48

Definition at line 208 of file platform.h.

#define INTEGRATOR_SC_OSC_SYS_25MHz   0x5C

Definition at line 209 of file platform.h.

#define INTEGRATOR_SC_OSC_SYS_33MHz   0x7C

Definition at line 210 of file platform.h.

#define INTEGRATOR_SC_OSC_SYS_MASK   0xFF

Definition at line 211 of file platform.h.

#define INTEGRATOR_SC_PCIENABLE   (INTEGRATOR_SC_BASE + INTEGRATOR_SC_PCIENABLE_OFFSET)

Definition at line 203 of file platform.h.

#define INTEGRATOR_SC_PCIENABLE_OFFSET   0x18

Definition at line 193 of file platform.h.

#define INTEGRATOR_SDRAM_ALIAS_BASE   0x80000000

Definition at line 68 of file platform.h.

#define INTEGRATOR_SDRAM_BASE   0x00040000

Definition at line 66 of file platform.h.

#define INTEGRATOR_SSRAM_ALIAS_BASE   0x10800000

Definition at line 53 of file platform.h.

#define INTEGRATOR_SSRAM_BASE   0x00000000

Definition at line 52 of file platform.h.

#define INTEGRATOR_SSRAM_SIZE   SZ_256K

Definition at line 54 of file platform.h.

#define INTEGRATOR_TIMER0_BASE   INTEGRATOR_CT_BASE

Definition at line 399 of file platform.h.

#define INTEGRATOR_TIMER1_BASE   (INTEGRATOR_CT_BASE + 0x100)

Definition at line 400 of file platform.h.

#define INTEGRATOR_TIMER2_BASE   (INTEGRATOR_CT_BASE + 0x200)

Definition at line 401 of file platform.h.

#define INTEGRATOR_UART0_BASE   0x16000000 /* UART 0 */

Definition at line 269 of file platform.h.

#define INTEGRATOR_UART1_BASE   0x17000000 /* UART 1 */

Definition at line 270 of file platform.h.

#define IRQ_ENABLE   0x08

Definition at line 348 of file platform.h.

#define IRQ_ENABLE_CLEAR   0x0C

Definition at line 350 of file platform.h.

#define IRQ_ENABLE_SET   0x08

Definition at line 349 of file platform.h.

#define IRQ_RAW_STATUS   0x04

Definition at line 347 of file platform.h.

#define IRQ_STATUS   0

Definition at line 346 of file platform.h.

#define KMI0_BASE   INTEGRATOR_KBD_BASE

Definition at line 301 of file platform.h.

#define KMI1_BASE   INTEGRATOR_MOUSE_BASE

Definition at line 304 of file platform.h.

#define LED_BANK   INTEGRATOR_DBG_LEDS

Definition at line 388 of file platform.h.

#define PCI_CONFIG_VADDR   IOMEM(0xec000000)

Definition at line 328 of file platform.h.

#define PCI_MEMORY_VADDR   IOMEM(0xe8000000)

Definition at line 327 of file platform.h.

#define PCI_V3_VADDR   IOMEM(0xed000000)

Definition at line 329 of file platform.h.

#define PHYS_PCI_CONFIG_BASE   0x61000000 /* 16M to xxx */

Definition at line 322 of file platform.h.

#define PHYS_PCI_IO_BASE   0x60000000 /* 16M to xxx */

Definition at line 319 of file platform.h.

#define PHYS_PCI_MEM_BASE   0x40000000 /* 512M to xxx */

Definition at line 316 of file platform.h.

#define PHYS_PCI_V3_BASE   0x62000000

Definition at line 325 of file platform.h.

#define RED_LED   0x04

Definition at line 384 of file platform.h.

#define YELLOW_LED   0x02

Definition at line 383 of file platform.h.