Macros
#define	_SBF(f, v) ((v) << (f))

#define	_BIT(n) _SBF(n, 1)

#define	LPC32XX_SLC_BASE 0x20020000

#define	LPC32XX_SSP0_BASE 0x20084000

#define	LPC32XX_SPI1_BASE 0x20088000

#define	LPC32XX_SSP1_BASE 0x2008C000

#define	LPC32XX_SPI2_BASE 0x20090000

#define	LPC32XX_I2S0_BASE 0x20094000

#define	LPC32XX_SD_BASE 0x20098000

#define	LPC32XX_I2S1_BASE 0x2009C000

#define	LPC32XX_MLC_BASE 0x200A8000

#define	LPC32XX_AHB0_START LPC32XX_SLC_BASE

#define	LPC32XX_AHB0_SIZE 0x00089000

#define	LPC32XX_DMA_BASE 0x31000000

#define	LPC32XX_USB_BASE 0x31020000

#define	LPC32XX_USBH_BASE 0x31020000

#define	LPC32XX_USB_OTG_BASE 0x31020000

#define	LPC32XX_OTG_I2C_BASE 0x31020300

#define	LPC32XX_LCD_BASE 0x31040000

#define	LPC32XX_ETHERNET_BASE 0x31060000

#define	LPC32XX_EMC_BASE 0x31080000

#define	LPC32XX_ETB_CFG_BASE 0x310C0000

#define	LPC32XX_ETB_DATA_BASE 0x310E0000

#define	LPC32XX_AHB1_START LPC32XX_DMA_BASE

#define	LPC32XX_AHB1_SIZE 0x000E1000

#define	LPC32XX_CLK_PM_BASE 0x40004000

#define	LPC32XX_MIC_BASE 0x40008000

#define	LPC32XX_SIC1_BASE 0x4000C000

#define	LPC32XX_SIC2_BASE 0x40010000

#define	LPC32XX_HS_UART1_BASE 0x40014000

#define	LPC32XX_HS_UART2_BASE 0x40018000

#define	LPC32XX_HS_UART7_BASE 0x4001C000

#define	LPC32XX_RTC_BASE 0x40024000

#define	LPC32XX_RTC_RAM_BASE 0x40024080

#define	LPC32XX_GPIO_BASE 0x40028000

#define	LPC32XX_PWM3_BASE 0x4002C000

#define	LPC32XX_PWM4_BASE 0x40030000

#define	LPC32XX_MSTIM_BASE 0x40034000

#define	LPC32XX_HSTIM_BASE 0x40038000

#define	LPC32XX_WDTIM_BASE 0x4003C000

#define	LPC32XX_DEBUG_CTRL_BASE 0x40040000

#define	LPC32XX_TIMER0_BASE 0x40044000

#define	LPC32XX_ADC_BASE 0x40048000

#define	LPC32XX_TIMER1_BASE 0x4004C000

#define	LPC32XX_KSCAN_BASE 0x40050000

#define	LPC32XX_UART_CTRL_BASE 0x40054000

#define	LPC32XX_TIMER2_BASE 0x40058000

#define	LPC32XX_PWM1_BASE 0x4005C000

#define	LPC32XX_PWM2_BASE 0x4005C004

#define	LPC32XX_TIMER3_BASE 0x40060000

#define	LPC32XX_UART3_BASE 0x40080000

#define	LPC32XX_UART4_BASE 0x40088000

#define	LPC32XX_UART5_BASE 0x40090000

#define	LPC32XX_UART6_BASE 0x40098000

#define	LPC32XX_I2C1_BASE 0x400A0000

#define	LPC32XX_I2C2_BASE 0x400A8000

#define	LPC32XX_FABAPB_START LPC32XX_CLK_PM_BASE

#define	LPC32XX_FABAPB_SIZE 0x000A5000

#define	LPC32XX_IRAM_BASE 0x08000000

#define	LPC32XX_IROM_BASE 0x0C000000

#define	LPC32XX_EMC_CS0_BASE 0xE0000000

#define	LPC32XX_EMC_CS1_BASE 0xE1000000

#define	LPC32XX_EMC_CS2_BASE 0xE2000000

#define	LPC32XX_EMC_CS3_BASE 0xE3000000

#define	LPC32XX_EMC_DYCS0_BASE 0x80000000

#define	LPC32XX_EMC_DYCS1_BASE 0xA0000000

#define	LPC32XX_MAIN_OSC_FREQ 13000000

#define	LPC32XX_CLOCK_OSC_FREQ 32768

#define	_PMREG(x)

#define	LPC32XX_CLKPWR_DEBUG_CTRL _PMREG(0x000)

#define	LPC32XX_CLKPWR_BOOTMAP _PMREG(0x014)

#define	LPC32XX_CLKPWR_P01_ER _PMREG(0x018)

#define	LPC32XX_CLKPWR_USBCLK_PDIV _PMREG(0x01C)

#define	LPC32XX_CLKPWR_INT_ER _PMREG(0x020)

#define	LPC32XX_CLKPWR_INT_RS _PMREG(0x024)

#define	LPC32XX_CLKPWR_INT_SR _PMREG(0x028)

#define	LPC32XX_CLKPWR_INT_AP _PMREG(0x02C)

#define	LPC32XX_CLKPWR_PIN_ER _PMREG(0x030)

#define	LPC32XX_CLKPWR_PIN_RS _PMREG(0x034)

#define	LPC32XX_CLKPWR_PIN_SR _PMREG(0x038)

#define	LPC32XX_CLKPWR_PIN_AP _PMREG(0x03C)

#define	LPC32XX_CLKPWR_HCLK_DIV _PMREG(0x040)

#define	LPC32XX_CLKPWR_PWR_CTRL _PMREG(0x044)

#define	LPC32XX_CLKPWR_PLL397_CTRL _PMREG(0x048)

#define	LPC32XX_CLKPWR_MAIN_OSC_CTRL _PMREG(0x04C)

#define	LPC32XX_CLKPWR_SYSCLK_CTRL _PMREG(0x050)

#define	LPC32XX_CLKPWR_LCDCLK_CTRL _PMREG(0x054)

#define	LPC32XX_CLKPWR_HCLKPLL_CTRL _PMREG(0x058)

#define	LPC32XX_CLKPWR_ADC_CLK_CTRL_1 _PMREG(0x060)

#define	LPC32XX_CLKPWR_USB_CTRL _PMREG(0x064)

#define	LPC32XX_CLKPWR_SDRAMCLK_CTRL _PMREG(0x068)

#define	LPC32XX_CLKPWR_DDR_LAP_NOM _PMREG(0x06C)

#define	LPC32XX_CLKPWR_DDR_LAP_COUNT _PMREG(0x070)

#define	LPC32XX_CLKPWR_DDR_LAP_DELAY _PMREG(0x074)

#define	LPC32XX_CLKPWR_SSP_CLK_CTRL _PMREG(0x078)

#define	LPC32XX_CLKPWR_I2S_CLK_CTRL _PMREG(0x07C)

#define	LPC32XX_CLKPWR_MS_CTRL _PMREG(0x080)

#define	LPC32XX_CLKPWR_MACCLK_CTRL _PMREG(0x090)

#define	LPC32XX_CLKPWR_TEST_CLK_SEL _PMREG(0x0A4)

#define	LPC32XX_CLKPWR_SFW_INT _PMREG(0x0A8)

#define	LPC32XX_CLKPWR_I2C_CLK_CTRL _PMREG(0x0AC)

#define	LPC32XX_CLKPWR_KEY_CLK_CTRL _PMREG(0x0B0)

#define	LPC32XX_CLKPWR_ADC_CLK_CTRL _PMREG(0x0B4)

#define	LPC32XX_CLKPWR_PWM_CLK_CTRL _PMREG(0x0B8)

#define	LPC32XX_CLKPWR_TIMER_CLK_CTRL _PMREG(0x0BC)

#define	LPC32XX_CLKPWR_TIMERS_PWMS_CLK_CTRL_1 _PMREG(0x0C0)

#define	LPC32XX_CLKPWR_SPI_CLK_CTRL _PMREG(0x0C4)

#define	LPC32XX_CLKPWR_NAND_CLK_CTRL _PMREG(0x0C8)

#define	LPC32XX_CLKPWR_UART3_CLK_CTRL _PMREG(0x0D0)

#define	LPC32XX_CLKPWR_UART4_CLK_CTRL _PMREG(0x0D4)

#define	LPC32XX_CLKPWR_UART5_CLK_CTRL _PMREG(0x0D8)

#define	LPC32XX_CLKPWR_UART6_CLK_CTRL _PMREG(0x0DC)

#define	LPC32XX_CLKPWR_IRDA_CLK_CTRL _PMREG(0x0E0)

#define	LPC32XX_CLKPWR_UART_CLK_CTRL _PMREG(0x0E4)

#define	LPC32XX_CLKPWR_DMA_CLK_CTRL _PMREG(0x0E8)

#define	LPC32XX_CLKPWR_AUTOCLOCK _PMREG(0x0EC)

#define	LPC32XX_CLKPWR_DEVID(x) _PMREG(0x130 + (x))

#define	LPC32XX_CLKPWR_VFP_CLOCK_ENABLE_BIT _BIT(4)

#define	LPC32XX_CLKPWR_BOOTMAP_SEL_BIT _BIT(1)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO23_BIT _BIT(31)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO22_BIT _BIT(30)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO21_BIT _BIT(29)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO20_BIT _BIT(28)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO19_BIT _BIT(27)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO18_BIT _BIT(26)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO17_BIT _BIT(25)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO16_BIT _BIT(24)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO15_BIT _BIT(23)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO14_BIT _BIT(22)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO13_BIT _BIT(21)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO12_BIT _BIT(20)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO11_BIT _BIT(19)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO10_BIT _BIT(18)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO9_BIT _BIT(17)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO8_BIT _BIT(16)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO7_BIT _BIT(15)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO6_BIT _BIT(14)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO5_BIT _BIT(13)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO4_BIT _BIT(12)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO3_BIT _BIT(11)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO2_BIT _BIT(10)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO1_BIT _BIT(9)

#define	LPC32XX_CLKPWR_GPIOSRC_P1IO0_BIT _BIT(8)

#define	LPC32XX_CLKPWR_GPIOSRC_P0IO7_BIT _BIT(7)

#define	LPC32XX_CLKPWR_GPIOSRC_P0IO6_BIT _BIT(6)

#define	LPC32XX_CLKPWR_GPIOSRC_P0IO5_BIT _BIT(5)

#define	LPC32XX_CLKPWR_GPIOSRC_P0IO4_BIT _BIT(4)

#define	LPC32XX_CLKPWR_GPIOSRC_P0IO3_BIT _BIT(3)

#define	LPC32XX_CLKPWR_GPIOSRC_P0IO2_BIT _BIT(2)

#define	LPC32XX_CLKPWR_GPIOSRC_P0IO1_BIT _BIT(1)

#define	LPC32XX_CLKPWR_GPIOSRC_P0IO0_BIT _BIT(0)

#define	LPC32XX_CLKPWR_USBPDIV_PLL_MASK 0xF

#define	LPC32XX_CLKPWR_INTSRC_ADC_BIT _BIT(31)

#define	LPC32XX_CLKPWR_INTSRC_TS_P_BIT _BIT(30)

#define	LPC32XX_CLKPWR_INTSRC_TS_AUX_BIT _BIT(29)

#define	LPC32XX_CLKPWR_INTSRC_USBAHNEEDCLK_BIT _BIT(26)

#define	LPC32XX_CLKPWR_INTSRC_MSTIMER_BIT _BIT(25)

#define	LPC32XX_CLKPWR_INTSRC_RTC_BIT _BIT(24)

#define	LPC32XX_CLKPWR_INTSRC_USBNEEDCLK_BIT _BIT(23)

#define	LPC32XX_CLKPWR_INTSRC_USB_BIT _BIT(22)

#define	LPC32XX_CLKPWR_INTSRC_I2C_BIT _BIT(21)

#define	LPC32XX_CLKPWR_INTSRC_USBOTGTIMER_BIT _BIT(20)

#define	LPC32XX_CLKPWR_INTSRC_USBATXINT_BIT _BIT(19)

#define	LPC32XX_CLKPWR_INTSRC_KEY_BIT _BIT(16)

#define	LPC32XX_CLKPWR_INTSRC_MAC_BIT _BIT(7)

#define	LPC32XX_CLKPWR_INTSRC_P0P1_BIT _BIT(6)

#define	LPC32XX_CLKPWR_INTSRC_GPIO_05_BIT _BIT(5)

#define	LPC32XX_CLKPWR_INTSRC_GPIO_04_BIT _BIT(4)

#define	LPC32XX_CLKPWR_INTSRC_GPIO_03_BIT _BIT(3)

#define	LPC32XX_CLKPWR_INTSRC_GPIO_02_BIT _BIT(2)

#define	LPC32XX_CLKPWR_INTSRC_GPIO_01_BIT _BIT(1)

#define	LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT _BIT(0)

#define	LPC32XX_CLKPWR_EXTSRC_U7_RX_BIT _BIT(31)

#define	LPC32XX_CLKPWR_EXTSRC_U7_HCTS_BIT _BIT(30)

#define	LPC32XX_CLKPWR_EXTSRC_U6_IRRX_BIT _BIT(28)

#define	LPC32XX_CLKPWR_EXTSRC_U5_RX_BIT _BIT(26)

#define	LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT _BIT(25)

#define	LPC32XX_CLKPWR_EXTSRC_U3_RX_BIT _BIT(24)

#define	LPC32XX_CLKPWR_EXTSRC_U2_HCTS_BIT _BIT(23)

#define	LPC32XX_CLKPWR_EXTSRC_U2_RX_BIT _BIT(22)

#define	LPC32XX_CLKPWR_EXTSRC_U1_RX_BIT _BIT(21)

#define	LPC32XX_CLKPWR_EXTSRC_MSDIO_INT_BIT _BIT(18)

#define	LPC32XX_CLKPWR_EXTSRC_MSDIO_SRT_BIT _BIT(17)

#define	LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT _BIT(16)

#define	LPC32XX_CLKPWR_EXTSRC_GPI_05_BIT _BIT(15)

#define	LPC32XX_CLKPWR_EXTSRC_GPI_04_BIT _BIT(14)

#define	LPC32XX_CLKPWR_EXTSRC_GPI_03_BIT _BIT(13)

#define	LPC32XX_CLKPWR_EXTSRC_GPI_02_BIT _BIT(12)

#define	LPC32XX_CLKPWR_EXTSRC_GPI_01_BIT _BIT(11)

#define	LPC32XX_CLKPWR_EXTSRC_GPI_00_BIT _BIT(10)

#define	LPC32XX_CLKPWR_EXTSRC_SYSCLKEN_BIT _BIT(9)

#define	LPC32XX_CLKPWR_EXTSRC_SPI1_DATIN_BIT _BIT(8)

#define	LPC32XX_CLKPWR_EXTSRC_GPI_07_BIT _BIT(7)

#define	LPC32XX_CLKPWR_EXTSRC_SPI2_DATIN_BIT _BIT(6)

#define	LPC32XX_CLKPWR_EXTSRC_GPI_19_BIT _BIT(5)

#define	LPC32XX_CLKPWR_EXTSRC_GPI_09_BIT _BIT(4)

#define	LPC32XX_CLKPWR_EXTSRC_GPI_08_BIT _BIT(3)

#define	LPC32XX_CLKPWR_HCLKDIV_DDRCLK_STOP (0x0 << 7)

#define	LPC32XX_CLKPWR_HCLKDIV_DDRCLK_NORM (0x1 << 7)

#define	LPC32XX_CLKPWR_HCLKDIV_DDRCLK_HALF (0x2 << 7)

#define	LPC32XX_CLKPWR_HCLKDIV_PCLK_DIV(n) (((n) & 0x1F) << 2)

#define	LPC32XX_CLKPWR_HCLKDIV_DIV_2POW(n) ((n) & 0x3)

#define	LPC32XX_CLKPWR_CTRL_FORCE_PCLK _BIT(10)

#define	LPC32XX_CLKPWR_SDRAM_SELF_RFSH _BIT(9)

#define	LPC32XX_CLKPWR_UPD_SDRAM_SELF_RFSH _BIT(8)

#define	LPC32XX_CLKPWR_AUTO_SDRAM_SELF_RFSH _BIT(7)

#define	LPC32XX_CLKPWR_HIGHCORE_STATE_BIT _BIT(5)

#define	LPC32XX_CLKPWR_SYSCLKEN_STATE_BIT _BIT(4)

#define	LPC32XX_CLKPWR_SYSCLKEN_GPIO_EN _BIT(3)

#define	LPC32XX_CLKPWR_SELECT_RUN_MODE _BIT(2)

#define	LPC32XX_CLKPWR_HIGHCORE_GPIO_EN _BIT(1)

#define	LPC32XX_CLKPWR_STOP_MODE_CTRL _BIT(0)

#define	LPC32XX_CLKPWR_PLL397_MSLOCK_STS _BIT(10)

#define	LPC32XX_CLKPWR_PLL397_BYPASS _BIT(9)

#define	LPC32XX_CLKPWR_PLL397_BIAS_NORM 0x000

#define	LPC32XX_CLKPWR_PLL397_BIAS_N12_5 0x040

#define	LPC32XX_CLKPWR_PLL397_BIAS_N25 0x080

#define	LPC32XX_CLKPWR_PLL397_BIAS_N37_5 0x0C0

#define	LPC32XX_CLKPWR_PLL397_BIAS_P12_5 0x100

#define	LPC32XX_CLKPWR_PLL397_BIAS_P25 0x140

#define	LPC32XX_CLKPWR_PLL397_BIAS_P37_5 0x180

#define	LPC32XX_CLKPWR_PLL397_BIAS_P50 0x1C0

#define	LPC32XX_CLKPWR_PLL397_BIAS_MASK 0x1C0

#define	LPC32XX_CLKPWR_SYSCTRL_PLL397_DIS _BIT(1)

#define	LPC32XX_CLKPWR_SYSCTRL_PLL397_STS _BIT(0)

#define	LPC32XX_CLKPWR_MOSC_ADD_CAP(n) (((n) & 0x7F) << 2)

#define	LPC32XX_CLKPWR_MOSC_CAP_MASK (0x7F << 2)

#define	LPC32XX_CLKPWR_TEST_MODE _BIT(1)

#define	LPC32XX_CLKPWR_MOSC_DISABLE _BIT(0)

#define	LPC32XX_CLKPWR_SYSCTRL_BP_TRIG(n) (((n) & 0x3FF) << 2)

#define	LPC32XX_CLKPWR_SYSCTRL_BP_MASK (0x3FF << 2)

#define	LPC32XX_CLKPWR_SYSCTRL_USEPLL397 _BIT(1)

#define	LPC32XX_CLKPWR_SYSCTRL_SYSCLKMUX _BIT(0)

#define	LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT12 0x000

#define	LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT16 0x040

#define	LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT15 0x080

#define	LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT24 0x0C0

#define	LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_STN4M 0x100

#define	LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_STN8C 0x140

#define	LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_DSTN4M 0x180

#define	LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_DSTN8C 0x1C0

#define	LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_MSK 0x01C0

#define	LPC32XX_CLKPWR_LCDCTRL_CLK_EN 0x020

#define	LPC32XX_CLKPWR_LCDCTRL_SET_PSCALE(n) ((n - 1) & 0x1F)

#define	LPC32XX_CLKPWR_LCDCTRL_PSCALE_MSK 0x001F

#define	LPC32XX_CLKPWR_HCLKPLL_POWER_UP _BIT(16)

#define	LPC32XX_CLKPWR_HCLKPLL_CCO_BYPASS _BIT(15)

#define	LPC32XX_CLKPWR_HCLKPLL_POSTDIV_BYPASS _BIT(14)

#define	LPC32XX_CLKPWR_HCLKPLL_FDBK_SEL_FCLK _BIT(13)

#define	LPC32XX_CLKPWR_HCLKPLL_POSTDIV_2POW(n) (((n) & 0x3) << 11)

#define	LPC32XX_CLKPWR_HCLKPLL_PREDIV_PLUS1(n) (((n) & 0x3) << 9)

#define	LPC32XX_CLKPWR_HCLKPLL_PLLM(n) (((n) & 0xFF) << 1)

#define	LPC32XX_CLKPWR_HCLKPLL_PLL_STS _BIT(0)

#define	LPC32XX_CLKPWR_ADCCTRL1_RTDIV(n) (((n) & 0xFF) << 0)

#define	LPC32XX_CLKPWR_ADCCTRL1_PCLK_SEL _BIT(8)

#define	LPC32XX_CLKPWR_USBCTRL_HCLK_EN _BIT(24)

#define	LPC32XX_CLKPWR_USBCTRL_USBI2C_EN _BIT(23)

#define	LPC32XX_CLKPWR_USBCTRL_USBDVND_EN _BIT(22)

#define	LPC32XX_CLKPWR_USBCTRL_USBHSTND_EN _BIT(21)

#define	LPC32XX_CLKPWR_USBCTRL_PU_ADD (0x0 << 19)

#define	LPC32XX_CLKPWR_USBCTRL_BUS_KEEPER (0x1 << 19)

#define	LPC32XX_CLKPWR_USBCTRL_PD_ADD (0x3 << 19)

#define	LPC32XX_CLKPWR_USBCTRL_CLK_EN2 _BIT(18)

#define	LPC32XX_CLKPWR_USBCTRL_CLK_EN1 _BIT(17)

#define	LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP _BIT(16)

#define	LPC32XX_CLKPWR_USBCTRL_CCO_BYPASS _BIT(15)

#define	LPC32XX_CLKPWR_USBCTRL_POSTDIV_BYPASS _BIT(14)

#define	LPC32XX_CLKPWR_USBCTRL_FDBK_SEL_FCLK _BIT(13)

#define	LPC32XX_CLKPWR_USBCTRL_POSTDIV_2POW(n) (((n) & 0x3) << 11)

#define	LPC32XX_CLKPWR_USBCTRL_PREDIV_PLUS1(n) (((n) & 0x3) << 9)

#define	LPC32XX_CLKPWR_USBCTRL_FDBK_PLUS1(n) (((n) & 0xFF) << 1)

#define	LPC32XX_CLKPWR_USBCTRL_PLL_STS _BIT(0)

#define	LPC32XX_CLKPWR_SDRCLK_FASTSLEW_CLK _BIT(22)

#define	LPC32XX_CLKPWR_SDRCLK_FASTSLEW _BIT(21)

#define	LPC32XX_CLKPWR_SDRCLK_FASTSLEW_DAT _BIT(20)

#define	LPC32XX_CLKPWR_SDRCLK_SW_DDR_RESET _BIT(19)

#define	LPC32XX_CLKPWR_SDRCLK_HCLK_DLY(n) (((n) & 0x1F) << 14)

#define	LPC32XX_CLKPWR_SDRCLK_DLY_ADDR_STS _BIT(13)

#define	LPC32XX_CLKPWR_SDRCLK_SENS_FACT(n) (((n) & 0x7) << 10)

#define	LPC32XX_CLKPWR_SDRCLK_USE_CAL _BIT(9)

#define	LPC32XX_CLKPWR_SDRCLK_DO_CAL _BIT(8)

#define	LPC32XX_CLKPWR_SDRCLK_CAL_ON_RTC _BIT(7)

#define	LPC32XX_CLKPWR_SDRCLK_DQS_DLY(n) (((n) & 0x1F) << 2)

#define	LPC32XX_CLKPWR_SDRCLK_USE_DDR _BIT(1)

#define	LPC32XX_CLKPWR_SDRCLK_CLK_DIS _BIT(0)

#define	LPC32XX_CLKPWR_SSPCTRL_DMA_SSP1RX _BIT(5)

#define	LPC32XX_CLKPWR_SSPCTRL_DMA_SSP1TX _BIT(4)

#define	LPC32XX_CLKPWR_SSPCTRL_DMA_SSP0RX _BIT(3)

#define	LPC32XX_CLKPWR_SSPCTRL_DMA_SSP0TX _BIT(2)

#define	LPC32XX_CLKPWR_SSPCTRL_SSPCLK1_EN _BIT(1)

#define	LPC32XX_CLKPWR_SSPCTRL_SSPCLK0_EN _BIT(0)

#define	LPC32XX_CLKPWR_I2SCTRL_I2S1_RX_FOR_TX _BIT(6)

#define	LPC32XX_CLKPWR_I2SCTRL_I2S1_TX_FOR_RX _BIT(5)

#define	LPC32XX_CLKPWR_I2SCTRL_I2S1_USE_DMA _BIT(4)

#define	LPC32XX_CLKPWR_I2SCTRL_I2S0_RX_FOR_TX _BIT(3)

#define	LPC32XX_CLKPWR_I2SCTRL_I2S0_TX_FOR_RX _BIT(2)

#define	LPC32XX_CLKPWR_I2SCTRL_I2SCLK1_EN _BIT(1)

#define	LPC32XX_CLKPWR_I2SCTRL_I2SCLK0_EN _BIT(0)

#define	LPC32XX_CLKPWR_MSCARD_MSDIO_PIN_DIS _BIT(10)

#define	LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN _BIT(9)

#define	LPC32XX_CLKPWR_MSCARD_MSDIO23_DIS _BIT(8)

#define	LPC32XX_CLKPWR_MSCARD_MSDIO1_DIS _BIT(7)

#define	LPC32XX_CLKPWR_MSCARD_MSDIO0_DIS _BIT(6)

#define	LPC32XX_CLKPWR_MSCARD_SDCARD_EN _BIT(5)

#define	LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(n) ((n) & 0xF)

#define	LPC32XX_CLKPWR_MACCTRL_NO_ENET_PIS 0x00

#define	LPC32XX_CLKPWR_MACCTRL_USE_MII_PINS 0x08

#define	LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS 0x18

#define	LPC32XX_CLKPWR_MACCTRL_PINS_MSK 0x18

#define	LPC32XX_CLKPWR_MACCTRL_DMACLK_EN _BIT(2)

#define	LPC32XX_CLKPWR_MACCTRL_MMIOCLK_EN _BIT(1)

#define	LPC32XX_CLKPWR_MACCTRL_HRCCLK_EN _BIT(0)

#define	LPC32XX_CLKPWR_TESTCLK1_SEL_PERCLK (0x0 << 5)

#define	LPC32XX_CLKPWR_TESTCLK1_SEL_RTC (0x1 << 5)

#define	LPC32XX_CLKPWR_TESTCLK1_SEL_MOSC (0x2 << 5)

#define	LPC32XX_CLKPWR_TESTCLK1_SEL_MASK (0x3 << 5)

#define	LPC32XX_CLKPWR_TESTCLK_TESTCLK1_EN _BIT(4)

#define	LPC32XX_CLKPWR_TESTCLK2_SEL_HCLK (0x0 << 1)

#define	LPC32XX_CLKPWR_TESTCLK2_SEL_PERCLK (0x1 << 1)

#define	LPC32XX_CLKPWR_TESTCLK2_SEL_USBCLK (0x2 << 1)

#define	LPC32XX_CLKPWR_TESTCLK2_SEL_MOSC (0x5 << 1)

#define	LPC32XX_CLKPWR_TESTCLK2_SEL_PLL397 (0x7 << 1)

#define	LPC32XX_CLKPWR_TESTCLK2_SEL_MASK (0x7 << 1)

#define	LPC32XX_CLKPWR_TESTCLK_TESTCLK2_EN _BIT(0)

#define	LPC32XX_CLKPWR_SW_INT(n) (_BIT(0) \| (((n) & 0x7F) << 1))

#define	LPC32XX_CLKPWR_SW_GET_ARG(n) (((n) & 0xFE) >> 1)

#define	LPC32XX_CLKPWR_I2CCLK_USBI2CHI_DRIVE _BIT(4)

#define	LPC32XX_CLKPWR_I2CCLK_I2C2HI_DRIVE _BIT(3)

#define	LPC32XX_CLKPWR_I2CCLK_I2C1HI_DRIVE _BIT(2)

#define	LPC32XX_CLKPWR_I2CCLK_I2C2CLK_EN _BIT(1)

#define	LPC32XX_CLKPWR_I2CCLK_I2C1CLK_EN _BIT(0)

#define	LPC32XX_CLKPWR_KEYCLKCTRL_CLK_EN 0x1

#define	LPC32XX_CLKPWR_ADC32CLKCTRL_CLK_EN 0x1

#define	LPC32XX_CLKPWR_PWMCLK_PWM2_DIV(n) (((n) & 0xF) << 8)

#define	LPC32XX_CLKPWR_PWMCLK_PWM1_DIV(n) (((n) & 0xF) << 4)

#define	LPC32XX_CLKPWR_PWMCLK_PWM2SEL_PCLK 0x8

#define	LPC32XX_CLKPWR_PWMCLK_PWM2CLK_EN 0x4

#define	LPC32XX_CLKPWR_PWMCLK_PWM1SEL_PCLK 0x2

#define	LPC32XX_CLKPWR_PWMCLK_PWM1CLK_EN 0x1

#define	LPC32XX_CLKPWR_PWMCLK_HSTIMER_EN 0x2

#define	LPC32XX_CLKPWR_PWMCLK_WDOG_EN 0x1

#define	LPC32XX_CLKPWR_TMRPWMCLK_TIMER3_EN 0x20

#define	LPC32XX_CLKPWR_TMRPWMCLK_TIMER2_EN 0x10

#define	LPC32XX_CLKPWR_TMRPWMCLK_TIMER1_EN 0x08

#define	LPC32XX_CLKPWR_TMRPWMCLK_TIMER0_EN 0x04

#define	LPC32XX_CLKPWR_TMRPWMCLK_PWM4_EN 0x02

#define	LPC32XX_CLKPWR_TMRPWMCLK_PWM3_EN 0x01

#define	LPC32XX_CLKPWR_SPICLK_SET_SPI2DATIO 0x80

#define	LPC32XX_CLKPWR_SPICLK_SET_SPI2CLK 0x40

#define	LPC32XX_CLKPWR_SPICLK_USE_SPI2 0x20

#define	LPC32XX_CLKPWR_SPICLK_SPI2CLK_EN 0x10

#define	LPC32XX_CLKPWR_SPICLK_SET_SPI1DATIO 0x08

#define	LPC32XX_CLKPWR_SPICLK_SET_SPI1CLK 0x04

#define	LPC32XX_CLKPWR_SPICLK_USE_SPI1 0x02

#define	LPC32XX_CLKPWR_SPICLK_SPI1CLK_EN 0x01

#define	LPC32XX_CLKPWR_NANDCLK_INTSEL_MLC 0x20

#define	LPC32XX_CLKPWR_NANDCLK_DMA_RNB 0x10

#define	LPC32XX_CLKPWR_NANDCLK_DMA_INT 0x08

#define	LPC32XX_CLKPWR_NANDCLK_SEL_SLC 0x04

#define	LPC32XX_CLKPWR_NANDCLK_MLCCLK_EN 0x02

#define	LPC32XX_CLKPWR_NANDCLK_SLCCLK_EN 0x01

#define	LPC32XX_CLKPWR_UART_Y_DIV(y) ((y) & 0xFF)

#define	LPC32XX_CLKPWR_UART_X_DIV(x) (((x) & 0xFF) << 8)

#define	LPC32XX_CLKPWR_UART_USE_HCLK _BIT(16)

#define	LPC32XX_CLKPWR_IRDA_Y_DIV(y) ((y) & 0xFF)

#define	LPC32XX_CLKPWR_IRDA_X_DIV(x) (((x) & 0xFF) << 8)

#define	LPC32XX_CLKPWR_UARTCLKCTRL_UART6_EN _BIT(3)

#define	LPC32XX_CLKPWR_UARTCLKCTRL_UART5_EN _BIT(2)

#define	LPC32XX_CLKPWR_UARTCLKCTRL_UART4_EN _BIT(1)

#define	LPC32XX_CLKPWR_UARTCLKCTRL_UART3_EN _BIT(0)

#define	LPC32XX_CLKPWR_DMACLKCTRL_CLK_EN 0x1

#define	LPC32XX_CLKPWR_AUTOCLK_USB_EN 0x40

#define	LPC32XX_CLKPWR_AUTOCLK_IRAM_EN 0x02

#define	LPC32XX_CLKPWR_AUTOCLK_IROM_EN 0x01

#define	LPC32XX_INTC_MASK(x) io_p2v((x) + 0x00)

#define	LPC32XX_INTC_RAW_STAT(x) io_p2v((x) + 0x04)

#define	LPC32XX_INTC_STAT(x) io_p2v((x) + 0x08)

#define	LPC32XX_INTC_POLAR(x) io_p2v((x) + 0x0C)

#define	LPC32XX_INTC_ACT_TYPE(x) io_p2v((x) + 0x10)

#define	LPC32XX_INTC_TYPE(x) io_p2v((x) + 0x14)

#define	LPC32XX_TIMER_IR(x) io_p2v((x) + 0x00)

#define	LPC32XX_TIMER_TCR(x) io_p2v((x) + 0x04)

#define	LPC32XX_TIMER_TC(x) io_p2v((x) + 0x08)

#define	LPC32XX_TIMER_PR(x) io_p2v((x) + 0x0C)

#define	LPC32XX_TIMER_PC(x) io_p2v((x) + 0x10)

#define	LPC32XX_TIMER_MCR(x) io_p2v((x) + 0x14)

#define	LPC32XX_TIMER_MR0(x) io_p2v((x) + 0x18)

#define	LPC32XX_TIMER_MR1(x) io_p2v((x) + 0x1C)

#define	LPC32XX_TIMER_MR2(x) io_p2v((x) + 0x20)

#define	LPC32XX_TIMER_MR3(x) io_p2v((x) + 0x24)

#define	LPC32XX_TIMER_CCR(x) io_p2v((x) + 0x28)

#define	LPC32XX_TIMER_CR0(x) io_p2v((x) + 0x2C)

#define	LPC32XX_TIMER_CR1(x) io_p2v((x) + 0x30)

#define	LPC32XX_TIMER_CR2(x) io_p2v((x) + 0x34)

#define	LPC32XX_TIMER_CR3(x) io_p2v((x) + 0x38)

#define	LPC32XX_TIMER_EMR(x) io_p2v((x) + 0x3C)

#define	LPC32XX_TIMER_CTCR(x) io_p2v((x) + 0x70)

#define	LPC32XX_TIMER_CNTR_MTCH_BIT(n) (1 << ((n) & 0x3))

#define	LPC32XX_TIMER_CNTR_CAPT_BIT(n) (1 << (4 + ((n) & 0x3)))

#define	LPC32XX_TIMER_CNTR_TCR_EN 0x1

#define	LPC32XX_TIMER_CNTR_TCR_RESET 0x2

#define	LPC32XX_TIMER_CNTR_MCR_MTCH(n) (0x1 << ((n) * 3))

#define	LPC32XX_TIMER_CNTR_MCR_RESET(n) (0x1 << (((n) * 3) + 1))

#define	LPC32XX_TIMER_CNTR_MCR_STOP(n) (0x1 << (((n) * 3) + 2))

#define	LPC32XX_UART_DLL_FIFO(x) io_p2v((x) + 0x00)

#define	LPC32XX_UART_DLM_IER(x) io_p2v((x) + 0x04)

#define	LPC32XX_UART_IIR_FCR(x) io_p2v((x) + 0x08)

#define	LPC32XX_UART_LCR(x) io_p2v((x) + 0x0C)

#define	LPC32XX_UART_MODEM_CTRL(x) io_p2v((x) + 0x10)

#define	LPC32XX_UART_LSR(x) io_p2v((x) + 0x14)

#define	LPC32XX_UART_MODEM_STATUS(x) io_p2v((x) + 0x18)

#define	LPC32XX_UART_RXLEV(x) io_p2v((x) + 0x1C)

#define	_UCREG(x)

#define	LPC32XX_UARTCTL_CTRL _UCREG(0x00)

#define	LPC32XX_UARTCTL_CLKMODE _UCREG(0x04)

#define	LPC32XX_UARTCTL_CLOOP _UCREG(0x08)

#define	LPC32XX_UART_U3_MD_CTRL_EN _BIT(11)

#define	LPC32XX_UART_IRRX6_INV_EN _BIT(10)

#define	LPC32XX_UART_HDPX_EN _BIT(9)

#define	LPC32XX_UART_UART6_IRDAMOD_BYPASS _BIT(5)

#define	LPC32XX_RT_IRTX6_INV_EN _BIT(4)

#define	LPC32XX_RT_IRTX6_INV_MIR_EN _BIT(3)

#define	LPC32XX_RT_RX_IRPULSE_3_16_115K _BIT(2)

#define	LPC32XX_RT_TX_IRPULSE_3_16_115K _BIT(1)

#define	LPC32XX_UART_U5_ROUTE_TO_USB _BIT(0)

#define	LPC32XX_UART_ENABLED_CLOCKS(n) (((n) >> 16) & 0x7F)

#define	LPC32XX_UART_ENABLED_CLOCK(n, u) (((n) >> (16 + (u))) & 0x1)

#define	LPC32XX_UART_ENABLED_CLKS_ANY _BIT(14)

#define	LPC32XX_UART_CLKMODE_OFF 0x0

#define	LPC32XX_UART_CLKMODE_ON 0x1

#define	LPC32XX_UART_CLKMODE_AUTO 0x2

#define	LPC32XX_UART_CLKMODE_MASK(u) (0x3 << ((((u) - 3) * 2) + 4))

#define	LPC32XX_UART_CLKMODE_LOAD(m, u) ((m) << ((((u) - 3) * 2) + 4))

#define	_GPREG(x) io_p2v(LPC32XX_GPIO_BASE + (x))

#define	LPC32XX_GPIO_P_MUX_SET _GPREG(0x100)

#define	LPC32XX_GPIO_P_MUX_CLR _GPREG(0x104)

#define	LPC32XX_GPIO_P_MUX_STATE _GPREG(0x108)

#define	LPC32XX_GPIO_P3_MUX_SET _GPREG(0x110)

#define	LPC32XX_GPIO_P3_MUX_CLR _GPREG(0x114)

#define	LPC32XX_GPIO_P3_MUX_STATE _GPREG(0x118)

#define	LPC32XX_GPIO_P0_MUX_SET _GPREG(0x120)

#define	LPC32XX_GPIO_P0_MUX_CLR _GPREG(0x124)

#define	LPC32XX_GPIO_P0_MUX_STATE _GPREG(0x128)

#define	LPC32XX_GPIO_P1_MUX_SET _GPREG(0x130)

#define	LPC32XX_GPIO_P1_MUX_CLR _GPREG(0x134)

#define	LPC32XX_GPIO_P1_MUX_STATE _GPREG(0x138)

#define	LPC32XX_GPIO_P2_MUX_SET _GPREG(0x028)

#define	LPC32XX_GPIO_P2_MUX_CLR _GPREG(0x02C)

#define	LPC32XX_GPIO_P2_MUX_STATE _GPREG(0x030)

#define	_OTGREG(x) io_p2v(LPC32XX_USB_OTG_BASE + (x))

#define	LPC32XX_USB_OTG_CLK_CTRL _OTGREG(0xFF4)

#define	LPC32XX_USB_OTG_CLK_STAT _OTGREG(0xFF8)

#define	LPC32XX_USB_OTG_AHB_M_CLOCK_ON _BIT(4)

#define	LPC32XX_USB_OTG_OTG_CLOCK_ON _BIT(3)

#define	LPC32XX_USB_OTG_I2C_CLOCK_ON _BIT(2)

#define	LPC32XX_USB_OTG_DEV_CLOCK_ON _BIT(1)

#define	LPC32XX_USB_OTG_HOST_CLOCK_ON _BIT(0)

Macro Definition Documentation

#define _BIT ( n ) _SBF(n, 1)

Definition at line 23 of file platform.h.

#define _GPREG ( x ) io_p2v(LPC32XX_GPIO_BASE + (x))

Definition at line 680 of file platform.h.

#define _OTGREG ( x ) io_p2v(LPC32XX_USB_OTG_BASE + (x))

Definition at line 700 of file platform.h.

#define _PMREG ( x )

Value:

io_p2v(LPC32XX_CLK_PM_BASE +\

(x))

Definition at line 130 of file platform.h.

#define _SBF	(	f,
		v
	)	((v) << (f))

Definition at line 22 of file platform.h.

#define _UCREG ( x )

Value:

io_p2v(\

LPC32XX_UART_CTRL_BASE + (x))

Definition at line 646 of file platform.h.

#define LPC32XX_ADC_BASE 0x40048000

Definition at line 76 of file platform.h.

#define LPC32XX_AHB0_SIZE 0x00089000

Definition at line 38 of file platform.h.

#define LPC32XX_AHB0_START LPC32XX_SLC_BASE

Definition at line 37 of file platform.h.

#define LPC32XX_AHB1_SIZE 0x000E1000

Definition at line 54 of file platform.h.

#define LPC32XX_AHB1_START LPC32XX_DMA_BASE

Definition at line 53 of file platform.h.

#define LPC32XX_CLK_PM_BASE 0x40004000

Definition at line 59 of file platform.h.

#define LPC32XX_CLKPWR_ADC32CLKCTRL_CLK_EN 0x1

Definition at line 497 of file platform.h.

#define LPC32XX_CLKPWR_ADC_CLK_CTRL _PMREG(0x0B4)

Definition at line 165 of file platform.h.

#define LPC32XX_CLKPWR_ADC_CLK_CTRL_1 _PMREG(0x060)

Definition at line 151 of file platform.h.

#define LPC32XX_CLKPWR_ADCCTRL1_PCLK_SEL _BIT(8)

Definition at line 375 of file platform.h.

#define LPC32XX_CLKPWR_ADCCTRL1_RTDIV ( n ) (((n) & 0xFF) << 0)

Definition at line 374 of file platform.h.

#define LPC32XX_CLKPWR_AUTO_SDRAM_SELF_RFSH _BIT(7)

Definition at line 302 of file platform.h.

#define LPC32XX_CLKPWR_AUTOCLK_IRAM_EN 0x02

Definition at line 578 of file platform.h.

#define LPC32XX_CLKPWR_AUTOCLK_IROM_EN 0x01

Definition at line 579 of file platform.h.

#define LPC32XX_CLKPWR_AUTOCLK_USB_EN 0x40

Definition at line 577 of file platform.h.

#define LPC32XX_CLKPWR_AUTOCLOCK _PMREG(0x0EC)

Definition at line 178 of file platform.h.

#define LPC32XX_CLKPWR_BOOTMAP _PMREG(0x014)

Definition at line 133 of file platform.h.

#define LPC32XX_CLKPWR_BOOTMAP_SEL_BIT _BIT(1)

Definition at line 189 of file platform.h.

#define LPC32XX_CLKPWR_CTRL_FORCE_PCLK _BIT(10)

Definition at line 299 of file platform.h.

#define LPC32XX_CLKPWR_DDR_LAP_COUNT _PMREG(0x070)

Definition at line 155 of file platform.h.

#define LPC32XX_CLKPWR_DDR_LAP_DELAY _PMREG(0x074)

Definition at line 156 of file platform.h.

#define LPC32XX_CLKPWR_DDR_LAP_NOM _PMREG(0x06C)

Definition at line 154 of file platform.h.

#define LPC32XX_CLKPWR_DEBUG_CTRL _PMREG(0x000)

Definition at line 132 of file platform.h.

#define LPC32XX_CLKPWR_DEVID ( x ) _PMREG(0x130 + (x))

Definition at line 179 of file platform.h.

#define LPC32XX_CLKPWR_DMA_CLK_CTRL _PMREG(0x0E8)

Definition at line 177 of file platform.h.

#define LPC32XX_CLKPWR_DMACLKCTRL_CLK_EN 0x1

Definition at line 572 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_GPI_00_BIT _BIT(10)

Definition at line 278 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_GPI_01_BIT _BIT(11)

Definition at line 277 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_GPI_02_BIT _BIT(12)

Definition at line 276 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_GPI_03_BIT _BIT(13)

Definition at line 275 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_GPI_04_BIT _BIT(14)

Definition at line 274 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_GPI_05_BIT _BIT(15)

Definition at line 273 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT _BIT(16)

Definition at line 272 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_GPI_07_BIT _BIT(7)

Definition at line 281 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_GPI_08_BIT _BIT(3)

Definition at line 285 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_GPI_09_BIT _BIT(4)

Definition at line 284 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_GPI_19_BIT _BIT(5)

Definition at line 283 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT _BIT(25)

Definition at line 265 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_MSDIO_INT_BIT _BIT(18)

Definition at line 270 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_MSDIO_SRT_BIT _BIT(17)

Definition at line 271 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_SPI1_DATIN_BIT _BIT(8)

Definition at line 280 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_SPI2_DATIN_BIT _BIT(6)

Definition at line 282 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_SYSCLKEN_BIT _BIT(9)

Definition at line 279 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_U1_RX_BIT _BIT(21)

Definition at line 269 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_U2_HCTS_BIT _BIT(23)

Definition at line 267 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_U2_RX_BIT _BIT(22)

Definition at line 268 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_U3_RX_BIT _BIT(24)

Definition at line 266 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_U5_RX_BIT _BIT(26)

Definition at line 264 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_U6_IRRX_BIT _BIT(28)

Definition at line 263 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_U7_HCTS_BIT _BIT(30)

Definition at line 262 of file platform.h.

#define LPC32XX_CLKPWR_EXTSRC_U7_RX_BIT _BIT(31)

Definition at line 261 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P0IO0_BIT _BIT(0)

Definition at line 225 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P0IO1_BIT _BIT(1)

Definition at line 224 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P0IO2_BIT _BIT(2)

Definition at line 223 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P0IO3_BIT _BIT(3)

Definition at line 222 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P0IO4_BIT _BIT(4)

Definition at line 221 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P0IO5_BIT _BIT(5)

Definition at line 220 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P0IO6_BIT _BIT(6)

Definition at line 219 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P0IO7_BIT _BIT(7)

Definition at line 218 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO0_BIT _BIT(8)

Definition at line 217 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO10_BIT _BIT(18)

Definition at line 207 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO11_BIT _BIT(19)

Definition at line 206 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO12_BIT _BIT(20)

Definition at line 205 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO13_BIT _BIT(21)

Definition at line 204 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO14_BIT _BIT(22)

Definition at line 203 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO15_BIT _BIT(23)

Definition at line 202 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO16_BIT _BIT(24)

Definition at line 201 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO17_BIT _BIT(25)

Definition at line 200 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO18_BIT _BIT(26)

Definition at line 199 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO19_BIT _BIT(27)

Definition at line 198 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO1_BIT _BIT(9)

Definition at line 216 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO20_BIT _BIT(28)

Definition at line 197 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO21_BIT _BIT(29)

Definition at line 196 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO22_BIT _BIT(30)

Definition at line 195 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO23_BIT _BIT(31)

Definition at line 194 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO2_BIT _BIT(10)

Definition at line 215 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO3_BIT _BIT(11)

Definition at line 214 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO4_BIT _BIT(12)

Definition at line 213 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO5_BIT _BIT(13)

Definition at line 212 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO6_BIT _BIT(14)

Definition at line 211 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO7_BIT _BIT(15)

Definition at line 210 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO8_BIT _BIT(16)

Definition at line 209 of file platform.h.

#define LPC32XX_CLKPWR_GPIOSRC_P1IO9_BIT _BIT(17)

Definition at line 208 of file platform.h.

#define LPC32XX_CLKPWR_HCLK_DIV _PMREG(0x040)

Definition at line 144 of file platform.h.

#define LPC32XX_CLKPWR_HCLKDIV_DDRCLK_HALF (0x2 << 7)

Definition at line 292 of file platform.h.

#define LPC32XX_CLKPWR_HCLKDIV_DDRCLK_NORM (0x1 << 7)

Definition at line 291 of file platform.h.

#define LPC32XX_CLKPWR_HCLKDIV_DDRCLK_STOP (0x0 << 7)

Definition at line 290 of file platform.h.

#define LPC32XX_CLKPWR_HCLKDIV_DIV_2POW ( n ) ((n) & 0x3)

Definition at line 294 of file platform.h.

#define LPC32XX_CLKPWR_HCLKDIV_PCLK_DIV ( n ) (((n) & 0x1F) << 2)

Definition at line 293 of file platform.h.

#define LPC32XX_CLKPWR_HCLKPLL_CCO_BYPASS _BIT(15)

Definition at line 363 of file platform.h.

#define LPC32XX_CLKPWR_HCLKPLL_CTRL _PMREG(0x058)

Definition at line 150 of file platform.h.

#define LPC32XX_CLKPWR_HCLKPLL_FDBK_SEL_FCLK _BIT(13)

Definition at line 365 of file platform.h.

#define LPC32XX_CLKPWR_HCLKPLL_PLL_STS _BIT(0)

Definition at line 369 of file platform.h.

#define LPC32XX_CLKPWR_HCLKPLL_PLLM ( n ) (((n) & 0xFF) << 1)

Definition at line 368 of file platform.h.

#define LPC32XX_CLKPWR_HCLKPLL_POSTDIV_2POW ( n ) (((n) & 0x3) << 11)

Definition at line 366 of file platform.h.

#define LPC32XX_CLKPWR_HCLKPLL_POSTDIV_BYPASS _BIT(14)

Definition at line 364 of file platform.h.

#define LPC32XX_CLKPWR_HCLKPLL_POWER_UP _BIT(16)

Definition at line 362 of file platform.h.

#define LPC32XX_CLKPWR_HCLKPLL_PREDIV_PLUS1 ( n ) (((n) & 0x3) << 9)

Definition at line 367 of file platform.h.

#define LPC32XX_CLKPWR_HIGHCORE_GPIO_EN _BIT(1)

Definition at line 307 of file platform.h.

#define LPC32XX_CLKPWR_HIGHCORE_STATE_BIT _BIT(5)

Definition at line 303 of file platform.h.

#define LPC32XX_CLKPWR_I2C_CLK_CTRL _PMREG(0x0AC)

Definition at line 163 of file platform.h.

#define LPC32XX_CLKPWR_I2CCLK_I2C1CLK_EN _BIT(0)

Definition at line 487 of file platform.h.

#define LPC32XX_CLKPWR_I2CCLK_I2C1HI_DRIVE _BIT(2)

Definition at line 485 of file platform.h.

#define LPC32XX_CLKPWR_I2CCLK_I2C2CLK_EN _BIT(1)

Definition at line 486 of file platform.h.

#define LPC32XX_CLKPWR_I2CCLK_I2C2HI_DRIVE _BIT(3)

Definition at line 484 of file platform.h.

#define LPC32XX_CLKPWR_I2CCLK_USBI2CHI_DRIVE _BIT(4)

Definition at line 483 of file platform.h.

#define LPC32XX_CLKPWR_I2S_CLK_CTRL _PMREG(0x07C)

Definition at line 158 of file platform.h.

#define LPC32XX_CLKPWR_I2SCTRL_I2S0_RX_FOR_TX _BIT(3)

Definition at line 431 of file platform.h.

#define LPC32XX_CLKPWR_I2SCTRL_I2S0_TX_FOR_RX _BIT(2)

Definition at line 432 of file platform.h.

#define LPC32XX_CLKPWR_I2SCTRL_I2S1_RX_FOR_TX _BIT(6)

Definition at line 428 of file platform.h.

#define LPC32XX_CLKPWR_I2SCTRL_I2S1_TX_FOR_RX _BIT(5)

Definition at line 429 of file platform.h.

#define LPC32XX_CLKPWR_I2SCTRL_I2S1_USE_DMA _BIT(4)

Definition at line 430 of file platform.h.

#define LPC32XX_CLKPWR_I2SCTRL_I2SCLK0_EN _BIT(0)

Definition at line 434 of file platform.h.

#define LPC32XX_CLKPWR_I2SCTRL_I2SCLK1_EN _BIT(1)

Definition at line 433 of file platform.h.

#define LPC32XX_CLKPWR_INT_AP _PMREG(0x02C)

Definition at line 139 of file platform.h.

#define LPC32XX_CLKPWR_INT_ER _PMREG(0x020)

Definition at line 136 of file platform.h.

#define LPC32XX_CLKPWR_INT_RS _PMREG(0x024)

Definition at line 137 of file platform.h.

#define LPC32XX_CLKPWR_INT_SR _PMREG(0x028)

Definition at line 138 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_ADC_BIT _BIT(31)

Definition at line 236 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT _BIT(0)

Definition at line 255 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_GPIO_01_BIT _BIT(1)

Definition at line 254 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_GPIO_02_BIT _BIT(2)

Definition at line 253 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_GPIO_03_BIT _BIT(3)

Definition at line 252 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_GPIO_04_BIT _BIT(4)

Definition at line 251 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_GPIO_05_BIT _BIT(5)

Definition at line 250 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_I2C_BIT _BIT(21)

Definition at line 244 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_KEY_BIT _BIT(16)

Definition at line 247 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_MAC_BIT _BIT(7)

Definition at line 248 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_MSTIMER_BIT _BIT(25)

Definition at line 240 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_P0P1_BIT _BIT(6)

Definition at line 249 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_RTC_BIT _BIT(24)

Definition at line 241 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_TS_AUX_BIT _BIT(29)

Definition at line 238 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_TS_P_BIT _BIT(30)

Definition at line 237 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_USB_BIT _BIT(22)

Definition at line 243 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_USBAHNEEDCLK_BIT _BIT(26)

Definition at line 239 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_USBATXINT_BIT _BIT(19)

Definition at line 246 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_USBNEEDCLK_BIT _BIT(23)

Definition at line 242 of file platform.h.

#define LPC32XX_CLKPWR_INTSRC_USBOTGTIMER_BIT _BIT(20)

Definition at line 245 of file platform.h.

#define LPC32XX_CLKPWR_IRDA_CLK_CTRL _PMREG(0x0E0)

Definition at line 175 of file platform.h.

#define LPC32XX_CLKPWR_IRDA_X_DIV ( x ) (((x) & 0xFF) << 8)

Definition at line 559 of file platform.h.

#define LPC32XX_CLKPWR_IRDA_Y_DIV ( y ) ((y) & 0xFF)

Definition at line 558 of file platform.h.

#define LPC32XX_CLKPWR_KEY_CLK_CTRL _PMREG(0x0B0)

Definition at line 164 of file platform.h.

#define LPC32XX_CLKPWR_KEYCLKCTRL_CLK_EN 0x1

Definition at line 492 of file platform.h.

#define LPC32XX_CLKPWR_LCDCLK_CTRL _PMREG(0x054)

Definition at line 149 of file platform.h.

#define LPC32XX_CLKPWR_LCDCTRL_CLK_EN 0x020

Definition at line 355 of file platform.h.

#define LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_DSTN4M 0x180

Definition at line 352 of file platform.h.

#define LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_DSTN8C 0x1C0

Definition at line 353 of file platform.h.

#define LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_MSK 0x01C0

Definition at line 354 of file platform.h.

#define LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_STN4M 0x100

Definition at line 350 of file platform.h.

#define LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_STN8C 0x140

Definition at line 351 of file platform.h.

#define LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT12 0x000

Definition at line 346 of file platform.h.

#define LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT15 0x080

Definition at line 348 of file platform.h.

#define LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT16 0x040

Definition at line 347 of file platform.h.

#define LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_TFT24 0x0C0

Definition at line 349 of file platform.h.

#define LPC32XX_CLKPWR_LCDCTRL_PSCALE_MSK 0x001F

Definition at line 357 of file platform.h.

#define LPC32XX_CLKPWR_LCDCTRL_SET_PSCALE ( n ) ((n - 1) & 0x1F)

Definition at line 356 of file platform.h.

#define LPC32XX_CLKPWR_MACCLK_CTRL _PMREG(0x090)

Definition at line 160 of file platform.h.

#define LPC32XX_CLKPWR_MACCTRL_DMACLK_EN _BIT(2)

Definition at line 454 of file platform.h.

#define LPC32XX_CLKPWR_MACCTRL_HRCCLK_EN _BIT(0)

Definition at line 456 of file platform.h.

#define LPC32XX_CLKPWR_MACCTRL_MMIOCLK_EN _BIT(1)

Definition at line 455 of file platform.h.

#define LPC32XX_CLKPWR_MACCTRL_NO_ENET_PIS 0x00

Definition at line 450 of file platform.h.

#define LPC32XX_CLKPWR_MACCTRL_PINS_MSK 0x18

Definition at line 453 of file platform.h.

#define LPC32XX_CLKPWR_MACCTRL_USE_MII_PINS 0x08

Definition at line 451 of file platform.h.

#define LPC32XX_CLKPWR_MACCTRL_USE_RMII_PINS 0x18

Definition at line 452 of file platform.h.

#define LPC32XX_CLKPWR_MAIN_OSC_CTRL _PMREG(0x04C)

Definition at line 147 of file platform.h.

#define LPC32XX_CLKPWR_MOSC_ADD_CAP ( n ) (((n) & 0x7F) << 2)

Definition at line 330 of file platform.h.

#define LPC32XX_CLKPWR_MOSC_CAP_MASK (0x7F << 2)

Definition at line 331 of file platform.h.

#define LPC32XX_CLKPWR_MOSC_DISABLE _BIT(0)

Definition at line 333 of file platform.h.

#define LPC32XX_CLKPWR_MS_CTRL _PMREG(0x080)

Definition at line 159 of file platform.h.

#define LPC32XX_CLKPWR_MSCARD_MSDIO0_DIS _BIT(6)

Definition at line 443 of file platform.h.

#define LPC32XX_CLKPWR_MSCARD_MSDIO1_DIS _BIT(7)

Definition at line 442 of file platform.h.

#define LPC32XX_CLKPWR_MSCARD_MSDIO23_DIS _BIT(8)

Definition at line 441 of file platform.h.

#define LPC32XX_CLKPWR_MSCARD_MSDIO_PIN_DIS _BIT(10)

Definition at line 439 of file platform.h.

#define LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN _BIT(9)

Definition at line 440 of file platform.h.

#define LPC32XX_CLKPWR_MSCARD_SDCARD_DIV ( n ) ((n) & 0xF)

Definition at line 445 of file platform.h.

#define LPC32XX_CLKPWR_MSCARD_SDCARD_EN _BIT(5)

Definition at line 444 of file platform.h.

#define LPC32XX_CLKPWR_NAND_CLK_CTRL _PMREG(0x0C8)

Definition at line 170 of file platform.h.

#define LPC32XX_CLKPWR_NANDCLK_DMA_INT 0x08

Definition at line 542 of file platform.h.

#define LPC32XX_CLKPWR_NANDCLK_DMA_RNB 0x10

Definition at line 541 of file platform.h.

#define LPC32XX_CLKPWR_NANDCLK_INTSEL_MLC 0x20

Definition at line 540 of file platform.h.

#define LPC32XX_CLKPWR_NANDCLK_MLCCLK_EN 0x02

Definition at line 544 of file platform.h.

#define LPC32XX_CLKPWR_NANDCLK_SEL_SLC 0x04

Definition at line 543 of file platform.h.

#define LPC32XX_CLKPWR_NANDCLK_SLCCLK_EN 0x01

Definition at line 545 of file platform.h.

#define LPC32XX_CLKPWR_P01_ER _PMREG(0x018)

Definition at line 134 of file platform.h.

#define LPC32XX_CLKPWR_PIN_AP _PMREG(0x03C)

Definition at line 143 of file platform.h.

#define LPC32XX_CLKPWR_PIN_ER _PMREG(0x030)

Definition at line 140 of file platform.h.

#define LPC32XX_CLKPWR_PIN_RS _PMREG(0x034)

Definition at line 141 of file platform.h.

#define LPC32XX_CLKPWR_PIN_SR _PMREG(0x038)

Definition at line 142 of file platform.h.

#define LPC32XX_CLKPWR_PLL397_BIAS_MASK 0x1C0

Definition at line 323 of file platform.h.

#define LPC32XX_CLKPWR_PLL397_BIAS_N12_5 0x040

Definition at line 316 of file platform.h.

#define LPC32XX_CLKPWR_PLL397_BIAS_N25 0x080

Definition at line 317 of file platform.h.

#define LPC32XX_CLKPWR_PLL397_BIAS_N37_5 0x0C0

Definition at line 318 of file platform.h.

#define LPC32XX_CLKPWR_PLL397_BIAS_NORM 0x000

Definition at line 315 of file platform.h.

#define LPC32XX_CLKPWR_PLL397_BIAS_P12_5 0x100

Definition at line 319 of file platform.h.

#define LPC32XX_CLKPWR_PLL397_BIAS_P25 0x140

Definition at line 320 of file platform.h.

#define LPC32XX_CLKPWR_PLL397_BIAS_P37_5 0x180

Definition at line 321 of file platform.h.

#define LPC32XX_CLKPWR_PLL397_BIAS_P50 0x1C0

Definition at line 322 of file platform.h.

#define LPC32XX_CLKPWR_PLL397_BYPASS _BIT(9)

Definition at line 314 of file platform.h.

#define LPC32XX_CLKPWR_PLL397_CTRL _PMREG(0x048)

Definition at line 146 of file platform.h.

#define LPC32XX_CLKPWR_PLL397_MSLOCK_STS _BIT(10)

Definition at line 313 of file platform.h.

#define LPC32XX_CLKPWR_PWM_CLK_CTRL _PMREG(0x0B8)

Definition at line 166 of file platform.h.

#define LPC32XX_CLKPWR_PWMCLK_HSTIMER_EN 0x2

Definition at line 512 of file platform.h.

#define LPC32XX_CLKPWR_PWMCLK_PWM1_DIV ( n ) (((n) & 0xF) << 4)

Definition at line 503 of file platform.h.

#define LPC32XX_CLKPWR_PWMCLK_PWM1CLK_EN 0x1

Definition at line 507 of file platform.h.

#define LPC32XX_CLKPWR_PWMCLK_PWM1SEL_PCLK 0x2

Definition at line 506 of file platform.h.

#define LPC32XX_CLKPWR_PWMCLK_PWM2_DIV ( n ) (((n) & 0xF) << 8)

Definition at line 502 of file platform.h.

#define LPC32XX_CLKPWR_PWMCLK_PWM2CLK_EN 0x4

Definition at line 505 of file platform.h.

#define LPC32XX_CLKPWR_PWMCLK_PWM2SEL_PCLK 0x8

Definition at line 504 of file platform.h.

#define LPC32XX_CLKPWR_PWMCLK_WDOG_EN 0x1

Definition at line 513 of file platform.h.

#define LPC32XX_CLKPWR_PWR_CTRL _PMREG(0x044)

Definition at line 145 of file platform.h.

#define LPC32XX_CLKPWR_SDRAM_SELF_RFSH _BIT(9)

Definition at line 300 of file platform.h.

#define LPC32XX_CLKPWR_SDRAMCLK_CTRL _PMREG(0x068)

Definition at line 153 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_CAL_ON_RTC _BIT(7)

Definition at line 410 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_CLK_DIS _BIT(0)

Definition at line 413 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_DLY_ADDR_STS _BIT(13)

Definition at line 406 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_DO_CAL _BIT(8)

Definition at line 409 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_DQS_DLY ( n ) (((n) & 0x1F) << 2)

Definition at line 411 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_FASTSLEW _BIT(21)

Definition at line 402 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_FASTSLEW_CLK _BIT(22)

Definition at line 401 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_FASTSLEW_DAT _BIT(20)

Definition at line 403 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_HCLK_DLY ( n ) (((n) & 0x1F) << 14)

Definition at line 405 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_SENS_FACT ( n ) (((n) & 0x7) << 10)

Definition at line 407 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_SW_DDR_RESET _BIT(19)

Definition at line 404 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_USE_CAL _BIT(9)

Definition at line 408 of file platform.h.

#define LPC32XX_CLKPWR_SDRCLK_USE_DDR _BIT(1)

Definition at line 412 of file platform.h.

#define LPC32XX_CLKPWR_SELECT_RUN_MODE _BIT(2)

Definition at line 306 of file platform.h.

#define LPC32XX_CLKPWR_SFW_INT _PMREG(0x0A8)

Definition at line 162 of file platform.h.

#define LPC32XX_CLKPWR_SPI_CLK_CTRL _PMREG(0x0C4)

Definition at line 169 of file platform.h.

#define LPC32XX_CLKPWR_SPICLK_SET_SPI1CLK 0x04

Definition at line 533 of file platform.h.

#define LPC32XX_CLKPWR_SPICLK_SET_SPI1DATIO 0x08

Definition at line 532 of file platform.h.

#define LPC32XX_CLKPWR_SPICLK_SET_SPI2CLK 0x40

Definition at line 529 of file platform.h.

#define LPC32XX_CLKPWR_SPICLK_SET_SPI2DATIO 0x80

Definition at line 528 of file platform.h.

#define LPC32XX_CLKPWR_SPICLK_SPI1CLK_EN 0x01

Definition at line 535 of file platform.h.

#define LPC32XX_CLKPWR_SPICLK_SPI2CLK_EN 0x10

Definition at line 531 of file platform.h.

#define LPC32XX_CLKPWR_SPICLK_USE_SPI1 0x02

Definition at line 534 of file platform.h.

#define LPC32XX_CLKPWR_SPICLK_USE_SPI2 0x20

Definition at line 530 of file platform.h.

#define LPC32XX_CLKPWR_SSP_CLK_CTRL _PMREG(0x078)

Definition at line 157 of file platform.h.

#define LPC32XX_CLKPWR_SSPCTRL_DMA_SSP0RX _BIT(3)

Definition at line 420 of file platform.h.

#define LPC32XX_CLKPWR_SSPCTRL_DMA_SSP0TX _BIT(2)

Definition at line 421 of file platform.h.

#define LPC32XX_CLKPWR_SSPCTRL_DMA_SSP1RX _BIT(5)

Definition at line 418 of file platform.h.

#define LPC32XX_CLKPWR_SSPCTRL_DMA_SSP1TX _BIT(4)

Definition at line 419 of file platform.h.

#define LPC32XX_CLKPWR_SSPCTRL_SSPCLK0_EN _BIT(0)

Definition at line 423 of file platform.h.

#define LPC32XX_CLKPWR_SSPCTRL_SSPCLK1_EN _BIT(1)

Definition at line 422 of file platform.h.

#define LPC32XX_CLKPWR_STOP_MODE_CTRL _BIT(0)

Definition at line 308 of file platform.h.

#define LPC32XX_CLKPWR_SW_GET_ARG ( n ) (((n) & 0xFE) >> 1)

Definition at line 478 of file platform.h.

#define LPC32XX_CLKPWR_SW_INT ( n ) (_BIT(0) | (((n) & 0x7F) << 1))

Definition at line 477 of file platform.h.

#define LPC32XX_CLKPWR_SYSCLK_CTRL _PMREG(0x050)

Definition at line 148 of file platform.h.

#define LPC32XX_CLKPWR_SYSCLKEN_GPIO_EN _BIT(3)

Definition at line 305 of file platform.h.

#define LPC32XX_CLKPWR_SYSCLKEN_STATE_BIT _BIT(4)

Definition at line 304 of file platform.h.

#define LPC32XX_CLKPWR_SYSCTRL_BP_MASK (0x3FF << 2)

Definition at line 339 of file platform.h.

#define LPC32XX_CLKPWR_SYSCTRL_BP_TRIG ( n ) (((n) & 0x3FF) << 2)

Definition at line 338 of file platform.h.

#define LPC32XX_CLKPWR_SYSCTRL_PLL397_DIS _BIT(1)

Definition at line 324 of file platform.h.

#define LPC32XX_CLKPWR_SYSCTRL_PLL397_STS _BIT(0)

Definition at line 325 of file platform.h.

#define LPC32XX_CLKPWR_SYSCTRL_SYSCLKMUX _BIT(0)

Definition at line 341 of file platform.h.

#define LPC32XX_CLKPWR_SYSCTRL_USEPLL397 _BIT(1)

Definition at line 340 of file platform.h.

#define LPC32XX_CLKPWR_TEST_CLK_SEL _PMREG(0x0A4)

Definition at line 161 of file platform.h.

#define LPC32XX_CLKPWR_TEST_MODE _BIT(1)

Definition at line 332 of file platform.h.

#define LPC32XX_CLKPWR_TESTCLK1_SEL_MASK (0x3 << 5)

Definition at line 464 of file platform.h.

#define LPC32XX_CLKPWR_TESTCLK1_SEL_MOSC (0x2 << 5)

Definition at line 463 of file platform.h.

#define LPC32XX_CLKPWR_TESTCLK1_SEL_PERCLK (0x0 << 5)

Definition at line 461 of file platform.h.

#define LPC32XX_CLKPWR_TESTCLK1_SEL_RTC (0x1 << 5)

Definition at line 462 of file platform.h.

#define LPC32XX_CLKPWR_TESTCLK2_SEL_HCLK (0x0 << 1)

Definition at line 466 of file platform.h.

#define LPC32XX_CLKPWR_TESTCLK2_SEL_MASK (0x7 << 1)

Definition at line 471 of file platform.h.

#define LPC32XX_CLKPWR_TESTCLK2_SEL_MOSC (0x5 << 1)

Definition at line 469 of file platform.h.

#define LPC32XX_CLKPWR_TESTCLK2_SEL_PERCLK (0x1 << 1)

Definition at line 467 of file platform.h.

#define LPC32XX_CLKPWR_TESTCLK2_SEL_PLL397 (0x7 << 1)

Definition at line 470 of file platform.h.

#define LPC32XX_CLKPWR_TESTCLK2_SEL_USBCLK (0x2 << 1)

Definition at line 468 of file platform.h.

#define LPC32XX_CLKPWR_TESTCLK_TESTCLK1_EN _BIT(4)

Definition at line 465 of file platform.h.

#define LPC32XX_CLKPWR_TESTCLK_TESTCLK2_EN _BIT(0)

Definition at line 472 of file platform.h.

#define LPC32XX_CLKPWR_TIMER_CLK_CTRL _PMREG(0x0BC)

Definition at line 167 of file platform.h.

#define LPC32XX_CLKPWR_TIMERS_PWMS_CLK_CTRL_1 _PMREG(0x0C0)

Definition at line 168 of file platform.h.

#define LPC32XX_CLKPWR_TMRPWMCLK_PWM3_EN 0x01

Definition at line 523 of file platform.h.

#define LPC32XX_CLKPWR_TMRPWMCLK_PWM4_EN 0x02

Definition at line 522 of file platform.h.

#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER0_EN 0x04

Definition at line 521 of file platform.h.

#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER1_EN 0x08

Definition at line 520 of file platform.h.

#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER2_EN 0x10

Definition at line 519 of file platform.h.

#define LPC32XX_CLKPWR_TMRPWMCLK_TIMER3_EN 0x20

Definition at line 518 of file platform.h.

#define LPC32XX_CLKPWR_UART3_CLK_CTRL _PMREG(0x0D0)

Definition at line 171 of file platform.h.

#define LPC32XX_CLKPWR_UART4_CLK_CTRL _PMREG(0x0D4)

Definition at line 172 of file platform.h.

#define LPC32XX_CLKPWR_UART5_CLK_CTRL _PMREG(0x0D8)

Definition at line 173 of file platform.h.

#define LPC32XX_CLKPWR_UART6_CLK_CTRL _PMREG(0x0DC)

Definition at line 174 of file platform.h.

#define LPC32XX_CLKPWR_UART_CLK_CTRL _PMREG(0x0E4)

Definition at line 176 of file platform.h.

#define LPC32XX_CLKPWR_UART_USE_HCLK _BIT(16)

Definition at line 553 of file platform.h.

#define LPC32XX_CLKPWR_UART_X_DIV ( x ) (((x) & 0xFF) << 8)

Definition at line 552 of file platform.h.

#define LPC32XX_CLKPWR_UART_Y_DIV ( y ) ((y) & 0xFF)

Definition at line 551 of file platform.h.

#define LPC32XX_CLKPWR_UARTCLKCTRL_UART3_EN _BIT(0)

Definition at line 567 of file platform.h.

#define LPC32XX_CLKPWR_UARTCLKCTRL_UART4_EN _BIT(1)

Definition at line 566 of file platform.h.

#define LPC32XX_CLKPWR_UARTCLKCTRL_UART5_EN _BIT(2)

Definition at line 565 of file platform.h.

#define LPC32XX_CLKPWR_UARTCLKCTRL_UART6_EN _BIT(3)

Definition at line 564 of file platform.h.

#define LPC32XX_CLKPWR_UPD_SDRAM_SELF_RFSH _BIT(8)

Definition at line 301 of file platform.h.

#define LPC32XX_CLKPWR_USB_CTRL _PMREG(0x064)

Definition at line 152 of file platform.h.

#define LPC32XX_CLKPWR_USBCLK_PDIV _PMREG(0x01C)

Definition at line 135 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_BUS_KEEPER (0x1 << 19)

Definition at line 385 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_CCO_BYPASS _BIT(15)

Definition at line 390 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_CLK_EN1 _BIT(17)

Definition at line 388 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_CLK_EN2 _BIT(18)

Definition at line 387 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_FDBK_PLUS1 ( n ) (((n) & 0xFF) << 1)

Definition at line 395 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_FDBK_SEL_FCLK _BIT(13)

Definition at line 392 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_HCLK_EN _BIT(24)

Definition at line 380 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_PD_ADD (0x3 << 19)

Definition at line 386 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_PLL_PWRUP _BIT(16)

Definition at line 389 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_PLL_STS _BIT(0)

Definition at line 396 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_POSTDIV_2POW ( n ) (((n) & 0x3) << 11)

Definition at line 393 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_POSTDIV_BYPASS _BIT(14)

Definition at line 391 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_PREDIV_PLUS1 ( n ) (((n) & 0x3) << 9)

Definition at line 394 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_PU_ADD (0x0 << 19)

Definition at line 384 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_USBDVND_EN _BIT(22)

Definition at line 382 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_USBHSTND_EN _BIT(21)

Definition at line 383 of file platform.h.

#define LPC32XX_CLKPWR_USBCTRL_USBI2C_EN _BIT(23)

Definition at line 381 of file platform.h.

#define LPC32XX_CLKPWR_USBPDIV_PLL_MASK 0xF

Definition at line 230 of file platform.h.

#define LPC32XX_CLKPWR_VFP_CLOCK_ENABLE_BIT _BIT(4)

Definition at line 184 of file platform.h.

#define LPC32XX_CLOCK_OSC_FREQ 32768

Definition at line 125 of file platform.h.

#define LPC32XX_DEBUG_CTRL_BASE 0x40040000

Definition at line 74 of file platform.h.

#define LPC32XX_DMA_BASE 0x31000000

Definition at line 43 of file platform.h.

#define LPC32XX_EMC_BASE 0x31080000

Definition at line 50 of file platform.h.

#define LPC32XX_EMC_CS0_BASE 0xE0000000

Definition at line 110 of file platform.h.

#define LPC32XX_EMC_CS1_BASE 0xE1000000

Definition at line 111 of file platform.h.

#define LPC32XX_EMC_CS2_BASE 0xE2000000

Definition at line 112 of file platform.h.

#define LPC32XX_EMC_CS3_BASE 0xE3000000

Definition at line 113 of file platform.h.

#define LPC32XX_EMC_DYCS0_BASE 0x80000000

Definition at line 118 of file platform.h.

#define LPC32XX_EMC_DYCS1_BASE 0xA0000000

Definition at line 119 of file platform.h.

#define LPC32XX_ETB_CFG_BASE 0x310C0000

Definition at line 51 of file platform.h.

#define LPC32XX_ETB_DATA_BASE 0x310E0000

Definition at line 52 of file platform.h.

#define LPC32XX_ETHERNET_BASE 0x31060000

Definition at line 49 of file platform.h.

#define LPC32XX_FABAPB_SIZE 0x000A5000

Definition at line 99 of file platform.h.

#define LPC32XX_FABAPB_START LPC32XX_CLK_PM_BASE

Definition at line 98 of file platform.h.

#define LPC32XX_GPIO_BASE 0x40028000

Definition at line 68 of file platform.h.

#define LPC32XX_GPIO_P0_MUX_CLR _GPREG(0x124)

Definition at line 688 of file platform.h.

#define LPC32XX_GPIO_P0_MUX_SET _GPREG(0x120)

Definition at line 687 of file platform.h.

#define LPC32XX_GPIO_P0_MUX_STATE _GPREG(0x128)

Definition at line 689 of file platform.h.

#define LPC32XX_GPIO_P1_MUX_CLR _GPREG(0x134)

Definition at line 691 of file platform.h.

#define LPC32XX_GPIO_P1_MUX_SET _GPREG(0x130)

Definition at line 690 of file platform.h.

#define LPC32XX_GPIO_P1_MUX_STATE _GPREG(0x138)

Definition at line 692 of file platform.h.

#define LPC32XX_GPIO_P2_MUX_CLR _GPREG(0x02C)

Definition at line 694 of file platform.h.

#define LPC32XX_GPIO_P2_MUX_SET _GPREG(0x028)

Definition at line 693 of file platform.h.

#define LPC32XX_GPIO_P2_MUX_STATE _GPREG(0x030)

Definition at line 695 of file platform.h.

#define LPC32XX_GPIO_P3_MUX_CLR _GPREG(0x114)

Definition at line 685 of file platform.h.

#define LPC32XX_GPIO_P3_MUX_SET _GPREG(0x110)

Definition at line 684 of file platform.h.

#define LPC32XX_GPIO_P3_MUX_STATE _GPREG(0x118)

Definition at line 686 of file platform.h.

#define LPC32XX_GPIO_P_MUX_CLR _GPREG(0x104)

Definition at line 682 of file platform.h.

#define LPC32XX_GPIO_P_MUX_SET _GPREG(0x100)

Definition at line 681 of file platform.h.

#define LPC32XX_GPIO_P_MUX_STATE _GPREG(0x108)

Definition at line 683 of file platform.h.

#define LPC32XX_HS_UART1_BASE 0x40014000

Definition at line 63 of file platform.h.

#define LPC32XX_HS_UART2_BASE 0x40018000

Definition at line 64 of file platform.h.

#define LPC32XX_HS_UART7_BASE 0x4001C000

Definition at line 65 of file platform.h.

#define LPC32XX_HSTIM_BASE 0x40038000

Definition at line 72 of file platform.h.

#define LPC32XX_I2C1_BASE 0x400A0000

Definition at line 92 of file platform.h.

#define LPC32XX_I2C2_BASE 0x400A8000

Definition at line 93 of file platform.h.

#define LPC32XX_I2S0_BASE 0x20094000

Definition at line 33 of file platform.h.

#define LPC32XX_I2S1_BASE 0x2009C000

Definition at line 35 of file platform.h.

#define LPC32XX_INTC_ACT_TYPE ( x ) io_p2v((x) + 0x10)

Definition at line 588 of file platform.h.

#define LPC32XX_INTC_MASK ( x ) io_p2v((x) + 0x00)

Definition at line 584 of file platform.h.

#define LPC32XX_INTC_POLAR ( x ) io_p2v((x) + 0x0C)

Definition at line 587 of file platform.h.

#define LPC32XX_INTC_RAW_STAT ( x ) io_p2v((x) + 0x04)

Definition at line 585 of file platform.h.

#define LPC32XX_INTC_STAT ( x ) io_p2v((x) + 0x08)

Definition at line 586 of file platform.h.

#define LPC32XX_INTC_TYPE ( x ) io_p2v((x) + 0x14)

Definition at line 589 of file platform.h.

#define LPC32XX_IRAM_BASE 0x08000000

Definition at line 104 of file platform.h.

#define LPC32XX_IROM_BASE 0x0C000000

Definition at line 105 of file platform.h.

#define LPC32XX_KSCAN_BASE 0x40050000

Definition at line 78 of file platform.h.

#define LPC32XX_LCD_BASE 0x31040000

Definition at line 48 of file platform.h.

#define LPC32XX_MAIN_OSC_FREQ 13000000

Definition at line 124 of file platform.h.

#define LPC32XX_MIC_BASE 0x40008000

Definition at line 60 of file platform.h.

#define LPC32XX_MLC_BASE 0x200A8000

Definition at line 36 of file platform.h.

#define LPC32XX_MSTIM_BASE 0x40034000

Definition at line 71 of file platform.h.

#define LPC32XX_OTG_I2C_BASE 0x31020300

Definition at line 47 of file platform.h.

#define LPC32XX_PWM1_BASE 0x4005C000

Definition at line 81 of file platform.h.

#define LPC32XX_PWM2_BASE 0x4005C004

Definition at line 82 of file platform.h.

#define LPC32XX_PWM3_BASE 0x4002C000

Definition at line 69 of file platform.h.

#define LPC32XX_PWM4_BASE 0x40030000

Definition at line 70 of file platform.h.

#define LPC32XX_RT_IRTX6_INV_EN _BIT(4)

Definition at line 659 of file platform.h.

#define LPC32XX_RT_IRTX6_INV_MIR_EN _BIT(3)

Definition at line 660 of file platform.h.

#define LPC32XX_RT_RX_IRPULSE_3_16_115K _BIT(2)

Definition at line 661 of file platform.h.

#define LPC32XX_RT_TX_IRPULSE_3_16_115K _BIT(1)

Definition at line 662 of file platform.h.

#define LPC32XX_RTC_BASE 0x40024000

Definition at line 66 of file platform.h.

#define LPC32XX_RTC_RAM_BASE 0x40024080

Definition at line 67 of file platform.h.

#define LPC32XX_SD_BASE 0x20098000

Definition at line 34 of file platform.h.

#define LPC32XX_SIC1_BASE 0x4000C000

Definition at line 61 of file platform.h.

#define LPC32XX_SIC2_BASE 0x40010000

Definition at line 62 of file platform.h.

#define LPC32XX_SLC_BASE 0x20020000

Definition at line 28 of file platform.h.

#define LPC32XX_SPI1_BASE 0x20088000

Definition at line 30 of file platform.h.

#define LPC32XX_SPI2_BASE 0x20090000

Definition at line 32 of file platform.h.

#define LPC32XX_SSP0_BASE 0x20084000

Definition at line 29 of file platform.h.

#define LPC32XX_SSP1_BASE 0x2008C000

Definition at line 31 of file platform.h.

#define LPC32XX_TIMER0_BASE 0x40044000

Definition at line 75 of file platform.h.

#define LPC32XX_TIMER1_BASE 0x4004C000

Definition at line 77 of file platform.h.

#define LPC32XX_TIMER2_BASE 0x40058000

Definition at line 80 of file platform.h.

#define LPC32XX_TIMER3_BASE 0x40060000

Definition at line 83 of file platform.h.

#define LPC32XX_TIMER_CCR ( x ) io_p2v((x) + 0x28)

Definition at line 604 of file platform.h.

#define LPC32XX_TIMER_CNTR_CAPT_BIT ( n ) (1 << (4 + ((n) & 0x3)))

Definition at line 616 of file platform.h.

#define LPC32XX_TIMER_CNTR_MCR_MTCH ( n ) (0x1 << ((n) * 3))

Definition at line 627 of file platform.h.

#define LPC32XX_TIMER_CNTR_MCR_RESET ( n ) (0x1 << (((n) * 3) + 1))

Definition at line 628 of file platform.h.

#define LPC32XX_TIMER_CNTR_MCR_STOP ( n ) (0x1 << (((n) * 3) + 2))

Definition at line 629 of file platform.h.

#define LPC32XX_TIMER_CNTR_MTCH_BIT ( n ) (1 << ((n) & 0x3))

Definition at line 615 of file platform.h.

#define LPC32XX_TIMER_CNTR_TCR_EN 0x1

Definition at line 621 of file platform.h.

#define LPC32XX_TIMER_CNTR_TCR_RESET 0x2

Definition at line 622 of file platform.h.

#define LPC32XX_TIMER_CR0 ( x ) io_p2v((x) + 0x2C)

Definition at line 605 of file platform.h.

#define LPC32XX_TIMER_CR1 ( x ) io_p2v((x) + 0x30)

Definition at line 606 of file platform.h.

#define LPC32XX_TIMER_CR2 ( x ) io_p2v((x) + 0x34)

Definition at line 607 of file platform.h.

#define LPC32XX_TIMER_CR3 ( x ) io_p2v((x) + 0x38)

Definition at line 608 of file platform.h.

#define LPC32XX_TIMER_CTCR ( x ) io_p2v((x) + 0x70)

Definition at line 610 of file platform.h.

#define LPC32XX_TIMER_EMR ( x ) io_p2v((x) + 0x3C)

Definition at line 609 of file platform.h.

#define LPC32XX_TIMER_IR ( x ) io_p2v((x) + 0x00)

Definition at line 594 of file platform.h.

#define LPC32XX_TIMER_MCR ( x ) io_p2v((x) + 0x14)

Definition at line 599 of file platform.h.

#define LPC32XX_TIMER_MR0 ( x ) io_p2v((x) + 0x18)

Definition at line 600 of file platform.h.

#define LPC32XX_TIMER_MR1 ( x ) io_p2v((x) + 0x1C)

Definition at line 601 of file platform.h.

#define LPC32XX_TIMER_MR2 ( x ) io_p2v((x) + 0x20)

Definition at line 602 of file platform.h.

#define LPC32XX_TIMER_MR3 ( x ) io_p2v((x) + 0x24)

Definition at line 603 of file platform.h.

#define LPC32XX_TIMER_PC ( x ) io_p2v((x) + 0x10)

Definition at line 598 of file platform.h.

#define LPC32XX_TIMER_PR ( x ) io_p2v((x) + 0x0C)

Definition at line 597 of file platform.h.

#define LPC32XX_TIMER_TC ( x ) io_p2v((x) + 0x08)

Definition at line 596 of file platform.h.

#define LPC32XX_TIMER_TCR ( x ) io_p2v((x) + 0x04)

Definition at line 595 of file platform.h.

#define LPC32XX_UART3_BASE 0x40080000

Definition at line 88 of file platform.h.

#define LPC32XX_UART4_BASE 0x40088000

Definition at line 89 of file platform.h.

#define LPC32XX_UART5_BASE 0x40090000

Definition at line 90 of file platform.h.

#define LPC32XX_UART6_BASE 0x40098000

Definition at line 91 of file platform.h.

#define LPC32XX_UART_CLKMODE_AUTO 0x2

Definition at line 673 of file platform.h.

#define LPC32XX_UART_CLKMODE_LOAD	(	m,
		u
	)	((m) << ((((u) - 3) * 2) + 4))

Definition at line 675 of file platform.h.

#define LPC32XX_UART_CLKMODE_MASK ( u ) (0x3 << ((((u) - 3) * 2) + 4))

Definition at line 674 of file platform.h.

#define LPC32XX_UART_CLKMODE_OFF 0x0

Definition at line 671 of file platform.h.

#define LPC32XX_UART_CLKMODE_ON 0x1

Definition at line 672 of file platform.h.

#define LPC32XX_UART_CTRL_BASE 0x40054000

Definition at line 79 of file platform.h.

#define LPC32XX_UART_DLL_FIFO ( x ) io_p2v((x) + 0x00)

Definition at line 634 of file platform.h.

#define LPC32XX_UART_DLM_IER ( x ) io_p2v((x) + 0x04)

Definition at line 635 of file platform.h.

#define LPC32XX_UART_ENABLED_CLKS_ANY _BIT(14)

Definition at line 670 of file platform.h.

#define LPC32XX_UART_ENABLED_CLOCK	(	n,
		u
	)	(((n) >> (16 + (u))) & 0x1)

Definition at line 669 of file platform.h.

#define LPC32XX_UART_ENABLED_CLOCKS ( n ) (((n) >> 16) & 0x7F)

Definition at line 668 of file platform.h.

#define LPC32XX_UART_HDPX_EN _BIT(9)

Definition at line 657 of file platform.h.

#define LPC32XX_UART_IIR_FCR ( x ) io_p2v((x) + 0x08)

Definition at line 636 of file platform.h.

#define LPC32XX_UART_IRRX6_INV_EN _BIT(10)

Definition at line 656 of file platform.h.

#define LPC32XX_UART_LCR ( x ) io_p2v((x) + 0x0C)

Definition at line 637 of file platform.h.

#define LPC32XX_UART_LSR ( x ) io_p2v((x) + 0x14)

Definition at line 639 of file platform.h.

#define LPC32XX_UART_MODEM_CTRL ( x ) io_p2v((x) + 0x10)

Definition at line 638 of file platform.h.

#define LPC32XX_UART_MODEM_STATUS ( x ) io_p2v((x) + 0x18)

Definition at line 640 of file platform.h.

#define LPC32XX_UART_RXLEV ( x ) io_p2v((x) + 0x1C)

Definition at line 641 of file platform.h.

#define LPC32XX_UART_U3_MD_CTRL_EN _BIT(11)

Definition at line 655 of file platform.h.

#define LPC32XX_UART_U5_ROUTE_TO_USB _BIT(0)

Definition at line 663 of file platform.h.

#define LPC32XX_UART_UART6_IRDAMOD_BYPASS _BIT(5)

Definition at line 658 of file platform.h.

#define LPC32XX_UARTCTL_CLKMODE _UCREG(0x04)

Definition at line 649 of file platform.h.

#define LPC32XX_UARTCTL_CLOOP _UCREG(0x08)

Definition at line 650 of file platform.h.

#define LPC32XX_UARTCTL_CTRL _UCREG(0x00)

Definition at line 648 of file platform.h.

#define LPC32XX_USB_BASE 0x31020000

Definition at line 44 of file platform.h.

#define LPC32XX_USB_OTG_AHB_M_CLOCK_ON _BIT(4)

Definition at line 705 of file platform.h.

#define LPC32XX_USB_OTG_BASE 0x31020000

Definition at line 46 of file platform.h.

#define LPC32XX_USB_OTG_CLK_CTRL _OTGREG(0xFF4)

Definition at line 701 of file platform.h.

#define LPC32XX_USB_OTG_CLK_STAT _OTGREG(0xFF8)

Definition at line 702 of file platform.h.

#define LPC32XX_USB_OTG_DEV_CLOCK_ON _BIT(1)

Definition at line 708 of file platform.h.

#define LPC32XX_USB_OTG_HOST_CLOCK_ON _BIT(0)

Definition at line 709 of file platform.h.

#define LPC32XX_USB_OTG_I2C_CLOCK_ON _BIT(2)

Definition at line 707 of file platform.h.

#define LPC32XX_USB_OTG_OTG_CLOCK_ON _BIT(3)

Definition at line 706 of file platform.h.

#define LPC32XX_USBH_BASE 0x31020000

Definition at line 45 of file platform.h.

#define LPC32XX_WDTIM_BASE 0x4003C000

Definition at line 73 of file platform.h.

Macros

Macro Definition Documentation