Linux Kernel
3.7.1
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#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/clockchips.h>
#include <linux/clk.h>
#include <linux/jiffies.h>
#include <linux/err.h>
#include <asm/mach/time.h>
#include <asm/sched_clock.h>
Go to the source code of this file.
Macros | |
#define | MTU_IMSC 0x00 /* Interrupt mask set/clear */ |
#define | MTU_RIS 0x04 /* Raw interrupt status */ |
#define | MTU_MIS 0x08 /* Masked interrupt status */ |
#define | MTU_ICR 0x0C /* Interrupt clear register */ |
#define | MTU_LR(x) (0x10 + 0x10 * (x) + 0x00) /* Load value */ |
#define | MTU_VAL(x) (0x10 + 0x10 * (x) + 0x04) /* Current value */ |
#define | MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */ |
#define | MTU_BGLR(x) (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */ |
#define | MTU_CRn_ENA 0x80 |
#define | MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */ |
#define | MTU_CRn_PRESCALE_MASK 0x0c |
#define | MTU_CRn_PRESCALE_1 0x00 |
#define | MTU_CRn_PRESCALE_16 0x04 |
#define | MTU_CRn_PRESCALE_256 0x08 |
#define | MTU_CRn_32BITS 0x02 |
#define | MTU_CRn_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR*/ |
#define | MTU_ITCR 0xff0 |
#define | MTU_ITOP 0xff4 |
#define | MTU_PERIPH_ID0 0xfe0 |
#define | MTU_PERIPH_ID1 0xfe4 |
#define | MTU_PERIPH_ID2 0xfe8 |
#define | MTU_PERIPH_ID3 0xfeC |
#define | MTU_PCELL0 0xff0 |
#define | MTU_PCELL1 0xff4 |
#define | MTU_PCELL2 0xff8 |
#define | MTU_PCELL3 0xffC |
Functions | |
void | nmdk_clkevt_reset (void) |
void | nmdk_clksrc_reset (void) |
void __init | nmdk_timer_init (void __iomem *base) |
#define MTU_BGLR | ( | x | ) | (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */ |
#define MTU_CR | ( | x | ) | (0x10 + 0x10 * (x) + 0x08) /* Control reg */ |
#define MTU_CRn_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR*/ |
#define MTU_LR | ( | x | ) | (0x10 + 0x10 * (x) + 0x00) /* Load value */ |
#define MTU_VAL | ( | x | ) | (0x10 + 0x10 * (x) + 0x04) /* Current value */ |