Linux Kernel  3.7.1
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pgtable.h
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1 /*
2  * CRIS pgtable.h - macros and functions to manipulate page tables.
3  */
4 
5 #ifndef _CRIS_PGTABLE_H
6 #define _CRIS_PGTABLE_H
7 
8 #include <asm/page.h>
10 
11 #ifndef __ASSEMBLY__
12 #include <linux/sched.h>
13 #include <asm/mmu.h>
14 #endif
15 #include <arch/pgtable.h>
16 
17 /*
18  * The Linux memory management assumes a three-level page table setup. On
19  * CRIS, we use that, but "fold" the mid level into the top-level page
20  * table. Since the MMU TLB is software loaded through an interrupt, it
21  * supports any page table structure, so we could have used a three-level
22  * setup, but for the amounts of memory we normally use, a two-level is
23  * probably more efficient.
24  *
25  * This file contains the functions and defines necessary to modify and use
26  * the CRIS page table tree.
27  */
28 #ifndef __ASSEMBLY__
29 extern void paging_init(void);
30 #endif
31 
32 /* Certain architectures need to do special things when pte's
33  * within a page table are directly modified. Thus, the following
34  * hook is made available.
35  */
36 #define set_pte(pteptr, pteval) ((*(pteptr)) = (pteval))
37 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
38 
39 /*
40  * (pmds are folded into pgds so this doesn't get actually called,
41  * but the define is needed for a generic inline function.)
42  */
43 #define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
44 #define set_pgu(pudptr, pudval) (*(pudptr) = pudval)
45 
46 /* PGDIR_SHIFT determines the size of the area a second-level page table can
47  * map. It is equal to the page size times the number of PTE's that fit in
48  * a PMD page. A PTE is 4-bytes in CRIS. Hence the following number.
49  */
50 
51 #define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-2))
52 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
53 #define PGDIR_MASK (~(PGDIR_SIZE-1))
54 
55 /*
56  * entries per page directory level: we use a two-level, so
57  * we don't really have any PMD directory physically.
58  * pointers are 4 bytes so we can use the page size and
59  * divide it by 4 (shift by 2).
60  */
61 #define PTRS_PER_PTE (1UL << (PAGE_SHIFT-2))
62 #define PTRS_PER_PGD (1UL << (PAGE_SHIFT-2))
63 
64 /* calculate how many PGD entries a user-level program can use
65  * the first mappable virtual address is 0
66  * (TASK_SIZE is the maximum virtual address space)
67  */
68 
69 #define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
70 #define FIRST_USER_ADDRESS 0
71 
72 /* zero page used for uninitialized stuff */
73 #ifndef __ASSEMBLY__
74 extern unsigned long empty_zero_page;
75 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
76 #endif
77 
78 /* number of bits that fit into a memory pointer */
79 #define BITS_PER_PTR (8*sizeof(unsigned long))
80 
81 /* to align the pointer to a pointer address */
82 #define PTR_MASK (~(sizeof(void*)-1))
83 
84 /* sizeof(void*)==1<<SIZEOF_PTR_LOG2 */
85 /* 64-bit machines, beware! SRB. */
86 #define SIZEOF_PTR_LOG2 2
87 
88 /* to find an entry in a page-table */
89 #define PAGE_PTR(address) \
90 ((unsigned long)(address)>>(PAGE_SHIFT-SIZEOF_PTR_LOG2)&PTR_MASK&~PAGE_MASK)
91 
92 /* to set the page-dir */
93 #define SET_PAGE_DIR(tsk,pgdir)
94 
95 #define pte_none(x) (!pte_val(x))
96 #define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
97 #define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
98 
99 #define pmd_none(x) (!pmd_val(x))
100 /* by removing the _PAGE_KERNEL bit from the comparison, the same pmd_bad
101  * works for both _PAGE_TABLE and _KERNPG_TABLE pmd entries.
102  */
103 #define pmd_bad(x) ((pmd_val(x) & (~PAGE_MASK & ~_PAGE_KERNEL)) != _PAGE_TABLE)
104 #define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
105 #define pmd_clear(xp) do { pmd_val(*(xp)) = 0; } while (0)
106 
107 #ifndef __ASSEMBLY__
108 
109 /*
110  * The following only work if pte_present() is true.
111  * Undefined behaviour if not..
112  */
113 
114 static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
115 static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
116 static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
117 static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
118 static inline int pte_special(pte_t pte) { return 0; }
119 
120 static inline pte_t pte_wrprotect(pte_t pte)
121 {
123  return pte;
124 }
125 
126 static inline pte_t pte_mkclean(pte_t pte)
127 {
129  return pte;
130 }
131 
132 static inline pte_t pte_mkold(pte_t pte)
133 {
135  return pte;
136 }
137 
138 static inline pte_t pte_mkwrite(pte_t pte)
139 {
140  pte_val(pte) |= _PAGE_WRITE;
141  if (pte_val(pte) & _PAGE_MODIFIED)
142  pte_val(pte) |= _PAGE_SILENT_WRITE;
143  return pte;
144 }
145 
146 static inline pte_t pte_mkdirty(pte_t pte)
147 {
148  pte_val(pte) |= _PAGE_MODIFIED;
149  if (pte_val(pte) & _PAGE_WRITE)
150  pte_val(pte) |= _PAGE_SILENT_WRITE;
151  return pte;
152 }
153 
154 static inline pte_t pte_mkyoung(pte_t pte)
155 {
156  pte_val(pte) |= _PAGE_ACCESSED;
157  if (pte_val(pte) & _PAGE_READ)
158  {
159  pte_val(pte) |= _PAGE_SILENT_READ;
160  if ((pte_val(pte) & (_PAGE_WRITE | _PAGE_MODIFIED)) ==
162  pte_val(pte) |= _PAGE_SILENT_WRITE;
163  }
164  return pte;
165 }
166 static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
167 
168 /*
169  * Conversion functions: convert a page and protection to a page entry,
170  * and a page entry and page directory to the page they refer to.
171  */
172 
173 /* What actually goes as arguments to the various functions is less than
174  * obvious, but a rule of thumb is that struct page's goes as struct page *,
175  * really physical DRAM addresses are unsigned long's, and DRAM "virtual"
176  * addresses (the 0xc0xxxxxx's) goes as void *'s.
177  */
178 
179 static inline pte_t __mk_pte(void * page, pgprot_t pgprot)
180 {
181  pte_t pte;
182  /* the PTE needs a physical address */
183  pte_val(pte) = __pa(page) | pgprot_val(pgprot);
184  return pte;
185 }
186 
187 #define mk_pte(page, pgprot) __mk_pte(page_address(page), (pgprot))
188 
189 #define mk_pte_phys(physpage, pgprot) \
190 ({ \
191  pte_t __pte; \
192  \
193  pte_val(__pte) = (physpage) + pgprot_val(pgprot); \
194  __pte; \
195 })
196 
197 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
198 { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
199 
200 #define pgprot_noncached(prot) __pgprot((pgprot_val(prot) | _PAGE_NO_CACHE))
201 
202 
203 /* pte_val refers to a page in the 0x4xxxxxxx physical DRAM interval
204  * __pte_page(pte_val) refers to the "virtual" DRAM interval
205  * pte_pagenr refers to the page-number counted starting from the virtual DRAM start
206  */
207 
208 static inline unsigned long __pte_page(pte_t pte)
209 {
210  /* the PTE contains a physical address */
211  return (unsigned long)__va(pte_val(pte) & PAGE_MASK);
212 }
213 
214 #define pte_pagenr(pte) ((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT)
215 
216 /* permanent address of a page */
217 
218 #define __page_address(page) (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT))
219 #define pte_page(pte) (mem_map+pte_pagenr(pte))
220 
221 /* only the pte's themselves need to point to physical DRAM (see above)
222  * the pagetable links are purely handled within the kernel SW and thus
223  * don't need the __pa and __va transformations.
224  */
225 
226 static inline void pmd_set(pmd_t * pmdp, pte_t * ptep)
227 { pmd_val(*pmdp) = _PAGE_TABLE | (unsigned long) ptep; }
228 
229 #define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
230 #define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
231 
232 /* to find an entry in a page-table-directory. */
233 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
234 
235 /* to find an entry in a page-table-directory */
236 static inline pgd_t * pgd_offset(const struct mm_struct *mm, unsigned long address)
237 {
238  return mm->pgd + pgd_index(address);
239 }
240 
241 /* to find an entry in a kernel page-table-directory */
242 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
243 
244 /* Find an entry in the third-level page table.. */
245 #define __pte_offset(address) \
246  (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
247 #define pte_offset_kernel(dir, address) \
248  ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
249 #define pte_offset_map(dir, address) \
250  ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
251 
252 #define pte_unmap(pte) do { } while (0)
253 #define pte_pfn(x) ((unsigned long)(__va((x).pte)) >> PAGE_SHIFT)
254 #define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
255 
256 #define pte_ERROR(e) \
257  printk("%s:%d: bad pte %p(%08lx).\n", __FILE__, __LINE__, &(e), pte_val(e))
258 #define pgd_ERROR(e) \
259  printk("%s:%d: bad pgd %p(%08lx).\n", __FILE__, __LINE__, &(e), pgd_val(e))
260 
261 #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
262  remap_pfn_range(vma, vaddr, pfn, size, prot)
263 
264 
265 extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* defined in head.S */
266 
267 /*
268  * CRIS doesn't have any external MMU info: the kernel page
269  * tables contain all the necessary information.
270  *
271  * Actually I am not sure on what this could be used for.
272  */
273 static inline void update_mmu_cache(struct vm_area_struct * vma,
274  unsigned long address, pte_t *ptep)
275 {
276 }
277 
278 /* Encode and de-code a swap entry (must be !pte_none(e) && !pte_present(e)) */
279 /* Since the PAGE_PRESENT bit is bit 4, we can use the bits above */
280 
281 #define __swp_type(x) (((x).val >> 5) & 0x7f)
282 #define __swp_offset(x) ((x).val >> 12)
283 #define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 5) | ((offset) << 12) })
284 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
285 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
286 
287 #define kern_addr_valid(addr) (1)
288 
289 #include <asm-generic/pgtable.h>
290 
291 /*
292  * No page table caches to initialise
293  */
294 #define pgtable_cache_init() do { } while (0)
295 
296 #define pte_to_pgoff(x) (pte_val(x) >> 6)
297 #define pgoff_to_pte(x) __pte(((x) << 6) | _PAGE_FILE)
298 
299 typedef pte_t *pte_addr_t;
300 
301 #endif /* __ASSEMBLY__ */
302 #endif /* _CRIS_PGTABLE_H */