bif_dma_defs.h File Reference

Go to the source code of this file.

Data Structures
struct	reg_bif_dma_rw_ch0_ctrl
struct	reg_bif_dma_rw_ch0_addr
struct	reg_bif_dma_rw_ch0_start
struct	reg_bif_dma_rw_ch0_cnt
struct	reg_bif_dma_r_ch0_stat
struct	reg_bif_dma_rw_ch1_ctrl
struct	reg_bif_dma_rw_ch1_addr
struct	reg_bif_dma_rw_ch1_start
struct	reg_bif_dma_rw_ch1_cnt
struct	reg_bif_dma_r_ch1_stat
struct	reg_bif_dma_rw_ch2_ctrl
struct	reg_bif_dma_rw_ch2_addr
struct	reg_bif_dma_rw_ch2_start
struct	reg_bif_dma_rw_ch2_cnt
struct	reg_bif_dma_r_ch2_stat
struct	reg_bif_dma_rw_ch3_ctrl
struct	reg_bif_dma_rw_ch3_addr
struct	reg_bif_dma_rw_ch3_start
struct	reg_bif_dma_rw_ch3_cnt
struct	reg_bif_dma_r_ch3_stat
struct	reg_bif_dma_rw_intr_mask
struct	reg_bif_dma_rw_ack_intr
struct	reg_bif_dma_r_intr
struct	reg_bif_dma_r_masked_intr
struct	reg_bif_dma_rw_pin0_cfg
struct	reg_bif_dma_rw_pin1_cfg
struct	reg_bif_dma_rw_pin2_cfg
struct	reg_bif_dma_rw_pin3_cfg
struct	reg_bif_dma_rw_pin4_cfg
struct	reg_bif_dma_rw_pin5_cfg
struct	reg_bif_dma_rw_pin6_cfg
struct	reg_bif_dma_rw_pin7_cfg
struct	reg_bif_dma_r_pin_stat

Macros
#define	REG_RD(scope, inst, reg)
#define	REG_WR(scope, inst, reg, val)
#define	REG_RD_VECT(scope, inst, reg, index)
#define	REG_WR_VECT(scope, inst, reg, index, val)
#define	REG_RD_INT(scope, inst, reg)   REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
#define	REG_WR_INT(scope, inst, reg, val)   REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
#define	REG_RD_INT_VECT(scope, inst, reg, index)
#define	REG_WR_INT_VECT(scope, inst, reg, index, val)
#define	REG_TYPE_CONV(type, orgtype, val)   ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
#define	reg_page_size   8192
#define	REG_ADDR(scope, inst, reg)   ( (inst) + REG_RD_ADDR_##scope##_##reg )
#define	REG_ADDR_VECT(scope, inst, reg, index)
#define	REG_RD_ADDR_bif_dma_rw_ch0_ctrl   0
#define	REG_WR_ADDR_bif_dma_rw_ch0_ctrl   0
#define	REG_RD_ADDR_bif_dma_rw_ch0_addr   4
#define	REG_WR_ADDR_bif_dma_rw_ch0_addr   4
#define	REG_RD_ADDR_bif_dma_rw_ch0_start   8
#define	REG_WR_ADDR_bif_dma_rw_ch0_start   8
#define	REG_RD_ADDR_bif_dma_rw_ch0_cnt   12
#define	REG_WR_ADDR_bif_dma_rw_ch0_cnt   12
#define	REG_RD_ADDR_bif_dma_r_ch0_stat   16
#define	REG_RD_ADDR_bif_dma_rw_ch1_ctrl   32
#define	REG_WR_ADDR_bif_dma_rw_ch1_ctrl   32
#define	REG_RD_ADDR_bif_dma_rw_ch1_addr   36
#define	REG_WR_ADDR_bif_dma_rw_ch1_addr   36
#define	REG_RD_ADDR_bif_dma_rw_ch1_start   40
#define	REG_WR_ADDR_bif_dma_rw_ch1_start   40
#define	REG_RD_ADDR_bif_dma_rw_ch1_cnt   44
#define	REG_WR_ADDR_bif_dma_rw_ch1_cnt   44
#define	REG_RD_ADDR_bif_dma_r_ch1_stat   48
#define	REG_RD_ADDR_bif_dma_rw_ch2_ctrl   64
#define	REG_WR_ADDR_bif_dma_rw_ch2_ctrl   64
#define	REG_RD_ADDR_bif_dma_rw_ch2_addr   68
#define	REG_WR_ADDR_bif_dma_rw_ch2_addr   68
#define	REG_RD_ADDR_bif_dma_rw_ch2_start   72
#define	REG_WR_ADDR_bif_dma_rw_ch2_start   72
#define	REG_RD_ADDR_bif_dma_rw_ch2_cnt   76
#define	REG_WR_ADDR_bif_dma_rw_ch2_cnt   76
#define	REG_RD_ADDR_bif_dma_r_ch2_stat   80
#define	REG_RD_ADDR_bif_dma_rw_ch3_ctrl   96
#define	REG_WR_ADDR_bif_dma_rw_ch3_ctrl   96
#define	REG_RD_ADDR_bif_dma_rw_ch3_addr   100
#define	REG_WR_ADDR_bif_dma_rw_ch3_addr   100
#define	REG_RD_ADDR_bif_dma_rw_ch3_start   104
#define	REG_WR_ADDR_bif_dma_rw_ch3_start   104
#define	REG_RD_ADDR_bif_dma_rw_ch3_cnt   108
#define	REG_WR_ADDR_bif_dma_rw_ch3_cnt   108
#define	REG_RD_ADDR_bif_dma_r_ch3_stat   112
#define	REG_RD_ADDR_bif_dma_rw_intr_mask   128
#define	REG_WR_ADDR_bif_dma_rw_intr_mask   128
#define	REG_RD_ADDR_bif_dma_rw_ack_intr   132
#define	REG_WR_ADDR_bif_dma_rw_ack_intr   132
#define	REG_RD_ADDR_bif_dma_r_intr   136
#define	REG_RD_ADDR_bif_dma_r_masked_intr   140
#define	REG_RD_ADDR_bif_dma_rw_pin0_cfg   160
#define	REG_WR_ADDR_bif_dma_rw_pin0_cfg   160
#define	REG_RD_ADDR_bif_dma_rw_pin1_cfg   164
#define	REG_WR_ADDR_bif_dma_rw_pin1_cfg   164
#define	REG_RD_ADDR_bif_dma_rw_pin2_cfg   168
#define	REG_WR_ADDR_bif_dma_rw_pin2_cfg   168
#define	REG_RD_ADDR_bif_dma_rw_pin3_cfg   172
#define	REG_WR_ADDR_bif_dma_rw_pin3_cfg   172
#define	REG_RD_ADDR_bif_dma_rw_pin4_cfg   176
#define	REG_WR_ADDR_bif_dma_rw_pin4_cfg   176
#define	REG_RD_ADDR_bif_dma_rw_pin5_cfg   180
#define	REG_WR_ADDR_bif_dma_rw_pin5_cfg   180
#define	REG_RD_ADDR_bif_dma_rw_pin6_cfg   184
#define	REG_WR_ADDR_bif_dma_rw_pin6_cfg   184
#define	REG_RD_ADDR_bif_dma_rw_pin7_cfg   188
#define	REG_WR_ADDR_bif_dma_rw_pin7_cfg   188
#define	REG_RD_ADDR_bif_dma_r_pin_stat   192

Enumerations
enum	{   regk_bif_dma_as_master = 0x00000001, regk_bif_dma_as_slave = 0x00000001, regk_bif_dma_burst1 = 0x00000000, regk_bif_dma_burst8 = 0x00000001,   regk_bif_dma_bw16 = 0x00000001, regk_bif_dma_bw32 = 0x00000002, regk_bif_dma_bw8 = 0x00000000, regk_bif_dma_dack = 0x00000006,   regk_bif_dma_dack_inv = 0x00000007, regk_bif_dma_force = 0x00000001, regk_bif_dma_hi = 0x00000003, regk_bif_dma_inv = 0x00000003,   regk_bif_dma_lo = 0x00000002, regk_bif_dma_master = 0x00000001, regk_bif_dma_no = 0x00000000, regk_bif_dma_norm = 0x00000002,   regk_bif_dma_off = 0x00000000, regk_bif_dma_rw_ch0_ctrl_default = 0x00000000, regk_bif_dma_rw_ch0_start_default = 0x00000000, regk_bif_dma_rw_ch1_ctrl_default = 0x00000000,   regk_bif_dma_rw_ch1_start_default = 0x00000000, regk_bif_dma_rw_ch2_ctrl_default = 0x00000000, regk_bif_dma_rw_ch2_start_default = 0x00000000, regk_bif_dma_rw_ch3_ctrl_default = 0x00000000,   regk_bif_dma_rw_ch3_start_default = 0x00000000, regk_bif_dma_rw_intr_mask_default = 0x00000000, regk_bif_dma_rw_pin0_cfg_default = 0x00000000, regk_bif_dma_rw_pin1_cfg_default = 0x00000000,   regk_bif_dma_rw_pin2_cfg_default = 0x00000000, regk_bif_dma_rw_pin3_cfg_default = 0x00000000, regk_bif_dma_rw_pin4_cfg_default = 0x00000000, regk_bif_dma_rw_pin5_cfg_default = 0x00000000,   regk_bif_dma_rw_pin6_cfg_default = 0x00000000, regk_bif_dma_rw_pin7_cfg_default = 0x00000000, regk_bif_dma_slave = 0x00000002, regk_bif_dma_sreq = 0x00000006,   regk_bif_dma_sreq_inv = 0x00000007, regk_bif_dma_tc = 0x00000004, regk_bif_dma_tc_inv = 0x00000005, regk_bif_dma_yes = 0x00000001 }

Macro Definition Documentation

#define REG_ADDR	(		scope,
			inst,
			reg
	)		( (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 75 of file bif_dma_defs.h.

#define REG_ADDR_VECT	(		scope,
			inst,
			reg,
			index
	)

Value:

( (inst) + REG_RD_ADDR_##scope##_##reg + \
    (index) * STRIDE_##scope##_##reg )

Definition at line 80 of file bif_dma_defs.h.

#define reg_page_size   8192

Definition at line 71 of file bif_dma_defs.h.

#define REG_RD	(		scope,
			inst,
			reg
	)

Value:

REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 18 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_r_ch0_stat   16

Definition at line 135 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_r_ch1_stat   48

Definition at line 184 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_r_ch2_stat   80

Definition at line 234 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_r_ch3_stat   112

Definition at line 283 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_r_intr   136

Definition at line 315 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_r_masked_intr   140

Definition at line 325 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_r_pin_stat   192

Definition at line 427 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ack_intr   132

Definition at line 304 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch0_addr   4

Definition at line 110 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch0_cnt   12

Definition at line 126 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch0_ctrl   0

Definition at line 103 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch0_start   8

Definition at line 118 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch1_addr   36

Definition at line 159 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch1_cnt   44

Definition at line 175 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch1_ctrl   32

Definition at line 152 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch1_start   40

Definition at line 167 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch2_addr   68

Definition at line 209 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch2_cnt   76

Definition at line 225 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch2_ctrl   64

Definition at line 202 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch2_start   72

Definition at line 217 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch3_addr   100

Definition at line 258 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch3_cnt   108

Definition at line 274 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch3_ctrl   96

Definition at line 251 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_ch3_start   104

Definition at line 266 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_intr_mask   128

Definition at line 293 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_pin0_cfg   160

Definition at line 335 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_pin1_cfg   164

Definition at line 346 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_pin2_cfg   168

Definition at line 357 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_pin3_cfg   172

Definition at line 368 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_pin4_cfg   176

Definition at line 379 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_pin5_cfg   180

Definition at line 390 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_pin6_cfg   184

Definition at line 401 of file bif_dma_defs.h.

#define REG_RD_ADDR_bif_dma_rw_pin7_cfg   188

Definition at line 412 of file bif_dma_defs.h.

#define REG_RD_INT	(		scope,
			inst,
			reg
	)		REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )

Definition at line 44 of file bif_dma_defs.h.

#define REG_RD_INT_VECT	(		scope,
			inst,
			reg,
			index
	)

Value:

REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
        (index) * STRIDE_##scope##_##reg )

Definition at line 54 of file bif_dma_defs.h.

#define REG_RD_VECT	(		scope,
			inst,
			reg,
			index
	)

Value:

REG_READ( reg_##scope##_##reg, \
            (inst) + REG_RD_ADDR_##scope##_##reg + \
        (index) * STRIDE_##scope##_##reg )

Definition at line 30 of file bif_dma_defs.h.

#define REG_TYPE_CONV	(		type,
			orgtype,
			val
	)		( { union { orgtype o; type n; } r; r.o = val; r.n; } )

Definition at line 66 of file bif_dma_defs.h.

#define REG_WR	(		scope,
			inst,
			reg,
			val
	)

Value:

REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )

Definition at line 24 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ack_intr   132

Definition at line 305 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch0_addr   4

Definition at line 111 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch0_cnt   12

Definition at line 127 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch0_ctrl   0

Definition at line 104 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch0_start   8

Definition at line 119 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch1_addr   36

Definition at line 160 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch1_cnt   44

Definition at line 176 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch1_ctrl   32

Definition at line 153 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch1_start   40

Definition at line 168 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch2_addr   68

Definition at line 210 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch2_cnt   76

Definition at line 226 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch2_ctrl   64

Definition at line 203 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch2_start   72

Definition at line 218 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch3_addr   100

Definition at line 259 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch3_cnt   108

Definition at line 275 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch3_ctrl   96

Definition at line 252 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_ch3_start   104

Definition at line 267 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_intr_mask   128

Definition at line 294 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_pin0_cfg   160

Definition at line 336 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_pin1_cfg   164

Definition at line 347 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_pin2_cfg   168

Definition at line 358 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_pin3_cfg   172

Definition at line 369 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_pin4_cfg   176

Definition at line 380 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_pin5_cfg   180

Definition at line 391 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_pin6_cfg   184

Definition at line 402 of file bif_dma_defs.h.

#define REG_WR_ADDR_bif_dma_rw_pin7_cfg   188

Definition at line 413 of file bif_dma_defs.h.

#define REG_WR_INT	(		scope,
			inst,
			reg,
			val
	)		REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )

Definition at line 49 of file bif_dma_defs.h.

#define REG_WR_INT_VECT	(		scope,
			inst,
			reg,
			index,
			val
	)

Value:

REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
         (index) * STRIDE_##scope##_##reg, (val) )

Definition at line 60 of file bif_dma_defs.h.

#define REG_WR_VECT	(		scope,
			inst,
			reg,
			index,
			val
	)

Value:

REG_WRITE( reg_##scope##_##reg, \
             (inst) + REG_WR_ADDR_##scope##_##reg + \
         (index) * STRIDE_##scope##_##reg, (val) )

Definition at line 37 of file bif_dma_defs.h.

Enumeration Type Documentation

anonymous enum

Enumerator:

regk_bif_dma_as_master
regk_bif_dma_as_slave
regk_bif_dma_burst1
regk_bif_dma_burst8
regk_bif_dma_bw16
regk_bif_dma_bw32
regk_bif_dma_bw8
regk_bif_dma_dack
regk_bif_dma_dack_inv
regk_bif_dma_force
regk_bif_dma_hi
regk_bif_dma_inv
regk_bif_dma_lo
regk_bif_dma_master
regk_bif_dma_no
regk_bif_dma_norm
regk_bif_dma_off
regk_bif_dma_rw_ch0_ctrl_default
regk_bif_dma_rw_ch0_start_default
regk_bif_dma_rw_ch1_ctrl_default
regk_bif_dma_rw_ch1_start_default
regk_bif_dma_rw_ch2_ctrl_default
regk_bif_dma_rw_ch2_start_default
regk_bif_dma_rw_ch3_ctrl_default
regk_bif_dma_rw_ch3_start_default
regk_bif_dma_rw_intr_mask_default
regk_bif_dma_rw_pin0_cfg_default
regk_bif_dma_rw_pin1_cfg_default
regk_bif_dma_rw_pin2_cfg_default
regk_bif_dma_rw_pin3_cfg_default
regk_bif_dma_rw_pin4_cfg_default
regk_bif_dma_rw_pin5_cfg_default
regk_bif_dma_rw_pin6_cfg_default
regk_bif_dma_rw_pin7_cfg_default
regk_bif_dma_slave
regk_bif_dma_sreq
regk_bif_dma_sreq_inv
regk_bif_dma_tc
regk_bif_dma_tc_inv
regk_bif_dma_yes

Definition at line 431 of file bif_dma_defs.h.