setup.c File Reference

#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/m32r.h>
#include <asm/io.h>

Go to the source code of this file.

Macros
#define	irq2port(x)   (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))

Functions
void __init	init_IRQ (void)

Variables
icu_data_t	icu_data [NR_IRQS]

Macro Definition Documentation

#define irq2port

(

x

)

(M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))

Definition at line 17 of file setup.c.

Function Documentation

void __init init_IRQ

(

void

)

The hexagon core comes with a first-level interrupt controller with 32 total possible interrupts. When the core is embedded into different systems/platforms, it is typically wrapped by macro cells that provide one or more second-level interrupt controllers that are cascaded into one or more of the first-level interrupts handled here. The precise wiring of these other irqs varies from platform to platform, and are set up & configured in the platform-specific files.

The first-level interrupt controller is wrapped by the VM, which virtualizes the interrupt controller for us. It provides a very simple, fast & efficient API, and so the fasteoi handler is appropriate for this case.

Definition at line 65 of file setup.c.

Variable Documentation

icu_data_t icu_data[NR_IRQS]

Definition at line 19 of file setup.c.