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config.c
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1 /*
2  * arch/m68k/mvme16x/config.c
3  *
4  * Copyright (C) 1995 Richard Hirst [[email protected]]
5  *
6  * Based on:
7  *
8  * linux/amiga/config.c
9  *
10  * Copyright (C) 1993 Hamish Macdonald
11  *
12  * This file is subject to the terms and conditions of the GNU General Public
13  * License. See the file README.legal in the main directory of this archive
14  * for more details.
15  */
16 
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/seq_file.h>
21 #include <linux/tty.h>
22 #include <linux/console.h>
23 #include <linux/linkage.h>
24 #include <linux/init.h>
25 #include <linux/major.h>
26 #include <linux/genhd.h>
27 #include <linux/rtc.h>
28 #include <linux/interrupt.h>
29 #include <linux/module.h>
30 
31 #include <asm/bootinfo.h>
32 #include <asm/pgtable.h>
33 #include <asm/setup.h>
34 #include <asm/irq.h>
35 #include <asm/traps.h>
36 #include <asm/rtc.h>
37 #include <asm/machdep.h>
38 #include <asm/mvme16xhw.h>
39 
40 extern t_bdid mvme_bdid;
41 
42 static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
43 
44 static void mvme16x_get_model(char *model);
45 extern void mvme16x_sched_init(irq_handler_t handler);
46 extern unsigned long mvme16x_gettimeoffset (void);
47 extern int mvme16x_hwclk (int, struct rtc_time *);
48 extern int mvme16x_set_clock_mmss (unsigned long);
49 extern void mvme16x_reset (void);
50 
51 int bcd2int (unsigned char b);
52 
53 /* Save tick handler routine pointer, will point to xtime_update() in
54  * kernel/time/timekeeping.c, called via mvme16x_process_int() */
55 
56 static irq_handler_t tick_handler;
57 
58 
59 unsigned short mvme16x_config;
60 EXPORT_SYMBOL(mvme16x_config);
61 
62 
63 int mvme16x_parse_bootinfo(const struct bi_record *bi)
64 {
65  if (bi->tag == BI_VME_TYPE || bi->tag == BI_VME_BRDINFO)
66  return 0;
67  else
68  return 1;
69 }
70 
71 void mvme16x_reset(void)
72 {
73  printk ("\r\n\nCalled mvme16x_reset\r\n"
74  "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
75  /* The string of returns is to delay the reset until the whole
76  * message is output. Assert reset bit in GCSR */
77  *(volatile char *)0xfff40107 = 0x80;
78 }
79 
80 static void mvme16x_get_model(char *model)
81 {
82  p_bdid p = &mvme_bdid;
83  char suf[4];
84 
85  suf[1] = p->brdsuffix[0];
86  suf[2] = p->brdsuffix[1];
87  suf[3] = '\0';
88  suf[0] = suf[1] ? '-' : '\0';
89 
90  sprintf(model, "Motorola MVME%x%s", p->brdno, suf);
91 }
92 
93 
94 static void mvme16x_get_hardware_list(struct seq_file *m)
95 {
96  p_bdid p = &mvme_bdid;
97 
98  if (p->brdno == 0x0162 || p->brdno == 0x0172)
99  {
100  unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
101 
102  seq_printf (m, "VMEchip2 %spresent\n",
103  rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
104  seq_printf (m, "SCSI interface %spresent\n",
105  rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
106  seq_printf (m, "Ethernet i/f %spresent\n",
107  rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
108  }
109 }
110 
111 /*
112  * This function is called during kernel startup to initialize
113  * the mvme16x IRQ handling routines. Should probably ensure
114  * that the base vectors for the VMEChip2 and PCCChip2 are valid.
115  */
116 
117 static void __init mvme16x_init_IRQ (void)
118 {
119  m68k_setup_user_interrupt(VEC_USER, 192);
120 }
121 
122 #define pcc2chip ((volatile u_char *)0xfff42000)
123 #define PccSCCMICR 0x1d
124 #define PccSCCTICR 0x1e
125 #define PccSCCRICR 0x1f
126 #define PccTPIACKR 0x25
127 
128 #ifdef CONFIG_EARLY_PRINTK
129 
130 /**** cd2401 registers ****/
131 #define CD2401_ADDR (0xfff45000)
132 
133 #define CyGFRCR (0x81)
134 #define CyCCR (0x13)
135 #define CyCLR_CHAN (0x40)
136 #define CyINIT_CHAN (0x20)
137 #define CyCHIP_RESET (0x10)
138 #define CyENB_XMTR (0x08)
139 #define CyDIS_XMTR (0x04)
140 #define CyENB_RCVR (0x02)
141 #define CyDIS_RCVR (0x01)
142 #define CyCAR (0xee)
143 #define CyIER (0x11)
144 #define CyMdmCh (0x80)
145 #define CyRxExc (0x20)
146 #define CyRxData (0x08)
147 #define CyTxMpty (0x02)
148 #define CyTxRdy (0x01)
149 #define CyLICR (0x26)
150 #define CyRISR (0x89)
151 #define CyTIMEOUT (0x80)
152 #define CySPECHAR (0x70)
153 #define CyOVERRUN (0x08)
154 #define CyPARITY (0x04)
155 #define CyFRAME (0x02)
156 #define CyBREAK (0x01)
157 #define CyREOIR (0x84)
158 #define CyTEOIR (0x85)
159 #define CyMEOIR (0x86)
160 #define CyNOTRANS (0x08)
161 #define CyRFOC (0x30)
162 #define CyRDR (0xf8)
163 #define CyTDR (0xf8)
164 #define CyMISR (0x8b)
165 #define CyRISR (0x89)
166 #define CyTISR (0x8a)
167 #define CyMSVR1 (0xde)
168 #define CyMSVR2 (0xdf)
169 #define CyDSR (0x80)
170 #define CyDCD (0x40)
171 #define CyCTS (0x20)
172 #define CyDTR (0x02)
173 #define CyRTS (0x01)
174 #define CyRTPRL (0x25)
175 #define CyRTPRH (0x24)
176 #define CyCOR1 (0x10)
177 #define CyPARITY_NONE (0x00)
178 #define CyPARITY_E (0x40)
179 #define CyPARITY_O (0xC0)
180 #define Cy_5_BITS (0x04)
181 #define Cy_6_BITS (0x05)
182 #define Cy_7_BITS (0x06)
183 #define Cy_8_BITS (0x07)
184 #define CyCOR2 (0x17)
185 #define CyETC (0x20)
186 #define CyCtsAE (0x02)
187 #define CyCOR3 (0x16)
188 #define Cy_1_STOP (0x02)
189 #define Cy_2_STOP (0x04)
190 #define CyCOR4 (0x15)
191 #define CyREC_FIFO (0x0F) /* Receive FIFO threshold */
192 #define CyCOR5 (0x14)
193 #define CyCOR6 (0x18)
194 #define CyCOR7 (0x07)
195 #define CyRBPR (0xcb)
196 #define CyRCOR (0xc8)
197 #define CyTBPR (0xc3)
198 #define CyTCOR (0xc0)
199 #define CySCHR1 (0x1f)
200 #define CySCHR2 (0x1e)
201 #define CyTPR (0xda)
202 #define CyPILR1 (0xe3)
203 #define CyPILR2 (0xe0)
204 #define CyPILR3 (0xe1)
205 #define CyCMR (0x1b)
206 #define CyASYNC (0x02)
207 #define CyLICR (0x26)
208 #define CyLIVR (0x09)
209 #define CySCRL (0x23)
210 #define CySCRH (0x22)
211 #define CyTFTC (0x80)
212 
213 static void cons_write(struct console *co, const char *str, unsigned count)
214 {
215  volatile unsigned char *base_addr = (u_char *)CD2401_ADDR;
216  volatile u_char sink;
217  u_char ier;
218  int port;
219  u_char do_lf = 0;
220  int i = 0;
221 
222  /* Ensure transmitter is enabled! */
223 
224  port = 0;
225  base_addr[CyCAR] = (u_char)port;
226  while (base_addr[CyCCR])
227  ;
228  base_addr[CyCCR] = CyENB_XMTR;
229 
230  ier = base_addr[CyIER];
231  base_addr[CyIER] = CyTxMpty;
232 
233  while (1) {
234  if (pcc2chip[PccSCCTICR] & 0x20)
235  {
236  /* We have a Tx int. Acknowledge it */
237  sink = pcc2chip[PccTPIACKR];
238  if ((base_addr[CyLICR] >> 2) == port) {
239  if (i == count) {
240  /* Last char of string is now output */
241  base_addr[CyTEOIR] = CyNOTRANS;
242  break;
243  }
244  if (do_lf) {
245  base_addr[CyTDR] = '\n';
246  str++;
247  i++;
248  do_lf = 0;
249  }
250  else if (*str == '\n') {
251  base_addr[CyTDR] = '\r';
252  do_lf = 1;
253  }
254  else {
255  base_addr[CyTDR] = *str++;
256  i++;
257  }
258  base_addr[CyTEOIR] = 0;
259  }
260  else
261  base_addr[CyTEOIR] = CyNOTRANS;
262  }
263  }
264 
265  base_addr[CyIER] = ier;
266 }
267 
268 static struct console cons_info =
269 {
270  .name = "sercon",
271  .write = cons_write,
272  .flags = CON_PRINTBUFFER | CON_BOOT,
273  .index = -1,
274 };
275 
276 static void __init mvme16x_early_console(void)
277 {
278  register_console(&cons_info);
279 
280  printk(KERN_INFO "MVME16x: early console registered\n");
281 }
282 #endif
283 
284 void __init config_mvme16x(void)
285 {
286  p_bdid p = &mvme_bdid;
287  char id[40];
288 
289  mach_max_dma_address = 0xffffffff;
290  mach_sched_init = mvme16x_sched_init;
291  mach_init_IRQ = mvme16x_init_IRQ;
292  mach_gettimeoffset = mvme16x_gettimeoffset;
293  mach_hwclk = mvme16x_hwclk;
294  mach_set_clock_mmss = mvme16x_set_clock_mmss;
295  mach_reset = mvme16x_reset;
296  mach_get_model = mvme16x_get_model;
297  mach_get_hardware_list = mvme16x_get_hardware_list;
298 
299  /* Report board revision */
300 
301  if (strncmp("BDID", p->bdid, 4))
302  {
303  printk ("\n\nBug call .BRD_ID returned garbage - giving up\n\n");
304  while (1)
305  ;
306  }
307  /* Board type is only set by newer versions of vmelilo/tftplilo */
308  if (vme_brdtype == 0)
309  vme_brdtype = p->brdno;
310 
311  mvme16x_get_model(id);
312  printk ("\nBRD_ID: %s BUG %x.%x %02x/%02x/%02x\n", id, p->rev>>4,
313  p->rev&0xf, p->yr, p->mth, p->day);
314  if (p->brdno == 0x0162 || p->brdno == 0x172)
315  {
316  unsigned char rev = *(unsigned char *)MVME162_VERSION_REG;
317 
318  mvme16x_config = rev | MVME16x_CONFIG_GOT_SCCA;
319 
320  printk ("MVME%x Hardware status:\n", p->brdno);
321  printk (" CPU Type 68%s040\n",
322  rev & MVME16x_CONFIG_GOT_FPU ? "" : "LC");
323  printk (" CPU clock %dMHz\n",
324  rev & MVME16x_CONFIG_SPEED_32 ? 32 : 25);
325  printk (" VMEchip2 %spresent\n",
326  rev & MVME16x_CONFIG_NO_VMECHIP2 ? "NOT " : "");
327  printk (" SCSI interface %spresent\n",
328  rev & MVME16x_CONFIG_NO_SCSICHIP ? "NOT " : "");
329  printk (" Ethernet interface %spresent\n",
330  rev & MVME16x_CONFIG_NO_ETHERNET ? "NOT " : "");
331  }
332  else
333  {
334  mvme16x_config = MVME16x_CONFIG_GOT_LP | MVME16x_CONFIG_GOT_CD2401;
335 
336  /* Dont allow any interrupts from the CD2401 until the interrupt */
337  /* handlers are installed */
338 
339  pcc2chip[PccSCCMICR] = 0x10;
340  pcc2chip[PccSCCTICR] = 0x10;
341  pcc2chip[PccSCCRICR] = 0x10;
342 #ifdef CONFIG_EARLY_PRINTK
343  mvme16x_early_console();
344 #endif
345  }
346 }
347 
348 static irqreturn_t mvme16x_abort_int (int irq, void *dev_id)
349 {
350  p_bdid p = &mvme_bdid;
351  unsigned long *new = (unsigned long *)vectors;
352  unsigned long *old = (unsigned long *)0xffe00000;
353  volatile unsigned char uc, *ucp;
354 
355  if (p->brdno == 0x0162 || p->brdno == 0x172)
356  {
357  ucp = (volatile unsigned char *)0xfff42043;
358  uc = *ucp | 8;
359  *ucp = uc;
360  }
361  else
362  {
363  *(volatile unsigned long *)0xfff40074 = 0x40000000;
364  }
365  *(new+4) = *(old+4); /* Illegal instruction */
366  *(new+9) = *(old+9); /* Trace */
367  *(new+47) = *(old+47); /* Trap #15 */
368 
369  if (p->brdno == 0x0162 || p->brdno == 0x172)
370  *(new+0x5e) = *(old+0x5e); /* ABORT switch */
371  else
372  *(new+0x6e) = *(old+0x6e); /* ABORT switch */
373  return IRQ_HANDLED;
374 }
375 
376 static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
377 {
378  *(volatile unsigned char *)0xfff4201b |= 8;
379  return tick_handler(irq, dev_id);
380 }
381 
382 void mvme16x_sched_init (irq_handler_t timer_routine)
383 {
384  p_bdid p = &mvme_bdid;
385  int irq;
386 
387  tick_handler = timer_routine;
388  /* Using PCCchip2 or MC2 chip tick timer 1 */
389  *(volatile unsigned long *)0xfff42008 = 0;
390  *(volatile unsigned long *)0xfff42004 = 10000; /* 10ms */
391  *(volatile unsigned char *)0xfff42017 |= 3;
392  *(volatile unsigned char *)0xfff4201b = 0x16;
393  if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, 0,
394  "timer", mvme16x_timer_int))
395  panic ("Couldn't register timer int");
396 
397  if (p->brdno == 0x0162 || p->brdno == 0x172)
398  irq = MVME162_IRQ_ABORT;
399  else
400  irq = MVME167_IRQ_ABORT;
401  if (request_irq(irq, mvme16x_abort_int, 0,
402  "abort", mvme16x_abort_int))
403  panic ("Couldn't register abort int");
404 }
405 
406 
407 /* This is always executed with interrupts disabled. */
408 unsigned long mvme16x_gettimeoffset (void)
409 {
410  return (*(volatile unsigned long *)0xfff42008);
411 }
412 
413 int bcd2int (unsigned char b)
414 {
415  return ((b>>4)*10 + (b&15));
416 }
417 
418 int mvme16x_hwclk(int op, struct rtc_time *t)
419 {
420 #warning check me!
421  if (!op) {
422  rtc->ctrl = RTC_READ;
423  t->tm_year = bcd2int (rtc->bcd_year);
424  t->tm_mon = bcd2int (rtc->bcd_mth);
425  t->tm_mday = bcd2int (rtc->bcd_dom);
426  t->tm_hour = bcd2int (rtc->bcd_hr);
427  t->tm_min = bcd2int (rtc->bcd_min);
428  t->tm_sec = bcd2int (rtc->bcd_sec);
429  rtc->ctrl = 0;
430  }
431  return 0;
432 }
433 
434 int mvme16x_set_clock_mmss (unsigned long nowtime)
435 {
436  return 0;
437 }
438 
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