#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/clk.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/list.h>
#include <linux/err.h>
#include <asm/mach-jz4740/clock.h>
#include <asm/mach-jz4740/base.h>
#include "clock.h"
Go to the source code of this file.
| #define JZ_CLOCK_CTRL_CDIV_OFFSET 0 |
| #define JZ_CLOCK_CTRL_CHANGE_ENABLE BIT(22) |
| #define JZ_CLOCK_CTRL_HDIV_OFFSET 4 |
| #define JZ_CLOCK_CTRL_I2S_SRC_PLL BIT(31) |
| #define JZ_CLOCK_CTRL_KO_ENABLE BIT(30) |
| #define JZ_CLOCK_CTRL_LDIV_MASK 0x001f0000 |
| #define JZ_CLOCK_CTRL_LDIV_OFFSET 16 |
| #define JZ_CLOCK_CTRL_MDIV_OFFSET 12 |
| #define JZ_CLOCK_CTRL_PDIV_OFFSET 8 |
| #define JZ_CLOCK_CTRL_PLL_HALF BIT(21) |
| #define JZ_CLOCK_CTRL_UDC_SRC_PLL BIT(29) |
| #define JZ_CLOCK_CTRL_UDIV_MASK 0x1f800000 |
| #define JZ_CLOCK_CTRL_UDIV_OFFSET 23 |
| #define JZ_CLOCK_GATE_ADC BIT(8) |
| #define JZ_CLOCK_GATE_AIC BIT(5) |
| #define JZ_CLOCK_GATE_CIM BIT(9) |
| #define JZ_CLOCK_GATE_DMAC BIT(12) |
| #define JZ_CLOCK_GATE_I2C BIT(3) |
| #define JZ_CLOCK_GATE_I2S BIT(6) |
| #define JZ_CLOCK_GATE_IPU BIT(13) |
| #define JZ_CLOCK_GATE_LCD BIT(10) |
| #define JZ_CLOCK_GATE_MMC BIT(7) |
| #define JZ_CLOCK_GATE_RTC BIT(2) |
| #define JZ_CLOCK_GATE_SPI BIT(4) |
| #define JZ_CLOCK_GATE_TCU BIT(1) |
| #define JZ_CLOCK_GATE_UART0 BIT(0) |
| #define JZ_CLOCK_GATE_UART1 BIT(15) |
| #define JZ_CLOCK_GATE_UDC BIT(11) |
| #define JZ_CLOCK_GATE_UHC BIT(14) |
| #define JZ_CLOCK_I2S_DIV_MASK 0x01ff |
| #define JZ_CLOCK_LCD_DIV_MASK 0x01ff |
| #define JZ_CLOCK_LOW_POWER_MODE_DOZE BIT(2) |
| #define JZ_CLOCK_LOW_POWER_MODE_SLEEP BIT(0) |
| #define JZ_CLOCK_MMC_DIV_MASK 0x001f |
| #define JZ_CLOCK_PLL_BYPASS BIT(9) |
| #define JZ_CLOCK_PLL_ENABLED BIT(8) |
| #define JZ_CLOCK_PLL_M_MASK 0x01ff |
| #define JZ_CLOCK_PLL_M_OFFSET 23 |
| #define JZ_CLOCK_PLL_N_MASK 0x001f |
| #define JZ_CLOCK_PLL_N_OFFSET 18 |
| #define JZ_CLOCK_PLL_OD_MASK 0x0003 |
| #define JZ_CLOCK_PLL_OD_OFFSET 16 |
| #define JZ_CLOCK_PLL_STABLE BIT(10) |
| #define JZ_CLOCK_PLL_STABLIZE_MASK 0x000f |
| #define JZ_CLOCK_SLEEP_CTRL_ENABLE_UDC BIT(6) |
| #define JZ_CLOCK_SLEEP_CTRL_SUSPEND_UHC BIT(7) |
| #define JZ_CLOCK_SPI_DIV_MASK 0x000f |
| #define JZ_CLOCK_SPI_SRC_PLL BIT(31) |
| #define JZ_CLOCK_UHC_DIV_MASK 0x000f |
| #define JZ_REG_CLOCK_CTRL 0x00 |
| #define JZ_REG_CLOCK_GATE 0x20 |
| #define JZ_REG_CLOCK_I2S 0x60 |
| #define JZ_REG_CLOCK_LCD 0x64 |
| #define JZ_REG_CLOCK_LOW_POWER 0x04 |
| #define JZ_REG_CLOCK_MMC 0x68 |
| #define JZ_REG_CLOCK_PLL 0x10 |
| #define JZ_REG_CLOCK_SLEEP_CTRL 0x24 |
| #define JZ_REG_CLOCK_SPI 0x74 |
| #define JZ_REG_CLOCK_UHC 0x6C |
| arch_initcall |
( |
jz4740_clock_init |
| ) |
|
| void jz4740_clock_udc_disable_auto_suspend |
( |
void |
| ) |
|
| void jz4740_clock_udc_enable_auto_suspend |
( |
void |
| ) |
|
1.8.2