#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <linux/module.h>
#include <linux/clk.h>
#include <lantiq_soc.h>
#include <xway_dma.h>

Macros
#define	LTQ_DMA_CTRL 0x10

#define	LTQ_DMA_CPOLL 0x14

#define	LTQ_DMA_CS 0x18

#define	LTQ_DMA_CCTRL 0x1C

#define	LTQ_DMA_CDBA 0x20

#define	LTQ_DMA_CDLEN 0x24

#define	LTQ_DMA_CIS 0x28

#define	LTQ_DMA_CIE 0x2C

#define	LTQ_DMA_PS 0x40

#define	LTQ_DMA_PCTRL 0x44

#define	LTQ_DMA_IRNEN 0xf4

#define	DMA_DESCPT BIT(3) /* descriptor complete irq */

#define	DMA_TX BIT(8) /* TX channel direction */

#define	DMA_CHAN_ON BIT(0) /* channel on / off bit */

#define	DMA_PDEN BIT(6) /* enable packet drop */

#define	DMA_CHAN_RST BIT(1) /* channel on / off bit */

#define	DMA_RESET BIT(0) /* channel on / off bit */

#define	DMA_IRQ_ACK 0x7e /* IRQ status register */

#define	DMA_POLL BIT(31) /* turn on channel polling */

#define	DMA_CLK_DIV4 BIT(6) /* polling clock divider */

#define	DMA_2W_BURST BIT(1) /* 2 word burst length */

#define	DMA_MAX_CHANNEL 20 /* the soc has 20 channels */

#define	DMA_ETOP_ENDIANESS (0xf << 8) /* endianess swap etop channels */

#define	DMA_WEIGHT (BIT(17) \| BIT(16)) /* default channel wheight */

#define	ltq_dma_r32(x) ltq_r32(ltq_dma_membase + (x))

#define	ltq_dma_w32(x, y) ltq_w32(x, ltq_dma_membase + (y))

#define	ltq_dma_w32_mask(x, y, z)

Functions
void	ltq_dma_enable_irq (struct ltq_dma_channel *ch)

	EXPORT_SYMBOL_GPL (ltq_dma_enable_irq)

void	ltq_dma_disable_irq (struct ltq_dma_channel *ch)

	EXPORT_SYMBOL_GPL (ltq_dma_disable_irq)

void	ltq_dma_ack_irq (struct ltq_dma_channel *ch)

	EXPORT_SYMBOL_GPL (ltq_dma_ack_irq)

void	ltq_dma_open (struct ltq_dma_channel *ch)

	EXPORT_SYMBOL_GPL (ltq_dma_open)

void	ltq_dma_close (struct ltq_dma_channel *ch)

	EXPORT_SYMBOL_GPL (ltq_dma_close)

void	ltq_dma_alloc_tx (struct ltq_dma_channel *ch)

	EXPORT_SYMBOL_GPL (ltq_dma_alloc_tx)

void	ltq_dma_alloc_rx (struct ltq_dma_channel *ch)

	EXPORT_SYMBOL_GPL (ltq_dma_alloc_rx)

void	ltq_dma_free (struct ltq_dma_channel *ch)

	EXPORT_SYMBOL_GPL (ltq_dma_free)

void	ltq_dma_init_port (int p)

	EXPORT_SYMBOL_GPL (ltq_dma_init_port)

	MODULE_DEVICE_TABLE (of, dma_match)

int __init	dma_init (void)

	postcore_initcall (dma_init)

Macro Definition Documentation

#define DMA_2W_BURST BIT(1) /* 2 word burst length */

Definition at line 49 of file dma.c.

#define DMA_CHAN_ON BIT(0) /* channel on / off bit */

Definition at line 42 of file dma.c.

#define DMA_CHAN_RST BIT(1) /* channel on / off bit */

Definition at line 44 of file dma.c.

#define DMA_CLK_DIV4 BIT(6) /* polling clock divider */

Definition at line 48 of file dma.c.

#define DMA_DESCPT BIT(3) /* descriptor complete irq */

Definition at line 40 of file dma.c.

#define DMA_ETOP_ENDIANESS (0xf << 8) /* endianess swap etop channels */

Definition at line 51 of file dma.c.

#define DMA_IRQ_ACK 0x7e /* IRQ status register */

Definition at line 46 of file dma.c.

#define DMA_MAX_CHANNEL 20 /* the soc has 20 channels */

Definition at line 50 of file dma.c.

#define DMA_PDEN BIT(6) /* enable packet drop */

Definition at line 43 of file dma.c.

#define DMA_POLL BIT(31) /* turn on channel polling */

Definition at line 47 of file dma.c.

#define DMA_RESET BIT(0) /* channel on / off bit */

Definition at line 45 of file dma.c.

#define DMA_TX BIT(8) /* TX channel direction */

Definition at line 41 of file dma.c.

#define DMA_WEIGHT (BIT(17) | BIT(16)) /* default channel wheight */

Definition at line 52 of file dma.c.

#define LTQ_DMA_CCTRL 0x1C

Definition at line 31 of file dma.c.

#define LTQ_DMA_CDBA 0x20

Definition at line 32 of file dma.c.

#define LTQ_DMA_CDLEN 0x24

Definition at line 33 of file dma.c.

#define LTQ_DMA_CIE 0x2C

Definition at line 35 of file dma.c.

#define LTQ_DMA_CIS 0x28

Definition at line 34 of file dma.c.

#define LTQ_DMA_CPOLL 0x14

Definition at line 29 of file dma.c.

#define LTQ_DMA_CS 0x18

Definition at line 30 of file dma.c.

#define LTQ_DMA_CTRL 0x10

Definition at line 28 of file dma.c.

#define LTQ_DMA_IRNEN 0xf4

Definition at line 38 of file dma.c.

#define LTQ_DMA_PCTRL 0x44

Definition at line 37 of file dma.c.

#define LTQ_DMA_PS 0x40

Definition at line 36 of file dma.c.

#define ltq_dma_r32 ( x ) ltq_r32(ltq_dma_membase + (x))

Definition at line 54 of file dma.c.

#define ltq_dma_w32	(	x,
		y
	)	ltq_w32(x, ltq_dma_membase + (y))

Definition at line 55 of file dma.c.

#define ltq_dma_w32_mask	(	x,
		y,
		z
	)

Value:

ltq_w32_mask(x, y, \

ltq_dma_membase + (z))

Definition at line 56 of file dma.c.

Function Documentation

int __init dma_init ( void )

Definition at line 266 of file dma.c.

EXPORT_SYMBOL_GPL ( ltq_dma_enable_irq )

EXPORT_SYMBOL_GPL ( ltq_dma_disable_irq )

EXPORT_SYMBOL_GPL ( ltq_dma_ack_irq )

EXPORT_SYMBOL_GPL ( ltq_dma_open )

EXPORT_SYMBOL_GPL ( ltq_dma_close )

EXPORT_SYMBOL_GPL ( ltq_dma_alloc_tx )

EXPORT_SYMBOL_GPL ( ltq_dma_alloc_rx )

EXPORT_SYMBOL_GPL ( ltq_dma_free )

EXPORT_SYMBOL_GPL ( ltq_dma_init_port )

void ltq_dma_ack_irq ( struct ltq_dma_channel * ch )

Definition at line 86 of file dma.c.

void ltq_dma_alloc_rx ( struct ltq_dma_channel * ch )

Definition at line 162 of file dma.c.

void ltq_dma_alloc_tx ( struct ltq_dma_channel * ch )

Definition at line 147 of file dma.c.

void ltq_dma_close ( struct ltq_dma_channel * ch )

Definition at line 111 of file dma.c.

void ltq_dma_disable_irq ( struct ltq_dma_channel * ch )

Definition at line 74 of file dma.c.

void ltq_dma_enable_irq ( struct ltq_dma_channel * ch )

Definition at line 62 of file dma.c.

void ltq_dma_free ( struct ltq_dma_channel * ch )

Definition at line 177 of file dma.c.

void ltq_dma_init_port ( int p )

Definition at line 188 of file dma.c.

void ltq_dma_open ( struct ltq_dma_channel * ch )

Definition at line 98 of file dma.c.

MODULE_DEVICE_TABLE	(	of	,
		dma_match
	)

postcore_initcall ( dma_init )

Macros

Functions

Macro Definition Documentation

Function Documentation