Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
setup.c
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version 2
7  * of the License, or (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17  */
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/reboot.h>
22 #include <linux/string.h>
23 
24 #include <asm/bootinfo.h>
25 #include <asm/mipsregs.h>
26 #include <asm/io.h>
27 #include <asm/sibyte/sb1250.h>
28 #include <asm/sibyte/sb1250_regs.h>
29 #include <asm/sibyte/sb1250_scd.h>
30 
31 unsigned int sb1_pass;
32 unsigned int soc_pass;
33 unsigned int soc_type;
35 unsigned int periph_rev;
36 unsigned int zbbus_mhz;
38 
39 static char *soc_str;
40 static char *pass_str;
41 static unsigned int war_pass; /* XXXKW don't overload PASS defines? */
42 
43 static int __init setup_bcm1250(void)
44 {
45  int ret = 0;
46 
47  switch (soc_pass) {
49  periph_rev = 1;
50  pass_str = "Pass 1";
51  break;
53  periph_rev = 2;
54  pass_str = "A8/A10";
55  /* XXXKW different war_pass? */
57  break;
59  periph_rev = 2;
60  pass_str = "B1";
61  break;
63  periph_rev = 2;
64  pass_str = "B2";
66  break;
67  case K_SYS_REVISION_BCM1250_PASS3:
68  periph_rev = 3;
69  pass_str = "C0";
70  break;
72  periph_rev = 3;
73  pass_str = "C1";
74  break;
75  default:
77  periph_rev = 2;
78  pass_str = "A0-A6";
80  } else {
81  printk("Unknown BCM1250 rev %x\n", soc_pass);
82  ret = 1;
83  }
84  break;
85  }
86 
87  return ret;
88 }
89 
91 {
92  switch (soc_type) {
99 
100  default:
101  return 0;
102  }
103 }
104 
105 static int __init setup_bcm112x(void)
106 {
107  int ret = 0;
108 
109  switch (soc_pass) {
110  case 0:
111  /* Early build didn't have revid set */
112  periph_rev = 3;
113  pass_str = "A1";
114  war_pass = K_SYS_REVISION_BCM112x_A1;
115  break;
117  periph_rev = 3;
118  pass_str = "A1";
119  break;
121  periph_rev = 3;
122  pass_str = "A2";
123  break;
125  periph_rev = 3;
126  pass_str = "A3";
127  break;
129  periph_rev = 3;
130  pass_str = "A4";
131  break;
133  periph_rev = 3;
134  pass_str = "B0";
135  break;
136  default:
137  printk("Unknown %s rev %x\n", soc_str, soc_pass);
138  ret = 1;
139  }
140 
141  return ret;
142 }
143 
144 /* Setup code likely to be common to all SiByte platforms */
145 
146 static int __init sys_rev_decode(void)
147 {
148  int ret = 0;
149 
150  war_pass = soc_pass;
151  switch (soc_type) {
155  soc_str = "BCM1250";
156  ret = setup_bcm1250();
157  break;
159  soc_str = "BCM1120";
160  ret = setup_bcm112x();
161  break;
163  soc_str = "BCM1125";
164  ret = setup_bcm112x();
165  break;
167  soc_str = "BCM1125H";
168  ret = setup_bcm112x();
169  break;
170  default:
171  printk("Unknown SOC type %x\n", soc_type);
172  ret = 1;
173  break;
174  }
175 
176  return ret;
177 }
178 
180 {
181  uint64_t sys_rev;
182  int plldiv;
183  int bad_config = 0;
184 
185  sb1_pass = read_c0_prid() & 0xff;
187  soc_type = SYS_SOC_TYPE(sys_rev);
188  soc_pass = G_SYS_REVISION(sys_rev);
189 
190  if (sys_rev_decode()) {
191  printk("Restart after failure to identify SiByte chip\n");
193  }
194 
195  plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
196  zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
197 
198  printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
199  soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
200  printk("Board type: %s\n", get_system_type());
201 
202  switch (war_pass) {
204 #ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
205  printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
206  "and the kernel doesn't have the proper "
207  "workarounds compiled in. @@@@\n");
208  bad_config = 1;
209 #endif
210  break;
212  /* Pass 2 - easiest as default for now - so many numbers */
213 #if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \
214  !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS)
215  printk("@@@@ This is a BCM1250 A3-A10 board, and the "
216  "kernel doesn't have the proper workarounds "
217  "compiled in. @@@@\n");
218  bad_config = 1;
219 #endif
220 #ifdef CONFIG_CPU_HAS_PREFETCH
221  printk("@@@@ Prefetches may be enabled in this kernel, "
222  "but are buggy on this board. @@@@\n");
223  bad_config = 1;
224 #endif
225  break;
227 #ifndef CONFIG_SB1_PASS_2_WORKAROUNDS
228  printk("@@@@ This is a BCM1250 B1/B2. board, and the "
229  "kernel doesn't have the proper workarounds "
230  "compiled in. @@@@\n");
231  bad_config = 1;
232 #endif
233 #if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \
234  !defined(CONFIG_CPU_HAS_PREFETCH)
235  printk("@@@@ This is a BCM1250 B1/B2, but the kernel is "
236  "conservatively configured for an 'A' stepping. "
237  "@@@@\n");
238 #endif
239  break;
240  default:
241  break;
242  }
243  if (bad_config) {
244  printk("Invalid configuration for this chip.\n");
246  }
247 }