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arch
mips
vr41xx
common
irq.c
Go to the documentation of this file.
1
/*
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* Interrupt handing routines for NEC VR4100 series.
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*
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* Copyright (C) 2005-2007 Yoichi Yuasa <
[email protected]
>
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*
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* This program is free software; you can redistribute it and/or modify
7
* it under the terms of the GNU General Public License as published by
8
* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
13
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14
* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
17
* along with this program; if not, write to the Free Software
18
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <
linux/interrupt.h
>
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#include <linux/module.h>
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#include <
linux/irq.h
>
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#include <
asm/irq_cpu.h
>
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#include <
asm/vr41xx/irq.h
>
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typedef
struct
irq_cascade
{
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int
(*
get_irq
)(
unsigned
int
);
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}
irq_cascade_t
;
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static
irq_cascade_t
irq_cascade
[
NR_IRQS
]
__cacheline_aligned
;
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static
struct
irqaction
cascade_irqaction
= {
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.handler =
no_action
,
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.name =
"cascade"
,
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.flags =
IRQF_NO_THREAD
,
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};
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int
cascade_irq
(
unsigned
int
irq
,
int
(*
get_irq
)(
unsigned
int
))
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{
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int
retval
= 0;
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if
(irq >=
NR_IRQS
)
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return
-
EINVAL
;
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if
(
irq_cascade
[irq].
get_irq
!=
NULL
)
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free_irq
(irq,
NULL
);
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irq_cascade
[
irq
].
get_irq
=
get_irq
;
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if
(
get_irq
!=
NULL
) {
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retval =
setup_irq
(irq, &cascade_irqaction);
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if
(retval < 0)
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irq_cascade
[
irq
].
get_irq
=
NULL
;
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}
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return
retval
;
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}
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EXPORT_SYMBOL_GPL
(
cascade_irq
);
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static
void
irq_dispatch(
unsigned
int
irq)
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{
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irq_cascade_t
*cascade;
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if
(irq >=
NR_IRQS
) {
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atomic_inc
(&
irq_err_count
);
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return
;
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}
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cascade =
irq_cascade
+
irq
;
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if
(cascade->
get_irq
!=
NULL
) {
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struct
irq_desc
*
desc
=
irq_to_desc
(irq);
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struct
irq_data
*idata = irq_desc_get_irq_data(desc);
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struct
irq_chip
*
chip
= irq_desc_get_chip(desc);
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int
ret
;
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if
(chip->
irq_mask_ack
)
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chip->
irq_mask_ack
(idata);
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else
{
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chip->
irq_mask
(idata);
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chip->
irq_ack
(idata);
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}
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ret = cascade->
get_irq
(irq);
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irq =
ret
;
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if
(ret < 0)
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atomic_inc
(&
irq_err_count
);
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else
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irq_dispatch(irq);
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if
(!irqd_irq_disabled(idata) && chip->
irq_unmask
)
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chip->
irq_unmask
(idata);
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}
else
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do_IRQ
(irq);
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}
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asmlinkage
void
plat_irq_dispatch
(
void
)
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{
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unsigned
int
pending =
read_c0_cause
() &
read_c0_status
() &
ST0_IM
;
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if
(pending &
CAUSEF_IP7
)
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do_IRQ
(
TIMER_IRQ
);
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else
if
(pending & 0x7800) {
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if
(pending &
CAUSEF_IP3
)
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irq_dispatch(
INT1_IRQ
);
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else
if
(pending &
CAUSEF_IP4
)
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irq_dispatch(
INT2_IRQ
);
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else
if
(pending &
CAUSEF_IP5
)
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irq_dispatch(
INT3_IRQ
);
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else
if
(pending &
CAUSEF_IP6
)
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irq_dispatch(
INT4_IRQ
);
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}
else
if
(pending &
CAUSEF_IP2
)
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irq_dispatch(
INT0_IRQ
);
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else
if
(pending &
CAUSEF_IP0
)
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do_IRQ
(
MIPS_SOFTINT0_IRQ
);
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else
if
(pending &
CAUSEF_IP1
)
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do_IRQ
(
MIPS_SOFTINT1_IRQ
);
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else
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spurious_interrupt
();
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}
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void
__init
arch_init_irq
(
void
)
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{
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mips_cpu_irq_init
();
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}
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