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Macros
dma.h File Reference
#include <asm/io.h>

Go to the source code of this file.

Macros

#define dma_outb   outb
 
#define dma_inb   inb
 
#define DMA_CHUNK_SIZE   (BITS_PER_LONG*PAGE_SIZE)
 
#define MAX_DMA_ADDRESS   (~0UL)
 
#define MAX_DMA_CHANNELS   8
 
#define DMA_MODE_READ   0x44 /* I/O to memory, no autoinit, increment, single mode */
 
#define DMA_MODE_WRITE   0x48 /* memory to I/O, no autoinit, increment, single mode */
 
#define DMA_MODE_CASCADE   0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
 
#define DMA_AUTOINIT   0x10
 
#define IO_DMA1_BASE   0x00 /* 8 bit slave DMA, channels 0..3 */
 
#define IO_DMA2_BASE   0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */
 
#define DMA1_CMD_REG   0x08 /* command register (w) */
 
#define DMA1_STAT_REG   0x08 /* status register (r) */
 
#define DMA1_REQ_REG   0x09 /* request register (w) */
 
#define DMA1_MASK_REG   0x0A /* single-channel mask (w) */
 
#define DMA1_MODE_REG   0x0B /* mode register (w) */
 
#define DMA1_CLEAR_FF_REG   0x0C /* clear pointer flip-flop (w) */
 
#define DMA1_TEMP_REG   0x0D /* Temporary Register (r) */
 
#define DMA1_RESET_REG   0x0D /* Master Clear (w) */
 
#define DMA1_CLR_MASK_REG   0x0E /* Clear Mask */
 
#define DMA1_MASK_ALL_REG   0x0F /* all-channels mask (w) */
 
#define DMA1_EXT_MODE_REG   (0x400 | DMA1_MODE_REG)
 
#define DMA2_CMD_REG   0xD0 /* command register (w) */
 
#define DMA2_STAT_REG   0xD0 /* status register (r) */
 
#define DMA2_REQ_REG   0xD2 /* request register (w) */
 
#define DMA2_MASK_REG   0xD4 /* single-channel mask (w) */
 
#define DMA2_MODE_REG   0xD6 /* mode register (w) */
 
#define DMA2_CLEAR_FF_REG   0xD8 /* clear pointer flip-flop (w) */
 
#define DMA2_TEMP_REG   0xDA /* Temporary Register (r) */
 
#define DMA2_RESET_REG   0xDA /* Master Clear (w) */
 
#define DMA2_CLR_MASK_REG   0xDC /* Clear Mask */
 
#define DMA2_MASK_ALL_REG   0xDE /* all-channels mask (w) */
 
#define DMA2_EXT_MODE_REG   (0x400 | DMA2_MODE_REG)
 
#define request_dma(dmanr, device_id)   (0)
 
#define free_dma(dmanr)
 
#define isa_dma_bridge_buggy   (0)
 

Macro Definition Documentation

#define DMA1_CLEAR_FF_REG   0x0C /* clear pointer flip-flop (w) */

Definition at line 54 of file dma.h.

#define DMA1_CLR_MASK_REG   0x0E /* Clear Mask */

Definition at line 57 of file dma.h.

#define DMA1_CMD_REG   0x08 /* command register (w) */

Definition at line 49 of file dma.h.

#define DMA1_EXT_MODE_REG   (0x400 | DMA1_MODE_REG)

Definition at line 59 of file dma.h.

#define DMA1_MASK_ALL_REG   0x0F /* all-channels mask (w) */

Definition at line 58 of file dma.h.

#define DMA1_MASK_REG   0x0A /* single-channel mask (w) */

Definition at line 52 of file dma.h.

#define DMA1_MODE_REG   0x0B /* mode register (w) */

Definition at line 53 of file dma.h.

#define DMA1_REQ_REG   0x09 /* request register (w) */

Definition at line 51 of file dma.h.

#define DMA1_RESET_REG   0x0D /* Master Clear (w) */

Definition at line 56 of file dma.h.

#define DMA1_STAT_REG   0x08 /* status register (r) */

Definition at line 50 of file dma.h.

#define DMA1_TEMP_REG   0x0D /* Temporary Register (r) */

Definition at line 55 of file dma.h.

#define DMA2_CLEAR_FF_REG   0xD8 /* clear pointer flip-flop (w) */

Definition at line 66 of file dma.h.

#define DMA2_CLR_MASK_REG   0xDC /* Clear Mask */

Definition at line 69 of file dma.h.

#define DMA2_CMD_REG   0xD0 /* command register (w) */

Definition at line 61 of file dma.h.

#define DMA2_EXT_MODE_REG   (0x400 | DMA2_MODE_REG)

Definition at line 71 of file dma.h.

#define DMA2_MASK_ALL_REG   0xDE /* all-channels mask (w) */

Definition at line 70 of file dma.h.

#define DMA2_MASK_REG   0xD4 /* single-channel mask (w) */

Definition at line 64 of file dma.h.

#define DMA2_MODE_REG   0xD6 /* mode register (w) */

Definition at line 65 of file dma.h.

#define DMA2_REQ_REG   0xD2 /* request register (w) */

Definition at line 63 of file dma.h.

#define DMA2_RESET_REG   0xDA /* Master Clear (w) */

Definition at line 68 of file dma.h.

#define DMA2_STAT_REG   0xD0 /* status register (r) */

Definition at line 62 of file dma.h.

#define DMA2_TEMP_REG   0xDA /* Temporary Register (r) */

Definition at line 67 of file dma.h.

#define DMA_AUTOINIT   0x10

Definition at line 42 of file dma.h.

#define DMA_CHUNK_SIZE   (BITS_PER_LONG*PAGE_SIZE)

Definition at line 23 of file dma.h.

#define dma_inb   inb

Definition at line 14 of file dma.h.

#define DMA_MODE_CASCADE   0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */

Definition at line 40 of file dma.h.

#define DMA_MODE_READ   0x44 /* I/O to memory, no autoinit, increment, single mode */

Definition at line 38 of file dma.h.

#define DMA_MODE_WRITE   0x48 /* memory to I/O, no autoinit, increment, single mode */

Definition at line 39 of file dma.h.

#define dma_outb   outb

Definition at line 13 of file dma.h.

#define free_dma (   dmanr)

Definition at line 176 of file dma.h.

#define IO_DMA1_BASE   0x00 /* 8 bit slave DMA, channels 0..3 */

Definition at line 45 of file dma.h.

#define IO_DMA2_BASE   0xC0 /* 16 bit master DMA, ch 4(=slave input)..7 */

Definition at line 46 of file dma.h.

#define isa_dma_bridge_buggy   (0)

Definition at line 181 of file dma.h.

#define MAX_DMA_ADDRESS   (~0UL)

Definition at line 28 of file dma.h.

#define MAX_DMA_CHANNELS   8

Definition at line 37 of file dma.h.

#define request_dma (   dmanr,
  device_id 
)    (0)

Definition at line 127 of file dma.h.