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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Go to the source code of this file.
Data Structures | |
| struct | h2p2_dbg_fpga |
Functions | |
| void | omap1510_fpga_init_irq (void) |
| #define fpga_read | ( | reg | ) | __raw_readb(reg) |
| #define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */ |
| #define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) |
| #define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ |
| #define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */ |
| #define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */ |
| #define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */ |
| #define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */ |
| #define H2P2_DBG_FPGA_LOAD_METER_MASK ((1 << H2P2_DBG_FPGA_LOAD_METER_SIZE) - 1) |
| #define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */ |
| #define INNOVATOR_FPGA_CAM_USB_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20c) |
| #define INNOVATOR_FPGA_EXP_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20d) |
| #define INNOVATOR_FPGA_HID_SPI IOMEM(OMAP1510_FPGA_BASE + 0x4) |
| #define INNOVATOR_FPGA_IMR2 IOMEM(OMAP1510_FPGA_BASE + 0x210) |
| #define INNOVATOR_FPGA_INFO IOMEM(OMAP1510_FPGA_BASE + 0x205) |
| #define INNOVATOR_FPGA_ISR2 IOMEM(OMAP1510_FPGA_BASE + 0x20e) |
| #define INNOVATOR_FPGA_LCD_BRIGHT_HI IOMEM(OMAP1510_FPGA_BASE + 0x207) |
| #define INNOVATOR_FPGA_LCD_BRIGHT_LO IOMEM(OMAP1510_FPGA_BASE + 0x206) |
| #define INNOVATOR_FPGA_LED_GRN_HI IOMEM(OMAP1510_FPGA_BASE + 0x209) |
| #define INNOVATOR_FPGA_LED_GRN_LO IOMEM(OMAP1510_FPGA_BASE + 0x208) |
| #define INNOVATOR_FPGA_LED_RED_HI IOMEM(OMAP1510_FPGA_BASE + 0x20b) |
| #define INNOVATOR_FPGA_LED_RED_LO IOMEM(OMAP1510_FPGA_BASE + 0x20a) |
| #define OMAP1510_FPGA_AUDIO IOMEM(OMAP1510_FPGA_BASE + 0xc) |
| #define OMAP1510_FPGA_BOARD_REV IOMEM(OMAP1510_FPGA_BASE + 0x18) |
| #define OMAP1510_FPGA_DIP IOMEM(OMAP1510_FPGA_BASE + 0xe) |
| #define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300) |
| #define OMAP1510_FPGA_FPGA_IO IOMEM(OMAP1510_FPGA_BASE + 0xf) |
| #define OMAP1510_FPGA_HOST_RESET IOMEM(OMAP1510_FPGA_BASE + 0xa) |
| #define OMAP1510_FPGA_IMR_HI IOMEM(OMAP1510_FPGA_BASE + 0x9) |
| #define OMAP1510_FPGA_IMR_LO IOMEM(OMAP1510_FPGA_BASE + 0x8) |
| #define OMAP1510_FPGA_ISR_HI IOMEM(OMAP1510_FPGA_BASE + 0x7) |
| #define OMAP1510_FPGA_ISR_LO IOMEM(OMAP1510_FPGA_BASE + 0x6) |
| #define OMAP1510_FPGA_LCD_PANEL_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x2) |
| #define OMAP1510_FPGA_LED_DIGIT IOMEM(OMAP1510_FPGA_BASE + 0x3) |
| #define OMAP1510_FPGA_OMAP1510_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x16) |
| #define OMAP1510_FPGA_POWER IOMEM(OMAP1510_FPGA_BASE + 0x5) |
| #define OMAP1510_FPGA_REV_HIGH IOMEM(OMAP1510_FPGA_BASE + 0x1) |
| #define OMAP1510_FPGA_REV_LOW IOMEM(OMAP1510_FPGA_BASE + 0x0) |
| #define OMAP1510_FPGA_RST IOMEM(OMAP1510_FPGA_BASE + 0xb) |
| #define OMAP1510_FPGA_TOUCHSCREEN IOMEM(OMAP1510_FPGA_BASE + 0x204) |
| #define OMAP1510_FPGA_UART1 IOMEM(OMAP1510_FPGA_BASE + 0x14) |
| #define OMAP1510_FPGA_UART2 IOMEM(OMAP1510_FPGA_BASE + 0x15) |
| #define OMAP1510_INT_ETHER (OMAP_FPGA_IRQ_BASE + 13) |
| #define OMAP1510_INT_FPGA (IH_GPIO_BASE + 13) |
| #define OMAP1510_INT_FPGA10 (OMAP_FPGA_IRQ_BASE + 10) |
| #define OMAP1510_INT_FPGA11 (OMAP_FPGA_IRQ_BASE + 11) |
| #define OMAP1510_INT_FPGA12 (OMAP_FPGA_IRQ_BASE + 12) |
| #define OMAP1510_INT_FPGA17 (OMAP_FPGA_IRQ_BASE + 17) |
| #define OMAP1510_INT_FPGA2 (OMAP_FPGA_IRQ_BASE + 2) |
| #define OMAP1510_INT_FPGA22 (OMAP_FPGA_IRQ_BASE + 22) |
| #define OMAP1510_INT_FPGA23 (OMAP_FPGA_IRQ_BASE + 23) |
| #define OMAP1510_INT_FPGA3 (OMAP_FPGA_IRQ_BASE + 3) |
| #define OMAP1510_INT_FPGA4 (OMAP_FPGA_IRQ_BASE + 4) |
| #define OMAP1510_INT_FPGA5 (OMAP_FPGA_IRQ_BASE + 5) |
| #define OMAP1510_INT_FPGA6 (OMAP_FPGA_IRQ_BASE + 6) |
| #define OMAP1510_INT_FPGA7 (OMAP_FPGA_IRQ_BASE + 7) |
| #define OMAP1510_INT_FPGA8 (OMAP_FPGA_IRQ_BASE + 8) |
| #define OMAP1510_INT_FPGA9 (OMAP_FPGA_IRQ_BASE + 9) |
| #define OMAP1510_INT_FPGA_ACK (OMAP_FPGA_IRQ_BASE + 1) |
| #define OMAP1510_INT_FPGA_ATN (OMAP_FPGA_IRQ_BASE + 0) |
| #define OMAP1510_INT_FPGA_CAM (OMAP_FPGA_IRQ_BASE + 18) |
| #define OMAP1510_INT_FPGA_CD (OMAP_FPGA_IRQ_BASE + 21) |
| #define OMAP1510_INT_FPGA_RTC_A (OMAP_FPGA_IRQ_BASE + 19) |
| #define OMAP1510_INT_FPGA_RTC_B (OMAP_FPGA_IRQ_BASE + 20) |
| #define OMAP1510_INT_FPGA_TS (OMAP_FPGA_IRQ_BASE + 16) |
| #define OMAP1510_INT_FPGAUART1 (OMAP_FPGA_IRQ_BASE + 14) |
| #define OMAP1510_INT_FPGAUART2 (OMAP_FPGA_IRQ_BASE + 15) |
| #define OMAP1510P1_PPT_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x102) |
| #define OMAP1510P1_PPT_DATA IOMEM(OMAP1510_FPGA_BASE + 0x100) |
| #define OMAP1510P1_PPT_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x101) |
1.8.2