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Linux Kernel
3.7.1
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#include <linux/module.h>#include <linux/kernel.h>#include <linux/types.h>#include <linux/init.h>#include <linux/string.h>#include <linux/ioport.h>#include <linux/interrupt.h>#include <linux/delay.h>#include <linux/proc_fs.h>#include <linux/spinlock.h>#include <asm/dma.h>#include <asm/io.h>#include <linux/blkdev.h>#include <linux/isapnp.h>#include "scsi.h"#include <scsi/scsi_host.h>#include "sym53c416.h"#include "scsi_module.c"Go to the source code of this file.
Data Structures | |
| struct | host |
Macros | |
| #define | VERSION_STRING "Version 1.0.0-ac" |
| #define | TC_LOW 0x00 /* Transfer counter low */ |
| #define | TC_MID 0x01 /* Transfer counter mid */ |
| #define | SCSI_FIFO 0x02 /* SCSI FIFO register */ |
| #define | COMMAND_REG 0x03 /* Command Register */ |
| #define | STATUS_REG 0x04 /* Status Register (READ) */ |
| #define | DEST_BUS_ID 0x04 /* Destination Bus ID (WRITE) */ |
| #define | INT_REG 0x05 /* Interrupt Register (READ) */ |
| #define | TOM 0x05 /* Time out multiplier (WRITE) */ |
| #define | STP 0x06 /* Synchronous Transfer period */ |
| #define | SYNC_OFFSET 0x07 /* Synchronous Offset */ |
| #define | CONF_REG_1 0x08 /* Configuration register 1 */ |
| #define | CONF_REG_2 0x0B /* Configuration register 2 */ |
| #define | CONF_REG_3 0x0C /* Configuration register 3 */ |
| #define | CONF_REG_4 0x0D /* Configuration register 4 */ |
| #define | TC_HIGH 0x0E /* Transfer counter high */ |
| #define | PIO_FIFO_1 0x10 /* PIO FIFO register 1 */ |
| #define | PIO_FIFO_2 0x11 /* PIO FIFO register 2 */ |
| #define | PIO_FIFO_3 0x12 /* PIO FIFO register 3 */ |
| #define | PIO_FIFO_4 0x13 /* PIO FIFO register 4 */ |
| #define | PIO_FIFO_CNT 0x14 /* PIO FIFO count */ |
| #define | PIO_INT_REG 0x15 /* PIO interrupt register */ |
| #define | CONF_REG_5 0x16 /* Configuration register 5 */ |
| #define | FEATURE_EN 0x1D /* Feature Enable register */ |
| #define | SCM 0x80 /* Slow Cable Mode */ |
| #define | SRID 0x40 /* SCSI Reset Interrupt Disable */ |
| #define | PTM 0x20 /* Parity Test Mode */ |
| #define | EPC 0x10 /* Enable Parity Checking */ |
| #define | CTME 0x08 /* Special Test Mode */ |
| #define | FE 0x40 /* Features Enable */ |
| #define | SCSI2 0x08 /* SCSI 2 Enable */ |
| #define | TBPA 0x04 /* Target Bad Parity Abort */ |
| #define | IDMRC 0x80 /* ID Message Reserved Check */ |
| #define | QTE 0x40 /* Queue Tag Enable */ |
| #define | CDB10 0x20 /* Command Descriptor Block 10 */ |
| #define | FSCSI 0x10 /* FastSCSI */ |
| #define | FCLK 0x08 /* FastClock */ |
| #define | RBS 0x08 /* Register bank select */ |
| #define | EAN 0x04 /* Enable Active Negotiation */ |
| #define | LPSR 0x80 /* Lower Power SCSI Reset */ |
| #define | IE 0x20 /* Interrupt Enable */ |
| #define | LPM 0x02 /* Low Power Mode */ |
| #define | WSE0 0x01 /* 0WS Enable */ |
| #define | SRST 0x80 /* SCSI Reset */ |
| #define | ILCMD 0x40 /* Illegal Command */ |
| #define | DIS 0x20 /* Disconnect */ |
| #define | BS 0x10 /* Bus Service */ |
| #define | FC 0x08 /* Function Complete */ |
| #define | RESEL 0x04 /* Reselected */ |
| #define | SI 0x03 /* Selection Interrupt */ |
| #define | SCI 0x80 /* SCSI Core Int */ |
| #define | GE 0x40 /* Gross Error */ |
| #define | PE 0x20 /* Parity Error */ |
| #define | TC 0x10 /* Terminal Count */ |
| #define | VGC 0x08 /* Valid Group Code */ |
| #define | PHBITS 0x07 /* Phase bits */ |
| #define | SCI 0x80 /* SCSI Core Int */ |
| #define | PFI 0x40 /* PIO FIFO Interrupt */ |
| #define | FULL 0x20 /* PIO FIFO Full */ |
| #define | EMPTY 0x10 /* PIO FIFO Empty */ |
| #define | CE 0x08 /* Collision Error */ |
| #define | OUE 0x04 /* Overflow / Underflow error */ |
| #define | FIE 0x02 /* Full Interrupt Enable */ |
| #define | EIE 0x01 /* Empty Interrupt Enable */ |
| #define | PHASE_DATA_OUT 0x00 |
| #define | PHASE_DATA_IN 0x01 |
| #define | PHASE_COMMAND 0x02 |
| #define | PHASE_STATUS 0x03 |
| #define | PHASE_RESERVED_1 0x04 |
| #define | PHASE_RESERVED_2 0x05 |
| #define | PHASE_MESSAGE_OUT 0x06 |
| #define | PHASE_MESSAGE_IN 0x07 |
| #define | NOOP 0x00 |
| #define | FLUSH_FIFO 0x01 |
| #define | RESET_CHIP 0x02 |
| #define | RESET_SCSI_BUS 0x03 |
| #define | DISABLE_SEL_RESEL 0x45 |
| #define | RESEL_SEQ 0x40 |
| #define | SEL_WITHOUT_ATN_SEQ 0x41 |
| #define | SEL_WITH_ATN_SEQ 0x42 |
| #define | SEL_WITH_ATN_AND_STOP_SEQ 0x43 |
| #define | ENABLE_SEL_RESEL 0x44 |
| #define | SEL_WITH_ATN3_SEQ 0x46 |
| #define | RESEL3_SEQ 0x47 |
| #define | SND_MSG 0x20 |
| #define | SND_STAT 0x21 |
| #define | SND_DATA 0x22 |
| #define | DISCONNECT_SEQ 0x23 |
| #define | TERMINATE_SEQ 0x24 |
| #define | TARGET_COMM_COMPLETE_SEQ 0x25 |
| #define | DISCONN 0x27 |
| #define | RECV_MSG_SEQ 0x28 |
| #define | RECV_CMD 0x29 |
| #define | RECV_DATA 0x2A |
| #define | RECV_CMD_SEQ 0x2B |
| #define | TARGET_ABORT_PIO 0x04 |
| #define | TRANSFER_INFORMATION 0x10 |
| #define | INIT_COMM_COMPLETE_SEQ 0x11 |
| #define | MSG_ACCEPTED 0x12 |
| #define | TRANSFER_PAD 0x18 |
| #define | SET_ATN 0x1A |
| #define | RESET_ATN 0x1B |
| #define | ILLEGAL 0xFF |
| #define | PIO_MODE 0x80 |
| #define | IO_RANGE 0x20 /* 0x00 - 0x1F */ |
| #define | ID "sym53c416" /* Attention: copied to the sym53c416.h */ |
| #define | PIO_SIZE 128 /* Size of PIO fifo is 128 bytes */ |
| #define | READ_TIMEOUT 150 |
| #define | WRITE_TIMEOUT 150 |
| #define | MAXHOSTS 4 |
| #define | SG_ADDRESS(buffer) ((char *) sg_virt((buffer))) |
Enumerations | |
| enum | phases { idle, data_out, data_in, command_ph, status_ph, message_out, message_in } |
Functions | |
| void | sym53c416_setup (char *str, int *ints) |
| MODULE_DEVICE_TABLE (isapnp, id_table) | |
| int __init | sym53c416_detect (struct scsi_host_template *tpnt) |
| const char * | sym53c416_info (struct Scsi_Host *SChost) |
| #define BS 0x10 /* Bus Service */ |
Definition at line 107 of file sym53c416.c.
| #define CDB10 0x20 /* Command Descriptor Block 10 */ |
Definition at line 89 of file sym53c416.c.
| #define CE 0x08 /* Collision Error */ |
Definition at line 125 of file sym53c416.c.
| #define COMMAND_REG 0x03 /* Command Register */ |
Definition at line 52 of file sym53c416.c.
| #define CONF_REG_1 0x08 /* Configuration register 1 */ |
Definition at line 59 of file sym53c416.c.
| #define CONF_REG_2 0x0B /* Configuration register 2 */ |
Definition at line 60 of file sym53c416.c.
| #define CONF_REG_3 0x0C /* Configuration register 3 */ |
Definition at line 61 of file sym53c416.c.
| #define CONF_REG_4 0x0D /* Configuration register 4 */ |
Definition at line 62 of file sym53c416.c.
| #define CONF_REG_5 0x16 /* Configuration register 5 */ |
Definition at line 70 of file sym53c416.c.
| #define CTME 0x08 /* Special Test Mode */ |
Definition at line 79 of file sym53c416.c.
| #define DEST_BUS_ID 0x04 /* Destination Bus ID (WRITE) */ |
Definition at line 54 of file sym53c416.c.
| #define DIS 0x20 /* Disconnect */ |
Definition at line 106 of file sym53c416.c.
| #define DISABLE_SEL_RESEL 0x45 |
Definition at line 145 of file sym53c416.c.
| #define DISCONN 0x27 |
Definition at line 159 of file sym53c416.c.
| #define DISCONNECT_SEQ 0x23 |
Definition at line 156 of file sym53c416.c.
| #define EAN 0x04 /* Enable Active Negotiation */ |
Definition at line 95 of file sym53c416.c.
| #define EIE 0x01 /* Empty Interrupt Enable */ |
Definition at line 128 of file sym53c416.c.
| #define EMPTY 0x10 /* PIO FIFO Empty */ |
Definition at line 124 of file sym53c416.c.
| #define ENABLE_SEL_RESEL 0x44 |
Definition at line 150 of file sym53c416.c.
| #define EPC 0x10 /* Enable Parity Checking */ |
Definition at line 78 of file sym53c416.c.
| #define FC 0x08 /* Function Complete */ |
Definition at line 108 of file sym53c416.c.
| #define FCLK 0x08 /* FastClock */ |
Definition at line 91 of file sym53c416.c.
| #define FE 0x40 /* Features Enable */ |
Definition at line 82 of file sym53c416.c.
| #define FEATURE_EN 0x1D /* Feature Enable register */ |
Definition at line 71 of file sym53c416.c.
| #define FIE 0x02 /* Full Interrupt Enable */ |
Definition at line 127 of file sym53c416.c.
| #define FLUSH_FIFO 0x01 |
Definition at line 142 of file sym53c416.c.
| #define FSCSI 0x10 /* FastSCSI */ |
Definition at line 90 of file sym53c416.c.
| #define FULL 0x20 /* PIO FIFO Full */ |
Definition at line 123 of file sym53c416.c.
| #define GE 0x40 /* Gross Error */ |
Definition at line 114 of file sym53c416.c.
| #define ID "sym53c416" /* Attention: copied to the sym53c416.h */ |
Definition at line 176 of file sym53c416.c.
| #define IDMRC 0x80 /* ID Message Reserved Check */ |
Definition at line 87 of file sym53c416.c.
| #define IE 0x20 /* Interrupt Enable */ |
Definition at line 99 of file sym53c416.c.
| #define ILCMD 0x40 /* Illegal Command */ |
Definition at line 105 of file sym53c416.c.
| #define ILLEGAL 0xFF |
Definition at line 171 of file sym53c416.c.
| #define INIT_COMM_COMPLETE_SEQ 0x11 |
Definition at line 166 of file sym53c416.c.
| #define INT_REG 0x05 /* Interrupt Register (READ) */ |
Definition at line 55 of file sym53c416.c.
| #define IO_RANGE 0x20 /* 0x00 - 0x1F */ |
Definition at line 175 of file sym53c416.c.
| #define LPM 0x02 /* Low Power Mode */ |
Definition at line 100 of file sym53c416.c.
| #define LPSR 0x80 /* Lower Power SCSI Reset */ |
Definition at line 98 of file sym53c416.c.
| #define MAXHOSTS 4 |
Definition at line 196 of file sym53c416.c.
| #define MSG_ACCEPTED 0x12 |
Definition at line 167 of file sym53c416.c.
| #define NOOP 0x00 |
Definition at line 141 of file sym53c416.c.
| #define OUE 0x04 /* Overflow / Underflow error */ |
Definition at line 126 of file sym53c416.c.
| #define PE 0x20 /* Parity Error */ |
Definition at line 115 of file sym53c416.c.
| #define PFI 0x40 /* PIO FIFO Interrupt */ |
Definition at line 122 of file sym53c416.c.
| #define PHASE_COMMAND 0x02 |
Definition at line 133 of file sym53c416.c.
| #define PHASE_DATA_IN 0x01 |
Definition at line 132 of file sym53c416.c.
| #define PHASE_DATA_OUT 0x00 |
Definition at line 131 of file sym53c416.c.
| #define PHASE_MESSAGE_IN 0x07 |
Definition at line 138 of file sym53c416.c.
| #define PHASE_MESSAGE_OUT 0x06 |
Definition at line 137 of file sym53c416.c.
| #define PHASE_RESERVED_1 0x04 |
Definition at line 135 of file sym53c416.c.
| #define PHASE_RESERVED_2 0x05 |
Definition at line 136 of file sym53c416.c.
| #define PHASE_STATUS 0x03 |
Definition at line 134 of file sym53c416.c.
| #define PHBITS 0x07 /* Phase bits */ |
Definition at line 118 of file sym53c416.c.
| #define PIO_FIFO_1 0x10 /* PIO FIFO register 1 */ |
Definition at line 64 of file sym53c416.c.
| #define PIO_FIFO_2 0x11 /* PIO FIFO register 2 */ |
Definition at line 65 of file sym53c416.c.
| #define PIO_FIFO_3 0x12 /* PIO FIFO register 3 */ |
Definition at line 66 of file sym53c416.c.
| #define PIO_FIFO_4 0x13 /* PIO FIFO register 4 */ |
Definition at line 67 of file sym53c416.c.
| #define PIO_FIFO_CNT 0x14 /* PIO FIFO count */ |
Definition at line 68 of file sym53c416.c.
| #define PIO_INT_REG 0x15 /* PIO interrupt register */ |
Definition at line 69 of file sym53c416.c.
| #define PIO_MODE 0x80 |
Definition at line 173 of file sym53c416.c.
Definition at line 177 of file sym53c416.c.
| #define PTM 0x20 /* Parity Test Mode */ |
Definition at line 77 of file sym53c416.c.
| #define QTE 0x40 /* Queue Tag Enable */ |
Definition at line 88 of file sym53c416.c.
| #define RBS 0x08 /* Register bank select */ |
Definition at line 94 of file sym53c416.c.
| #define READ_TIMEOUT 150 |
Definition at line 179 of file sym53c416.c.
| #define RECV_CMD 0x29 |
Definition at line 161 of file sym53c416.c.
| #define RECV_CMD_SEQ 0x2B |
Definition at line 163 of file sym53c416.c.
| #define RECV_DATA 0x2A |
Definition at line 162 of file sym53c416.c.
| #define RECV_MSG_SEQ 0x28 |
Definition at line 160 of file sym53c416.c.
| #define RESEL 0x04 /* Reselected */ |
Definition at line 109 of file sym53c416.c.
| #define RESEL3_SEQ 0x47 |
Definition at line 152 of file sym53c416.c.
| #define RESEL_SEQ 0x40 |
Definition at line 146 of file sym53c416.c.
| #define RESET_ATN 0x1B |
Definition at line 170 of file sym53c416.c.
| #define RESET_CHIP 0x02 |
Definition at line 143 of file sym53c416.c.
| #define RESET_SCSI_BUS 0x03 |
Definition at line 144 of file sym53c416.c.
| #define SCI 0x80 /* SCSI Core Int */ |
Definition at line 121 of file sym53c416.c.
| #define SCI 0x80 /* SCSI Core Int */ |
Definition at line 121 of file sym53c416.c.
| #define SCM 0x80 /* Slow Cable Mode */ |
Definition at line 75 of file sym53c416.c.
| #define SCSI2 0x08 /* SCSI 2 Enable */ |
Definition at line 83 of file sym53c416.c.
| #define SCSI_FIFO 0x02 /* SCSI FIFO register */ |
Definition at line 51 of file sym53c416.c.
| #define SEL_WITH_ATN3_SEQ 0x46 |
Definition at line 151 of file sym53c416.c.
| #define SEL_WITH_ATN_AND_STOP_SEQ 0x43 |
Definition at line 149 of file sym53c416.c.
| #define SEL_WITH_ATN_SEQ 0x42 |
Definition at line 148 of file sym53c416.c.
| #define SEL_WITHOUT_ATN_SEQ 0x41 |
Definition at line 147 of file sym53c416.c.
| #define SET_ATN 0x1A |
Definition at line 169 of file sym53c416.c.
Definition at line 198 of file sym53c416.c.
| #define SI 0x03 /* Selection Interrupt */ |
Definition at line 110 of file sym53c416.c.
| #define SND_DATA 0x22 |
Definition at line 155 of file sym53c416.c.
| #define SND_MSG 0x20 |
Definition at line 153 of file sym53c416.c.
| #define SND_STAT 0x21 |
Definition at line 154 of file sym53c416.c.
| #define SRID 0x40 /* SCSI Reset Interrupt Disable */ |
Definition at line 76 of file sym53c416.c.
| #define SRST 0x80 /* SCSI Reset */ |
Definition at line 104 of file sym53c416.c.
| #define STATUS_REG 0x04 /* Status Register (READ) */ |
Definition at line 53 of file sym53c416.c.
| #define STP 0x06 /* Synchronous Transfer period */ |
Definition at line 57 of file sym53c416.c.
| #define SYNC_OFFSET 0x07 /* Synchronous Offset */ |
Definition at line 58 of file sym53c416.c.
| #define TARGET_ABORT_PIO 0x04 |
Definition at line 164 of file sym53c416.c.
| #define TARGET_COMM_COMPLETE_SEQ 0x25 |
Definition at line 158 of file sym53c416.c.
| #define TBPA 0x04 /* Target Bad Parity Abort */ |
Definition at line 84 of file sym53c416.c.
| #define TC 0x10 /* Terminal Count */ |
Definition at line 116 of file sym53c416.c.
| #define TC_HIGH 0x0E /* Transfer counter high */ |
Definition at line 63 of file sym53c416.c.
| #define TC_LOW 0x00 /* Transfer counter low */ |
Definition at line 49 of file sym53c416.c.
| #define TC_MID 0x01 /* Transfer counter mid */ |
Definition at line 50 of file sym53c416.c.
| #define TERMINATE_SEQ 0x24 |
Definition at line 157 of file sym53c416.c.
| #define TOM 0x05 /* Time out multiplier (WRITE) */ |
Definition at line 56 of file sym53c416.c.
| #define TRANSFER_INFORMATION 0x10 |
Definition at line 165 of file sym53c416.c.
| #define TRANSFER_PAD 0x18 |
Definition at line 168 of file sym53c416.c.
| #define VERSION_STRING "Version 1.0.0-ac" |
Definition at line 47 of file sym53c416.c.
| #define VGC 0x08 /* Valid Group Code */ |
Definition at line 117 of file sym53c416.c.
| #define WRITE_TIMEOUT 150 |
Definition at line 180 of file sym53c416.c.
| #define WSE0 0x01 /* 0WS Enable */ |
Definition at line 101 of file sym53c416.c.
| enum phases |
Definition at line 200 of file sym53c416.c.
| MODULE_DEVICE_TABLE | ( | isapnp | , |
| id_table | |||
| ) |
| int __init sym53c416_detect | ( | struct scsi_host_template * | tpnt | ) |
Definition at line 611 of file sym53c416.c.
Definition at line 544 of file sym53c416.c.
1.8.2