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async_xor.c
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1 /*
2  * xor offload engine api
3  *
4  * Copyright © 2006, Intel Corporation.
5  *
6  * Dan Williams <[email protected]>
7  *
8  * with architecture considerations by:
9  * Neil Brown <[email protected]>
10  * Jeff Garzik <[email protected]>
11  *
12  * This program is free software; you can redistribute it and/or modify it
13  * under the terms and conditions of the GNU General Public License,
14  * version 2, as published by the Free Software Foundation.
15  *
16  * This program is distributed in the hope it will be useful, but WITHOUT
17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19  * more details.
20  *
21  * You should have received a copy of the GNU General Public License along with
22  * this program; if not, write to the Free Software Foundation, Inc.,
23  * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24  *
25  */
26 #include <linux/kernel.h>
27 #include <linux/interrupt.h>
28 #include <linux/module.h>
29 #include <linux/mm.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/raid/xor.h>
32 #include <linux/async_tx.h>
33 
34 /* do_async_xor - dma map the pages and perform the xor with an engine */
36 do_async_xor(struct dma_chan *chan, struct page *dest, struct page **src_list,
37  unsigned int offset, int src_cnt, size_t len, dma_addr_t *dma_src,
38  struct async_submit_ctl *submit)
39 {
40  struct dma_device *dma = chan->device;
42  int src_off = 0;
43  int i;
44  dma_async_tx_callback cb_fn_orig = submit->cb_fn;
45  void *cb_param_orig = submit->cb_param;
46  enum async_tx_flags flags_orig = submit->flags;
47  enum dma_ctrl_flags dma_flags;
48  int xor_src_cnt = 0;
49  dma_addr_t dma_dest;
50 
51  /* map the dest bidrectional in case it is re-used as a source */
52  dma_dest = dma_map_page(dma->dev, dest, offset, len, DMA_BIDIRECTIONAL);
53  for (i = 0; i < src_cnt; i++) {
54  /* only map the dest once */
55  if (!src_list[i])
56  continue;
57  if (unlikely(src_list[i] == dest)) {
58  dma_src[xor_src_cnt++] = dma_dest;
59  continue;
60  }
61  dma_src[xor_src_cnt++] = dma_map_page(dma->dev, src_list[i], offset,
62  len, DMA_TO_DEVICE);
63  }
64  src_cnt = xor_src_cnt;
65 
66  while (src_cnt) {
67  submit->flags = flags_orig;
68  dma_flags = 0;
69  xor_src_cnt = min(src_cnt, (int)dma->max_xor);
70  /* if we are submitting additional xors, leave the chain open,
71  * clear the callback parameters, and leave the destination
72  * buffer mapped
73  */
74  if (src_cnt > xor_src_cnt) {
75  submit->flags &= ~ASYNC_TX_ACK;
76  submit->flags |= ASYNC_TX_FENCE;
77  dma_flags = DMA_COMPL_SKIP_DEST_UNMAP;
78  submit->cb_fn = NULL;
79  submit->cb_param = NULL;
80  } else {
81  submit->cb_fn = cb_fn_orig;
82  submit->cb_param = cb_param_orig;
83  }
84  if (submit->cb_fn)
85  dma_flags |= DMA_PREP_INTERRUPT;
86  if (submit->flags & ASYNC_TX_FENCE)
87  dma_flags |= DMA_PREP_FENCE;
88  /* Since we have clobbered the src_list we are committed
89  * to doing this asynchronously. Drivers force forward progress
90  * in case they can not provide a descriptor
91  */
92  tx = dma->device_prep_dma_xor(chan, dma_dest, &dma_src[src_off],
93  xor_src_cnt, len, dma_flags);
94 
95  if (unlikely(!tx))
96  async_tx_quiesce(&submit->depend_tx);
97 
98  /* spin wait for the preceding transactions to complete */
99  while (unlikely(!tx)) {
100  dma_async_issue_pending(chan);
101  tx = dma->device_prep_dma_xor(chan, dma_dest,
102  &dma_src[src_off],
103  xor_src_cnt, len,
104  dma_flags);
105  }
106 
107  async_tx_submit(chan, tx, submit);
108  submit->depend_tx = tx;
109 
110  if (src_cnt > xor_src_cnt) {
111  /* drop completed sources */
112  src_cnt -= xor_src_cnt;
113  src_off += xor_src_cnt;
114 
115  /* use the intermediate result a source */
116  dma_src[--src_off] = dma_dest;
117  src_cnt++;
118  } else
119  break;
120  }
121 
122  return tx;
123 }
124 
125 static void
126 do_sync_xor(struct page *dest, struct page **src_list, unsigned int offset,
127  int src_cnt, size_t len, struct async_submit_ctl *submit)
128 {
129  int i;
130  int xor_src_cnt = 0;
131  int src_off = 0;
132  void *dest_buf;
133  void **srcs;
134 
135  if (submit->scribble)
136  srcs = submit->scribble;
137  else
138  srcs = (void **) src_list;
139 
140  /* convert to buffer pointers */
141  for (i = 0; i < src_cnt; i++)
142  if (src_list[i])
143  srcs[xor_src_cnt++] = page_address(src_list[i]) + offset;
144  src_cnt = xor_src_cnt;
145  /* set destination address */
146  dest_buf = page_address(dest) + offset;
147 
148  if (submit->flags & ASYNC_TX_XOR_ZERO_DST)
149  memset(dest_buf, 0, len);
150 
151  while (src_cnt > 0) {
152  /* process up to 'MAX_XOR_BLOCKS' sources */
153  xor_src_cnt = min(src_cnt, MAX_XOR_BLOCKS);
154  xor_blocks(xor_src_cnt, len, dest_buf, &srcs[src_off]);
155 
156  /* drop completed sources */
157  src_cnt -= xor_src_cnt;
158  src_off += xor_src_cnt;
159  }
160 
161  async_tx_sync_epilog(submit);
162 }
163 
186 async_xor(struct page *dest, struct page **src_list, unsigned int offset,
187  int src_cnt, size_t len, struct async_submit_ctl *submit)
188 {
189  struct dma_chan *chan = async_tx_find_channel(submit, DMA_XOR,
190  &dest, 1, src_list,
191  src_cnt, len);
192  dma_addr_t *dma_src = NULL;
193 
194  BUG_ON(src_cnt <= 1);
195 
196  if (submit->scribble)
197  dma_src = submit->scribble;
198  else if (sizeof(dma_addr_t) <= sizeof(struct page *))
199  dma_src = (dma_addr_t *) src_list;
200 
201  if (dma_src && chan && is_dma_xor_aligned(chan->device, offset, 0, len)) {
202  /* run the xor asynchronously */
203  pr_debug("%s (async): len: %zu\n", __func__, len);
204 
205  return do_async_xor(chan, dest, src_list, offset, src_cnt, len,
206  dma_src, submit);
207  } else {
208  /* run the xor synchronously */
209  pr_debug("%s (sync): len: %zu\n", __func__, len);
210  WARN_ONCE(chan, "%s: no space for dma address conversion\n",
211  __func__);
212 
213  /* in the sync case the dest is an implied source
214  * (assumes the dest is the first source)
215  */
216  if (submit->flags & ASYNC_TX_XOR_DROP_DST) {
217  src_cnt--;
218  src_list++;
219  }
220 
221  /* wait for any prerequisite operations */
222  async_tx_quiesce(&submit->depend_tx);
223 
224  do_sync_xor(dest, src_list, offset, src_cnt, len, submit);
225 
226  return NULL;
227  }
228 }
230 
231 static int page_is_zero(struct page *p, unsigned int offset, size_t len)
232 {
233  char *a = page_address(p) + offset;
234  return ((*(u32 *) a) == 0 &&
235  memcmp(a, a + 4, len - 4) == 0);
236 }
237 
238 static inline struct dma_chan *
239 xor_val_chan(struct async_submit_ctl *submit, struct page *dest,
240  struct page **src_list, int src_cnt, size_t len)
241 {
242  #ifdef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA
243  return NULL;
244  #endif
245  return async_tx_find_channel(submit, DMA_XOR_VAL, &dest, 1, src_list,
246  src_cnt, len);
247 }
248 
266 async_xor_val(struct page *dest, struct page **src_list, unsigned int offset,
267  int src_cnt, size_t len, enum sum_check_flags *result,
268  struct async_submit_ctl *submit)
269 {
270  struct dma_chan *chan = xor_val_chan(submit, dest, src_list, src_cnt, len);
271  struct dma_device *device = chan ? chan->device : NULL;
272  struct dma_async_tx_descriptor *tx = NULL;
273  dma_addr_t *dma_src = NULL;
274 
275  BUG_ON(src_cnt <= 1);
276 
277  if (submit->scribble)
278  dma_src = submit->scribble;
279  else if (sizeof(dma_addr_t) <= sizeof(struct page *))
280  dma_src = (dma_addr_t *) src_list;
281 
282  if (dma_src && device && src_cnt <= device->max_xor &&
283  is_dma_xor_aligned(device, offset, 0, len)) {
284  unsigned long dma_prep_flags = 0;
285  int i;
286 
287  pr_debug("%s: (async) len: %zu\n", __func__, len);
288 
289  if (submit->cb_fn)
290  dma_prep_flags |= DMA_PREP_INTERRUPT;
291  if (submit->flags & ASYNC_TX_FENCE)
292  dma_prep_flags |= DMA_PREP_FENCE;
293  for (i = 0; i < src_cnt; i++)
294  dma_src[i] = dma_map_page(device->dev, src_list[i],
295  offset, len, DMA_TO_DEVICE);
296 
297  tx = device->device_prep_dma_xor_val(chan, dma_src, src_cnt,
298  len, result,
299  dma_prep_flags);
300  if (unlikely(!tx)) {
301  async_tx_quiesce(&submit->depend_tx);
302 
303  while (!tx) {
304  dma_async_issue_pending(chan);
305  tx = device->device_prep_dma_xor_val(chan,
306  dma_src, src_cnt, len, result,
307  dma_prep_flags);
308  }
309  }
310 
311  async_tx_submit(chan, tx, submit);
312  } else {
313  enum async_tx_flags flags_orig = submit->flags;
314 
315  pr_debug("%s: (sync) len: %zu\n", __func__, len);
316  WARN_ONCE(device && src_cnt <= device->max_xor,
317  "%s: no space for dma address conversion\n",
318  __func__);
319 
320  submit->flags |= ASYNC_TX_XOR_DROP_DST;
321  submit->flags &= ~ASYNC_TX_ACK;
322 
323  tx = async_xor(dest, src_list, offset, src_cnt, len, submit);
324 
325  async_tx_quiesce(&tx);
326 
327  *result = !page_is_zero(dest, offset, len) << SUM_CHECK_P;
328 
329  async_tx_sync_epilog(submit);
330  submit->flags = flags_orig;
331  }
332 
333  return tx;
334 }
336 
337 MODULE_AUTHOR("Intel Corporation");
338 MODULE_DESCRIPTION("asynchronous xor/xor-zero-sum api");
339 MODULE_LICENSE("GPL");