atafdreg.h File Reference

Go to the source code of this file.

Macros
#define	FDCSELREG_STP   (0x80) /* command/status register */
#define	FDCSELREG_TRA   (0x82) /* track register */
#define	FDCSELREG_SEC   (0x84) /* sector register */
#define	FDCSELREG_DTA   (0x86) /* data register */
#define	FDCREG_CMD   0
#define	FDCREG_STATUS   0
#define	FDCREG_TRACK   2
#define	FDCREG_SECTOR   4
#define	FDCREG_DATA   6
#define	FDCCMD_RESTORE   (0x00) /* - */
#define	FDCCMD_SEEK   (0x10) /* | */
#define	FDCCMD_STEP   (0x20) /* | TYP 1 Commands */
#define	FDCCMD_STIN   (0x40) /* | */
#define	FDCCMD_STOT   (0x60) /* - */
#define	FDCCMD_RDSEC   (0x80) /* - TYP 2 Commands */
#define	FDCCMD_WRSEC   (0xa0) /* - " */
#define	FDCCMD_RDADR   (0xc0) /* - */
#define	FDCCMD_RDTRA   (0xe0) /* | TYP 3 Commands */
#define	FDCCMD_WRTRA   (0xf0) /* - */
#define	FDCCMD_FORCI   (0xd0) /* - TYP 4 Command */
#define	FDCCMDADD_SR6   (0x00) /* step rate settings */
#define	FDCCMDADD_SR12   (0x01)
#define	FDCCMDADD_SR2   (0x02)
#define	FDCCMDADD_SR3   (0x03)
#define	FDCCMDADD_V   (0x04) /* verify */
#define	FDCCMDADD_H   (0x08) /* wait for spin-up */
#define	FDCCMDADD_U   (0x10) /* update track register */
#define	FDCCMDADD_M   (0x10) /* multiple sector access */
#define	FDCCMDADD_E   (0x04) /* head settling flag */
#define	FDCCMDADD_P   (0x02) /* precompensation off */
#define	FDCCMDADD_A0   (0x01) /* DAM flag */
#define	FDCSTAT_MOTORON   (0x80) /* motor on */
#define	FDCSTAT_WPROT   (0x40) /* write protected (FDCCMD_WR*) */
#define	FDCSTAT_SPINUP   (0x20) /* motor speed stable (Type I) */
#define	FDCSTAT_DELDAM   (0x20) /* sector has deleted DAM (Type II+III) */
#define	FDCSTAT_RECNF   (0x10) /* record not found */
#define	FDCSTAT_CRC   (0x08) /* CRC error */
#define	FDCSTAT_TR00   (0x04) /* Track 00 flag (Type I) */
#define	FDCSTAT_LOST   (0x04) /* Lost Data (Type II+III) */
#define	FDCSTAT_IDX   (0x02) /* Index status (Type I) */
#define	FDCSTAT_DRQ   (0x02) /* DRQ status (Type II+III) */
#define	FDCSTAT_BUSY   (0x01) /* FDC is busy */
#define	DSKSIDE   (0x01)
#define	DSKDRVNONE   (0x06)
#define	DSKDRV0   (0x02)
#define	DSKDRV1   (0x04)
#define	FDCSTEP_6   0x00
#define	FDCSTEP_12   0x01
#define	FDCSTEP_2   0x02
#define	FDCSTEP_3   0x03

Macro Definition Documentation

#define DSKDRV0   (0x02)

Definition at line 70 of file atafdreg.h.

#define DSKDRV1   (0x04)

Definition at line 71 of file atafdreg.h.

#define DSKDRVNONE   (0x06)

Definition at line 69 of file atafdreg.h.

#define DSKSIDE   (0x01)

Definition at line 67 of file atafdreg.h.

#define FDCCMD_FORCI   (0xd0) /* - TYP 4 Command */

Definition at line 35 of file atafdreg.h.

#define FDCCMD_RDADR   (0xc0) /* - */

Definition at line 32 of file atafdreg.h.

#define FDCCMD_RDSEC   (0x80) /* - TYP 2 Commands */

Definition at line 30 of file atafdreg.h.

#define FDCCMD_RDTRA   (0xe0) /* | TYP 3 Commands */

Definition at line 33 of file atafdreg.h.

#define FDCCMD_RESTORE   (0x00) /* - */

Definition at line 25 of file atafdreg.h.

#define FDCCMD_SEEK   (0x10) /* | */

Definition at line 26 of file atafdreg.h.

#define FDCCMD_STEP   (0x20) /* | TYP 1 Commands */

Definition at line 27 of file atafdreg.h.

#define FDCCMD_STIN   (0x40) /* | */

Definition at line 28 of file atafdreg.h.

#define FDCCMD_STOT   (0x60) /* - */

Definition at line 29 of file atafdreg.h.

#define FDCCMD_WRSEC   (0xa0) /* - " */

Definition at line 31 of file atafdreg.h.

#define FDCCMD_WRTRA   (0xf0) /* - */

Definition at line 34 of file atafdreg.h.

#define FDCCMDADD_A0   (0x01) /* DAM flag */

Definition at line 49 of file atafdreg.h.

#define FDCCMDADD_E   (0x04) /* head settling flag */

Definition at line 47 of file atafdreg.h.

#define FDCCMDADD_H   (0x08) /* wait for spin-up */

Definition at line 44 of file atafdreg.h.

#define FDCCMDADD_M   (0x10) /* multiple sector access */

Definition at line 46 of file atafdreg.h.

#define FDCCMDADD_P   (0x02) /* precompensation off */

Definition at line 48 of file atafdreg.h.

#define FDCCMDADD_SR12   (0x01)

Definition at line 40 of file atafdreg.h.

#define FDCCMDADD_SR2   (0x02)

Definition at line 41 of file atafdreg.h.

#define FDCCMDADD_SR3   (0x03)

Definition at line 42 of file atafdreg.h.

#define FDCCMDADD_SR6   (0x00) /* step rate settings */

Definition at line 39 of file atafdreg.h.

#define FDCCMDADD_U   (0x10) /* update track register */

Definition at line 45 of file atafdreg.h.

#define FDCCMDADD_V   (0x04) /* verify */

Definition at line 43 of file atafdreg.h.

#define FDCREG_CMD   0

Definition at line 17 of file atafdreg.h.

#define FDCREG_DATA   6

Definition at line 21 of file atafdreg.h.

#define FDCREG_SECTOR   4

Definition at line 20 of file atafdreg.h.

#define FDCREG_STATUS   0

Definition at line 18 of file atafdreg.h.

#define FDCREG_TRACK   2

Definition at line 19 of file atafdreg.h.

#define FDCSELREG_DTA   (0x86) /* data register */

Definition at line 13 of file atafdreg.h.

#define FDCSELREG_SEC   (0x84) /* sector register */

Definition at line 12 of file atafdreg.h.

#define FDCSELREG_STP   (0x80) /* command/status register */

Definition at line 10 of file atafdreg.h.

#define FDCSELREG_TRA   (0x82) /* track register */

Definition at line 11 of file atafdreg.h.

#define FDCSTAT_BUSY   (0x01) /* FDC is busy */

Definition at line 63 of file atafdreg.h.

#define FDCSTAT_CRC   (0x08) /* CRC error */

Definition at line 58 of file atafdreg.h.

#define FDCSTAT_DELDAM   (0x20) /* sector has deleted DAM (Type II+III) */

Definition at line 56 of file atafdreg.h.

#define FDCSTAT_DRQ   (0x02) /* DRQ status (Type II+III) */

Definition at line 62 of file atafdreg.h.

#define FDCSTAT_IDX   (0x02) /* Index status (Type I) */

Definition at line 61 of file atafdreg.h.

#define FDCSTAT_LOST   (0x04) /* Lost Data (Type II+III) */

Definition at line 60 of file atafdreg.h.

#define FDCSTAT_MOTORON   (0x80) /* motor on */

Definition at line 53 of file atafdreg.h.

#define FDCSTAT_RECNF   (0x10) /* record not found */

Definition at line 57 of file atafdreg.h.

#define FDCSTAT_SPINUP   (0x20) /* motor speed stable (Type I) */

Definition at line 55 of file atafdreg.h.

#define FDCSTAT_TR00   (0x04) /* Track 00 flag (Type I) */

Definition at line 59 of file atafdreg.h.

#define FDCSTAT_WPROT   (0x40) /* write protected (FDCCMD_WR*) */

Definition at line 54 of file atafdreg.h.

#define FDCSTEP_12   0x01

Definition at line 75 of file atafdreg.h.

#define FDCSTEP_2   0x02

Definition at line 76 of file atafdreg.h.

#define FDCSTEP_3   0x03

Definition at line 77 of file atafdreg.h.

#define FDCSTEP_6   0x00

Definition at line 74 of file atafdreg.h.