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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Macros | |
| #define | ATMEL_ECC_CR 0x00 /* Control register */ |
| #define | ATMEL_ECC_RST (1 << 0) /* Reset parity */ |
| #define | ATMEL_ECC_MR 0x04 /* Mode register */ |
| #define | ATMEL_ECC_PAGESIZE (3 << 0) /* Page Size */ |
| #define | ATMEL_ECC_PAGESIZE_528 (0) |
| #define | ATMEL_ECC_PAGESIZE_1056 (1) |
| #define | ATMEL_ECC_PAGESIZE_2112 (2) |
| #define | ATMEL_ECC_PAGESIZE_4224 (3) |
| #define | ATMEL_ECC_SR 0x08 /* Status register */ |
| #define | ATMEL_ECC_RECERR (1 << 0) /* Recoverable Error */ |
| #define | ATMEL_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */ |
| #define | ATMEL_ECC_MULERR (1 << 2) /* Multiple Errors */ |
| #define | ATMEL_ECC_PR 0x0c /* Parity register */ |
| #define | ATMEL_ECC_BITADDR (0xf << 0) /* Bit Error Address */ |
| #define | ATMEL_ECC_WORDADDR (0xfff << 4) /* Word Error Address */ |
| #define | ATMEL_ECC_NPR 0x10 /* NParity register */ |
| #define | ATMEL_ECC_NPARITY (0xffff << 0) /* NParity */ |
| #define | ATMEL_PMECC_CFG 0x000 /* Configuration Register */ |
| #define | PMECC_CFG_BCH_ERR2 (0 << 0) |
| #define | PMECC_CFG_BCH_ERR4 (1 << 0) |
| #define | PMECC_CFG_BCH_ERR8 (2 << 0) |
| #define | PMECC_CFG_BCH_ERR12 (3 << 0) |
| #define | PMECC_CFG_BCH_ERR24 (4 << 0) |
| #define | PMECC_CFG_SECTOR512 (0 << 4) |
| #define | PMECC_CFG_SECTOR1024 (1 << 4) |
| #define | PMECC_CFG_PAGE_1SECTOR (0 << 8) |
| #define | PMECC_CFG_PAGE_2SECTORS (1 << 8) |
| #define | PMECC_CFG_PAGE_4SECTORS (2 << 8) |
| #define | PMECC_CFG_PAGE_8SECTORS (3 << 8) |
| #define | PMECC_CFG_READ_OP (0 << 12) |
| #define | PMECC_CFG_WRITE_OP (1 << 12) |
| #define | PMECC_CFG_SPARE_ENABLE (1 << 16) |
| #define | PMECC_CFG_SPARE_DISABLE (0 << 16) |
| #define | PMECC_CFG_AUTO_ENABLE (1 << 20) |
| #define | PMECC_CFG_AUTO_DISABLE (0 << 20) |
| #define | ATMEL_PMECC_SAREA 0x004 /* Spare area size */ |
| #define | ATMEL_PMECC_SADDR 0x008 /* PMECC starting address */ |
| #define | ATMEL_PMECC_EADDR 0x00c /* PMECC ending address */ |
| #define | ATMEL_PMECC_CLK 0x010 /* PMECC clock control */ |
| #define | PMECC_CLK_133MHZ (2 << 0) |
| #define | ATMEL_PMECC_CTRL 0x014 /* PMECC control register */ |
| #define | PMECC_CTRL_RST (1 << 0) |
| #define | PMECC_CTRL_DATA (1 << 1) |
| #define | PMECC_CTRL_USER (1 << 2) |
| #define | PMECC_CTRL_ENABLE (1 << 4) |
| #define | PMECC_CTRL_DISABLE (1 << 5) |
| #define | ATMEL_PMECC_SR 0x018 /* PMECC status register */ |
| #define | PMECC_SR_BUSY (1 << 0) |
| #define | PMECC_SR_ENABLE (1 << 4) |
| #define | ATMEL_PMECC_IER 0x01c /* PMECC interrupt enable */ |
| #define | PMECC_IER_ENABLE (1 << 0) |
| #define | ATMEL_PMECC_IDR 0x020 /* PMECC interrupt disable */ |
| #define | PMECC_IER_DISABLE (1 << 0) |
| #define | ATMEL_PMECC_IMR 0x024 /* PMECC interrupt mask */ |
| #define | PMECC_IER_MASK (1 << 0) |
| #define | ATMEL_PMECC_ISR 0x028 /* PMECC interrupt status */ |
| #define | ATMEL_PMECC_ECCx 0x040 /* PMECC ECC x */ |
| #define | ATMEL_PMECC_REMx 0x240 /* PMECC REM x */ |
| #define | ATMEL_PMERRLOC_ELCFG 0x000 /* Error location config */ |
| #define | PMERRLOC_ELCFG_SECTOR_512 (0 << 0) |
| #define | PMERRLOC_ELCFG_SECTOR_1024 (1 << 0) |
| #define | PMERRLOC_ELCFG_NUM_ERRORS(n) ((n) << 16) |
| #define | ATMEL_PMERRLOC_ELPRIM 0x004 /* Error location primitive */ |
| #define | ATMEL_PMERRLOC_ELEN 0x008 /* Error location enable */ |
| #define | ATMEL_PMERRLOC_ELDIS 0x00c /* Error location disable */ |
| #define | PMERRLOC_DISABLE (1 << 0) |
| #define | ATMEL_PMERRLOC_ELSR 0x010 /* Error location status */ |
| #define | PMERRLOC_ELSR_BUSY (1 << 0) |
| #define | ATMEL_PMERRLOC_ELIER 0x014 /* Error location int enable */ |
| #define | ATMEL_PMERRLOC_ELIDR 0x018 /* Error location int disable */ |
| #define | ATMEL_PMERRLOC_ELIMR 0x01c /* Error location int mask */ |
| #define | ATMEL_PMERRLOC_ELISR 0x020 /* Error location int status */ |
| #define | PMERRLOC_ERR_NUM_MASK (0x1f << 8) |
| #define | PMERRLOC_CALC_DONE (1 << 0) |
| #define | ATMEL_PMERRLOC_SIGMAx 0x028 /* Error location SIGMA x */ |
| #define | ATMEL_PMERRLOC_ELx 0x08c /* Error location x */ |
| #define | pmecc_readl_relaxed(addr, reg) readl_relaxed((addr) + ATMEL_PMECC_##reg) |
| #define | pmecc_writel(addr, reg, value) writel((value), (addr) + ATMEL_PMECC_##reg) |
| #define | pmecc_readb_ecc_relaxed(addr, sector, n) readb_relaxed((addr) + ATMEL_PMECC_ECCx + ((sector) * 0x40) + (n)) |
| #define | pmecc_readl_rem_relaxed(addr, sector, n) readl_relaxed((addr) + ATMEL_PMECC_REMx + ((sector) * 0x40) + ((n) * 4)) |
| #define | pmerrloc_readl_relaxed(addr, reg) readl_relaxed((addr) + ATMEL_PMERRLOC_##reg) |
| #define | pmerrloc_writel(addr, reg, value) writel((value), (addr) + ATMEL_PMERRLOC_##reg) |
| #define | pmerrloc_writel_sigma_relaxed(addr, n, value) writel_relaxed((value), (addr) + ATMEL_PMERRLOC_SIGMAx + ((n) * 4)) |
| #define | pmerrloc_readl_sigma_relaxed(addr, n) readl_relaxed((addr) + ATMEL_PMERRLOC_SIGMAx + ((n) * 4)) |
| #define | pmerrloc_readl_el_relaxed(addr, n) readl_relaxed((addr) + ATMEL_PMERRLOC_ELx + ((n) * 4)) |
| #define | PMECC_GF_DIMENSION_13 13 |
| #define | PMECC_GF_DIMENSION_14 14 |
| #define | PMECC_LOOKUP_TABLE_SIZE_512 0x2000 |
| #define | PMECC_LOOKUP_TABLE_SIZE_1024 0x4000 |
| #define | PMECC_MAX_TIMEOUT_MS 100 |
| #define ATMEL_ECC_BITADDR (0xf << 0) /* Bit Error Address */ |
Definition at line 33 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_CR 0x00 /* Control register */ |
Definition at line 17 of file atmel_nand_ecc.h.
Definition at line 29 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_MR 0x04 /* Mode register */ |
Definition at line 20 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_MULERR (1 << 2) /* Multiple Errors */ |
Definition at line 30 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_NPARITY (0xffff << 0) /* NParity */ |
Definition at line 37 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_NPR 0x10 /* NParity register */ |
Definition at line 36 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_PAGESIZE (3 << 0) /* Page Size */ |
Definition at line 21 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_PAGESIZE_1056 (1) |
Definition at line 23 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_PAGESIZE_2112 (2) |
Definition at line 24 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_PAGESIZE_4224 (3) |
Definition at line 25 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_PAGESIZE_528 (0) |
Definition at line 22 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_PR 0x0c /* Parity register */ |
Definition at line 32 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_RECERR (1 << 0) /* Recoverable Error */ |
Definition at line 28 of file atmel_nand_ecc.h.
Definition at line 18 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_SR 0x08 /* Status register */ |
Definition at line 27 of file atmel_nand_ecc.h.
| #define ATMEL_ECC_WORDADDR (0xfff << 4) /* Word Error Address */ |
Definition at line 34 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_CFG 0x000 /* Configuration Register */ |
Definition at line 40 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_CLK 0x010 /* PMECC clock control */ |
Definition at line 67 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_CTRL 0x014 /* PMECC control register */ |
Definition at line 70 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_EADDR 0x00c /* PMECC ending address */ |
Definition at line 66 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_ECCx 0x040 /* PMECC ECC x */ |
Definition at line 88 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_IDR 0x020 /* PMECC interrupt disable */ |
Definition at line 83 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_IER 0x01c /* PMECC interrupt enable */ |
Definition at line 81 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_IMR 0x024 /* PMECC interrupt mask */ |
Definition at line 85 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_ISR 0x028 /* PMECC interrupt status */ |
Definition at line 87 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_REMx 0x240 /* PMECC REM x */ |
Definition at line 89 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_SADDR 0x008 /* PMECC starting address */ |
Definition at line 65 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_SAREA 0x004 /* Spare area size */ |
Definition at line 64 of file atmel_nand_ecc.h.
| #define ATMEL_PMECC_SR 0x018 /* PMECC status register */ |
Definition at line 77 of file atmel_nand_ecc.h.
| #define ATMEL_PMERRLOC_ELCFG 0x000 /* Error location config */ |
Definition at line 92 of file atmel_nand_ecc.h.
| #define ATMEL_PMERRLOC_ELDIS 0x00c /* Error location disable */ |
Definition at line 99 of file atmel_nand_ecc.h.
| #define ATMEL_PMERRLOC_ELEN 0x008 /* Error location enable */ |
Definition at line 98 of file atmel_nand_ecc.h.
| #define ATMEL_PMERRLOC_ELIDR 0x018 /* Error location int disable */ |
Definition at line 105 of file atmel_nand_ecc.h.
| #define ATMEL_PMERRLOC_ELIER 0x014 /* Error location int enable */ |
Definition at line 104 of file atmel_nand_ecc.h.
| #define ATMEL_PMERRLOC_ELIMR 0x01c /* Error location int mask */ |
Definition at line 106 of file atmel_nand_ecc.h.
| #define ATMEL_PMERRLOC_ELISR 0x020 /* Error location int status */ |
Definition at line 107 of file atmel_nand_ecc.h.
| #define ATMEL_PMERRLOC_ELPRIM 0x004 /* Error location primitive */ |
Definition at line 97 of file atmel_nand_ecc.h.
| #define ATMEL_PMERRLOC_ELSR 0x010 /* Error location status */ |
Definition at line 102 of file atmel_nand_ecc.h.
| #define ATMEL_PMERRLOC_ELx 0x08c /* Error location x */ |
Definition at line 111 of file atmel_nand_ecc.h.
| #define ATMEL_PMERRLOC_SIGMAx 0x028 /* Error location SIGMA x */ |
Definition at line 110 of file atmel_nand_ecc.h.
| #define PMECC_CFG_AUTO_DISABLE (0 << 20) |
Definition at line 62 of file atmel_nand_ecc.h.
| #define PMECC_CFG_AUTO_ENABLE (1 << 20) |
Definition at line 61 of file atmel_nand_ecc.h.
| #define PMECC_CFG_BCH_ERR12 (3 << 0) |
Definition at line 44 of file atmel_nand_ecc.h.
| #define PMECC_CFG_BCH_ERR2 (0 << 0) |
Definition at line 41 of file atmel_nand_ecc.h.
| #define PMECC_CFG_BCH_ERR24 (4 << 0) |
Definition at line 45 of file atmel_nand_ecc.h.
| #define PMECC_CFG_BCH_ERR4 (1 << 0) |
Definition at line 42 of file atmel_nand_ecc.h.
| #define PMECC_CFG_BCH_ERR8 (2 << 0) |
Definition at line 43 of file atmel_nand_ecc.h.
| #define PMECC_CFG_PAGE_1SECTOR (0 << 8) |
Definition at line 50 of file atmel_nand_ecc.h.
| #define PMECC_CFG_PAGE_2SECTORS (1 << 8) |
Definition at line 51 of file atmel_nand_ecc.h.
| #define PMECC_CFG_PAGE_4SECTORS (2 << 8) |
Definition at line 52 of file atmel_nand_ecc.h.
| #define PMECC_CFG_PAGE_8SECTORS (3 << 8) |
Definition at line 53 of file atmel_nand_ecc.h.
| #define PMECC_CFG_READ_OP (0 << 12) |
Definition at line 55 of file atmel_nand_ecc.h.
| #define PMECC_CFG_SECTOR1024 (1 << 4) |
Definition at line 48 of file atmel_nand_ecc.h.
| #define PMECC_CFG_SECTOR512 (0 << 4) |
Definition at line 47 of file atmel_nand_ecc.h.
| #define PMECC_CFG_SPARE_DISABLE (0 << 16) |
Definition at line 59 of file atmel_nand_ecc.h.
| #define PMECC_CFG_SPARE_ENABLE (1 << 16) |
Definition at line 58 of file atmel_nand_ecc.h.
| #define PMECC_CFG_WRITE_OP (1 << 12) |
Definition at line 56 of file atmel_nand_ecc.h.
| #define PMECC_CLK_133MHZ (2 << 0) |
Definition at line 68 of file atmel_nand_ecc.h.
| #define PMECC_CTRL_DATA (1 << 1) |
Definition at line 72 of file atmel_nand_ecc.h.
| #define PMECC_CTRL_DISABLE (1 << 5) |
Definition at line 75 of file atmel_nand_ecc.h.
| #define PMECC_CTRL_ENABLE (1 << 4) |
Definition at line 74 of file atmel_nand_ecc.h.
| #define PMECC_CTRL_RST (1 << 0) |
Definition at line 71 of file atmel_nand_ecc.h.
| #define PMECC_CTRL_USER (1 << 2) |
Definition at line 73 of file atmel_nand_ecc.h.
| #define PMECC_GF_DIMENSION_13 13 |
Definition at line 142 of file atmel_nand_ecc.h.
| #define PMECC_GF_DIMENSION_14 14 |
Definition at line 143 of file atmel_nand_ecc.h.
| #define PMECC_IER_DISABLE (1 << 0) |
Definition at line 84 of file atmel_nand_ecc.h.
| #define PMECC_IER_ENABLE (1 << 0) |
Definition at line 82 of file atmel_nand_ecc.h.
| #define PMECC_IER_MASK (1 << 0) |
Definition at line 86 of file atmel_nand_ecc.h.
| #define PMECC_LOOKUP_TABLE_SIZE_1024 0x4000 |
Definition at line 146 of file atmel_nand_ecc.h.
| #define PMECC_LOOKUP_TABLE_SIZE_512 0x2000 |
Definition at line 145 of file atmel_nand_ecc.h.
| #define PMECC_MAX_TIMEOUT_MS 100 |
Definition at line 149 of file atmel_nand_ecc.h.
| #define pmecc_readb_ecc_relaxed | ( | addr, | |
| sector, | |||
| n | |||
| ) | readb_relaxed((addr) + ATMEL_PMECC_ECCx + ((sector) * 0x40) + (n)) |
Definition at line 120 of file atmel_nand_ecc.h.
| #define pmecc_readl_relaxed | ( | addr, | |
| reg | |||
| ) | readl_relaxed((addr) + ATMEL_PMECC_##reg) |
Definition at line 114 of file atmel_nand_ecc.h.
| #define pmecc_readl_rem_relaxed | ( | addr, | |
| sector, | |||
| n | |||
| ) | readl_relaxed((addr) + ATMEL_PMECC_REMx + ((sector) * 0x40) + ((n) * 4)) |
Definition at line 123 of file atmel_nand_ecc.h.
| #define PMECC_SR_BUSY (1 << 0) |
Definition at line 78 of file atmel_nand_ecc.h.
| #define PMECC_SR_ENABLE (1 << 4) |
Definition at line 79 of file atmel_nand_ecc.h.
Definition at line 117 of file atmel_nand_ecc.h.
| #define PMERRLOC_CALC_DONE (1 << 0) |
Definition at line 109 of file atmel_nand_ecc.h.
| #define PMERRLOC_DISABLE (1 << 0) |
Definition at line 100 of file atmel_nand_ecc.h.
Definition at line 95 of file atmel_nand_ecc.h.
| #define PMERRLOC_ELCFG_SECTOR_1024 (1 << 0) |
Definition at line 94 of file atmel_nand_ecc.h.
| #define PMERRLOC_ELCFG_SECTOR_512 (0 << 0) |
Definition at line 93 of file atmel_nand_ecc.h.
| #define PMERRLOC_ELSR_BUSY (1 << 0) |
Definition at line 103 of file atmel_nand_ecc.h.
| #define PMERRLOC_ERR_NUM_MASK (0x1f << 8) |
Definition at line 108 of file atmel_nand_ecc.h.
| #define pmerrloc_readl_el_relaxed | ( | addr, | |
| n | |||
| ) | readl_relaxed((addr) + ATMEL_PMERRLOC_ELx + ((n) * 4)) |
Definition at line 138 of file atmel_nand_ecc.h.
| #define pmerrloc_readl_relaxed | ( | addr, | |
| reg | |||
| ) | readl_relaxed((addr) + ATMEL_PMERRLOC_##reg) |
Definition at line 126 of file atmel_nand_ecc.h.
| #define pmerrloc_readl_sigma_relaxed | ( | addr, | |
| n | |||
| ) | readl_relaxed((addr) + ATMEL_PMERRLOC_SIGMAx + ((n) * 4)) |
Definition at line 135 of file atmel_nand_ecc.h.
Definition at line 129 of file atmel_nand_ecc.h.
| #define pmerrloc_writel_sigma_relaxed | ( | addr, | |
| n, | |||
| value | |||
| ) | writel_relaxed((value), (addr) + ATMEL_PMERRLOC_SIGMAx + ((n) * 4)) |
Definition at line 132 of file atmel_nand_ecc.h.
1.8.2