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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Data Structures | |
| struct | psc_i2s |
| struct | psc_spi |
Macros | |
| #define | PSC_SEL_OFFSET 0x00000000 |
| #define | PSC_CTRL_OFFSET 0x00000004 |
| #define | PSC_SEL_CLK_MASK (3 << 4) |
| #define | PSC_SEL_CLK_INTCLK (0 << 4) |
| #define | PSC_SEL_CLK_EXTCLK (1 << 4) |
| #define | PSC_SEL_CLK_SERCLK (2 << 4) |
| #define | PSC_SEL_PS_MASK 0x00000007 |
| #define | PSC_SEL_PS_DISABLED 0 |
| #define | PSC_SEL_PS_SPIMODE 2 |
| #define | PSC_SEL_PS_I2SMODE 3 |
| #define | PSC_SEL_PS_AC97MODE 4 |
| #define | PSC_SEL_PS_SMBUSMODE 5 |
| #define | PSC_CTRL_DISABLE 0 |
| #define | PSC_CTRL_SUSPEND 2 |
| #define | PSC_CTRL_ENABLE 3 |
| #define | PSC_AC97CFG_OFFSET 0x00000008 |
| #define | PSC_AC97MSK_OFFSET 0x0000000c |
| #define | PSC_AC97PCR_OFFSET 0x00000010 |
| #define | PSC_AC97STAT_OFFSET 0x00000014 |
| #define | PSC_AC97EVNT_OFFSET 0x00000018 |
| #define | PSC_AC97TXRX_OFFSET 0x0000001c |
| #define | PSC_AC97CDC_OFFSET 0x00000020 |
| #define | PSC_AC97RST_OFFSET 0x00000024 |
| #define | PSC_AC97GPO_OFFSET 0x00000028 |
| #define | PSC_AC97GPI_OFFSET 0x0000002c |
| #define | PSC_AC97CFG_RT_MASK (3 << 30) |
| #define | PSC_AC97CFG_RT_FIFO1 (0 << 30) |
| #define | PSC_AC97CFG_RT_FIFO2 (1 << 30) |
| #define | PSC_AC97CFG_RT_FIFO4 (2 << 30) |
| #define | PSC_AC97CFG_RT_FIFO8 (3 << 30) |
| #define | PSC_AC97CFG_TT_MASK (3 << 28) |
| #define | PSC_AC97CFG_TT_FIFO1 (0 << 28) |
| #define | PSC_AC97CFG_TT_FIFO2 (1 << 28) |
| #define | PSC_AC97CFG_TT_FIFO4 (2 << 28) |
| #define | PSC_AC97CFG_TT_FIFO8 (3 << 28) |
| #define | PSC_AC97CFG_DD_DISABLE (1 << 27) |
| #define | PSC_AC97CFG_DE_ENABLE (1 << 26) |
| #define | PSC_AC97CFG_SE_ENABLE (1 << 25) |
| #define | PSC_AC97CFG_LEN_MASK (0xf << 21) |
| #define | PSC_AC97CFG_TXSLOT_MASK (0x3ff << 11) |
| #define | PSC_AC97CFG_RXSLOT_MASK (0x3ff << 1) |
| #define | PSC_AC97CFG_GE_ENABLE (1) |
| #define | PSC_AC97CFG_TXSLOT_ENA(x) (1 << (((x) - 3) + 11)) |
| #define | PSC_AC97CFG_RXSLOT_ENA(x) (1 << (((x) - 3) + 1)) |
| #define | PSC_AC97CFG_SET_LEN(x) (((((x) - 2) / 2) & 0xf) << 21) |
| #define | PSC_AC97CFG_GET_LEN(x) (((((x) >> 21) & 0xf) * 2) + 2) |
| #define | PSC_AC97MSK_GR (1 << 25) |
| #define | PSC_AC97MSK_CD (1 << 24) |
| #define | PSC_AC97MSK_RR (1 << 13) |
| #define | PSC_AC97MSK_RO (1 << 12) |
| #define | PSC_AC97MSK_RU (1 << 11) |
| #define | PSC_AC97MSK_TR (1 << 10) |
| #define | PSC_AC97MSK_TO (1 << 9) |
| #define | PSC_AC97MSK_TU (1 << 8) |
| #define | PSC_AC97MSK_RD (1 << 5) |
| #define | PSC_AC97MSK_TD (1 << 4) |
| #define | PSC_AC97MSK_ALLMASK |
| #define | PSC_AC97PCR_RC (1 << 6) |
| #define | PSC_AC97PCR_RP (1 << 5) |
| #define | PSC_AC97PCR_RS (1 << 4) |
| #define | PSC_AC97PCR_TC (1 << 2) |
| #define | PSC_AC97PCR_TP (1 << 1) |
| #define | PSC_AC97PCR_TS (1 << 0) |
| #define | PSC_AC97STAT_CB (1 << 26) |
| #define | PSC_AC97STAT_CP (1 << 25) |
| #define | PSC_AC97STAT_CR (1 << 24) |
| #define | PSC_AC97STAT_RF (1 << 13) |
| #define | PSC_AC97STAT_RE (1 << 12) |
| #define | PSC_AC97STAT_RR (1 << 11) |
| #define | PSC_AC97STAT_TF (1 << 10) |
| #define | PSC_AC97STAT_TE (1 << 9) |
| #define | PSC_AC97STAT_TR (1 << 8) |
| #define | PSC_AC97STAT_RB (1 << 5) |
| #define | PSC_AC97STAT_TB (1 << 4) |
| #define | PSC_AC97STAT_DI (1 << 2) |
| #define | PSC_AC97STAT_DR (1 << 1) |
| #define | PSC_AC97STAT_SR (1 << 0) |
| #define | PSC_AC97EVNT_GR (1 << 25) |
| #define | PSC_AC97EVNT_CD (1 << 24) |
| #define | PSC_AC97EVNT_RR (1 << 13) |
| #define | PSC_AC97EVNT_RO (1 << 12) |
| #define | PSC_AC97EVNT_RU (1 << 11) |
| #define | PSC_AC97EVNT_TR (1 << 10) |
| #define | PSC_AC97EVNT_TO (1 << 9) |
| #define | PSC_AC97EVNT_TU (1 << 8) |
| #define | PSC_AC97EVNT_RD (1 << 5) |
| #define | PSC_AC97EVNT_TD (1 << 4) |
| #define | PSC_AC97CDC_RD (1 << 25) |
| #define | PSC_AC97CDC_ID_MASK (3 << 23) |
| #define | PSC_AC97CDC_INDX_MASK (0x7f << 16) |
| #define | PSC_AC97CDC_ID(x) (((x) & 0x03) << 23) |
| #define | PSC_AC97CDC_INDX(x) (((x) & 0x7f) << 16) |
| #define | PSC_AC97RST_RST (1 << 1) |
| #define | PSC_AC97RST_SNC (1 << 0) |
| #define | PSC_I2SCFG_OFFSET 0x08 |
| #define | PSC_I2SMASK_OFFSET 0x0C |
| #define | PSC_I2SPCR_OFFSET 0x10 |
| #define | PSC_I2SSTAT_OFFSET 0x14 |
| #define | PSC_I2SEVENT_OFFSET 0x18 |
| #define | PSC_I2SRXTX_OFFSET 0x1C |
| #define | PSC_I2SUDF_OFFSET 0x20 |
| #define | PSC_I2SCFG_RT_MASK (3 << 30) |
| #define | PSC_I2SCFG_RT_FIFO1 (0 << 30) |
| #define | PSC_I2SCFG_RT_FIFO2 (1 << 30) |
| #define | PSC_I2SCFG_RT_FIFO4 (2 << 30) |
| #define | PSC_I2SCFG_RT_FIFO8 (3 << 30) |
| #define | PSC_I2SCFG_TT_MASK (3 << 28) |
| #define | PSC_I2SCFG_TT_FIFO1 (0 << 28) |
| #define | PSC_I2SCFG_TT_FIFO2 (1 << 28) |
| #define | PSC_I2SCFG_TT_FIFO4 (2 << 28) |
| #define | PSC_I2SCFG_TT_FIFO8 (3 << 28) |
| #define | PSC_I2SCFG_DD_DISABLE (1 << 27) |
| #define | PSC_I2SCFG_DE_ENABLE (1 << 26) |
| #define | PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16) |
| #define | PSC_I2SCFG_WS(n) ((n & 0xFF) << 16) |
| #define | PSC_I2SCFG_WS_MASK (PSC_I2SCFG_WS(0x3F)) |
| #define | PSC_I2SCFG_WI (1 << 15) |
| #define | PSC_I2SCFG_DIV_MASK (3 << 13) |
| #define | PSC_I2SCFG_DIV2 (0 << 13) |
| #define | PSC_I2SCFG_DIV4 (1 << 13) |
| #define | PSC_I2SCFG_DIV8 (2 << 13) |
| #define | PSC_I2SCFG_DIV16 (3 << 13) |
| #define | PSC_I2SCFG_BI (1 << 12) |
| #define | PSC_I2SCFG_BUF (1 << 11) |
| #define | PSC_I2SCFG_MLJ (1 << 10) |
| #define | PSC_I2SCFG_XM (1 << 9) |
| #define | PSC_I2SCFG_SET_LEN(x) ((((x) - 1) & 0x1f) << 4) |
| #define | PSC_I2SCFG_GET_LEN(x) ((((x) >> 4) & 0x1f) + 1) |
| #define | PSC_I2SCFG_LB (1 << 2) |
| #define | PSC_I2SCFG_MLF (1 << 1) |
| #define | PSC_I2SCFG_MS (1 << 0) |
| #define | PSC_I2SMSK_RR (1 << 13) |
| #define | PSC_I2SMSK_RO (1 << 12) |
| #define | PSC_I2SMSK_RU (1 << 11) |
| #define | PSC_I2SMSK_TR (1 << 10) |
| #define | PSC_I2SMSK_TO (1 << 9) |
| #define | PSC_I2SMSK_TU (1 << 8) |
| #define | PSC_I2SMSK_RD (1 << 5) |
| #define | PSC_I2SMSK_TD (1 << 4) |
| #define | PSC_I2SMSK_ALLMASK |
| #define | PSC_I2SPCR_RC (1 << 6) |
| #define | PSC_I2SPCR_RP (1 << 5) |
| #define | PSC_I2SPCR_RS (1 << 4) |
| #define | PSC_I2SPCR_TC (1 << 2) |
| #define | PSC_I2SPCR_TP (1 << 1) |
| #define | PSC_I2SPCR_TS (1 << 0) |
| #define | PSC_I2SSTAT_RF (1 << 13) |
| #define | PSC_I2SSTAT_RE (1 << 12) |
| #define | PSC_I2SSTAT_RR (1 << 11) |
| #define | PSC_I2SSTAT_TF (1 << 10) |
| #define | PSC_I2SSTAT_TE (1 << 9) |
| #define | PSC_I2SSTAT_TR (1 << 8) |
| #define | PSC_I2SSTAT_RB (1 << 5) |
| #define | PSC_I2SSTAT_TB (1 << 4) |
| #define | PSC_I2SSTAT_DI (1 << 2) |
| #define | PSC_I2SSTAT_DR (1 << 1) |
| #define | PSC_I2SSTAT_SR (1 << 0) |
| #define | PSC_I2SEVNT_RR (1 << 13) |
| #define | PSC_I2SEVNT_RO (1 << 12) |
| #define | PSC_I2SEVNT_RU (1 << 11) |
| #define | PSC_I2SEVNT_TR (1 << 10) |
| #define | PSC_I2SEVNT_TO (1 << 9) |
| #define | PSC_I2SEVNT_TU (1 << 8) |
| #define | PSC_I2SEVNT_RD (1 << 5) |
| #define | PSC_I2SEVNT_TD (1 << 4) |
| #define | PSC_SPICFG_RT_MASK (3 << 30) |
| #define | PSC_SPICFG_RT_FIFO1 (0 << 30) |
| #define | PSC_SPICFG_RT_FIFO2 (1 << 30) |
| #define | PSC_SPICFG_RT_FIFO4 (2 << 30) |
| #define | PSC_SPICFG_RT_FIFO8 (3 << 30) |
| #define | PSC_SPICFG_TT_MASK (3 << 28) |
| #define | PSC_SPICFG_TT_FIFO1 (0 << 28) |
| #define | PSC_SPICFG_TT_FIFO2 (1 << 28) |
| #define | PSC_SPICFG_TT_FIFO4 (2 << 28) |
| #define | PSC_SPICFG_TT_FIFO8 (3 << 28) |
| #define | PSC_SPICFG_DD_DISABLE (1 << 27) |
| #define | PSC_SPICFG_DE_ENABLE (1 << 26) |
| #define | PSC_SPICFG_CLR_BAUD(x) ((x) & ~((0x3f) << 15)) |
| #define | PSC_SPICFG_SET_BAUD(x) (((x) & 0x3f) << 15) |
| #define | PSC_SPICFG_SET_DIV(x) (((x) & 0x03) << 13) |
| #define | PSC_SPICFG_DIV2 0 |
| #define | PSC_SPICFG_DIV4 1 |
| #define | PSC_SPICFG_DIV8 2 |
| #define | PSC_SPICFG_DIV16 3 |
| #define | PSC_SPICFG_BI (1 << 12) |
| #define | PSC_SPICFG_PSE (1 << 11) |
| #define | PSC_SPICFG_CGE (1 << 10) |
| #define | PSC_SPICFG_CDE (1 << 9) |
| #define | PSC_SPICFG_CLR_LEN(x) ((x) & ~((0x1f) << 4)) |
| #define | PSC_SPICFG_SET_LEN(x) (((x-1) & 0x1f) << 4) |
| #define | PSC_SPICFG_LB (1 << 3) |
| #define | PSC_SPICFG_MLF (1 << 1) |
| #define | PSC_SPICFG_MO (1 << 0) |
| #define | PSC_SPIMSK_MM (1 << 16) |
| #define | PSC_SPIMSK_RR (1 << 13) |
| #define | PSC_SPIMSK_RO (1 << 12) |
| #define | PSC_SPIMSK_RU (1 << 11) |
| #define | PSC_SPIMSK_TR (1 << 10) |
| #define | PSC_SPIMSK_TO (1 << 9) |
| #define | PSC_SPIMSK_TU (1 << 8) |
| #define | PSC_SPIMSK_SD (1 << 5) |
| #define | PSC_SPIMSK_MD (1 << 4) |
| #define | PSC_SPIMSK_ALLMASK |
| #define | PSC_SPIPCR_RC (1 << 6) |
| #define | PSC_SPIPCR_SP (1 << 5) |
| #define | PSC_SPIPCR_SS (1 << 4) |
| #define | PSC_SPIPCR_TC (1 << 2) |
| #define | PSC_SPIPCR_MS (1 << 0) |
| #define | PSC_SPISTAT_RF (1 << 13) |
| #define | PSC_SPISTAT_RE (1 << 12) |
| #define | PSC_SPISTAT_RR (1 << 11) |
| #define | PSC_SPISTAT_TF (1 << 10) |
| #define | PSC_SPISTAT_TE (1 << 9) |
| #define | PSC_SPISTAT_TR (1 << 8) |
| #define | PSC_SPISTAT_SB (1 << 5) |
| #define | PSC_SPISTAT_MB (1 << 4) |
| #define | PSC_SPISTAT_DI (1 << 2) |
| #define | PSC_SPISTAT_DR (1 << 1) |
| #define | PSC_SPISTAT_SR (1 << 0) |
| #define | PSC_SPIEVNT_MM (1 << 16) |
| #define | PSC_SPIEVNT_RR (1 << 13) |
| #define | PSC_SPIEVNT_RO (1 << 12) |
| #define | PSC_SPIEVNT_RU (1 << 11) |
| #define | PSC_SPIEVNT_TR (1 << 10) |
| #define | PSC_SPIEVNT_TO (1 << 9) |
| #define | PSC_SPIEVNT_TU (1 << 8) |
| #define | PSC_SPIEVNT_SD (1 << 5) |
| #define | PSC_SPIEVNT_MD (1 << 4) |
| #define | PSC_SPITXRX_LC (1 << 29) |
| #define | PSC_SPITXRX_SR (1 << 28) |
| #define | PSC_SMBCFG_RT_MASK (3 << 30) |
| #define | PSC_SMBCFG_RT_FIFO1 (0 << 30) |
| #define | PSC_SMBCFG_RT_FIFO2 (1 << 30) |
| #define | PSC_SMBCFG_RT_FIFO4 (2 << 30) |
| #define | PSC_SMBCFG_RT_FIFO8 (3 << 30) |
| #define | PSC_SMBCFG_TT_MASK (3 << 28) |
| #define | PSC_SMBCFG_TT_FIFO1 (0 << 28) |
| #define | PSC_SMBCFG_TT_FIFO2 (1 << 28) |
| #define | PSC_SMBCFG_TT_FIFO4 (2 << 28) |
| #define | PSC_SMBCFG_TT_FIFO8 (3 << 28) |
| #define | PSC_SMBCFG_DD_DISABLE (1 << 27) |
| #define | PSC_SMBCFG_DE_ENABLE (1 << 26) |
| #define | PSC_SMBCFG_SET_DIV(x) (((x) & 0x03) << 13) |
| #define | PSC_SMBCFG_DIV2 0 |
| #define | PSC_SMBCFG_DIV4 1 |
| #define | PSC_SMBCFG_DIV8 2 |
| #define | PSC_SMBCFG_DIV16 3 |
| #define | PSC_SMBCFG_GCE (1 << 9) |
| #define | PSC_SMBCFG_SFM (1 << 8) |
| #define | PSC_SMBCFG_SET_SLV(x) (((x) & 0x7f) << 1) |
| #define | PSC_SMBMSK_DN (1 << 30) |
| #define | PSC_SMBMSK_AN (1 << 29) |
| #define | PSC_SMBMSK_AL (1 << 28) |
| #define | PSC_SMBMSK_RR (1 << 13) |
| #define | PSC_SMBMSK_RO (1 << 12) |
| #define | PSC_SMBMSK_RU (1 << 11) |
| #define | PSC_SMBMSK_TR (1 << 10) |
| #define | PSC_SMBMSK_TO (1 << 9) |
| #define | PSC_SMBMSK_TU (1 << 8) |
| #define | PSC_SMBMSK_SD (1 << 5) |
| #define | PSC_SMBMSK_MD (1 << 4) |
| #define | PSC_SMBMSK_ALLMASK |
| #define | PSC_SMBPCR_DC (1 << 2) |
| #define | PSC_SMBPCR_MS (1 << 0) |
| #define | PSC_SMBSTAT_BB (1 << 28) |
| #define | PSC_SMBSTAT_RF (1 << 13) |
| #define | PSC_SMBSTAT_RE (1 << 12) |
| #define | PSC_SMBSTAT_RR (1 << 11) |
| #define | PSC_SMBSTAT_TF (1 << 10) |
| #define | PSC_SMBSTAT_TE (1 << 9) |
| #define | PSC_SMBSTAT_TR (1 << 8) |
| #define | PSC_SMBSTAT_SB (1 << 5) |
| #define | PSC_SMBSTAT_MB (1 << 4) |
| #define | PSC_SMBSTAT_DI (1 << 2) |
| #define | PSC_SMBSTAT_DR (1 << 1) |
| #define | PSC_SMBSTAT_SR (1 << 0) |
| #define | PSC_SMBEVNT_DN (1 << 30) |
| #define | PSC_SMBEVNT_AN (1 << 29) |
| #define | PSC_SMBEVNT_AL (1 << 28) |
| #define | PSC_SMBEVNT_RR (1 << 13) |
| #define | PSC_SMBEVNT_RO (1 << 12) |
| #define | PSC_SMBEVNT_RU (1 << 11) |
| #define | PSC_SMBEVNT_TR (1 << 10) |
| #define | PSC_SMBEVNT_TO (1 << 9) |
| #define | PSC_SMBEVNT_TU (1 << 8) |
| #define | PSC_SMBEVNT_SD (1 << 5) |
| #define | PSC_SMBEVNT_MD (1 << 4) |
| #define | PSC_SMBEVNT_ALLCLR |
| #define | PSC_SMBTXRX_RSR (1 << 28) |
| #define | PSC_SMBTXRX_STP (1 << 29) |
| #define | PSC_SMBTXRX_DATAMASK 0xff |
| #define | PSC_SMBTMR_SET_TH(x) (((x) & 0x03) << 30) |
| #define | PSC_SMBTMR_SET_PS(x) (((x) & 0x1f) << 25) |
| #define | PSC_SMBTMR_SET_PU(x) (((x) & 0x1f) << 20) |
| #define | PSC_SMBTMR_SET_SH(x) (((x) & 0x1f) << 15) |
| #define | PSC_SMBTMR_SET_SU(x) (((x) & 0x1f) << 10) |
| #define | PSC_SMBTMR_SET_CL(x) (((x) & 0x1f) << 5) |
| #define | PSC_SMBTMR_SET_CH(x) (((x) & 0x1f) << 0) |
Typedefs | |
| typedef struct psc_i2s | psc_i2s_t |
| typedef struct psc_spi | psc_spi_t |
Definition at line 161 of file au1xxx_psc.h.
| #define PSC_AC97CDC_ID_MASK (3 << 23) |
Definition at line 159 of file au1xxx_psc.h.
Definition at line 162 of file au1xxx_psc.h.
| #define PSC_AC97CDC_INDX_MASK (0x7f << 16) |
Definition at line 160 of file au1xxx_psc.h.
| #define PSC_AC97CDC_OFFSET 0x00000020 |
Definition at line 65 of file au1xxx_psc.h.
| #define PSC_AC97CDC_RD (1 << 25) |
Definition at line 158 of file au1xxx_psc.h.
| #define PSC_AC97CFG_DD_DISABLE (1 << 27) |
Definition at line 83 of file au1xxx_psc.h.
| #define PSC_AC97CFG_DE_ENABLE (1 << 26) |
Definition at line 84 of file au1xxx_psc.h.
| #define PSC_AC97CFG_GE_ENABLE (1) |
Definition at line 90 of file au1xxx_psc.h.
Definition at line 102 of file au1xxx_psc.h.
| #define PSC_AC97CFG_LEN_MASK (0xf << 21) |
Definition at line 87 of file au1xxx_psc.h.
| #define PSC_AC97CFG_OFFSET 0x00000008 |
Definition at line 59 of file au1xxx_psc.h.
| #define PSC_AC97CFG_RT_FIFO1 (0 << 30) |
Definition at line 72 of file au1xxx_psc.h.
| #define PSC_AC97CFG_RT_FIFO2 (1 << 30) |
Definition at line 73 of file au1xxx_psc.h.
| #define PSC_AC97CFG_RT_FIFO4 (2 << 30) |
Definition at line 74 of file au1xxx_psc.h.
| #define PSC_AC97CFG_RT_FIFO8 (3 << 30) |
Definition at line 75 of file au1xxx_psc.h.
| #define PSC_AC97CFG_RT_MASK (3 << 30) |
Definition at line 71 of file au1xxx_psc.h.
Definition at line 94 of file au1xxx_psc.h.
| #define PSC_AC97CFG_RXSLOT_MASK (0x3ff << 1) |
Definition at line 89 of file au1xxx_psc.h.
| #define PSC_AC97CFG_SE_ENABLE (1 << 25) |
Definition at line 85 of file au1xxx_psc.h.
Definition at line 101 of file au1xxx_psc.h.
| #define PSC_AC97CFG_TT_FIFO1 (0 << 28) |
Definition at line 78 of file au1xxx_psc.h.
| #define PSC_AC97CFG_TT_FIFO2 (1 << 28) |
Definition at line 79 of file au1xxx_psc.h.
| #define PSC_AC97CFG_TT_FIFO4 (2 << 28) |
Definition at line 80 of file au1xxx_psc.h.
| #define PSC_AC97CFG_TT_FIFO8 (3 << 28) |
Definition at line 81 of file au1xxx_psc.h.
| #define PSC_AC97CFG_TT_MASK (3 << 28) |
Definition at line 77 of file au1xxx_psc.h.
Definition at line 93 of file au1xxx_psc.h.
| #define PSC_AC97CFG_TXSLOT_MASK (0x3ff << 11) |
Definition at line 88 of file au1xxx_psc.h.
| #define PSC_AC97EVNT_CD (1 << 24) |
Definition at line 147 of file au1xxx_psc.h.
| #define PSC_AC97EVNT_GR (1 << 25) |
Definition at line 146 of file au1xxx_psc.h.
| #define PSC_AC97EVNT_OFFSET 0x00000018 |
Definition at line 63 of file au1xxx_psc.h.
| #define PSC_AC97EVNT_RD (1 << 5) |
Definition at line 154 of file au1xxx_psc.h.
| #define PSC_AC97EVNT_RO (1 << 12) |
Definition at line 149 of file au1xxx_psc.h.
| #define PSC_AC97EVNT_RR (1 << 13) |
Definition at line 148 of file au1xxx_psc.h.
| #define PSC_AC97EVNT_RU (1 << 11) |
Definition at line 150 of file au1xxx_psc.h.
| #define PSC_AC97EVNT_TD (1 << 4) |
Definition at line 155 of file au1xxx_psc.h.
| #define PSC_AC97EVNT_TO (1 << 9) |
Definition at line 152 of file au1xxx_psc.h.
| #define PSC_AC97EVNT_TR (1 << 10) |
Definition at line 151 of file au1xxx_psc.h.
| #define PSC_AC97EVNT_TU (1 << 8) |
Definition at line 153 of file au1xxx_psc.h.
| #define PSC_AC97GPI_OFFSET 0x0000002c |
Definition at line 68 of file au1xxx_psc.h.
| #define PSC_AC97GPO_OFFSET 0x00000028 |
Definition at line 67 of file au1xxx_psc.h.
| #define PSC_AC97MSK_ALLMASK |
Definition at line 115 of file au1xxx_psc.h.
| #define PSC_AC97MSK_CD (1 << 24) |
Definition at line 106 of file au1xxx_psc.h.
| #define PSC_AC97MSK_GR (1 << 25) |
Definition at line 105 of file au1xxx_psc.h.
| #define PSC_AC97MSK_OFFSET 0x0000000c |
Definition at line 60 of file au1xxx_psc.h.
| #define PSC_AC97MSK_RD (1 << 5) |
Definition at line 113 of file au1xxx_psc.h.
| #define PSC_AC97MSK_RO (1 << 12) |
Definition at line 108 of file au1xxx_psc.h.
| #define PSC_AC97MSK_RR (1 << 13) |
Definition at line 107 of file au1xxx_psc.h.
| #define PSC_AC97MSK_RU (1 << 11) |
Definition at line 109 of file au1xxx_psc.h.
| #define PSC_AC97MSK_TD (1 << 4) |
Definition at line 114 of file au1xxx_psc.h.
| #define PSC_AC97MSK_TO (1 << 9) |
Definition at line 111 of file au1xxx_psc.h.
| #define PSC_AC97MSK_TR (1 << 10) |
Definition at line 110 of file au1xxx_psc.h.
| #define PSC_AC97MSK_TU (1 << 8) |
Definition at line 112 of file au1xxx_psc.h.
| #define PSC_AC97PCR_OFFSET 0x00000010 |
Definition at line 61 of file au1xxx_psc.h.
| #define PSC_AC97PCR_RC (1 << 6) |
Definition at line 122 of file au1xxx_psc.h.
| #define PSC_AC97PCR_RP (1 << 5) |
Definition at line 123 of file au1xxx_psc.h.
| #define PSC_AC97PCR_RS (1 << 4) |
Definition at line 124 of file au1xxx_psc.h.
| #define PSC_AC97PCR_TC (1 << 2) |
Definition at line 125 of file au1xxx_psc.h.
| #define PSC_AC97PCR_TP (1 << 1) |
Definition at line 126 of file au1xxx_psc.h.
| #define PSC_AC97PCR_TS (1 << 0) |
Definition at line 127 of file au1xxx_psc.h.
| #define PSC_AC97RST_OFFSET 0x00000024 |
Definition at line 66 of file au1xxx_psc.h.
| #define PSC_AC97RST_RST (1 << 1) |
Definition at line 165 of file au1xxx_psc.h.
| #define PSC_AC97RST_SNC (1 << 0) |
Definition at line 166 of file au1xxx_psc.h.
| #define PSC_AC97STAT_CB (1 << 26) |
Definition at line 130 of file au1xxx_psc.h.
| #define PSC_AC97STAT_CP (1 << 25) |
Definition at line 131 of file au1xxx_psc.h.
| #define PSC_AC97STAT_CR (1 << 24) |
Definition at line 132 of file au1xxx_psc.h.
| #define PSC_AC97STAT_DI (1 << 2) |
Definition at line 141 of file au1xxx_psc.h.
| #define PSC_AC97STAT_DR (1 << 1) |
Definition at line 142 of file au1xxx_psc.h.
| #define PSC_AC97STAT_OFFSET 0x00000014 |
Definition at line 62 of file au1xxx_psc.h.
| #define PSC_AC97STAT_RB (1 << 5) |
Definition at line 139 of file au1xxx_psc.h.
| #define PSC_AC97STAT_RE (1 << 12) |
Definition at line 134 of file au1xxx_psc.h.
| #define PSC_AC97STAT_RF (1 << 13) |
Definition at line 133 of file au1xxx_psc.h.
| #define PSC_AC97STAT_RR (1 << 11) |
Definition at line 135 of file au1xxx_psc.h.
| #define PSC_AC97STAT_SR (1 << 0) |
Definition at line 143 of file au1xxx_psc.h.
| #define PSC_AC97STAT_TB (1 << 4) |
Definition at line 140 of file au1xxx_psc.h.
| #define PSC_AC97STAT_TE (1 << 9) |
Definition at line 137 of file au1xxx_psc.h.
| #define PSC_AC97STAT_TF (1 << 10) |
Definition at line 136 of file au1xxx_psc.h.
| #define PSC_AC97STAT_TR (1 << 8) |
Definition at line 138 of file au1xxx_psc.h.
| #define PSC_AC97TXRX_OFFSET 0x0000001c |
Definition at line 64 of file au1xxx_psc.h.
| #define PSC_CTRL_DISABLE 0 |
Definition at line 54 of file au1xxx_psc.h.
| #define PSC_CTRL_ENABLE 3 |
Definition at line 56 of file au1xxx_psc.h.
| #define PSC_CTRL_OFFSET 0x00000004 |
Definition at line 40 of file au1xxx_psc.h.
| #define PSC_CTRL_SUSPEND 2 |
Definition at line 55 of file au1xxx_psc.h.
| #define PSC_I2SCFG_BI (1 << 12) |
Definition at line 215 of file au1xxx_psc.h.
| #define PSC_I2SCFG_BUF (1 << 11) |
Definition at line 216 of file au1xxx_psc.h.
| #define PSC_I2SCFG_DD_DISABLE (1 << 27) |
Definition at line 202 of file au1xxx_psc.h.
| #define PSC_I2SCFG_DE_ENABLE (1 << 26) |
Definition at line 203 of file au1xxx_psc.h.
| #define PSC_I2SCFG_DIV16 (3 << 13) |
Definition at line 213 of file au1xxx_psc.h.
| #define PSC_I2SCFG_DIV2 (0 << 13) |
Definition at line 210 of file au1xxx_psc.h.
| #define PSC_I2SCFG_DIV4 (1 << 13) |
Definition at line 211 of file au1xxx_psc.h.
| #define PSC_I2SCFG_DIV8 (2 << 13) |
Definition at line 212 of file au1xxx_psc.h.
| #define PSC_I2SCFG_DIV_MASK (3 << 13) |
Definition at line 209 of file au1xxx_psc.h.
Definition at line 222 of file au1xxx_psc.h.
| #define PSC_I2SCFG_LB (1 << 2) |
Definition at line 224 of file au1xxx_psc.h.
| #define PSC_I2SCFG_MLF (1 << 1) |
Definition at line 225 of file au1xxx_psc.h.
| #define PSC_I2SCFG_MLJ (1 << 10) |
Definition at line 217 of file au1xxx_psc.h.
| #define PSC_I2SCFG_MS (1 << 0) |
Definition at line 226 of file au1xxx_psc.h.
| #define PSC_I2SCFG_OFFSET 0x08 |
Definition at line 181 of file au1xxx_psc.h.
| #define PSC_I2SCFG_RT_FIFO1 (0 << 30) |
Definition at line 191 of file au1xxx_psc.h.
| #define PSC_I2SCFG_RT_FIFO2 (1 << 30) |
Definition at line 192 of file au1xxx_psc.h.
| #define PSC_I2SCFG_RT_FIFO4 (2 << 30) |
Definition at line 193 of file au1xxx_psc.h.
| #define PSC_I2SCFG_RT_FIFO8 (3 << 30) |
Definition at line 194 of file au1xxx_psc.h.
| #define PSC_I2SCFG_RT_MASK (3 << 30) |
Definition at line 190 of file au1xxx_psc.h.
Definition at line 221 of file au1xxx_psc.h.
Definition at line 204 of file au1xxx_psc.h.
| #define PSC_I2SCFG_TT_FIFO1 (0 << 28) |
Definition at line 197 of file au1xxx_psc.h.
| #define PSC_I2SCFG_TT_FIFO2 (1 << 28) |
Definition at line 198 of file au1xxx_psc.h.
| #define PSC_I2SCFG_TT_FIFO4 (2 << 28) |
Definition at line 199 of file au1xxx_psc.h.
| #define PSC_I2SCFG_TT_FIFO8 (3 << 28) |
Definition at line 200 of file au1xxx_psc.h.
| #define PSC_I2SCFG_TT_MASK (3 << 28) |
Definition at line 196 of file au1xxx_psc.h.
| #define PSC_I2SCFG_WI (1 << 15) |
Definition at line 207 of file au1xxx_psc.h.
Definition at line 205 of file au1xxx_psc.h.
| #define PSC_I2SCFG_WS_MASK (PSC_I2SCFG_WS(0x3F)) |
Definition at line 206 of file au1xxx_psc.h.
| #define PSC_I2SCFG_XM (1 << 9) |
Definition at line 218 of file au1xxx_psc.h.
| #define PSC_I2SEVENT_OFFSET 0x18 |
Definition at line 185 of file au1xxx_psc.h.
| #define PSC_I2SEVNT_RD (1 << 5) |
Definition at line 270 of file au1xxx_psc.h.
| #define PSC_I2SEVNT_RO (1 << 12) |
Definition at line 265 of file au1xxx_psc.h.
| #define PSC_I2SEVNT_RR (1 << 13) |
Definition at line 264 of file au1xxx_psc.h.
| #define PSC_I2SEVNT_RU (1 << 11) |
Definition at line 266 of file au1xxx_psc.h.
| #define PSC_I2SEVNT_TD (1 << 4) |
Definition at line 271 of file au1xxx_psc.h.
| #define PSC_I2SEVNT_TO (1 << 9) |
Definition at line 268 of file au1xxx_psc.h.
| #define PSC_I2SEVNT_TR (1 << 10) |
Definition at line 267 of file au1xxx_psc.h.
| #define PSC_I2SEVNT_TU (1 << 8) |
Definition at line 269 of file au1xxx_psc.h.
| #define PSC_I2SMASK_OFFSET 0x0C |
Definition at line 182 of file au1xxx_psc.h.
| #define PSC_I2SMSK_ALLMASK |
Definition at line 237 of file au1xxx_psc.h.
| #define PSC_I2SMSK_RD (1 << 5) |
Definition at line 235 of file au1xxx_psc.h.
| #define PSC_I2SMSK_RO (1 << 12) |
Definition at line 230 of file au1xxx_psc.h.
| #define PSC_I2SMSK_RR (1 << 13) |
Definition at line 229 of file au1xxx_psc.h.
| #define PSC_I2SMSK_RU (1 << 11) |
Definition at line 231 of file au1xxx_psc.h.
| #define PSC_I2SMSK_TD (1 << 4) |
Definition at line 236 of file au1xxx_psc.h.
| #define PSC_I2SMSK_TO (1 << 9) |
Definition at line 233 of file au1xxx_psc.h.
| #define PSC_I2SMSK_TR (1 << 10) |
Definition at line 232 of file au1xxx_psc.h.
| #define PSC_I2SMSK_TU (1 << 8) |
Definition at line 234 of file au1xxx_psc.h.
| #define PSC_I2SPCR_OFFSET 0x10 |
Definition at line 183 of file au1xxx_psc.h.
| #define PSC_I2SPCR_RC (1 << 6) |
Definition at line 243 of file au1xxx_psc.h.
| #define PSC_I2SPCR_RP (1 << 5) |
Definition at line 244 of file au1xxx_psc.h.
| #define PSC_I2SPCR_RS (1 << 4) |
Definition at line 245 of file au1xxx_psc.h.
| #define PSC_I2SPCR_TC (1 << 2) |
Definition at line 246 of file au1xxx_psc.h.
| #define PSC_I2SPCR_TP (1 << 1) |
Definition at line 247 of file au1xxx_psc.h.
| #define PSC_I2SPCR_TS (1 << 0) |
Definition at line 248 of file au1xxx_psc.h.
| #define PSC_I2SRXTX_OFFSET 0x1C |
Definition at line 186 of file au1xxx_psc.h.
| #define PSC_I2SSTAT_DI (1 << 2) |
Definition at line 259 of file au1xxx_psc.h.
| #define PSC_I2SSTAT_DR (1 << 1) |
Definition at line 260 of file au1xxx_psc.h.
| #define PSC_I2SSTAT_OFFSET 0x14 |
Definition at line 184 of file au1xxx_psc.h.
| #define PSC_I2SSTAT_RB (1 << 5) |
Definition at line 257 of file au1xxx_psc.h.
| #define PSC_I2SSTAT_RE (1 << 12) |
Definition at line 252 of file au1xxx_psc.h.
| #define PSC_I2SSTAT_RF (1 << 13) |
Definition at line 251 of file au1xxx_psc.h.
| #define PSC_I2SSTAT_RR (1 << 11) |
Definition at line 253 of file au1xxx_psc.h.
| #define PSC_I2SSTAT_SR (1 << 0) |
Definition at line 261 of file au1xxx_psc.h.
| #define PSC_I2SSTAT_TB (1 << 4) |
Definition at line 258 of file au1xxx_psc.h.
| #define PSC_I2SSTAT_TE (1 << 9) |
Definition at line 255 of file au1xxx_psc.h.
| #define PSC_I2SSTAT_TF (1 << 10) |
Definition at line 254 of file au1xxx_psc.h.
| #define PSC_I2SSTAT_TR (1 << 8) |
Definition at line 256 of file au1xxx_psc.h.
| #define PSC_I2SUDF_OFFSET 0x20 |
Definition at line 187 of file au1xxx_psc.h.
| #define PSC_SEL_CLK_EXTCLK (1 << 4) |
Definition at line 44 of file au1xxx_psc.h.
| #define PSC_SEL_CLK_INTCLK (0 << 4) |
Definition at line 43 of file au1xxx_psc.h.
| #define PSC_SEL_CLK_MASK (3 << 4) |
Definition at line 42 of file au1xxx_psc.h.
| #define PSC_SEL_CLK_SERCLK (2 << 4) |
Definition at line 45 of file au1xxx_psc.h.
| #define PSC_SEL_OFFSET 0x00000000 |
Definition at line 39 of file au1xxx_psc.h.
| #define PSC_SEL_PS_AC97MODE 4 |
Definition at line 51 of file au1xxx_psc.h.
| #define PSC_SEL_PS_DISABLED 0 |
Definition at line 48 of file au1xxx_psc.h.
| #define PSC_SEL_PS_I2SMODE 3 |
Definition at line 50 of file au1xxx_psc.h.
| #define PSC_SEL_PS_MASK 0x00000007 |
Definition at line 47 of file au1xxx_psc.h.
| #define PSC_SEL_PS_SMBUSMODE 5 |
Definition at line 52 of file au1xxx_psc.h.
| #define PSC_SEL_PS_SPIMODE 2 |
Definition at line 49 of file au1xxx_psc.h.
| #define PSC_SMBCFG_DD_DISABLE (1 << 27) |
Definition at line 384 of file au1xxx_psc.h.
| #define PSC_SMBCFG_DE_ENABLE (1 << 26) |
Definition at line 385 of file au1xxx_psc.h.
| #define PSC_SMBCFG_DIV16 3 |
Definition at line 391 of file au1xxx_psc.h.
| #define PSC_SMBCFG_DIV2 0 |
Definition at line 388 of file au1xxx_psc.h.
| #define PSC_SMBCFG_DIV4 1 |
Definition at line 389 of file au1xxx_psc.h.
| #define PSC_SMBCFG_DIV8 2 |
Definition at line 390 of file au1xxx_psc.h.
| #define PSC_SMBCFG_GCE (1 << 9) |
Definition at line 393 of file au1xxx_psc.h.
| #define PSC_SMBCFG_RT_FIFO1 (0 << 30) |
Definition at line 373 of file au1xxx_psc.h.
| #define PSC_SMBCFG_RT_FIFO2 (1 << 30) |
Definition at line 374 of file au1xxx_psc.h.
| #define PSC_SMBCFG_RT_FIFO4 (2 << 30) |
Definition at line 375 of file au1xxx_psc.h.
| #define PSC_SMBCFG_RT_FIFO8 (3 << 30) |
Definition at line 376 of file au1xxx_psc.h.
| #define PSC_SMBCFG_RT_MASK (3 << 30) |
Definition at line 372 of file au1xxx_psc.h.
Definition at line 387 of file au1xxx_psc.h.
Definition at line 396 of file au1xxx_psc.h.
| #define PSC_SMBCFG_SFM (1 << 8) |
Definition at line 394 of file au1xxx_psc.h.
| #define PSC_SMBCFG_TT_FIFO1 (0 << 28) |
Definition at line 379 of file au1xxx_psc.h.
| #define PSC_SMBCFG_TT_FIFO2 (1 << 28) |
Definition at line 380 of file au1xxx_psc.h.
| #define PSC_SMBCFG_TT_FIFO4 (2 << 28) |
Definition at line 381 of file au1xxx_psc.h.
| #define PSC_SMBCFG_TT_FIFO8 (3 << 28) |
Definition at line 382 of file au1xxx_psc.h.
| #define PSC_SMBCFG_TT_MASK (3 << 28) |
Definition at line 378 of file au1xxx_psc.h.
| #define PSC_SMBEVNT_AL (1 << 28) |
Definition at line 437 of file au1xxx_psc.h.
| #define PSC_SMBEVNT_ALLCLR |
Definition at line 446 of file au1xxx_psc.h.
| #define PSC_SMBEVNT_AN (1 << 29) |
Definition at line 436 of file au1xxx_psc.h.
| #define PSC_SMBEVNT_DN (1 << 30) |
Definition at line 435 of file au1xxx_psc.h.
| #define PSC_SMBEVNT_MD (1 << 4) |
Definition at line 445 of file au1xxx_psc.h.
| #define PSC_SMBEVNT_RO (1 << 12) |
Definition at line 439 of file au1xxx_psc.h.
| #define PSC_SMBEVNT_RR (1 << 13) |
Definition at line 438 of file au1xxx_psc.h.
| #define PSC_SMBEVNT_RU (1 << 11) |
Definition at line 440 of file au1xxx_psc.h.
| #define PSC_SMBEVNT_SD (1 << 5) |
Definition at line 444 of file au1xxx_psc.h.
| #define PSC_SMBEVNT_TO (1 << 9) |
Definition at line 442 of file au1xxx_psc.h.
| #define PSC_SMBEVNT_TR (1 << 10) |
Definition at line 441 of file au1xxx_psc.h.
| #define PSC_SMBEVNT_TU (1 << 8) |
Definition at line 443 of file au1xxx_psc.h.
| #define PSC_SMBMSK_AL (1 << 28) |
Definition at line 401 of file au1xxx_psc.h.
| #define PSC_SMBMSK_ALLMASK |
Definition at line 410 of file au1xxx_psc.h.
| #define PSC_SMBMSK_AN (1 << 29) |
Definition at line 400 of file au1xxx_psc.h.
| #define PSC_SMBMSK_DN (1 << 30) |
Definition at line 399 of file au1xxx_psc.h.
| #define PSC_SMBMSK_MD (1 << 4) |
Definition at line 409 of file au1xxx_psc.h.
| #define PSC_SMBMSK_RO (1 << 12) |
Definition at line 403 of file au1xxx_psc.h.
| #define PSC_SMBMSK_RR (1 << 13) |
Definition at line 402 of file au1xxx_psc.h.
| #define PSC_SMBMSK_RU (1 << 11) |
Definition at line 404 of file au1xxx_psc.h.
| #define PSC_SMBMSK_SD (1 << 5) |
Definition at line 408 of file au1xxx_psc.h.
| #define PSC_SMBMSK_TO (1 << 9) |
Definition at line 406 of file au1xxx_psc.h.
| #define PSC_SMBMSK_TR (1 << 10) |
Definition at line 405 of file au1xxx_psc.h.
| #define PSC_SMBMSK_TU (1 << 8) |
Definition at line 407 of file au1xxx_psc.h.
| #define PSC_SMBPCR_DC (1 << 2) |
Definition at line 417 of file au1xxx_psc.h.
| #define PSC_SMBPCR_MS (1 << 0) |
Definition at line 418 of file au1xxx_psc.h.
| #define PSC_SMBSTAT_BB (1 << 28) |
Definition at line 421 of file au1xxx_psc.h.
| #define PSC_SMBSTAT_DI (1 << 2) |
Definition at line 430 of file au1xxx_psc.h.
| #define PSC_SMBSTAT_DR (1 << 1) |
Definition at line 431 of file au1xxx_psc.h.
| #define PSC_SMBSTAT_MB (1 << 4) |
Definition at line 429 of file au1xxx_psc.h.
| #define PSC_SMBSTAT_RE (1 << 12) |
Definition at line 423 of file au1xxx_psc.h.
| #define PSC_SMBSTAT_RF (1 << 13) |
Definition at line 422 of file au1xxx_psc.h.
| #define PSC_SMBSTAT_RR (1 << 11) |
Definition at line 424 of file au1xxx_psc.h.
| #define PSC_SMBSTAT_SB (1 << 5) |
Definition at line 428 of file au1xxx_psc.h.
| #define PSC_SMBSTAT_SR (1 << 0) |
Definition at line 432 of file au1xxx_psc.h.
| #define PSC_SMBSTAT_TE (1 << 9) |
Definition at line 426 of file au1xxx_psc.h.
| #define PSC_SMBSTAT_TF (1 << 10) |
Definition at line 425 of file au1xxx_psc.h.
| #define PSC_SMBSTAT_TR (1 << 8) |
Definition at line 427 of file au1xxx_psc.h.
Definition at line 464 of file au1xxx_psc.h.
Definition at line 463 of file au1xxx_psc.h.
Definition at line 459 of file au1xxx_psc.h.
Definition at line 460 of file au1xxx_psc.h.
Definition at line 461 of file au1xxx_psc.h.
Definition at line 462 of file au1xxx_psc.h.
Definition at line 458 of file au1xxx_psc.h.
| #define PSC_SMBTXRX_DATAMASK 0xff |
Definition at line 455 of file au1xxx_psc.h.
| #define PSC_SMBTXRX_RSR (1 << 28) |
Definition at line 453 of file au1xxx_psc.h.
| #define PSC_SMBTXRX_STP (1 << 29) |
Definition at line 454 of file au1xxx_psc.h.
| #define PSC_SPICFG_BI (1 << 12) |
Definition at line 309 of file au1xxx_psc.h.
| #define PSC_SPICFG_CDE (1 << 9) |
Definition at line 312 of file au1xxx_psc.h.
| #define PSC_SPICFG_CGE (1 << 10) |
Definition at line 311 of file au1xxx_psc.h.
Definition at line 300 of file au1xxx_psc.h.
Definition at line 314 of file au1xxx_psc.h.
| #define PSC_SPICFG_DD_DISABLE (1 << 27) |
Definition at line 298 of file au1xxx_psc.h.
| #define PSC_SPICFG_DE_ENABLE (1 << 26) |
Definition at line 299 of file au1xxx_psc.h.
| #define PSC_SPICFG_DIV16 3 |
Definition at line 307 of file au1xxx_psc.h.
| #define PSC_SPICFG_DIV2 0 |
Definition at line 304 of file au1xxx_psc.h.
| #define PSC_SPICFG_DIV4 1 |
Definition at line 305 of file au1xxx_psc.h.
| #define PSC_SPICFG_DIV8 2 |
Definition at line 306 of file au1xxx_psc.h.
| #define PSC_SPICFG_LB (1 << 3) |
Definition at line 317 of file au1xxx_psc.h.
| #define PSC_SPICFG_MLF (1 << 1) |
Definition at line 318 of file au1xxx_psc.h.
| #define PSC_SPICFG_MO (1 << 0) |
Definition at line 319 of file au1xxx_psc.h.
| #define PSC_SPICFG_PSE (1 << 11) |
Definition at line 310 of file au1xxx_psc.h.
| #define PSC_SPICFG_RT_FIFO1 (0 << 30) |
Definition at line 287 of file au1xxx_psc.h.
| #define PSC_SPICFG_RT_FIFO2 (1 << 30) |
Definition at line 288 of file au1xxx_psc.h.
| #define PSC_SPICFG_RT_FIFO4 (2 << 30) |
Definition at line 289 of file au1xxx_psc.h.
| #define PSC_SPICFG_RT_FIFO8 (3 << 30) |
Definition at line 290 of file au1xxx_psc.h.
| #define PSC_SPICFG_RT_MASK (3 << 30) |
Definition at line 286 of file au1xxx_psc.h.
Definition at line 301 of file au1xxx_psc.h.
Definition at line 303 of file au1xxx_psc.h.
Definition at line 315 of file au1xxx_psc.h.
| #define PSC_SPICFG_TT_FIFO1 (0 << 28) |
Definition at line 293 of file au1xxx_psc.h.
| #define PSC_SPICFG_TT_FIFO2 (1 << 28) |
Definition at line 294 of file au1xxx_psc.h.
| #define PSC_SPICFG_TT_FIFO4 (2 << 28) |
Definition at line 295 of file au1xxx_psc.h.
| #define PSC_SPICFG_TT_FIFO8 (3 << 28) |
Definition at line 296 of file au1xxx_psc.h.
| #define PSC_SPICFG_TT_MASK (3 << 28) |
Definition at line 292 of file au1xxx_psc.h.
| #define PSC_SPIEVNT_MD (1 << 4) |
Definition at line 365 of file au1xxx_psc.h.
| #define PSC_SPIEVNT_MM (1 << 16) |
Definition at line 357 of file au1xxx_psc.h.
| #define PSC_SPIEVNT_RO (1 << 12) |
Definition at line 359 of file au1xxx_psc.h.
| #define PSC_SPIEVNT_RR (1 << 13) |
Definition at line 358 of file au1xxx_psc.h.
| #define PSC_SPIEVNT_RU (1 << 11) |
Definition at line 360 of file au1xxx_psc.h.
| #define PSC_SPIEVNT_SD (1 << 5) |
Definition at line 364 of file au1xxx_psc.h.
| #define PSC_SPIEVNT_TO (1 << 9) |
Definition at line 362 of file au1xxx_psc.h.
| #define PSC_SPIEVNT_TR (1 << 10) |
Definition at line 361 of file au1xxx_psc.h.
| #define PSC_SPIEVNT_TU (1 << 8) |
Definition at line 363 of file au1xxx_psc.h.
| #define PSC_SPIMSK_ALLMASK |
Definition at line 331 of file au1xxx_psc.h.
| #define PSC_SPIMSK_MD (1 << 4) |
Definition at line 330 of file au1xxx_psc.h.
| #define PSC_SPIMSK_MM (1 << 16) |
Definition at line 322 of file au1xxx_psc.h.
| #define PSC_SPIMSK_RO (1 << 12) |
Definition at line 324 of file au1xxx_psc.h.
| #define PSC_SPIMSK_RR (1 << 13) |
Definition at line 323 of file au1xxx_psc.h.
| #define PSC_SPIMSK_RU (1 << 11) |
Definition at line 325 of file au1xxx_psc.h.
| #define PSC_SPIMSK_SD (1 << 5) |
Definition at line 329 of file au1xxx_psc.h.
| #define PSC_SPIMSK_TO (1 << 9) |
Definition at line 327 of file au1xxx_psc.h.
| #define PSC_SPIMSK_TR (1 << 10) |
Definition at line 326 of file au1xxx_psc.h.
| #define PSC_SPIMSK_TU (1 << 8) |
Definition at line 328 of file au1xxx_psc.h.
| #define PSC_SPIPCR_MS (1 << 0) |
Definition at line 341 of file au1xxx_psc.h.
| #define PSC_SPIPCR_RC (1 << 6) |
Definition at line 337 of file au1xxx_psc.h.
| #define PSC_SPIPCR_SP (1 << 5) |
Definition at line 338 of file au1xxx_psc.h.
| #define PSC_SPIPCR_SS (1 << 4) |
Definition at line 339 of file au1xxx_psc.h.
| #define PSC_SPIPCR_TC (1 << 2) |
Definition at line 340 of file au1xxx_psc.h.
| #define PSC_SPISTAT_DI (1 << 2) |
Definition at line 352 of file au1xxx_psc.h.
| #define PSC_SPISTAT_DR (1 << 1) |
Definition at line 353 of file au1xxx_psc.h.
| #define PSC_SPISTAT_MB (1 << 4) |
Definition at line 351 of file au1xxx_psc.h.
| #define PSC_SPISTAT_RE (1 << 12) |
Definition at line 345 of file au1xxx_psc.h.
| #define PSC_SPISTAT_RF (1 << 13) |
Definition at line 344 of file au1xxx_psc.h.
| #define PSC_SPISTAT_RR (1 << 11) |
Definition at line 346 of file au1xxx_psc.h.
| #define PSC_SPISTAT_SB (1 << 5) |
Definition at line 350 of file au1xxx_psc.h.
| #define PSC_SPISTAT_SR (1 << 0) |
Definition at line 354 of file au1xxx_psc.h.
| #define PSC_SPISTAT_TE (1 << 9) |
Definition at line 348 of file au1xxx_psc.h.
| #define PSC_SPISTAT_TF (1 << 10) |
Definition at line 347 of file au1xxx_psc.h.
| #define PSC_SPISTAT_TR (1 << 8) |
Definition at line 349 of file au1xxx_psc.h.
| #define PSC_SPITXRX_LC (1 << 29) |
Definition at line 368 of file au1xxx_psc.h.
| #define PSC_SPITXRX_SR (1 << 28) |
Definition at line 369 of file au1xxx_psc.h.
1.8.2