#include <linux/hw_random.h>
#include <linux/kernel.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/stringify.h>
#include <linux/netdevice.h>
#include <linux/pci.h>
#include <linux/atomic.h>
#include <linux/io.h>
#include <linux/ssb/ssb.h>
#include <linux/ssb/ssb_driver_chipcommon.h>
#include <net/mac80211.h>
#include "debugfs.h"
#include "leds.h"
#include "rfkill.h"
#include "phy.h"

Data Structures
struct	b43legacy_fw_header

struct	b43legacy_iv

struct	b43legacy_lopair

struct	b43legacy_phy

struct	b43legacy_dma

struct	b43legacy_pio

struct	b43legacy_noise_calculation

struct	b43legacy_stats

struct	b43legacy_key

struct	b43legacy_qos_params

struct	b43legacy_wl

struct	b43legacy_firmware

struct	b43legacy_wldev

Macros
#define	B43legacy_IRQWAIT_MAX_RETRIES 20

#define	B43legacy_MMIO_DMA0_REASON 0x20

#define	B43legacy_MMIO_DMA0_IRQ_MASK 0x24

#define	B43legacy_MMIO_DMA1_REASON 0x28

#define	B43legacy_MMIO_DMA1_IRQ_MASK 0x2C

#define	B43legacy_MMIO_DMA2_REASON 0x30

#define	B43legacy_MMIO_DMA2_IRQ_MASK 0x34

#define	B43legacy_MMIO_DMA3_REASON 0x38

#define	B43legacy_MMIO_DMA3_IRQ_MASK 0x3C

#define	B43legacy_MMIO_DMA4_REASON 0x40

#define	B43legacy_MMIO_DMA4_IRQ_MASK 0x44

#define	B43legacy_MMIO_DMA5_REASON 0x48

#define	B43legacy_MMIO_DMA5_IRQ_MASK 0x4C

#define	B43legacy_MMIO_MACCTL 0x120 /* MAC control */

#define	B43legacy_MMIO_MACCMD 0x124 /* MAC command */

#define	B43legacy_MMIO_GEN_IRQ_REASON 0x128

#define	B43legacy_MMIO_GEN_IRQ_MASK 0x12C

#define	B43legacy_MMIO_RAM_CONTROL 0x130

#define	B43legacy_MMIO_RAM_DATA 0x134

#define	B43legacy_MMIO_PS_STATUS 0x140

#define	B43legacy_MMIO_RADIO_HWENABLED_HI 0x158

#define	B43legacy_MMIO_SHM_CONTROL 0x160

#define	B43legacy_MMIO_SHM_DATA 0x164

#define	B43legacy_MMIO_SHM_DATA_UNALIGNED 0x166

#define	B43legacy_MMIO_XMITSTAT_0 0x170

#define	B43legacy_MMIO_XMITSTAT_1 0x174

#define	B43legacy_MMIO_REV3PLUS_TSF_LOW 0x180 /* core rev >= 3 only */

#define	B43legacy_MMIO_REV3PLUS_TSF_HIGH 0x184 /* core rev >= 3 only */

#define	B43legacy_MMIO_TSF_CFP_REP 0x188

#define	B43legacy_MMIO_TSF_CFP_START 0x18C

#define	B43legacy_MMIO_DMA32_BASE0 0x200

#define	B43legacy_MMIO_DMA32_BASE1 0x220

#define	B43legacy_MMIO_DMA32_BASE2 0x240

#define	B43legacy_MMIO_DMA32_BASE3 0x260

#define	B43legacy_MMIO_DMA32_BASE4 0x280

#define	B43legacy_MMIO_DMA32_BASE5 0x2A0

#define	B43legacy_MMIO_DMA64_BASE0 0x200

#define	B43legacy_MMIO_DMA64_BASE1 0x240

#define	B43legacy_MMIO_DMA64_BASE2 0x280

#define	B43legacy_MMIO_DMA64_BASE3 0x2C0

#define	B43legacy_MMIO_DMA64_BASE4 0x300

#define	B43legacy_MMIO_DMA64_BASE5 0x340

#define	B43legacy_MMIO_PIO1_BASE 0x300

#define	B43legacy_MMIO_PIO2_BASE 0x310

#define	B43legacy_MMIO_PIO3_BASE 0x320

#define	B43legacy_MMIO_PIO4_BASE 0x330

#define	B43legacy_MMIO_PHY_VER 0x3E0

#define	B43legacy_MMIO_PHY_RADIO 0x3E2

#define	B43legacy_MMIO_PHY0 0x3E6

#define	B43legacy_MMIO_ANTENNA 0x3E8

#define	B43legacy_MMIO_CHANNEL 0x3F0

#define	B43legacy_MMIO_CHANNEL_EXT 0x3F4

#define	B43legacy_MMIO_RADIO_CONTROL 0x3F6

#define	B43legacy_MMIO_RADIO_DATA_HIGH 0x3F8

#define	B43legacy_MMIO_RADIO_DATA_LOW 0x3FA

#define	B43legacy_MMIO_PHY_CONTROL 0x3FC

#define	B43legacy_MMIO_PHY_DATA 0x3FE

#define	B43legacy_MMIO_MACFILTER_CONTROL 0x420

#define	B43legacy_MMIO_MACFILTER_DATA 0x422

#define	B43legacy_MMIO_RCMTA_COUNT 0x43C /* Receive Match Transmitter Addr */

#define	B43legacy_MMIO_RADIO_HWENABLED_LO 0x49A

#define	B43legacy_MMIO_GPIO_CONTROL 0x49C

#define	B43legacy_MMIO_GPIO_MASK 0x49E

#define	B43legacy_MMIO_TSF_CFP_PRETBTT 0x612

#define	B43legacy_MMIO_TSF_0 0x632 /* core rev < 3 only */

#define	B43legacy_MMIO_TSF_1 0x634 /* core rev < 3 only */

#define	B43legacy_MMIO_TSF_2 0x636 /* core rev < 3 only */

#define	B43legacy_MMIO_TSF_3 0x638 /* core rev < 3 only */

#define	B43legacy_MMIO_RNG 0x65A

#define	B43legacy_MMIO_POWERUP_DELAY 0x6A8

#define	B43legacy_BFL_PACTRL 0x0002

#define	B43legacy_BFL_RSSI 0x0008

#define	B43legacy_BFL_EXTLNA 0x1000

#define	B43legacy_GPIO_CONTROL 0x6c

#define	B43legacy_SHM_SHARED 0x0001

#define	B43legacy_SHM_WIRELESS 0x0002

#define	B43legacy_SHM_HW 0x0004

#define	B43legacy_SHM_UCODE 0x0300

#define	B43legacy_SHM_AUTOINC_R 0x0200 /* Read Auto-increment */

#define	B43legacy_SHM_AUTOINC_W 0x0100 /* Write Auto-increment */

#define	B43legacy_SHM_AUTOINC_RW

#define	B43legacy_SHM_SH_WLCOREREV 0x0016 /* 802.11 core revision */

#define	B43legacy_SHM_SH_HOSTFLO 0x005E /* Hostflags ucode opts (low) */

#define	B43legacy_SHM_SH_HOSTFHI 0x0060 /* Hostflags ucode opts (high) */

#define	B43legacy_SHM_SH_KEYIDXBLOCK 0x05D4 /* Key index/algorithm block */

#define	B43legacy_SHM_SH_DTIMP 0x0012 /* DTIM period */

#define	B43legacy_SHM_SH_BTL0 0x0018 /* Beacon template length 0 */

#define	B43legacy_SHM_SH_BTL1 0x001A /* Beacon template length 1 */

#define	B43legacy_SHM_SH_BTSFOFF 0x001C /* Beacon TSF offset */

#define	B43legacy_SHM_SH_TIMPOS 0x001E /* TIM position in beacon */

#define	B43legacy_SHM_SH_BEACPHYCTL 0x0054 /* Beacon PHY TX control word */

#define	B43legacy_SHM_SH_ACKCTSPHYCTL 0x0022 /* ACK/CTS PHY control word */

#define	B43legacy_SHM_SH_PRTLEN 0x004A /* Probe Response template length */

#define	B43legacy_SHM_SH_PRMAXTIME 0x0074 /* Probe Response max time */

#define	B43legacy_SHM_SH_PRPHYCTL 0x0188 /* Probe Resp PHY TX control */

#define	B43legacy_SHM_SH_OFDMDIRECT 0x0480 /* Pointer to OFDM direct map */

#define	B43legacy_SHM_SH_OFDMBASIC 0x04A0 /* Pointer to OFDM basic rate map */

#define	B43legacy_SHM_SH_CCKDIRECT 0x04C0 /* Pointer to CCK direct map */

#define	B43legacy_SHM_SH_CCKBASIC 0x04E0 /* Pointer to CCK basic rate map */

#define	B43legacy_SHM_SH_UCODEREV 0x0000 /* Microcode revision */

#define	B43legacy_SHM_SH_UCODEPATCH 0x0002 /* Microcode patchlevel */

#define	B43legacy_SHM_SH_UCODEDATE 0x0004 /* Microcode date */

#define	B43legacy_SHM_SH_UCODETIME 0x0006 /* Microcode time */

#define	B43legacy_SHM_SH_SPUWKUP 0x0094 /* pre-wakeup for synth PU in us */

#define	B43legacy_SHM_SH_PRETBTT 0x0096 /* pre-TBTT in us */

#define	B43legacy_UCODEFLAGS_OFFSET 0x005E

#define	B43legacy_MMIO_RADIO_HWENABLED_HI_MASK (1 << 16)

#define	B43legacy_MMIO_RADIO_HWENABLED_LO_MASK (1 << 4)

#define	B43legacy_HF_SYMW 0x00000002 /* G-PHY SYM workaround */

#define	B43legacy_HF_GDCW 0x00000020 /* G-PHY DV cancel filter */

#define	B43legacy_HF_OFDMPABOOST 0x00000040 /* Enable PA boost OFDM */

#define	B43legacy_HF_EDCF 0x00000100 /* on if WME/MAC suspended */

#define	B43legacy_MACFILTER_SELF 0x0000

#define	B43legacy_MACFILTER_BSSID 0x0003

#define	B43legacy_MACFILTER_MAC 0x0010

#define	B43legacy_PHYTYPE_B 0x01

#define	B43legacy_PHYTYPE_G 0x02

#define	B43legacy_PHY_G_LO_CONTROL 0x0810

#define	B43legacy_PHY_ILT_G_CTRL 0x0472

#define	B43legacy_PHY_ILT_G_DATA1 0x0473

#define	B43legacy_PHY_ILT_G_DATA2 0x0474

#define	B43legacy_PHY_G_PCTL 0x0029

#define	B43legacy_PHY_RADIO_BITFIELD 0x0401

#define	B43legacy_PHY_G_CRS 0x0429

#define	B43legacy_PHY_NRSSILT_CTRL 0x0803

#define	B43legacy_PHY_NRSSILT_DATA 0x0804

#define	B43legacy_RADIOCTL_ID 0x01

#define	B43legacy_MACCTL_ENABLED 0x00000001 /* MAC Enabled */

#define	B43legacy_MACCTL_PSM_RUN 0x00000002 /* Run Microcode */

#define	B43legacy_MACCTL_PSM_JMP0 0x00000004 /* Microcode jump to 0 */

#define	B43legacy_MACCTL_SHM_ENABLED 0x00000100 /* SHM Enabled */

#define	B43legacy_MACCTL_IHR_ENABLED 0x00000400 /* IHR Region Enabled */

#define	B43legacy_MACCTL_BE 0x00010000 /* Big Endian mode */

#define	B43legacy_MACCTL_INFRA 0x00020000 /* Infrastructure mode */

#define	B43legacy_MACCTL_AP 0x00040000 /* AccessPoint mode */

#define	B43legacy_MACCTL_RADIOLOCK 0x00080000 /* Radio lock */

#define	B43legacy_MACCTL_BEACPROMISC 0x00100000 /* Beacon Promiscuous */

#define	B43legacy_MACCTL_KEEP_BADPLCP 0x00200000 /* Keep bad PLCP frames */

#define	B43legacy_MACCTL_KEEP_CTL 0x00400000 /* Keep control frames */

#define	B43legacy_MACCTL_KEEP_BAD 0x00800000 /* Keep bad frames (FCS) */

#define	B43legacy_MACCTL_PROMISC 0x01000000 /* Promiscuous mode */

#define	B43legacy_MACCTL_HWPS 0x02000000 /* Hardware Power Saving */

#define	B43legacy_MACCTL_AWAKE 0x04000000 /* Device is awake */

#define	B43legacy_MACCTL_TBTTHOLD 0x10000000 /* TBTT Hold */

#define	B43legacy_MACCTL_GMODE 0x80000000 /* G Mode */

#define	B43legacy_MACCMD_BEACON0_VALID 0x00000001 /* Beacon 0 in template RAM is busy/valid */

#define	B43legacy_MACCMD_BEACON1_VALID 0x00000002 /* Beacon 1 in template RAM is busy/valid */

#define	B43legacy_MACCMD_DFQ_VALID 0x00000004 /* Directed frame queue valid (IBSS PS mode, ATIM) */

#define	B43legacy_MACCMD_CCA 0x00000008 /* Clear channel assessment */

#define	B43legacy_MACCMD_BGNOISE 0x00000010 /* Background noise */

#define	B43legacy_TMSLOW_GMODE 0x20000000 /* G Mode Enable */

#define	B43legacy_TMSLOW_PLLREFSEL 0x00200000 /* PLL Freq Ref Select */

#define	B43legacy_TMSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Ctrl Enbl */

#define	B43legacy_TMSLOW_PHYRESET 0x00080000 /* PHY Reset */

#define	B43legacy_TMSLOW_PHYCLKEN 0x00040000 /* PHY Clock Enable */

#define	B43legacy_TMSHIGH_FCLOCK 0x00040000 /* Fast Clock Available */

#define	B43legacy_TMSHIGH_GPHY 0x00010000 /* G-PHY avail (rev >= 5) */

#define	B43legacy_UCODEFLAG_AUTODIV 0x0001

#define	B43legacy_IRQ_MAC_SUSPENDED 0x00000001

#define	B43legacy_IRQ_BEACON 0x00000002

#define	B43legacy_IRQ_TBTT_INDI 0x00000004 /* Target Beacon Transmit Time */

#define	B43legacy_IRQ_BEACON_TX_OK 0x00000008

#define	B43legacy_IRQ_BEACON_CANCEL 0x00000010

#define	B43legacy_IRQ_ATIM_END 0x00000020

#define	B43legacy_IRQ_PMQ 0x00000040

#define	B43legacy_IRQ_PIO_WORKAROUND 0x00000100

#define	B43legacy_IRQ_MAC_TXERR 0x00000200

#define	B43legacy_IRQ_PHY_TXERR 0x00000800

#define	B43legacy_IRQ_PMEVENT 0x00001000

#define	B43legacy_IRQ_TIMER0 0x00002000

#define	B43legacy_IRQ_TIMER1 0x00004000

#define	B43legacy_IRQ_DMA 0x00008000

#define	B43legacy_IRQ_TXFIFO_FLUSH_OK 0x00010000

#define	B43legacy_IRQ_CCA_MEASURE_OK 0x00020000

#define	B43legacy_IRQ_NOISESAMPLE_OK 0x00040000

#define	B43legacy_IRQ_UCODE_DEBUG 0x08000000

#define	B43legacy_IRQ_RFKILL 0x10000000

#define	B43legacy_IRQ_TX_OK 0x20000000

#define	B43legacy_IRQ_PHY_G_CHANGED 0x40000000

#define	B43legacy_IRQ_TIMEOUT 0x80000000

#define	B43legacy_IRQ_ALL 0xFFFFFFFF

#define	B43legacy_IRQ_MASKTEMPLATE

#define	B43legacy_CCK_RATE_1MB 2

#define	B43legacy_CCK_RATE_2MB 4

#define	B43legacy_CCK_RATE_5MB 11

#define	B43legacy_CCK_RATE_11MB 22

#define	B43legacy_OFDM_RATE_6MB 12

#define	B43legacy_OFDM_RATE_9MB 18

#define	B43legacy_OFDM_RATE_12MB 24

#define	B43legacy_OFDM_RATE_18MB 36

#define	B43legacy_OFDM_RATE_24MB 48

#define	B43legacy_OFDM_RATE_36MB 72

#define	B43legacy_OFDM_RATE_48MB 96

#define	B43legacy_OFDM_RATE_54MB 108

#define	B43legacy_RATE_TO_100KBPS(rate) (((rate) * 10) / 2)

#define	B43legacy_DEFAULT_SHORT_RETRY_LIMIT 7

#define	B43legacy_DEFAULT_LONG_RETRY_LIMIT 4

#define	B43legacy_PHY_TX_BADNESS_LIMIT 1000

#define	B43legacy_SEC_KEYSIZE 16

#define	B43legacy_CIR_BASE 0xf00

#define	B43legacy_CIR_SBTPSFLAG (B43legacy_CIR_BASE + 0x18)

#define	B43legacy_CIR_SBIMSTATE (B43legacy_CIR_BASE + 0x90)

#define	B43legacy_CIR_SBINTVEC (B43legacy_CIR_BASE + 0x94)

#define	B43legacy_CIR_SBTMSTATELOW (B43legacy_CIR_BASE + 0x98)

#define	B43legacy_CIR_SBTMSTATEHIGH (B43legacy_CIR_BASE + 0x9c)

#define	B43legacy_CIR_SBIMCONFIGLOW (B43legacy_CIR_BASE + 0xa8)

#define	B43legacy_CIR_SB_ID_HI (B43legacy_CIR_BASE + 0xfc)

#define	B43legacy_SBTMSTATEHIGH_SERROR 0x00000001

#define	B43legacy_SBTMSTATEHIGH_BUSY 0x00000004

#define	B43legacy_SBTMSTATEHIGH_TIMEOUT 0x00000020

#define	B43legacy_SBTMSTATEHIGH_G_PHY_AVAIL 0x00010000

#define	B43legacy_SBTMSTATEHIGH_COREFLAGS 0x1FFF0000

#define	B43legacy_SBTMSTATEHIGH_DMA64BIT 0x10000000

#define	B43legacy_SBTMSTATEHIGH_GATEDCLK 0x20000000

#define	B43legacy_SBTMSTATEHIGH_BISTFAILED 0x40000000

#define	B43legacy_SBTMSTATEHIGH_BISTCOMPLETE 0x80000000

#define	B43legacy_SBIMSTATE_IB_ERROR 0x20000

#define	B43legacy_SBIMSTATE_TIMEOUT 0x40000

#define	PFX KBUILD_MODNAME ": "

#define	B43legacy_WARN_ON(x) __b43legacy_warn_on_dummy(unlikely(!!(x)))

#define	B43legacy_BUG_ON(x) do { /* nothing */ } while (0)

#define	B43legacy_DEBUG 0

#define	B43legacy_FW_TYPE_UCODE 'u'

#define	B43legacy_FW_TYPE_PCM 'p'

#define	B43legacy_FW_TYPE_IV 'i'

#define	B43legacy_IV_OFFSET_MASK 0x7FFF

#define	B43legacy_IV_32BIT 0x8000

#define	B43legacy_PHYMODE(phytype) (1 << (phytype))

#define	B43legacy_PHYMODE_B

#define	B43legacy_PHYMODE_G

#define	B43legacy_LO_COUNT (14*4)

#define	B43legacy_INTERFSTACK_SIZE 26

#define	B43legacy_QOS_QUEUE_NUM 4

#define	b43legacy_status(wldev) atomic_read(&(wldev)->__init_status)

#define	b43legacy_set_status(wldev, stat)

#define	b43legacydbg(wl, fmt...) do { /* nothing */ } while (0)

#define	Q52_FMT "%u.%u"

#define	Q52_ARG(q52) ((q52) / 4), (((q52) & 3) * 100 / 4)

Enumerations
enum	{ B43legacy_SEC_ALGO_NONE = 0, B43legacy_SEC_ALGO_WEP40, B43legacy_SEC_ALGO_TKIP, B43legacy_SEC_ALGO_AES, B43legacy_SEC_ALGO_WEP104, B43legacy_SEC_ALGO_AES_LEGACY }

enum	{ B43legacy_STAT_UNINIT = 0, B43legacy_STAT_INITIALIZED = 1, B43legacy_STAT_STARTED = 2 }

Functions
	__printf (2, 3) void b43legacyinfo(struct b43legacy_wl *wl

Variables
struct b43legacy_fw_header	__packed

const char *	fmt

Macro Definition Documentation

#define B43legacy_BFL_EXTLNA 0x1000

Definition at line 105 of file b43legacy.h.

#define B43legacy_BFL_PACTRL 0x0002

Definition at line 103 of file b43legacy.h.

#define B43legacy_BFL_RSSI 0x0008

Definition at line 104 of file b43legacy.h.

#define B43legacy_BUG_ON ( x ) do { /* nothing */ } while (0)

Definition at line 347 of file b43legacy.h.

#define B43legacy_CCK_RATE_11MB 22

Definition at line 273 of file b43legacy.h.

#define B43legacy_CCK_RATE_1MB 2

Definition at line 270 of file b43legacy.h.

#define B43legacy_CCK_RATE_2MB 4

Definition at line 271 of file b43legacy.h.

#define B43legacy_CCK_RATE_5MB 11

Definition at line 272 of file b43legacy.h.

#define B43legacy_CIR_BASE 0xf00

Definition at line 304 of file b43legacy.h.

#define B43legacy_CIR_SB_ID_HI (B43legacy_CIR_BASE + 0xfc)

Definition at line 311 of file b43legacy.h.

#define B43legacy_CIR_SBIMCONFIGLOW (B43legacy_CIR_BASE + 0xa8)

Definition at line 310 of file b43legacy.h.

#define B43legacy_CIR_SBIMSTATE (B43legacy_CIR_BASE + 0x90)

Definition at line 306 of file b43legacy.h.

#define B43legacy_CIR_SBINTVEC (B43legacy_CIR_BASE + 0x94)

Definition at line 307 of file b43legacy.h.

#define B43legacy_CIR_SBTMSTATEHIGH (B43legacy_CIR_BASE + 0x9c)

Definition at line 309 of file b43legacy.h.

#define B43legacy_CIR_SBTMSTATELOW (B43legacy_CIR_BASE + 0x98)

Definition at line 308 of file b43legacy.h.

#define B43legacy_CIR_SBTPSFLAG (B43legacy_CIR_BASE + 0x18)

Definition at line 305 of file b43legacy.h.

#define B43legacy_DEBUG 0

Definition at line 348 of file b43legacy.h.

#define B43legacy_DEFAULT_LONG_RETRY_LIMIT 4

Definition at line 287 of file b43legacy.h.

#define B43legacy_DEFAULT_SHORT_RETRY_LIMIT 7

Definition at line 286 of file b43legacy.h.

#define B43legacy_FW_TYPE_IV 'i'

Definition at line 360 of file b43legacy.h.

#define B43legacy_FW_TYPE_PCM 'p'

Definition at line 359 of file b43legacy.h.

#define B43legacy_FW_TYPE_UCODE 'u'

Definition at line 358 of file b43legacy.h.

#define B43legacy_GPIO_CONTROL 0x6c

Definition at line 108 of file b43legacy.h.

#define B43legacy_HF_EDCF 0x00000100 /* on if WME/MAC suspended */

Definition at line 164 of file b43legacy.h.

#define B43legacy_HF_GDCW 0x00000020 /* G-PHY DV cancel filter */

Definition at line 162 of file b43legacy.h.

#define B43legacy_HF_OFDMPABOOST 0x00000040 /* Enable PA boost OFDM */

Definition at line 163 of file b43legacy.h.

#define B43legacy_HF_SYMW 0x00000002 /* G-PHY SYM workaround */

Definition at line 161 of file b43legacy.h.

#define B43legacy_INTERFSTACK_SIZE 26

Definition at line 492 of file b43legacy.h.

#define B43legacy_IRQ_ALL 0xFFFFFFFF

Definition at line 253 of file b43legacy.h.

#define B43legacy_IRQ_ATIM_END 0x00000020

Definition at line 235 of file b43legacy.h.

#define B43legacy_IRQ_BEACON 0x00000002

Definition at line 231 of file b43legacy.h.

#define B43legacy_IRQ_BEACON_CANCEL 0x00000010

Definition at line 234 of file b43legacy.h.

#define B43legacy_IRQ_BEACON_TX_OK 0x00000008

Definition at line 233 of file b43legacy.h.

#define B43legacy_IRQ_CCA_MEASURE_OK 0x00020000

Definition at line 245 of file b43legacy.h.

#define B43legacy_IRQ_DMA 0x00008000

Definition at line 243 of file b43legacy.h.

#define B43legacy_IRQ_MAC_SUSPENDED 0x00000001

Definition at line 230 of file b43legacy.h.

#define B43legacy_IRQ_MAC_TXERR 0x00000200

Definition at line 238 of file b43legacy.h.

#define B43legacy_IRQ_MASKTEMPLATE

Value:

(B43legacy_IRQ_MAC_SUSPENDED |  \
                     B43legacy_IRQ_TBTT_INDI |  \
                     B43legacy_IRQ_ATIM_END |   \
                     B43legacy_IRQ_PMQ |        \
                     B43legacy_IRQ_MAC_TXERR |  \
                     B43legacy_IRQ_PHY_TXERR |  \
                     B43legacy_IRQ_DMA |        \
                     B43legacy_IRQ_TXFIFO_FLUSH_OK | \
                     B43legacy_IRQ_NOISESAMPLE_OK | \
                     B43legacy_IRQ_UCODE_DEBUG |    \
                     B43legacy_IRQ_RFKILL |     \
                     B43legacy_IRQ_TX_OK)

Definition at line 254 of file b43legacy.h.

#define B43legacy_IRQ_NOISESAMPLE_OK 0x00040000

Definition at line 246 of file b43legacy.h.

#define B43legacy_IRQ_PHY_G_CHANGED 0x40000000

Definition at line 250 of file b43legacy.h.

#define B43legacy_IRQ_PHY_TXERR 0x00000800

Definition at line 239 of file b43legacy.h.

#define B43legacy_IRQ_PIO_WORKAROUND 0x00000100

Definition at line 237 of file b43legacy.h.

#define B43legacy_IRQ_PMEVENT 0x00001000

Definition at line 240 of file b43legacy.h.

#define B43legacy_IRQ_PMQ 0x00000040

Definition at line 236 of file b43legacy.h.

#define B43legacy_IRQ_RFKILL 0x10000000

Definition at line 248 of file b43legacy.h.

#define B43legacy_IRQ_TBTT_INDI 0x00000004 /* Target Beacon Transmit Time */

Definition at line 232 of file b43legacy.h.

#define B43legacy_IRQ_TIMEOUT 0x80000000

Definition at line 251 of file b43legacy.h.

#define B43legacy_IRQ_TIMER0 0x00002000

Definition at line 241 of file b43legacy.h.

#define B43legacy_IRQ_TIMER1 0x00004000

Definition at line 242 of file b43legacy.h.

#define B43legacy_IRQ_TX_OK 0x20000000

Definition at line 249 of file b43legacy.h.

#define B43legacy_IRQ_TXFIFO_FLUSH_OK 0x00010000

Definition at line 244 of file b43legacy.h.

#define B43legacy_IRQ_UCODE_DEBUG 0x08000000

Definition at line 247 of file b43legacy.h.

#define B43legacy_IRQWAIT_MAX_RETRIES 20

Definition at line 25 of file b43legacy.h.

#define B43legacy_IV_32BIT 0x8000

Definition at line 374 of file b43legacy.h.

#define B43legacy_IV_OFFSET_MASK 0x7FFF

Definition at line 373 of file b43legacy.h.

#define B43legacy_LO_COUNT (14*4)

Definition at line 395 of file b43legacy.h.

#define B43legacy_MACCMD_BEACON0_VALID 0x00000001 /* Beacon 0 in template RAM is busy/valid */

Definition at line 210 of file b43legacy.h.

#define B43legacy_MACCMD_BEACON1_VALID 0x00000002 /* Beacon 1 in template RAM is busy/valid */

Definition at line 211 of file b43legacy.h.

#define B43legacy_MACCMD_BGNOISE 0x00000010 /* Background noise */

Definition at line 214 of file b43legacy.h.

#define B43legacy_MACCMD_CCA 0x00000008 /* Clear channel assessment */

Definition at line 213 of file b43legacy.h.

#define B43legacy_MACCMD_DFQ_VALID 0x00000004 /* Directed frame queue valid (IBSS PS mode, ATIM) */

Definition at line 212 of file b43legacy.h.

#define B43legacy_MACCTL_AP 0x00040000 /* AccessPoint mode */

Definition at line 197 of file b43legacy.h.

#define B43legacy_MACCTL_AWAKE 0x04000000 /* Device is awake */

Definition at line 205 of file b43legacy.h.

#define B43legacy_MACCTL_BE 0x00010000 /* Big Endian mode */

Definition at line 195 of file b43legacy.h.

#define B43legacy_MACCTL_BEACPROMISC 0x00100000 /* Beacon Promiscuous */

Definition at line 199 of file b43legacy.h.

#define B43legacy_MACCTL_ENABLED 0x00000001 /* MAC Enabled */

Definition at line 190 of file b43legacy.h.

#define B43legacy_MACCTL_GMODE 0x80000000 /* G Mode */

Definition at line 207 of file b43legacy.h.

#define B43legacy_MACCTL_HWPS 0x02000000 /* Hardware Power Saving */

Definition at line 204 of file b43legacy.h.

#define B43legacy_MACCTL_IHR_ENABLED 0x00000400 /* IHR Region Enabled */

Definition at line 194 of file b43legacy.h.

#define B43legacy_MACCTL_INFRA 0x00020000 /* Infrastructure mode */

Definition at line 196 of file b43legacy.h.

#define B43legacy_MACCTL_KEEP_BAD 0x00800000 /* Keep bad frames (FCS) */

Definition at line 202 of file b43legacy.h.

#define B43legacy_MACCTL_KEEP_BADPLCP 0x00200000 /* Keep bad PLCP frames */

Definition at line 200 of file b43legacy.h.

#define B43legacy_MACCTL_KEEP_CTL 0x00400000 /* Keep control frames */

Definition at line 201 of file b43legacy.h.

#define B43legacy_MACCTL_PROMISC 0x01000000 /* Promiscuous mode */

Definition at line 203 of file b43legacy.h.

#define B43legacy_MACCTL_PSM_JMP0 0x00000004 /* Microcode jump to 0 */

Definition at line 192 of file b43legacy.h.

#define B43legacy_MACCTL_PSM_RUN 0x00000002 /* Run Microcode */

Definition at line 191 of file b43legacy.h.

#define B43legacy_MACCTL_RADIOLOCK 0x00080000 /* Radio lock */

Definition at line 198 of file b43legacy.h.

#define B43legacy_MACCTL_SHM_ENABLED 0x00000100 /* SHM Enabled */

Definition at line 193 of file b43legacy.h.

#define B43legacy_MACCTL_TBTTHOLD 0x10000000 /* TBTT Hold */

Definition at line 206 of file b43legacy.h.

#define B43legacy_MACFILTER_BSSID 0x0003

Definition at line 168 of file b43legacy.h.

#define B43legacy_MACFILTER_MAC 0x0010

Definition at line 169 of file b43legacy.h.

#define B43legacy_MACFILTER_SELF 0x0000

Definition at line 167 of file b43legacy.h.

#define B43legacy_MMIO_ANTENNA 0x3E8

Definition at line 80 of file b43legacy.h.

#define B43legacy_MMIO_CHANNEL 0x3F0

Definition at line 81 of file b43legacy.h.

#define B43legacy_MMIO_CHANNEL_EXT 0x3F4

Definition at line 82 of file b43legacy.h.

#define B43legacy_MMIO_DMA0_IRQ_MASK 0x24

Definition at line 29 of file b43legacy.h.

#define B43legacy_MMIO_DMA0_REASON 0x20

Definition at line 28 of file b43legacy.h.

#define B43legacy_MMIO_DMA1_IRQ_MASK 0x2C

Definition at line 31 of file b43legacy.h.

#define B43legacy_MMIO_DMA1_REASON 0x28

Definition at line 30 of file b43legacy.h.

#define B43legacy_MMIO_DMA2_IRQ_MASK 0x34

Definition at line 33 of file b43legacy.h.

#define B43legacy_MMIO_DMA2_REASON 0x30

Definition at line 32 of file b43legacy.h.

#define B43legacy_MMIO_DMA32_BASE0 0x200

Definition at line 58 of file b43legacy.h.

#define B43legacy_MMIO_DMA32_BASE1 0x220

Definition at line 59 of file b43legacy.h.

#define B43legacy_MMIO_DMA32_BASE2 0x240

Definition at line 60 of file b43legacy.h.

#define B43legacy_MMIO_DMA32_BASE3 0x260

Definition at line 61 of file b43legacy.h.

#define B43legacy_MMIO_DMA32_BASE4 0x280

Definition at line 62 of file b43legacy.h.

#define B43legacy_MMIO_DMA32_BASE5 0x2A0

Definition at line 63 of file b43legacy.h.

#define B43legacy_MMIO_DMA3_IRQ_MASK 0x3C

Definition at line 35 of file b43legacy.h.

#define B43legacy_MMIO_DMA3_REASON 0x38

Definition at line 34 of file b43legacy.h.

#define B43legacy_MMIO_DMA4_IRQ_MASK 0x44

Definition at line 37 of file b43legacy.h.

#define B43legacy_MMIO_DMA4_REASON 0x40

Definition at line 36 of file b43legacy.h.

#define B43legacy_MMIO_DMA5_IRQ_MASK 0x4C

Definition at line 39 of file b43legacy.h.

#define B43legacy_MMIO_DMA5_REASON 0x48

Definition at line 38 of file b43legacy.h.

#define B43legacy_MMIO_DMA64_BASE0 0x200

Definition at line 65 of file b43legacy.h.

#define B43legacy_MMIO_DMA64_BASE1 0x240

Definition at line 66 of file b43legacy.h.

#define B43legacy_MMIO_DMA64_BASE2 0x280

Definition at line 67 of file b43legacy.h.

#define B43legacy_MMIO_DMA64_BASE3 0x2C0

Definition at line 68 of file b43legacy.h.

#define B43legacy_MMIO_DMA64_BASE4 0x300

Definition at line 69 of file b43legacy.h.

#define B43legacy_MMIO_DMA64_BASE5 0x340

Definition at line 70 of file b43legacy.h.

#define B43legacy_MMIO_GEN_IRQ_MASK 0x12C

Definition at line 43 of file b43legacy.h.

#define B43legacy_MMIO_GEN_IRQ_REASON 0x128

Definition at line 42 of file b43legacy.h.

#define B43legacy_MMIO_GPIO_CONTROL 0x49C

Definition at line 92 of file b43legacy.h.

#define B43legacy_MMIO_GPIO_MASK 0x49E

Definition at line 93 of file b43legacy.h.

#define B43legacy_MMIO_MACCMD 0x124 /* MAC command */

Definition at line 41 of file b43legacy.h.

#define B43legacy_MMIO_MACCTL 0x120 /* MAC control */

Definition at line 40 of file b43legacy.h.

#define B43legacy_MMIO_MACFILTER_CONTROL 0x420

Definition at line 88 of file b43legacy.h.

#define B43legacy_MMIO_MACFILTER_DATA 0x422

Definition at line 89 of file b43legacy.h.

#define B43legacy_MMIO_PHY0 0x3E6

Definition at line 79 of file b43legacy.h.

#define B43legacy_MMIO_PHY_CONTROL 0x3FC

Definition at line 86 of file b43legacy.h.

#define B43legacy_MMIO_PHY_DATA 0x3FE

Definition at line 87 of file b43legacy.h.

#define B43legacy_MMIO_PHY_RADIO 0x3E2

Definition at line 78 of file b43legacy.h.

#define B43legacy_MMIO_PHY_VER 0x3E0

Definition at line 77 of file b43legacy.h.

#define B43legacy_MMIO_PIO1_BASE 0x300

Definition at line 72 of file b43legacy.h.

#define B43legacy_MMIO_PIO2_BASE 0x310

Definition at line 73 of file b43legacy.h.

#define B43legacy_MMIO_PIO3_BASE 0x320

Definition at line 74 of file b43legacy.h.

#define B43legacy_MMIO_PIO4_BASE 0x330

Definition at line 75 of file b43legacy.h.

#define B43legacy_MMIO_POWERUP_DELAY 0x6A8

Definition at line 100 of file b43legacy.h.

#define B43legacy_MMIO_PS_STATUS 0x140

Definition at line 46 of file b43legacy.h.

#define B43legacy_MMIO_RADIO_CONTROL 0x3F6

Definition at line 83 of file b43legacy.h.

#define B43legacy_MMIO_RADIO_DATA_HIGH 0x3F8

Definition at line 84 of file b43legacy.h.

#define B43legacy_MMIO_RADIO_DATA_LOW 0x3FA

Definition at line 85 of file b43legacy.h.

#define B43legacy_MMIO_RADIO_HWENABLED_HI 0x158

Definition at line 47 of file b43legacy.h.

#define B43legacy_MMIO_RADIO_HWENABLED_HI_MASK (1 << 16)

Definition at line 157 of file b43legacy.h.

#define B43legacy_MMIO_RADIO_HWENABLED_LO 0x49A

Definition at line 91 of file b43legacy.h.

#define B43legacy_MMIO_RADIO_HWENABLED_LO_MASK (1 << 4)

Definition at line 158 of file b43legacy.h.

#define B43legacy_MMIO_RAM_CONTROL 0x130

Definition at line 44 of file b43legacy.h.

#define B43legacy_MMIO_RAM_DATA 0x134

Definition at line 45 of file b43legacy.h.

#define B43legacy_MMIO_RCMTA_COUNT 0x43C /* Receive Match Transmitter Addr */

Definition at line 90 of file b43legacy.h.

#define B43legacy_MMIO_REV3PLUS_TSF_HIGH 0x184 /* core rev >= 3 only */

Definition at line 54 of file b43legacy.h.

#define B43legacy_MMIO_REV3PLUS_TSF_LOW 0x180 /* core rev >= 3 only */

Definition at line 53 of file b43legacy.h.

#define B43legacy_MMIO_RNG 0x65A

Definition at line 99 of file b43legacy.h.

#define B43legacy_MMIO_SHM_CONTROL 0x160

Definition at line 48 of file b43legacy.h.

#define B43legacy_MMIO_SHM_DATA 0x164

Definition at line 49 of file b43legacy.h.

#define B43legacy_MMIO_SHM_DATA_UNALIGNED 0x166

Definition at line 50 of file b43legacy.h.

#define B43legacy_MMIO_TSF_0 0x632 /* core rev < 3 only */

Definition at line 95 of file b43legacy.h.

#define B43legacy_MMIO_TSF_1 0x634 /* core rev < 3 only */

Definition at line 96 of file b43legacy.h.

#define B43legacy_MMIO_TSF_2 0x636 /* core rev < 3 only */

Definition at line 97 of file b43legacy.h.

#define B43legacy_MMIO_TSF_3 0x638 /* core rev < 3 only */

Definition at line 98 of file b43legacy.h.

#define B43legacy_MMIO_TSF_CFP_PRETBTT 0x612

Definition at line 94 of file b43legacy.h.

#define B43legacy_MMIO_TSF_CFP_REP 0x188

Definition at line 55 of file b43legacy.h.

#define B43legacy_MMIO_TSF_CFP_START 0x18C

Definition at line 56 of file b43legacy.h.

#define B43legacy_MMIO_XMITSTAT_0 0x170

Definition at line 51 of file b43legacy.h.

#define B43legacy_MMIO_XMITSTAT_1 0x174

Definition at line 52 of file b43legacy.h.

#define B43legacy_OFDM_RATE_12MB 24

Definition at line 276 of file b43legacy.h.

#define B43legacy_OFDM_RATE_18MB 36

Definition at line 277 of file b43legacy.h.

#define B43legacy_OFDM_RATE_24MB 48

Definition at line 278 of file b43legacy.h.

#define B43legacy_OFDM_RATE_36MB 72

Definition at line 279 of file b43legacy.h.

#define B43legacy_OFDM_RATE_48MB 96

Definition at line 280 of file b43legacy.h.

#define B43legacy_OFDM_RATE_54MB 108

Definition at line 281 of file b43legacy.h.

#define B43legacy_OFDM_RATE_6MB 12

Definition at line 274 of file b43legacy.h.

#define B43legacy_OFDM_RATE_9MB 18

Definition at line 275 of file b43legacy.h.

#define B43legacy_PHY_G_CRS 0x0429

Definition at line 182 of file b43legacy.h.

#define B43legacy_PHY_G_LO_CONTROL 0x0810

Definition at line 176 of file b43legacy.h.

#define B43legacy_PHY_G_PCTL 0x0029

Definition at line 180 of file b43legacy.h.

#define B43legacy_PHY_ILT_G_CTRL 0x0472

Definition at line 177 of file b43legacy.h.

#define B43legacy_PHY_ILT_G_DATA1 0x0473

Definition at line 178 of file b43legacy.h.

#define B43legacy_PHY_ILT_G_DATA2 0x0474

Definition at line 179 of file b43legacy.h.

#define B43legacy_PHY_NRSSILT_CTRL 0x0803

Definition at line 183 of file b43legacy.h.

#define B43legacy_PHY_NRSSILT_DATA 0x0804

Definition at line 184 of file b43legacy.h.

#define B43legacy_PHY_RADIO_BITFIELD 0x0401

Definition at line 181 of file b43legacy.h.

#define B43legacy_PHY_TX_BADNESS_LIMIT 1000

Definition at line 289 of file b43legacy.h.

#define B43legacy_PHYMODE ( phytype ) (1 << (phytype))

Definition at line 383 of file b43legacy.h.

#define B43legacy_PHYMODE_B

Value:

B43legacy_PHYMODE \

((B43legacy_PHYTYPE_B))

Definition at line 384 of file b43legacy.h.

#define B43legacy_PHYMODE_G

Value:

B43legacy_PHYMODE \

((B43legacy_PHYTYPE_G))

Definition at line 386 of file b43legacy.h.

#define B43legacy_PHYTYPE_B 0x01

Definition at line 172 of file b43legacy.h.

#define B43legacy_PHYTYPE_G 0x02

Definition at line 173 of file b43legacy.h.

#define B43legacy_QOS_QUEUE_NUM 4

Definition at line 563 of file b43legacy.h.

#define B43legacy_RADIOCTL_ID 0x01

Definition at line 187 of file b43legacy.h.

#define B43legacy_RATE_TO_100KBPS ( rate ) (((rate) * 10) / 2)

Definition at line 283 of file b43legacy.h.

#define B43legacy_SBIMSTATE_IB_ERROR 0x20000

Definition at line 325 of file b43legacy.h.

#define B43legacy_SBIMSTATE_TIMEOUT 0x40000

Definition at line 326 of file b43legacy.h.

#define B43legacy_SBTMSTATEHIGH_BISTCOMPLETE 0x80000000

Definition at line 322 of file b43legacy.h.

#define B43legacy_SBTMSTATEHIGH_BISTFAILED 0x40000000

Definition at line 321 of file b43legacy.h.

#define B43legacy_SBTMSTATEHIGH_BUSY 0x00000004

Definition at line 315 of file b43legacy.h.

#define B43legacy_SBTMSTATEHIGH_COREFLAGS 0x1FFF0000

Definition at line 318 of file b43legacy.h.

#define B43legacy_SBTMSTATEHIGH_DMA64BIT 0x10000000

Definition at line 319 of file b43legacy.h.

#define B43legacy_SBTMSTATEHIGH_G_PHY_AVAIL 0x00010000

Definition at line 317 of file b43legacy.h.

#define B43legacy_SBTMSTATEHIGH_GATEDCLK 0x20000000

Definition at line 320 of file b43legacy.h.

#define B43legacy_SBTMSTATEHIGH_SERROR 0x00000001

Definition at line 314 of file b43legacy.h.

#define B43legacy_SBTMSTATEHIGH_TIMEOUT 0x00000020

Definition at line 316 of file b43legacy.h.

#define B43legacy_SEC_KEYSIZE 16

Definition at line 292 of file b43legacy.h.

#define b43legacy_set_status	(	wldev,
		stat
	)

Value:

do {        \
        atomic_set(&(wldev)->__init_status, (stat));    \
        smp_wmb();                  \
                    } while (0)

Definition at line 662 of file b43legacy.h.

#define B43legacy_SHM_AUTOINC_R 0x0200 /* Read Auto-increment */

Definition at line 117 of file b43legacy.h.

#define B43legacy_SHM_AUTOINC_RW

Value:

(B43legacy_SHM_AUTOINC_R | \

B43legacy_SHM_AUTOINC_W)

Definition at line 119 of file b43legacy.h.

#define B43legacy_SHM_AUTOINC_W 0x0100 /* Write Auto-increment */

Definition at line 118 of file b43legacy.h.

#define B43legacy_SHM_HW 0x0004

Definition at line 113 of file b43legacy.h.

#define B43legacy_SHM_SH_ACKCTSPHYCTL 0x0022 /* ACK/CTS PHY control word */

Definition at line 136 of file b43legacy.h.

#define B43legacy_SHM_SH_BEACPHYCTL 0x0054 /* Beacon PHY TX control word */

Definition at line 134 of file b43legacy.h.

#define B43legacy_SHM_SH_BTL0 0x0018 /* Beacon template length 0 */

Definition at line 130 of file b43legacy.h.

#define B43legacy_SHM_SH_BTL1 0x001A /* Beacon template length 1 */

Definition at line 131 of file b43legacy.h.

#define B43legacy_SHM_SH_BTSFOFF 0x001C /* Beacon TSF offset */

Definition at line 132 of file b43legacy.h.

#define B43legacy_SHM_SH_CCKBASIC 0x04E0 /* Pointer to CCK basic rate map */

Definition at line 145 of file b43legacy.h.

#define B43legacy_SHM_SH_CCKDIRECT 0x04C0 /* Pointer to CCK direct map */

Definition at line 144 of file b43legacy.h.

#define B43legacy_SHM_SH_DTIMP 0x0012 /* DTIM period */

Definition at line 129 of file b43legacy.h.

#define B43legacy_SHM_SH_HOSTFHI 0x0060 /* Hostflags ucode opts (high) */

Definition at line 125 of file b43legacy.h.

#define B43legacy_SHM_SH_HOSTFLO 0x005E /* Hostflags ucode opts (low) */

Definition at line 124 of file b43legacy.h.

#define B43legacy_SHM_SH_KEYIDXBLOCK 0x05D4 /* Key index/algorithm block */

Definition at line 127 of file b43legacy.h.

#define B43legacy_SHM_SH_OFDMBASIC 0x04A0 /* Pointer to OFDM basic rate map */

Definition at line 143 of file b43legacy.h.

#define B43legacy_SHM_SH_OFDMDIRECT 0x0480 /* Pointer to OFDM direct map */

Definition at line 142 of file b43legacy.h.

#define B43legacy_SHM_SH_PRETBTT 0x0096 /* pre-TBTT in us */

Definition at line 152 of file b43legacy.h.

#define B43legacy_SHM_SH_PRMAXTIME 0x0074 /* Probe Response max time */

Definition at line 139 of file b43legacy.h.

#define B43legacy_SHM_SH_PRPHYCTL 0x0188 /* Probe Resp PHY TX control */

Definition at line 140 of file b43legacy.h.

#define B43legacy_SHM_SH_PRTLEN 0x004A /* Probe Response template length */

Definition at line 138 of file b43legacy.h.

#define B43legacy_SHM_SH_SPUWKUP 0x0094 /* pre-wakeup for synth PU in us */

Definition at line 151 of file b43legacy.h.

#define B43legacy_SHM_SH_TIMPOS 0x001E /* TIM position in beacon */

Definition at line 133 of file b43legacy.h.

#define B43legacy_SHM_SH_UCODEDATE 0x0004 /* Microcode date */

Definition at line 149 of file b43legacy.h.

#define B43legacy_SHM_SH_UCODEPATCH 0x0002 /* Microcode patchlevel */

Definition at line 148 of file b43legacy.h.

#define B43legacy_SHM_SH_UCODEREV 0x0000 /* Microcode revision */

Definition at line 147 of file b43legacy.h.

#define B43legacy_SHM_SH_UCODETIME 0x0006 /* Microcode time */

Definition at line 150 of file b43legacy.h.

#define B43legacy_SHM_SH_WLCOREREV 0x0016 /* 802.11 core revision */

Definition at line 123 of file b43legacy.h.

#define B43legacy_SHM_SHARED 0x0001

Definition at line 111 of file b43legacy.h.

#define B43legacy_SHM_UCODE 0x0300

Definition at line 114 of file b43legacy.h.

#define B43legacy_SHM_WIRELESS 0x0002

Definition at line 112 of file b43legacy.h.

#define b43legacy_status ( wldev ) atomic_read(&(wldev)->__init_status)

Definition at line 661 of file b43legacy.h.

#define B43legacy_TMSHIGH_FCLOCK 0x00040000 /* Fast Clock Available */

Definition at line 224 of file b43legacy.h.

#define B43legacy_TMSHIGH_GPHY 0x00010000 /* G-PHY avail (rev >= 5) */

Definition at line 225 of file b43legacy.h.

#define B43legacy_TMSLOW_GMODE 0x20000000 /* G Mode Enable */

Definition at line 217 of file b43legacy.h.

#define B43legacy_TMSLOW_MACPHYCLKEN 0x00100000 /* MAC PHY Clock Ctrl Enbl */

Definition at line 219 of file b43legacy.h.

#define B43legacy_TMSLOW_PHYCLKEN 0x00040000 /* PHY Clock Enable */

Definition at line 221 of file b43legacy.h.

#define B43legacy_TMSLOW_PHYRESET 0x00080000 /* PHY Reset */

Definition at line 220 of file b43legacy.h.

#define B43legacy_TMSLOW_PLLREFSEL 0x00200000 /* PLL Freq Ref Select */

Definition at line 218 of file b43legacy.h.

#define B43legacy_UCODEFLAG_AUTODIV 0x0001

Definition at line 227 of file b43legacy.h.

#define B43legacy_UCODEFLAGS_OFFSET 0x005E

Definition at line 154 of file b43legacy.h.

#define B43legacy_WARN_ON ( x ) __b43legacy_warn_on_dummy(unlikely(!!(x)))

Definition at line 346 of file b43legacy.h.

#define b43legacydbg	(	wl,
		fmt...
	)	do { /* nothing */ } while (0)

Definition at line 846 of file b43legacy.h.

#define PFX KBUILD_MODNAME ": "

Definition at line 328 of file b43legacy.h.

#define Q52_ARG ( q52 ) ((q52) / 4), (((q52) & 3) * 100 / 4)

Definition at line 851 of file b43legacy.h.

#define Q52_FMT "%u.%u"

Definition at line 850 of file b43legacy.h.

Enumeration Type Documentation

anonymous enum

Enumerator:

B43legacy_SEC_ALGO_NONE
B43legacy_SEC_ALGO_WEP40
B43legacy_SEC_ALGO_TKIP
B43legacy_SEC_ALGO_AES
B43legacy_SEC_ALGO_WEP104
B43legacy_SEC_ALGO_AES_LEGACY

Definition at line 294 of file b43legacy.h.

anonymous enum

Enumerator:

B43legacy_STAT_UNINIT
B43legacy_STAT_INITIALIZED
B43legacy_STAT_STARTED

Definition at line 656 of file b43legacy.h.

Function Documentation

__printf	(	2	,
		3
	)

Variable Documentation

struct b43legacy_iv __packed

const char const char const char* fmt

Definition at line 837 of file b43legacy.h.

Data Structures

Macros

Enumerations

Functions

Variables

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation

Variable Documentation