Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
Macros
bcm1480_regs.h File Reference
#include <asm/sibyte/sb1250_defs.h>
#include <asm/sibyte/sb1250_regs.h>

Go to the source code of this file.

Macros

#define A_BCM1480_MC_BASE_0   0x0010050000
 
#define A_BCM1480_MC_BASE_1   0x0010051000
 
#define A_BCM1480_MC_BASE_2   0x0010052000
 
#define A_BCM1480_MC_BASE_3   0x0010053000
 
#define BCM1480_MC_REGISTER_SPACING   0x1000
 
#define A_BCM1480_MC_BASE(ctlid)   (A_BCM1480_MC_BASE_0+(ctlid)*BCM1480_MC_REGISTER_SPACING)
 
#define A_BCM1480_MC_REGISTER(ctlid, reg)   (A_BCM1480_MC_BASE(ctlid)+(reg))
 
#define R_BCM1480_MC_CONFIG   0x0000000100
 
#define R_BCM1480_MC_CS_START   0x0000000120
 
#define R_BCM1480_MC_CS_END   0x0000000140
 
#define S_BCM1480_MC_CS_STARTEND   24
 
#define R_BCM1480_MC_CS01_ROW0   0x0000000180
 
#define R_BCM1480_MC_CS01_ROW1   0x00000001A0
 
#define R_BCM1480_MC_CS23_ROW0   0x0000000200
 
#define R_BCM1480_MC_CS23_ROW1   0x0000000220
 
#define R_BCM1480_MC_CS01_COL0   0x0000000280
 
#define R_BCM1480_MC_CS01_COL1   0x00000002A0
 
#define R_BCM1480_MC_CS23_COL0   0x0000000300
 
#define R_BCM1480_MC_CS23_COL1   0x0000000320
 
#define R_BCM1480_MC_CSX_BASE   0x0000000180
 
#define R_BCM1480_MC_CSX_ROW0   0x0000000000 /* relative to CSX_BASE */
 
#define R_BCM1480_MC_CSX_ROW1   0x0000000020 /* relative to CSX_BASE */
 
#define R_BCM1480_MC_CSX_COL0   0x0000000100 /* relative to CSX_BASE */
 
#define R_BCM1480_MC_CSX_COL1   0x0000000120 /* relative to CSX_BASE */
 
#define BCM1480_MC_CSX_SPACING   0x0000000080 /* CS23 relative to CS01 */
 
#define R_BCM1480_MC_CS01_BA   0x0000000380
 
#define R_BCM1480_MC_CS23_BA   0x00000003A0
 
#define R_BCM1480_MC_DRAMCMD   0x0000000400
 
#define R_BCM1480_MC_DRAMMODE   0x0000000420
 
#define R_BCM1480_MC_CLOCK_CFG   0x0000000440
 
#define R_BCM1480_MC_MCLK_CFG   R_BCM1480_MC_CLOCK_CFG
 
#define R_BCM1480_MC_TEST_DATA   0x0000000480
 
#define R_BCM1480_MC_TEST_ECC   0x00000004A0
 
#define R_BCM1480_MC_TIMING1   0x00000004C0
 
#define R_BCM1480_MC_TIMING2   0x00000004E0
 
#define R_BCM1480_MC_DLL_CFG   0x0000000500
 
#define R_BCM1480_MC_DRIVE_CFG   0x0000000520
 
#define A_BCM1480_MC_GLB_CONFIG   0x0010054100
 
#define A_BCM1480_MC_GLB_INTLV   0x0010054120
 
#define A_BCM1480_MC_GLB_ECC_STATUS   0x0010054140
 
#define A_BCM1480_MC_GLB_ECC_ADDR   0x0010054160
 
#define A_BCM1480_MC_GLB_ECC_CORRECT   0x0010054180
 
#define A_BCM1480_MC_GLB_PERF_CNT_CONTROL   0x00100541A0
 
#define A_BCM1480_L2_BASE   0x0010040000
 
#define A_BCM1480_L2_READ_TAG   0x0010040018
 
#define A_BCM1480_L2_ECC_TAG   0x0010040038
 
#define A_BCM1480_L2_MISC0_VALUE   0x0010040058
 
#define A_BCM1480_L2_MISC1_VALUE   0x0010040078
 
#define A_BCM1480_L2_MISC2_VALUE   0x0010040098
 
#define A_BCM1480_L2_MISC_CONFIG   0x0010040040 /* x040 */
 
#define A_BCM1480_L2_CACHE_DISABLE   0x0010040060 /* x060 */
 
#define A_BCM1480_L2_MAKECACHEDISABLE(x)   (A_BCM1480_L2_CACHE_DISABLE | (((x)&0xF) << 12))
 
#define A_BCM1480_L2_WAY_ENABLE_3_0   0x0010040080 /* x080 */
 
#define A_BCM1480_L2_WAY_ENABLE_7_4   0x00100400A0 /* x0A0 */
 
#define A_BCM1480_L2_MAKE_WAY_ENABLE_LO(x)   (A_BCM1480_L2_WAY_ENABLE_3_0 | (((x)&0xF) << 12))
 
#define A_BCM1480_L2_MAKE_WAY_ENABLE_HI(x)   (A_BCM1480_L2_WAY_ENABLE_7_4 | (((x)&0xF) << 12))
 
#define A_BCM1480_L2_MAKE_WAY_DISABLE_LO(x)   (A_BCM1480_L2_WAY_ENABLE_3_0 | (((~x)&0xF) << 12))
 
#define A_BCM1480_L2_MAKE_WAY_DISABLE_HI(x)   (A_BCM1480_L2_WAY_ENABLE_7_4 | (((~x)&0xF) << 12))
 
#define A_BCM1480_L2_WAY_LOCAL_3_0   0x0010040100 /* x100 */
 
#define A_BCM1480_L2_WAY_LOCAL_7_4   0x0010040120 /* x120 */
 
#define A_BCM1480_L2_WAY_REMOTE_3_0   0x0010040140 /* x140 */
 
#define A_BCM1480_L2_WAY_REMOTE_7_4   0x0010040160 /* x160 */
 
#define A_BCM1480_L2_WAY_AGENT_3_0   0x00100400C0 /* xxC0 */
 
#define A_BCM1480_L2_WAY_AGENT_7_4   0x00100400E0 /* xxE0 */
 
#define A_BCM1480_L2_WAY_ENABLE(A, banks)   (A | (((~(banks))&0x0F) << 8))
 
#define A_BCM1480_L2_BANK_BASE   0x00D0300000
 
#define A_BCM1480_L2_BANK_ADDRESS(b)   (A_BCM1480_L2_BANK_BASE | (((b)&0x7)<<17))
 
#define A_BCM1480_L2_MGMT_TAG_BASE   0x00D0000000
 
#define A_BCM1480_PCI_BASE   0x0010061400
 
#define A_BCM1480_PCI_RESET   0x0010061400
 
#define A_BCM1480_PCI_DLL   0x0010061500
 
#define A_BCM1480_PCI_TYPE00_HEADER   0x002E000000
 
#define A_BCM1480_MAC_BASE_2   0x0010066000
 
#define A_MAC_BASE_2   A_BCM1480_MAC_BASE_2
 
#define A_BCM1480_MAC_BASE_3   0x0010067000
 
#define A_MAC_BASE_3   A_BCM1480_MAC_BASE_3
 
#define R_BCM1480_MAC_DMA_OODPKTLOST   0x00000038
 
#define R_MAC_DMA_OODPKTLOST   R_BCM1480_MAC_DMA_OODPKTLOST
 
#define BCM1480_DUART_NUM_PORTS   4
 
#define A_BCM1480_DUART0   0x0010060000
 
#define A_BCM1480_DUART1   0x0010060400
 
#define A_BCM1480_DUART(chan)   ((((chan)&2) == 0)? A_BCM1480_DUART0 : A_BCM1480_DUART1)
 
#define BCM1480_DUART_CHANREG_SPACING   0x100
 
#define A_BCM1480_DUART_CHANREG(chan, reg)
 
#define A_BCM1480_DUART_CTRLREG(chan, reg)
 
#define DUART_IMRISR_SPACING   0x20
 
#define DUART_INCHNG_SPACING   0x10
 
#define R_BCM1480_DUART_IMRREG(chan)   (R_DUART_IMR_A + ((chan) & 1) * DUART_IMRISR_SPACING)
 
#define R_BCM1480_DUART_ISRREG(chan)   (R_DUART_ISR_A + ((chan) & 1) * DUART_IMRISR_SPACING)
 
#define R_BCM1480_DUART_INCHREG(chan)   (R_DUART_IN_CHNG_A + ((chan) & 1) * DUART_INCHNG_SPACING)
 
#define A_BCM1480_DUART_IMRREG(chan)   (A_BCM1480_DUART_CTRLREG((chan), R_BCM1480_DUART_IMRREG(chan)))
 
#define A_BCM1480_DUART_ISRREG(chan)   (A_BCM1480_DUART_CTRLREG((chan), R_BCM1480_DUART_ISRREG(chan)))
 
#define A_BCM1480_DUART_IN_PORT(chan)   (A_BCM1480_DUART_CTRLREG((chan), R_DUART_IN_PORT))
 
#define A_BCM1480_DUART_MODE_REG_1_C   0x0010060400
 
#define A_BCM1480_DUART_MODE_REG_2_C   0x0010060410
 
#define A_BCM1480_DUART_STATUS_C   0x0010060420
 
#define A_BCM1480_DUART_CLK_SEL_C   0x0010060430
 
#define A_BCM1480_DUART_FULL_CTL_C   0x0010060440
 
#define A_BCM1480_DUART_CMD_C   0x0010060450
 
#define A_BCM1480_DUART_RX_HOLD_C   0x0010060460
 
#define A_BCM1480_DUART_TX_HOLD_C   0x0010060470
 
#define A_BCM1480_DUART_OPCR_C   0x0010060480
 
#define A_BCM1480_DUART_AUX_CTRL_C   0x0010060490
 
#define A_BCM1480_DUART_MODE_REG_1_D   0x0010060500
 
#define A_BCM1480_DUART_MODE_REG_2_D   0x0010060510
 
#define A_BCM1480_DUART_STATUS_D   0x0010060520
 
#define A_BCM1480_DUART_CLK_SEL_D   0x0010060530
 
#define A_BCM1480_DUART_FULL_CTL_D   0x0010060540
 
#define A_BCM1480_DUART_CMD_D   0x0010060550
 
#define A_BCM1480_DUART_RX_HOLD_D   0x0010060560
 
#define A_BCM1480_DUART_TX_HOLD_D   0x0010060570
 
#define A_BCM1480_DUART_OPCR_D   0x0010060580
 
#define A_BCM1480_DUART_AUX_CTRL_D   0x0010060590
 
#define A_BCM1480_DUART_INPORT_CHNG_CD   0x0010060600
 
#define A_BCM1480_DUART_AUX_CTRL_CD   0x0010060610
 
#define A_BCM1480_DUART_ISR_C   0x0010060620
 
#define A_BCM1480_DUART_IMR_C   0x0010060630
 
#define A_BCM1480_DUART_ISR_D   0x0010060640
 
#define A_BCM1480_DUART_IMR_D   0x0010060650
 
#define A_BCM1480_DUART_OUT_PORT_CD   0x0010060660
 
#define A_BCM1480_DUART_OPCR_CD   0x0010060670
 
#define A_BCM1480_DUART_IN_PORT_CD   0x0010060680
 
#define A_BCM1480_DUART_ISR_CD   0x0010060690
 
#define A_BCM1480_DUART_IMR_CD   0x00100606A0
 
#define A_BCM1480_DUART_SET_OPR_CD   0x00100606B0
 
#define A_BCM1480_DUART_CLEAR_OPR_CD   0x00100606C0
 
#define A_BCM1480_DUART_INPORT_CHNG_C   0x00100606D0
 
#define A_BCM1480_DUART_INPORT_CHNG_D   0x00100606E0
 
#define A_BCM1480_IO_PCMCIA_CFG_B   0x0010061A58
 
#define A_BCM1480_IO_PCMCIA_STATUS_B   0x0010061A68
 
#define A_BCM1480_GPIO_INT_ADD_TYPE   0x0010061A78
 
#define R_BCM1480_GPIO_INT_ADD_TYPE   (-8)
 
#define A_GPIO_INT_ADD_TYPE   A_BCM1480_GPIO_INT_ADD_TYPE
 
#define R_GPIO_INT_ADD_TYPE   R_BCM1480_GPIO_INT_ADD_TYPE
 
#define A_BCM1480_SCD_WDOG_2   0x0010022050
 
#define A_BCM1480_SCD_WDOG_3   0x0010022150
 
#define BCM1480_SCD_NUM_WDOGS   4
 
#define A_BCM1480_SCD_WDOG_BASE(w)   (A_BCM1480_SCD_WDOG_0+((w)&2)*0x1000 + ((w)&1)*0x100)
 
#define A_BCM1480_SCD_WDOG_REGISTER(w, r)   (A_BCM1480_SCD_WDOG_BASE(w) + (r))
 
#define A_BCM1480_SCD_WDOG_INIT_2   0x0010022050
 
#define A_BCM1480_SCD_WDOG_CNT_2   0x0010022058
 
#define A_BCM1480_SCD_WDOG_CFG_2   0x0010022060
 
#define A_BCM1480_SCD_WDOG_INIT_3   0x0010022150
 
#define A_BCM1480_SCD_WDOG_CNT_3   0x0010022158
 
#define A_BCM1480_SCD_WDOG_CFG_3   0x0010022160
 
#define A_BCM1480_SCD_ZBBUS_CYCLE_COUNT   A_SCD_ZBBUS_CYCLE_COUNT
 
#define A_BCM1480_SCD_ZBBUS_CYCLE_CP_BASE   0x0010020C00
 
#define A_BCM1480_SCD_ZBBUS_CYCLE_CP0   A_SCD_ZBBUS_CYCLE_CP0
 
#define A_BCM1480_SCD_ZBBUS_CYCLE_CP1   A_SCD_ZBBUS_CYCLE_CP1
 
#define A_BCM1480_SCD_ZBBUS_CYCLE_CP2   0x0010020C10
 
#define A_BCM1480_SCD_ZBBUS_CYCLE_CP3   0x0010020C18
 
#define A_BCM1480_SCD_SCRATCH   0x100200A0
 
#define A_BCM1480_IMR_CPU0_BASE   0x0010020000
 
#define A_BCM1480_IMR_CPU1_BASE   0x0010022000
 
#define A_BCM1480_IMR_CPU2_BASE   0x0010024000
 
#define A_BCM1480_IMR_CPU3_BASE   0x0010026000
 
#define BCM1480_IMR_REGISTER_SPACING   0x2000
 
#define BCM1480_IMR_REGISTER_SPACING_SHIFT   13
 
#define A_BCM1480_IMR_MAPPER(cpu)   (A_BCM1480_IMR_CPU0_BASE+(cpu)*BCM1480_IMR_REGISTER_SPACING)
 
#define A_BCM1480_IMR_REGISTER(cpu, reg)   (A_BCM1480_IMR_MAPPER(cpu)+(reg))
 
#define BCM1480_IMR_HL_SPACING   0x1000
 
#define R_BCM1480_IMR_INTERRUPT_DIAG_H   0x0010
 
#define R_BCM1480_IMR_LDT_INTERRUPT_H   0x0018
 
#define R_BCM1480_IMR_LDT_INTERRUPT_CLR_H   0x0020
 
#define R_BCM1480_IMR_INTERRUPT_MASK_H   0x0028
 
#define R_BCM1480_IMR_INTERRUPT_TRACE_H   0x0038
 
#define R_BCM1480_IMR_INTERRUPT_SOURCE_STATUS_H   0x0040
 
#define R_BCM1480_IMR_LDT_INTERRUPT_SET   0x0048
 
#define R_BCM1480_IMR_MAILBOX_0_CPU   0x00C0
 
#define R_BCM1480_IMR_MAILBOX_0_SET_CPU   0x00C8
 
#define R_BCM1480_IMR_MAILBOX_0_CLR_CPU   0x00D0
 
#define R_BCM1480_IMR_MAILBOX_1_CPU   0x00E0
 
#define R_BCM1480_IMR_MAILBOX_1_SET_CPU   0x00E8
 
#define R_BCM1480_IMR_MAILBOX_1_CLR_CPU   0x00F0
 
#define R_BCM1480_IMR_INTERRUPT_STATUS_BASE_H   0x0100
 
#define BCM1480_IMR_INTERRUPT_STATUS_COUNT   8
 
#define R_BCM1480_IMR_INTERRUPT_MAP_BASE_H   0x0200
 
#define BCM1480_IMR_INTERRUPT_MAP_COUNT   64
 
#define R_BCM1480_IMR_INTERRUPT_DIAG_L   0x1010
 
#define R_BCM1480_IMR_LDT_INTERRUPT_L   0x1018
 
#define R_BCM1480_IMR_LDT_INTERRUPT_CLR_L   0x1020
 
#define R_BCM1480_IMR_INTERRUPT_MASK_L   0x1028
 
#define R_BCM1480_IMR_INTERRUPT_TRACE_L   0x1038
 
#define R_BCM1480_IMR_INTERRUPT_SOURCE_STATUS_L   0x1040
 
#define R_BCM1480_IMR_INTERRUPT_STATUS_BASE_L   0x1100
 
#define R_BCM1480_IMR_INTERRUPT_MAP_BASE_L   0x1200
 
#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU0_BASE   0x0010028000
 
#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU1_BASE   0x0010028100
 
#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU2_BASE   0x0010028200
 
#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU3_BASE   0x0010028300
 
#define BCM1480_IMR_ALIAS_MAILBOX_SPACING   0100
 
#define A_BCM1480_IMR_ALIAS_MAILBOX(cpu)
 
#define A_BCM1480_IMR_ALIAS_MAILBOX_REGISTER(cpu, reg)   (A_BCM1480_IMR_ALIAS_MAILBOX(cpu)+(reg))
 
#define R_BCM1480_IMR_ALIAS_MAILBOX_0   0x0000 /* 0x0x0 */
 
#define R_BCM1480_IMR_ALIAS_MAILBOX_0_SET   0x0008 /* 0x0x8 */
 
#define R_BCM1480_IMR_MAILBOX_CPU   0x00
 
#define R_BCM1480_IMR_MAILBOX_SET   0x08
 
#define R_BCM1480_IMR_MAILBOX_CLR   0x10
 
#define R_BCM1480_IMR_MAILBOX_NUM_SPACING   0x20
 
#define A_BCM1480_MAILBOX_REGISTER(num, reg, cpu)
 
#define A_BCM1480_SCD_PERF_CNT_BASE   0x00100204C0
 
#define A_BCM1480_SCD_PERF_CNT_CFG0   0x00100204C0
 
#define A_BCM1480_SCD_PERF_CNT_CFG_0   A_BCM1480_SCD_PERF_CNT_CFG0
 
#define A_BCM1480_SCD_PERF_CNT_CFG1   0x00100204C8
 
#define A_BCM1480_SCD_PERF_CNT_CFG_1   A_BCM1480_SCD_PERF_CNT_CFG1
 
#define A_BCM1480_SCD_PERF_CNT_0   A_SCD_PERF_CNT_0
 
#define A_BCM1480_SCD_PERF_CNT_1   A_SCD_PERF_CNT_1
 
#define A_BCM1480_SCD_PERF_CNT_2   A_SCD_PERF_CNT_2
 
#define A_BCM1480_SCD_PERF_CNT_3   A_SCD_PERF_CNT_3
 
#define A_BCM1480_SCD_PERF_CNT_4   0x00100204F0
 
#define A_BCM1480_SCD_PERF_CNT_5   0x00100204F8
 
#define A_BCM1480_SCD_PERF_CNT_6   0x0010020500
 
#define A_BCM1480_SCD_PERF_CNT_7   0x0010020508
 
#define BCM1480_SCD_NUM_PERF_CNT   8
 
#define BCM1480_SCD_PERF_CNT_SPACING   8
 
#define A_BCM1480_SCD_PERF_CNT(n)   (A_SCD_PERF_CNT_0+(n*BCM1480_SCD_PERF_CNT_SPACING))
 
#define A_BCM1480_BUS_ERR_STATUS_DEBUG   0x00100208D8
 
#define BCM1480_HT_NUM_PORTS   3
 
#define BCM1480_HT_PORT_SPACING   0x800
 
#define A_BCM1480_HT_PORT_HEADER(x)   (A_BCM1480_HT_PORT0_HEADER + ((x)*BCM1480_HT_PORT_SPACING))
 
#define A_BCM1480_HT_PORT0_HEADER   0x00FE000000
 
#define A_BCM1480_HT_PORT1_HEADER   0x00FE000800
 
#define A_BCM1480_HT_PORT2_HEADER   0x00FE001000
 
#define A_BCM1480_HT_TYPE00_HEADER   0x00FE002000
 
#define A_BCM1480_NC_BASE   0x00DFBD0000
 
#define A_BCM1480_NC_RLD_FIELD   0x00DFBD0000
 
#define A_BCM1480_NC_RLD_TRIGGER   0x00DFBD0020
 
#define A_BCM1480_NC_RLD_BAD_ERROR   0x00DFBD0040
 
#define A_BCM1480_NC_RLD_COR_ERROR   0x00DFBD0060
 
#define A_BCM1480_NC_RLD_ECC_STATUS   0x00DFBD0080
 
#define A_BCM1480_NC_RLD_WAY_ENABLE   0x00DFBD00A0
 
#define A_BCM1480_NC_RLD_RANDOM_LFSR   0x00DFBD00C0
 
#define A_BCM1480_NC_INTERRUPT_STATUS   0x00DFBD00E0
 
#define A_BCM1480_NC_INTERRUPT_ENABLE   0x00DFBD0100
 
#define A_BCM1480_NC_TIMEOUT_COUNTER   0x00DFBD0120
 
#define A_BCM1480_NC_TIMEOUT_COUNTER_SEL   0x00DFBD0140
 
#define A_BCM1480_NC_CREDIT_STATUS_REG0   0x00DFBD0200
 
#define A_BCM1480_NC_CREDIT_STATUS_REG1   0x00DFBD0220
 
#define A_BCM1480_NC_CREDIT_STATUS_REG2   0x00DFBD0240
 
#define A_BCM1480_NC_CREDIT_STATUS_REG3   0x00DFBD0260
 
#define A_BCM1480_NC_CREDIT_STATUS_REG4   0x00DFBD0280
 
#define A_BCM1480_NC_CREDIT_STATUS_REG5   0x00DFBD02A0
 
#define A_BCM1480_NC_CREDIT_STATUS_REG6   0x00DFBD02C0
 
#define A_BCM1480_NC_CREDIT_STATUS_REG7   0x00DFBD02E0
 
#define A_BCM1480_NC_CREDIT_STATUS_REG8   0x00DFBD0300
 
#define A_BCM1480_NC_CREDIT_STATUS_REG9   0x00DFBD0320
 
#define A_BCM1480_NC_CREDIT_STATUS_REG10   0x00DFBE0000
 
#define A_BCM1480_NC_CREDIT_STATUS_REG11   0x00DFBE0020
 
#define A_BCM1480_NC_CREDIT_STATUS_REG12   0x00DFBE0040
 
#define A_BCM1480_NC_SR_TIMEOUT_COUNTER   0x00DFBE0060
 
#define A_BCM1480_NC_SR_TIMEOUT_COUNTER_SEL   0x00DFBE0080
 
#define A_BCM1480_HR_BASE_0   0x00DF820000
 
#define A_BCM1480_HR_BASE_1   0x00DF8A0000
 
#define A_BCM1480_HR_BASE_2   0x00DF920000
 
#define BCM1480_HR_REGISTER_SPACING   0x80000
 
#define A_BCM1480_HR_BASE(idx)   (A_BCM1480_HR_BASE_0 + ((idx)*BCM1480_HR_REGISTER_SPACING))
 
#define A_BCM1480_HR_REGISTER(idx, reg)   (A_BCM1480_HR_BASE(idx) + (reg))
 
#define R_BCM1480_HR_CFG   0x0000000000
 
#define R_BCM1480_HR_MAPPING   0x0000010010
 
#define BCM1480_HR_RULE_SPACING   0x0000000010
 
#define BCM1480_HR_NUM_RULES   16
 
#define BCM1480_HR_OP_OFFSET   0x0000000100
 
#define BCM1480_HR_TYPE_OFFSET   0x0000000108
 
#define R_BCM1480_HR_RULE_OP(idx)   (BCM1480_HR_OP_OFFSET + ((idx)*BCM1480_HR_RULE_SPACING))
 
#define R_BCM1480_HR_RULE_TYPE(idx)   (BCM1480_HR_TYPE_OFFSET + ((idx)*BCM1480_HR_RULE_SPACING))
 
#define BCM1480_HR_LEAF_SPACING   0x0000000010
 
#define BCM1480_HR_NUM_LEAVES   10
 
#define BCM1480_HR_LEAF_OFFSET   0x0000000300
 
#define R_BCM1480_HR_HA_LEAF0(idx)   (BCM1480_HR_LEAF_OFFSET + ((idx)*BCM1480_HR_LEAF_SPACING))
 
#define R_BCM1480_HR_EX_LEAF0   0x00000003A0
 
#define BCM1480_HR_PATH_SPACING   0x0000000010
 
#define BCM1480_HR_NUM_PATHS   16
 
#define BCM1480_HR_PATH_OFFSET   0x0000000600
 
#define R_BCM1480_HR_PATH(idx)   (BCM1480_HR_PATH_OFFSET + ((idx)*BCM1480_HR_PATH_SPACING))
 
#define R_BCM1480_HR_PATH_DEFAULT   0x0000000700
 
#define BCM1480_HR_ROUTE_SPACING   8
 
#define BCM1480_HR_NUM_ROUTES   512
 
#define BCM1480_HR_ROUTE_OFFSET   0x0000001000
 
#define R_BCM1480_HR_RT_WORD(idx)   (BCM1480_HR_ROUTE_OFFSET + ((idx)*BCM1480_HR_ROUTE_SPACING))
 
#define A_BCM1480_PM_BASE   0x0010056000
 
#define A_BCM1480_PMI_LCL_0   0x0010058000
 
#define A_BCM1480_PMO_LCL_0   0x001005C000
 
#define A_BCM1480_PMI_OFFSET_0   (A_BCM1480_PMI_LCL_0 - A_BCM1480_PM_BASE)
 
#define A_BCM1480_PMO_OFFSET_0   (A_BCM1480_PMO_LCL_0 - A_BCM1480_PM_BASE)
 
#define BCM1480_PM_LCL_REGISTER_SPACING   0x100
 
#define BCM1480_PM_NUM_CHANNELS   32
 
#define A_BCM1480_PMI_LCL_BASE(idx)   (A_BCM1480_PMI_LCL_0 + ((idx)*BCM1480_PM_LCL_REGISTER_SPACING))
 
#define A_BCM1480_PMI_LCL_REGISTER(idx, reg)   (A_BCM1480_PMI_LCL_BASE(idx) + (reg))
 
#define A_BCM1480_PMO_LCL_BASE(idx)   (A_BCM1480_PMO_LCL_0 + ((idx)*BCM1480_PM_LCL_REGISTER_SPACING))
 
#define A_BCM1480_PMO_LCL_REGISTER(idx, reg)   (A_BCM1480_PMO_LCL_BASE(idx) + (reg))
 
#define BCM1480_PM_INT_PACKING   8
 
#define BCM1480_PM_INT_FUNCTION_SPACING   0x40
 
#define BCM1480_PM_INT_NUM_FUNCTIONS   3
 
#define R_BCM1480_PM_BASE_SIZE   0x0000000000
 
#define R_BCM1480_PM_CNT   0x0000000008
 
#define R_BCM1480_PM_PFCNT   0x0000000010
 
#define R_BCM1480_PM_LAST   0x0000000018
 
#define R_BCM1480_PM_PFINDX   0x0000000020
 
#define R_BCM1480_PM_INT_WMK   0x0000000028
 
#define R_BCM1480_PM_CONFIG0   0x0000000030
 
#define R_BCM1480_PM_LOCALDEBUG   0x0000000078
 
#define R_BCM1480_PM_CACHEABILITY   0x0000000080 /* PMI only */
 
#define R_BCM1480_PM_INT_CNFG   0x0000000088
 
#define R_BCM1480_PM_DESC_MERGE_TIMER   0x0000000090
 
#define R_BCM1480_PM_LOCALDEBUG_PIB   0x00000000F8 /* PMI only */
 
#define R_BCM1480_PM_LOCALDEBUG_POB   0x00000000F8 /* PMO only */
 
#define A_BCM1480_PMI_GLB_0   0x0010056000
 
#define A_BCM1480_PMO_GLB_0   0x0010057000
 
#define R_BCM1480_PM_PMO_MAPPING   0x00000008C8 /* PMO only */
 
#define A_BCM1480_PM_PMO_MAPPING   (A_BCM1480_PMO_GLB_0 + R_BCM1480_PM_PMO_MAPPING)
 
#define A_BCM1480_PMI_INT_0   0x0010056800
 
#define A_BCM1480_PMI_INT(q)   (A_BCM1480_PMI_INT_0 + ((q>>8)<<8))
 
#define A_BCM1480_PMI_INT_OFFSET_0   (A_BCM1480_PMI_INT_0 - A_BCM1480_PM_BASE)
 
#define A_BCM1480_PMO_INT_0   0x0010057800
 
#define A_BCM1480_PMO_INT(q)   (A_BCM1480_PMO_INT_0 + ((q>>8)<<8))
 
#define A_BCM1480_PMO_INT_OFFSET_0   (A_BCM1480_PMO_INT_0 - A_BCM1480_PM_BASE)
 
#define R_BCM1480_PM_INT_ST   0x0000000000
 
#define R_BCM1480_PM_INT_MSK   0x0000000040
 
#define R_BCM1480_PM_INT_CLR   0x0000000080
 
#define R_BCM1480_PM_MRGD_INT   0x00000000C0
 
#define A_BCM1480_PM_GLOBALDEBUGMODE_PMI   0x0010056000
 
#define A_BCM1480_PM_GLOBALDEBUG_PID   0x00100567F8
 
#define A_BCM1480_PM_GLOBALDEBUG_PIB   0x0010056FF8
 
#define A_BCM1480_PM_GLOBALDEBUGMODE_PMO   0x0010057000
 
#define A_BCM1480_PM_GLOBALDEBUG_POD   0x00100577F8
 
#define A_BCM1480_PM_GLOBALDEBUG_POB   0x0010057FF8
 
#define A_BCM1480_SWPERF_CFG   0xdfb91800
 
#define A_BCM1480_SWPERF_CNT0   0xdfb91880
 
#define A_BCM1480_SWPERF_CNT1   0xdfb91888
 
#define A_BCM1480_SWPERF_CNT2   0xdfb91890
 
#define A_BCM1480_SWPERF_CNT3   0xdfb91898
 
#define A_BCM1480_SWTRC_MATCH_CONTROL_0   0xDFB91000
 
#define A_BCM1480_SWTRC_MATCH_DATA_VALUE_0   0xDFB91100
 
#define A_BCM1480_SWTRC_MATCH_DATA_MASK_0   0xDFB91108
 
#define A_BCM1480_SWTRC_MATCH_TAG_VALUE_0   0xDFB91200
 
#define A_BCM1480_SWTRC_MATCH_TAG_MAKS_0   0xDFB91208
 
#define A_BCM1480_SWTRC_EVENT_0   0xDFB91300
 
#define A_BCM1480_SWTRC_SEQUENCE_0   0xDFB91400
 
#define A_BCM1480_SWTRC_CFG   0xDFB91500
 
#define A_BCM1480_SWTRC_READ   0xDFB91508
 
#define A_BCM1480_SWDEBUG_SCHEDSTOP   0xDFB92000
 
#define A_BCM1480_SWTRC_MATCH_CONTROL(x)   (A_BCM1480_SWTRC_MATCH_CONTROL_0 + ((x)*8))
 
#define A_BCM1480_SWTRC_EVENT(x)   (A_BCM1480_SWTRC_EVENT_0 + ((x)*8))
 
#define A_BCM1480_SWTRC_SEQUENCE(x)   (A_BCM1480_SWTRC_SEQUENCE_0 + ((x)*8))
 
#define A_BCM1480_SWTRC_MATCH_DATA_VALUE(x)   (A_BCM1480_SWTRC_MATCH_DATA_VALUE_0 + ((x)*16))
 
#define A_BCM1480_SWTRC_MATCH_DATA_MASK(x)   (A_BCM1480_SWTRC_MATCH_DATA_MASK_0 + ((x)*16))
 
#define A_BCM1480_SWTRC_MATCH_TAG_VALUE(x)   (A_BCM1480_SWTRC_MATCH_TAG_VALUE_0 + ((x)*16))
 
#define A_BCM1480_SWTRC_MATCH_TAG_MASK(x)   (A_BCM1480_SWTRC_MATCH_TAG_MASK_0 + ((x)*16))
 
#define A_BCM1480_HSP_BASE_0   0x00DF810000
 
#define A_BCM1480_HSP_BASE_1   0x00DF890000
 
#define A_BCM1480_HSP_BASE_2   0x00DF910000
 
#define BCM1480_HSP_REGISTER_SPACING   0x80000
 
#define A_BCM1480_HSP_BASE(idx)   (A_BCM1480_HSP_BASE_0 + ((idx)*BCM1480_HSP_REGISTER_SPACING))
 
#define A_BCM1480_HSP_REGISTER(idx, reg)   (A_BCM1480_HSP_BASE(idx) + (reg))
 
#define R_BCM1480_HSP_RX_SPI4_CFG_0   0x0000000000
 
#define R_BCM1480_HSP_RX_SPI4_CFG_1   0x0000000008
 
#define R_BCM1480_HSP_RX_SPI4_DESKEW_OVERRIDE   0x0000000010
 
#define R_BCM1480_HSP_RX_SPI4_DESKEW_DATAPATH   0x0000000018
 
#define R_BCM1480_HSP_RX_SPI4_PORT_INT_EN   0x0000000020
 
#define R_BCM1480_HSP_RX_SPI4_PORT_INT_STATUS   0x0000000028
 
#define R_BCM1480_HSP_RX_SPI4_CALENDAR_0   0x0000000200
 
#define R_BCM1480_HSP_RX_SPI4_CALENDAR_1   0x0000000208
 
#define R_BCM1480_HSP_RX_PLL_CNFG   0x0000000800
 
#define R_BCM1480_HSP_RX_CALIBRATION   0x0000000808
 
#define R_BCM1480_HSP_RX_TEST   0x0000000810
 
#define R_BCM1480_HSP_RX_DIAG_DETAILS   0x0000000818
 
#define R_BCM1480_HSP_RX_DIAG_CRC_0   0x0000000820
 
#define R_BCM1480_HSP_RX_DIAG_CRC_1   0x0000000828
 
#define R_BCM1480_HSP_RX_DIAG_HTCMD   0x0000000830
 
#define R_BCM1480_HSP_RX_DIAG_PKTCTL   0x0000000838
 
#define R_BCM1480_HSP_RX_VIS_FLCTRL_COUNTER   0x0000000870
 
#define R_BCM1480_HSP_RX_PKT_RAMALLOC_0   0x0000020020
 
#define R_BCM1480_HSP_RX_PKT_RAMALLOC_1   0x0000020028
 
#define R_BCM1480_HSP_RX_PKT_RAMALLOC_2   0x0000020030
 
#define R_BCM1480_HSP_RX_PKT_RAMALLOC_3   0x0000020038
 
#define R_BCM1480_HSP_RX_PKT_RAMALLOC_4   0x0000020040
 
#define R_BCM1480_HSP_RX_PKT_RAMALLOC_5   0x0000020048
 
#define R_BCM1480_HSP_RX_PKT_RAMALLOC_6   0x0000020050
 
#define R_BCM1480_HSP_RX_PKT_RAMALLOC_7   0x0000020058
 
#define R_BCM1480_HSP_RX_PKT_RAMALLOC(idx)   (R_BCM1480_HSP_RX_PKT_RAMALLOC_0 + 8*(idx))
 
#define R_BCM1480_HSP_RX_HT_RAMALLOC_0   0x0000020078
 
#define R_BCM1480_HSP_RX_HT_RAMALLOC_1   0x0000020080
 
#define R_BCM1480_HSP_RX_HT_RAMALLOC_2   0x0000020088
 
#define R_BCM1480_HSP_RX_HT_RAMALLOC_3   0x0000020090
 
#define R_BCM1480_HSP_RX_HT_RAMALLOC_4   0x0000020098
 
#define R_BCM1480_HSP_RX_HT_RAMALLOC_5   0x00000200A0
 
#define R_BCM1480_HSP_RX_SPI_WATERMARK_0   0x00000200B0
 
#define R_BCM1480_HSP_RX_SPI_WATERMARK_1   0x00000200B8
 
#define R_BCM1480_HSP_RX_SPI_WATERMARK_2   0x00000200C0
 
#define R_BCM1480_HSP_RX_SPI_WATERMARK_3   0x00000200C8
 
#define R_BCM1480_HSP_RX_SPI_WATERMARK_4   0x00000200D0
 
#define R_BCM1480_HSP_RX_SPI_WATERMARK_5   0x00000200D8
 
#define R_BCM1480_HSP_RX_SPI_WATERMARK_6   0x00000200E0
 
#define R_BCM1480_HSP_RX_SPI_WATERMARK_7   0x00000200E8
 
#define R_BCM1480_HSP_RX_SPI_WATERMARK(idx)   (R_BCM1480_HSP_RX_SPI_WATERMARK_0 + 8*(idx))
 
#define R_BCM1480_HSP_RX_VIS_CMDQ_0   0x00000200F0
 
#define R_BCM1480_HSP_RX_VIS_CMDQ_1   0x00000200F8
 
#define R_BCM1480_HSP_RX_VIS_CMDQ_2   0x0000020100
 
#define R_BCM1480_HSP_RX_RAM_READCTL   0x0000020108
 
#define R_BCM1480_HSP_RX_RAM_READWINDOW   0x0000020110
 
#define R_BCM1480_HSP_RX_RF_READCTL   0x0000020118
 
#define R_BCM1480_HSP_RX_RF_READWINDOW   0x0000020120
 
#define R_BCM1480_HSP_TX_SPI4_CFG_0   0x0000040000
 
#define R_BCM1480_HSP_TX_SPI4_CFG_1   0x0000040008
 
#define R_BCM1480_HSP_TX_SPI4_TRAINING_FMT   0x0000040010
 
#define R_BCM1480_HSP_TX_PKT_RAMALLOC_0   0x0000040020
 
#define R_BCM1480_HSP_TX_PKT_RAMALLOC_1   0x0000040028
 
#define R_BCM1480_HSP_TX_PKT_RAMALLOC_2   0x0000040030
 
#define R_BCM1480_HSP_TX_PKT_RAMALLOC_3   0x0000040038
 
#define R_BCM1480_HSP_TX_PKT_RAMALLOC_4   0x0000040040
 
#define R_BCM1480_HSP_TX_PKT_RAMALLOC_5   0x0000040048
 
#define R_BCM1480_HSP_TX_PKT_RAMALLOC_6   0x0000040050
 
#define R_BCM1480_HSP_TX_PKT_RAMALLOC_7   0x0000040058
 
#define R_BCM1480_HSP_TX_PKT_RAMALLOC(idx)   (R_BCM1480_HSP_TX_PKT_RAMALLOC_0 + 8*(idx))
 
#define R_BCM1480_HSP_TX_NPC_RAMALLOC   0x0000040078
 
#define R_BCM1480_HSP_TX_RSP_RAMALLOC   0x0000040080
 
#define R_BCM1480_HSP_TX_PC_RAMALLOC   0x0000040088
 
#define R_BCM1480_HSP_TX_HTCC_RAMALLOC_0   0x0000040090
 
#define R_BCM1480_HSP_TX_HTCC_RAMALLOC_1   0x0000040098
 
#define R_BCM1480_HSP_TX_HTCC_RAMALLOC_2   0x00000400A0
 
#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_0   0x00000400B0
 
#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_1   0x00000400B8
 
#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_2   0x00000400C0
 
#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_3   0x00000400C8
 
#define R_BCM1480_HSP_TX_PKT_RXPHITCNT(idx)   (R_BCM1480_HSP_TX_PKT_RXPHITCNT_0 + 8*(idx))
 
#define R_BCM1480_HSP_TX_HTIO_RXPHITCNT   0x00000400D0
 
#define R_BCM1480_HSP_TX_HTCC_RXPHITCNT   0x00000400D8
 
#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_0   0x00000400E0
 
#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_1   0x00000400E8
 
#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_2   0x00000400F0
 
#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_3   0x00000400F8
 
#define R_BCM1480_HSP_TX_PKT_TXPHITCNT(idx)   (R_BCM1480_HSP_TX_PKT_TXPHITCNT_0 + 8*(idx))
 
#define R_BCM1480_HSP_TX_HTIO_TXPHITCNT   0x0000040100
 
#define R_BCM1480_HSP_TX_HTCC_TXPHITCNT   0x0000040108
 
#define R_BCM1480_HSP_TX_SPI4_CALENDAR_0   0x0000040200
 
#define R_BCM1480_HSP_TX_SPI4_CALENDAR_1   0x0000040208
 
#define R_BCM1480_HSP_TX_PLL_CNFG   0x0000040800
 
#define R_BCM1480_HSP_TX_CALIBRATION   0x0000040808
 
#define R_BCM1480_HSP_TX_TEST   0x0000040810
 
#define R_BCM1480_HSP_TX_VIS_CMDQ_0   0x0000040840
 
#define R_BCM1480_HSP_TX_VIS_CMDQ_1   0x0000040848
 
#define R_BCM1480_HSP_TX_VIS_CMDQ_2   0x0000040850
 
#define R_BCM1480_HSP_TX_RAM_READCTL   0x0000040860
 
#define R_BCM1480_HSP_TX_RAM_READWINDOW   0x0000040868
 
#define R_BCM1480_HSP_TX_RF_READCTL   0x0000040870
 
#define R_BCM1480_HSP_TX_RF_READWINDOW   0x0000040878
 
#define R_BCM1480_HSP_TX_SPI4_PORT_INT_STATUS   0x0000040880
 
#define R_BCM1480_HSP_TX_SPI4_PORT_INT_EN   0x0000040888
 
#define R_BCM1480_HSP_TX_NEXT_ADDR_BASE   0x000040400
 
#define R_BCM1480_HSP_TX_NEXT_ADDR_REGISTER(x)   (R_BCM1480_HSP_TX_NEXT_ADDR_BASE+ 8*(x))
 
#define A_BCM1480_PHYS_MEMORY_0   _SB_MAKE64(0x0000000000)
 
#define A_BCM1480_PHYS_MEMORY_SIZE   _SB_MAKE64((256*1024*1024))
 
#define A_BCM1480_PHYS_SYSTEM_CTL   _SB_MAKE64(0x0010000000)
 
#define A_BCM1480_PHYS_IO_SYSTEM   _SB_MAKE64(0x0010060000)
 
#define A_BCM1480_PHYS_GENBUS   _SB_MAKE64(0x0010090000)
 
#define A_BCM1480_PHYS_GENBUS_END   _SB_MAKE64(0x0028000000)
 
#define A_BCM1480_PHYS_PCI_MISC_MATCH_BYTES   _SB_MAKE64(0x0028000000)
 
#define A_BCM1480_PHYS_PCI_IACK_MATCH_BYTES   _SB_MAKE64(0x0029000000)
 
#define A_BCM1480_PHYS_PCI_IO_MATCH_BYTES   _SB_MAKE64(0x002C000000)
 
#define A_BCM1480_PHYS_PCI_CFG_MATCH_BYTES   _SB_MAKE64(0x002E000000)
 
#define A_BCM1480_PHYS_PCI_OMAP_MATCH_BYTES   _SB_MAKE64(0x002F000000)
 
#define A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES   _SB_MAKE64(0x0030000000)
 
#define A_BCM1480_PHYS_HT_MEM_MATCH_BYTES   _SB_MAKE64(0x0040000000)
 
#define A_BCM1480_PHYS_HT_MEM_MATCH_BITS   _SB_MAKE64(0x0060000000)
 
#define A_BCM1480_PHYS_MEMORY_1   _SB_MAKE64(0x0080000000)
 
#define A_BCM1480_PHYS_MEMORY_2   _SB_MAKE64(0x0090000000)
 
#define A_BCM1480_PHYS_PCI_MISC_MATCH_BITS   _SB_MAKE64(0x00A8000000)
 
#define A_BCM1480_PHYS_PCI_IACK_MATCH_BITS   _SB_MAKE64(0x00A9000000)
 
#define A_BCM1480_PHYS_PCI_IO_MATCH_BITS   _SB_MAKE64(0x00AC000000)
 
#define A_BCM1480_PHYS_PCI_CFG_MATCH_BITS   _SB_MAKE64(0x00AE000000)
 
#define A_BCM1480_PHYS_PCI_OMAP_MATCH_BITS   _SB_MAKE64(0x00AF000000)
 
#define A_BCM1480_PHYS_PCI_MEM_MATCH_BITS   _SB_MAKE64(0x00B0000000)
 
#define A_BCM1480_PHYS_MEMORY_3   _SB_MAKE64(0x00C0000000)
 
#define A_BCM1480_PHYS_L2_CACHE_TEST   _SB_MAKE64(0x00D0000000)
 
#define A_BCM1480_PHYS_HT_SPECIAL_MATCH_BYTES   _SB_MAKE64(0x00D8000000)
 
#define A_BCM1480_PHYS_HT_IO_MATCH_BYTES   _SB_MAKE64(0x00DC000000)
 
#define A_BCM1480_PHYS_HT_CFG_MATCH_BYTES   _SB_MAKE64(0x00DE000000)
 
#define A_BCM1480_PHYS_HS_SUBSYS   _SB_MAKE64(0x00DF000000)
 
#define A_BCM1480_PHYS_HT_SPECIAL_MATCH_BITS   _SB_MAKE64(0x00F8000000)
 
#define A_BCM1480_PHYS_HT_IO_MATCH_BITS   _SB_MAKE64(0x00FC000000)
 
#define A_BCM1480_PHYS_HT_CFG_MATCH_BITS   _SB_MAKE64(0x00FE000000)
 
#define A_BCM1480_PHYS_MEMORY_EXP   _SB_MAKE64(0x0100000000)
 
#define A_BCM1480_PHYS_MEMORY_EXP_SIZE   _SB_MAKE64((508*1024*1024*1024))
 
#define A_BCM1480_PHYS_PCI_UPPER   _SB_MAKE64(0x1000000000)
 
#define A_BCM1480_PHYS_HT_UPPER_MATCH_BYTES   _SB_MAKE64(0x2000000000)
 
#define A_BCM1480_PHYS_HT_UPPER_MATCH_BITS   _SB_MAKE64(0x3000000000)
 
#define A_BCM1480_PHYS_HT_NODE_ALIAS   _SB_MAKE64(0x4000000000)
 
#define A_BCM1480_PHYS_HT_FULLACCESS   _SB_MAKE64(0xF000000000)
 
#define A_BCM1480_PHYS_L2CACHE_WAY_SIZE   _SB_MAKE64(0x0000020000)
 
#define BCM1480_PHYS_L2CACHE_NUM_WAYS   8
 
#define A_BCM1480_PHYS_L2CACHE_TOTAL_SIZE   _SB_MAKE64(0x0000100000)
 
#define A_BCM1480_PHYS_L2CACHE_WAY0   _SB_MAKE64(0x00D0300000)
 
#define A_BCM1480_PHYS_L2CACHE_WAY1   _SB_MAKE64(0x00D0320000)
 
#define A_BCM1480_PHYS_L2CACHE_WAY2   _SB_MAKE64(0x00D0340000)
 
#define A_BCM1480_PHYS_L2CACHE_WAY3   _SB_MAKE64(0x00D0360000)
 
#define A_BCM1480_PHYS_L2CACHE_WAY4   _SB_MAKE64(0x00D0380000)
 
#define A_BCM1480_PHYS_L2CACHE_WAY5   _SB_MAKE64(0x00D03A0000)
 
#define A_BCM1480_PHYS_L2CACHE_WAY6   _SB_MAKE64(0x00D03C0000)
 
#define A_BCM1480_PHYS_L2CACHE_WAY7   _SB_MAKE64(0x00D03E0000)
 

Macro Definition Documentation

#define A_BCM1480_BUS_ERR_STATUS_DEBUG   0x00100208D8

Definition at line 471 of file bcm1480_regs.h.

#define A_BCM1480_DUART (   chan)    ((((chan)&2) == 0)? A_BCM1480_DUART0 : A_BCM1480_DUART1)

Definition at line 220 of file bcm1480_regs.h.

#define A_BCM1480_DUART0   0x0010060000

Definition at line 218 of file bcm1480_regs.h.

#define A_BCM1480_DUART1   0x0010060400

Definition at line 219 of file bcm1480_regs.h.

#define A_BCM1480_DUART_AUX_CTRL_C   0x0010060490

Definition at line 261 of file bcm1480_regs.h.

#define A_BCM1480_DUART_AUX_CTRL_CD   0x0010060610

Definition at line 275 of file bcm1480_regs.h.

#define A_BCM1480_DUART_AUX_CTRL_D   0x0010060590

Definition at line 272 of file bcm1480_regs.h.

#define A_BCM1480_DUART_CHANREG (   chan,
  reg 
)
Value:
(A_BCM1480_DUART(chan) + \
BCM1480_DUART_CHANREG_SPACING * (((chan) & 1) + 1) + (reg))

Definition at line 223 of file bcm1480_regs.h.

#define A_BCM1480_DUART_CLEAR_OPR_CD   0x00100606C0

Definition at line 286 of file bcm1480_regs.h.

#define A_BCM1480_DUART_CLK_SEL_C   0x0010060430

Definition at line 255 of file bcm1480_regs.h.

#define A_BCM1480_DUART_CLK_SEL_D   0x0010060530

Definition at line 266 of file bcm1480_regs.h.

#define A_BCM1480_DUART_CMD_C   0x0010060450

Definition at line 257 of file bcm1480_regs.h.

#define A_BCM1480_DUART_CMD_D   0x0010060550

Definition at line 268 of file bcm1480_regs.h.

#define A_BCM1480_DUART_CTRLREG (   chan,
  reg 
)
Value:
(A_BCM1480_DUART(chan) + \
BCM1480_DUART_CHANREG_SPACING * 3 + (reg))

Definition at line 226 of file bcm1480_regs.h.

#define A_BCM1480_DUART_FULL_CTL_C   0x0010060440

Definition at line 256 of file bcm1480_regs.h.

#define A_BCM1480_DUART_FULL_CTL_D   0x0010060540

Definition at line 267 of file bcm1480_regs.h.

#define A_BCM1480_DUART_IMR_C   0x0010060630

Definition at line 277 of file bcm1480_regs.h.

#define A_BCM1480_DUART_IMR_CD   0x00100606A0

Definition at line 284 of file bcm1480_regs.h.

#define A_BCM1480_DUART_IMR_D   0x0010060650

Definition at line 279 of file bcm1480_regs.h.

#define A_BCM1480_DUART_IMRREG (   chan)    (A_BCM1480_DUART_CTRLREG((chan), R_BCM1480_DUART_IMRREG(chan)))

Definition at line 240 of file bcm1480_regs.h.

#define A_BCM1480_DUART_IN_PORT (   chan)    (A_BCM1480_DUART_CTRLREG((chan), R_DUART_IN_PORT))

Definition at line 245 of file bcm1480_regs.h.

#define A_BCM1480_DUART_IN_PORT_CD   0x0010060680

Definition at line 282 of file bcm1480_regs.h.

#define A_BCM1480_DUART_INPORT_CHNG_C   0x00100606D0

Definition at line 287 of file bcm1480_regs.h.

#define A_BCM1480_DUART_INPORT_CHNG_CD   0x0010060600

Definition at line 274 of file bcm1480_regs.h.

#define A_BCM1480_DUART_INPORT_CHNG_D   0x00100606E0

Definition at line 288 of file bcm1480_regs.h.

#define A_BCM1480_DUART_ISR_C   0x0010060620

Definition at line 276 of file bcm1480_regs.h.

#define A_BCM1480_DUART_ISR_CD   0x0010060690

Definition at line 283 of file bcm1480_regs.h.

#define A_BCM1480_DUART_ISR_D   0x0010060640

Definition at line 278 of file bcm1480_regs.h.

#define A_BCM1480_DUART_ISRREG (   chan)    (A_BCM1480_DUART_CTRLREG((chan), R_BCM1480_DUART_ISRREG(chan)))

Definition at line 242 of file bcm1480_regs.h.

#define A_BCM1480_DUART_MODE_REG_1_C   0x0010060400

Definition at line 252 of file bcm1480_regs.h.

#define A_BCM1480_DUART_MODE_REG_1_D   0x0010060500

Definition at line 263 of file bcm1480_regs.h.

#define A_BCM1480_DUART_MODE_REG_2_C   0x0010060410

Definition at line 253 of file bcm1480_regs.h.

#define A_BCM1480_DUART_MODE_REG_2_D   0x0010060510

Definition at line 264 of file bcm1480_regs.h.

#define A_BCM1480_DUART_OPCR_C   0x0010060480

Definition at line 260 of file bcm1480_regs.h.

#define A_BCM1480_DUART_OPCR_CD   0x0010060670

Definition at line 281 of file bcm1480_regs.h.

#define A_BCM1480_DUART_OPCR_D   0x0010060580

Definition at line 271 of file bcm1480_regs.h.

#define A_BCM1480_DUART_OUT_PORT_CD   0x0010060660

Definition at line 280 of file bcm1480_regs.h.

#define A_BCM1480_DUART_RX_HOLD_C   0x0010060460

Definition at line 258 of file bcm1480_regs.h.

#define A_BCM1480_DUART_RX_HOLD_D   0x0010060560

Definition at line 269 of file bcm1480_regs.h.

#define A_BCM1480_DUART_SET_OPR_CD   0x00100606B0

Definition at line 285 of file bcm1480_regs.h.

#define A_BCM1480_DUART_STATUS_C   0x0010060420

Definition at line 254 of file bcm1480_regs.h.

#define A_BCM1480_DUART_STATUS_D   0x0010060520

Definition at line 265 of file bcm1480_regs.h.

#define A_BCM1480_DUART_TX_HOLD_C   0x0010060470

Definition at line 259 of file bcm1480_regs.h.

#define A_BCM1480_DUART_TX_HOLD_D   0x0010060570

Definition at line 270 of file bcm1480_regs.h.

#define A_BCM1480_GPIO_INT_ADD_TYPE   0x0010061A78

Definition at line 304 of file bcm1480_regs.h.

#define A_BCM1480_HR_BASE (   idx)    (A_BCM1480_HR_BASE_0 + ((idx)*BCM1480_HR_REGISTER_SPACING))

Definition at line 552 of file bcm1480_regs.h.

#define A_BCM1480_HR_BASE_0   0x00DF820000

Definition at line 547 of file bcm1480_regs.h.

#define A_BCM1480_HR_BASE_1   0x00DF8A0000

Definition at line 548 of file bcm1480_regs.h.

#define A_BCM1480_HR_BASE_2   0x00DF920000

Definition at line 549 of file bcm1480_regs.h.

#define A_BCM1480_HR_REGISTER (   idx,
  reg 
)    (A_BCM1480_HR_BASE(idx) + (reg))

Definition at line 553 of file bcm1480_regs.h.

#define A_BCM1480_HSP_BASE (   idx)    (A_BCM1480_HSP_BASE_0 + ((idx)*BCM1480_HSP_REGISTER_SPACING))

Definition at line 723 of file bcm1480_regs.h.

#define A_BCM1480_HSP_BASE_0   0x00DF810000

Definition at line 718 of file bcm1480_regs.h.

#define A_BCM1480_HSP_BASE_1   0x00DF890000

Definition at line 719 of file bcm1480_regs.h.

#define A_BCM1480_HSP_BASE_2   0x00DF910000

Definition at line 720 of file bcm1480_regs.h.

#define A_BCM1480_HSP_REGISTER (   idx,
  reg 
)    (A_BCM1480_HSP_BASE(idx) + (reg))

Definition at line 724 of file bcm1480_regs.h.

#define A_BCM1480_HT_PORT0_HEADER   0x00FE000000

Definition at line 500 of file bcm1480_regs.h.

#define A_BCM1480_HT_PORT1_HEADER   0x00FE000800

Definition at line 501 of file bcm1480_regs.h.

#define A_BCM1480_HT_PORT2_HEADER   0x00FE001000

Definition at line 502 of file bcm1480_regs.h.

#define A_BCM1480_HT_PORT_HEADER (   x)    (A_BCM1480_HT_PORT0_HEADER + ((x)*BCM1480_HT_PORT_SPACING))

Definition at line 498 of file bcm1480_regs.h.

#define A_BCM1480_HT_TYPE00_HEADER   0x00FE002000

Definition at line 503 of file bcm1480_regs.h.

#define A_BCM1480_IMR_ALIAS_MAILBOX (   cpu)
Value:
(A_BCM1480_IMR_ALIAS_MAILBOX_CPU0_BASE + \
(cpu)*BCM1480_IMR_ALIAS_MAILBOX_SPACING)

Definition at line 414 of file bcm1480_regs.h.

#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU0_BASE   0x0010028000

Definition at line 408 of file bcm1480_regs.h.

#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU1_BASE   0x0010028100

Definition at line 409 of file bcm1480_regs.h.

#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU2_BASE   0x0010028200

Definition at line 410 of file bcm1480_regs.h.

#define A_BCM1480_IMR_ALIAS_MAILBOX_CPU3_BASE   0x0010028300

Definition at line 411 of file bcm1480_regs.h.

#define A_BCM1480_IMR_ALIAS_MAILBOX_REGISTER (   cpu,
  reg 
)    (A_BCM1480_IMR_ALIAS_MAILBOX(cpu)+(reg))

Definition at line 416 of file bcm1480_regs.h.

#define A_BCM1480_IMR_CPU0_BASE   0x0010020000

Definition at line 367 of file bcm1480_regs.h.

#define A_BCM1480_IMR_CPU1_BASE   0x0010022000

Definition at line 368 of file bcm1480_regs.h.

#define A_BCM1480_IMR_CPU2_BASE   0x0010024000

Definition at line 369 of file bcm1480_regs.h.

#define A_BCM1480_IMR_CPU3_BASE   0x0010026000

Definition at line 370 of file bcm1480_regs.h.

#define A_BCM1480_IMR_MAPPER (   cpu)    (A_BCM1480_IMR_CPU0_BASE+(cpu)*BCM1480_IMR_REGISTER_SPACING)

Definition at line 374 of file bcm1480_regs.h.

#define A_BCM1480_IMR_REGISTER (   cpu,
  reg 
)    (A_BCM1480_IMR_MAPPER(cpu)+(reg))

Definition at line 375 of file bcm1480_regs.h.

#define A_BCM1480_IO_PCMCIA_CFG_B   0x0010061A58

Definition at line 295 of file bcm1480_regs.h.

#define A_BCM1480_IO_PCMCIA_STATUS_B   0x0010061A68

Definition at line 296 of file bcm1480_regs.h.

#define A_BCM1480_L2_BANK_ADDRESS (   b)    (A_BCM1480_L2_BANK_BASE | (((b)&0x7)<<17))

Definition at line 167 of file bcm1480_regs.h.

#define A_BCM1480_L2_BANK_BASE   0x00D0300000

Definition at line 166 of file bcm1480_regs.h.

#define A_BCM1480_L2_BASE   0x0010040000

Definition at line 143 of file bcm1480_regs.h.

#define A_BCM1480_L2_CACHE_DISABLE   0x0010040060 /* x060 */

Definition at line 151 of file bcm1480_regs.h.

#define A_BCM1480_L2_ECC_TAG   0x0010040038

Definition at line 146 of file bcm1480_regs.h.

#define A_BCM1480_L2_MAKE_WAY_DISABLE_HI (   x)    (A_BCM1480_L2_WAY_ENABLE_7_4 | (((~x)&0xF) << 12))

Definition at line 158 of file bcm1480_regs.h.

#define A_BCM1480_L2_MAKE_WAY_DISABLE_LO (   x)    (A_BCM1480_L2_WAY_ENABLE_3_0 | (((~x)&0xF) << 12))

Definition at line 157 of file bcm1480_regs.h.

#define A_BCM1480_L2_MAKE_WAY_ENABLE_HI (   x)    (A_BCM1480_L2_WAY_ENABLE_7_4 | (((x)&0xF) << 12))

Definition at line 156 of file bcm1480_regs.h.

#define A_BCM1480_L2_MAKE_WAY_ENABLE_LO (   x)    (A_BCM1480_L2_WAY_ENABLE_3_0 | (((x)&0xF) << 12))

Definition at line 155 of file bcm1480_regs.h.

#define A_BCM1480_L2_MAKECACHEDISABLE (   x)    (A_BCM1480_L2_CACHE_DISABLE | (((x)&0xF) << 12))

Definition at line 152 of file bcm1480_regs.h.

#define A_BCM1480_L2_MGMT_TAG_BASE   0x00D0000000

Definition at line 168 of file bcm1480_regs.h.

#define A_BCM1480_L2_MISC0_VALUE   0x0010040058

Definition at line 147 of file bcm1480_regs.h.

#define A_BCM1480_L2_MISC1_VALUE   0x0010040078

Definition at line 148 of file bcm1480_regs.h.

#define A_BCM1480_L2_MISC2_VALUE   0x0010040098

Definition at line 149 of file bcm1480_regs.h.

#define A_BCM1480_L2_MISC_CONFIG   0x0010040040 /* x040 */

Definition at line 150 of file bcm1480_regs.h.

#define A_BCM1480_L2_READ_TAG   0x0010040018

Definition at line 145 of file bcm1480_regs.h.

#define A_BCM1480_L2_WAY_AGENT_3_0   0x00100400C0 /* xxC0 */

Definition at line 163 of file bcm1480_regs.h.

#define A_BCM1480_L2_WAY_AGENT_7_4   0x00100400E0 /* xxE0 */

Definition at line 164 of file bcm1480_regs.h.

#define A_BCM1480_L2_WAY_ENABLE (   A,
  banks 
)    (A | (((~(banks))&0x0F) << 8))

Definition at line 165 of file bcm1480_regs.h.

#define A_BCM1480_L2_WAY_ENABLE_3_0   0x0010040080 /* x080 */

Definition at line 153 of file bcm1480_regs.h.

#define A_BCM1480_L2_WAY_ENABLE_7_4   0x00100400A0 /* x0A0 */

Definition at line 154 of file bcm1480_regs.h.

#define A_BCM1480_L2_WAY_LOCAL_3_0   0x0010040100 /* x100 */

Definition at line 159 of file bcm1480_regs.h.

#define A_BCM1480_L2_WAY_LOCAL_7_4   0x0010040120 /* x120 */

Definition at line 160 of file bcm1480_regs.h.

#define A_BCM1480_L2_WAY_REMOTE_3_0   0x0010040140 /* x140 */

Definition at line 161 of file bcm1480_regs.h.

#define A_BCM1480_L2_WAY_REMOTE_7_4   0x0010040160 /* x160 */

Definition at line 162 of file bcm1480_regs.h.

#define A_BCM1480_MAC_BASE_2   0x0010066000

Definition at line 188 of file bcm1480_regs.h.

#define A_BCM1480_MAC_BASE_3   0x0010067000

Definition at line 194 of file bcm1480_regs.h.

#define A_BCM1480_MAILBOX_REGISTER (   num,
  reg,
  cpu 
)
Value:
(A_BCM1480_IMR_CPU0_BASE + \
(num * R_BCM1480_IMR_MAILBOX_NUM_SPACING) + \
(cpu * BCM1480_IMR_REGISTER_SPACING) + \
(R_BCM1480_IMR_MAILBOX_0_CPU + reg))

Definition at line 430 of file bcm1480_regs.h.

#define A_BCM1480_MC_BASE (   ctlid)    (A_BCM1480_MC_BASE_0+(ctlid)*BCM1480_MC_REGISTER_SPACING)

Definition at line 89 of file bcm1480_regs.h.

#define A_BCM1480_MC_BASE_0   0x0010050000

Definition at line 83 of file bcm1480_regs.h.

#define A_BCM1480_MC_BASE_1   0x0010051000

Definition at line 84 of file bcm1480_regs.h.

#define A_BCM1480_MC_BASE_2   0x0010052000

Definition at line 85 of file bcm1480_regs.h.

#define A_BCM1480_MC_BASE_3   0x0010053000

Definition at line 86 of file bcm1480_regs.h.

#define A_BCM1480_MC_GLB_CONFIG   0x0010054100

Definition at line 132 of file bcm1480_regs.h.

#define A_BCM1480_MC_GLB_ECC_ADDR   0x0010054160

Definition at line 135 of file bcm1480_regs.h.

#define A_BCM1480_MC_GLB_ECC_CORRECT   0x0010054180

Definition at line 136 of file bcm1480_regs.h.

#define A_BCM1480_MC_GLB_ECC_STATUS   0x0010054140

Definition at line 134 of file bcm1480_regs.h.

#define A_BCM1480_MC_GLB_INTLV   0x0010054120

Definition at line 133 of file bcm1480_regs.h.

#define A_BCM1480_MC_GLB_PERF_CNT_CONTROL   0x00100541A0

Definition at line 137 of file bcm1480_regs.h.

#define A_BCM1480_MC_REGISTER (   ctlid,
  reg 
)    (A_BCM1480_MC_BASE(ctlid)+(reg))

Definition at line 90 of file bcm1480_regs.h.

#define A_BCM1480_NC_BASE   0x00DFBD0000

Definition at line 510 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG0   0x00DFBD0200

Definition at line 525 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG1   0x00DFBD0220

Definition at line 526 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG10   0x00DFBE0000

Definition at line 535 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG11   0x00DFBE0020

Definition at line 536 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG12   0x00DFBE0040

Definition at line 537 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG2   0x00DFBD0240

Definition at line 527 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG3   0x00DFBD0260

Definition at line 528 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG4   0x00DFBD0280

Definition at line 529 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG5   0x00DFBD02A0

Definition at line 530 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG6   0x00DFBD02C0

Definition at line 531 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG7   0x00DFBD02E0

Definition at line 532 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG8   0x00DFBD0300

Definition at line 533 of file bcm1480_regs.h.

#define A_BCM1480_NC_CREDIT_STATUS_REG9   0x00DFBD0320

Definition at line 534 of file bcm1480_regs.h.

#define A_BCM1480_NC_INTERRUPT_ENABLE   0x00DFBD0100

Definition at line 521 of file bcm1480_regs.h.

#define A_BCM1480_NC_INTERRUPT_STATUS   0x00DFBD00E0

Definition at line 520 of file bcm1480_regs.h.

#define A_BCM1480_NC_RLD_BAD_ERROR   0x00DFBD0040

Definition at line 514 of file bcm1480_regs.h.

#define A_BCM1480_NC_RLD_COR_ERROR   0x00DFBD0060

Definition at line 515 of file bcm1480_regs.h.

#define A_BCM1480_NC_RLD_ECC_STATUS   0x00DFBD0080

Definition at line 516 of file bcm1480_regs.h.

#define A_BCM1480_NC_RLD_FIELD   0x00DFBD0000

Definition at line 512 of file bcm1480_regs.h.

#define A_BCM1480_NC_RLD_RANDOM_LFSR   0x00DFBD00C0

Definition at line 518 of file bcm1480_regs.h.

#define A_BCM1480_NC_RLD_TRIGGER   0x00DFBD0020

Definition at line 513 of file bcm1480_regs.h.

#define A_BCM1480_NC_RLD_WAY_ENABLE   0x00DFBD00A0

Definition at line 517 of file bcm1480_regs.h.

#define A_BCM1480_NC_SR_TIMEOUT_COUNTER   0x00DFBE0060

Definition at line 539 of file bcm1480_regs.h.

#define A_BCM1480_NC_SR_TIMEOUT_COUNTER_SEL   0x00DFBE0080

Definition at line 540 of file bcm1480_regs.h.

#define A_BCM1480_NC_TIMEOUT_COUNTER   0x00DFBD0120

Definition at line 522 of file bcm1480_regs.h.

#define A_BCM1480_NC_TIMEOUT_COUNTER_SEL   0x00DFBD0140

Definition at line 523 of file bcm1480_regs.h.

#define A_BCM1480_PCI_BASE   0x0010061400

Definition at line 175 of file bcm1480_regs.h.

#define A_BCM1480_PCI_DLL   0x0010061500

Definition at line 178 of file bcm1480_regs.h.

#define A_BCM1480_PCI_RESET   0x0010061400

Definition at line 177 of file bcm1480_regs.h.

#define A_BCM1480_PCI_TYPE00_HEADER   0x002E000000

Definition at line 180 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_GENBUS   _SB_MAKE64(0x0010090000)

Definition at line 850 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_GENBUS_END   _SB_MAKE64(0x0028000000)

Definition at line 851 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HS_SUBSYS   _SB_MAKE64(0x00DF000000)

Definition at line 873 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HT_CFG_MATCH_BITS   _SB_MAKE64(0x00FE000000)

Definition at line 876 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HT_CFG_MATCH_BYTES   _SB_MAKE64(0x00DE000000)

Definition at line 872 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HT_FULLACCESS   _SB_MAKE64(0xF000000000)

Definition at line 883 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HT_IO_MATCH_BITS   _SB_MAKE64(0x00FC000000)

Definition at line 875 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HT_IO_MATCH_BYTES   _SB_MAKE64(0x00DC000000)

Definition at line 871 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HT_MEM_MATCH_BITS   _SB_MAKE64(0x0060000000)

Definition at line 859 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HT_MEM_MATCH_BYTES   _SB_MAKE64(0x0040000000)

Definition at line 858 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HT_NODE_ALIAS   _SB_MAKE64(0x4000000000)

Definition at line 882 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HT_SPECIAL_MATCH_BITS   _SB_MAKE64(0x00F8000000)

Definition at line 874 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HT_SPECIAL_MATCH_BYTES   _SB_MAKE64(0x00D8000000)

Definition at line 870 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HT_UPPER_MATCH_BITS   _SB_MAKE64(0x3000000000)

Definition at line 881 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_HT_UPPER_MATCH_BYTES   _SB_MAKE64(0x2000000000)

Definition at line 880 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_IO_SYSTEM   _SB_MAKE64(0x0010060000)

Definition at line 849 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_L2_CACHE_TEST   _SB_MAKE64(0x00D0000000)

Definition at line 869 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_L2CACHE_TOTAL_SIZE   _SB_MAKE64(0x0000100000)

Definition at line 892 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_L2CACHE_WAY0   _SB_MAKE64(0x00D0300000)

Definition at line 893 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_L2CACHE_WAY1   _SB_MAKE64(0x00D0320000)

Definition at line 894 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_L2CACHE_WAY2   _SB_MAKE64(0x00D0340000)

Definition at line 895 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_L2CACHE_WAY3   _SB_MAKE64(0x00D0360000)

Definition at line 896 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_L2CACHE_WAY4   _SB_MAKE64(0x00D0380000)

Definition at line 897 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_L2CACHE_WAY5   _SB_MAKE64(0x00D03A0000)

Definition at line 898 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_L2CACHE_WAY6   _SB_MAKE64(0x00D03C0000)

Definition at line 899 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_L2CACHE_WAY7   _SB_MAKE64(0x00D03E0000)

Definition at line 900 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_L2CACHE_WAY_SIZE   _SB_MAKE64(0x0000020000)

Definition at line 890 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_MEMORY_0   _SB_MAKE64(0x0000000000)

Definition at line 846 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_MEMORY_1   _SB_MAKE64(0x0080000000)

Definition at line 860 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_MEMORY_2   _SB_MAKE64(0x0090000000)

Definition at line 861 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_MEMORY_3   _SB_MAKE64(0x00C0000000)

Definition at line 868 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_MEMORY_EXP   _SB_MAKE64(0x0100000000)

Definition at line 877 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_MEMORY_EXP_SIZE   _SB_MAKE64((508*1024*1024*1024))

Definition at line 878 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_MEMORY_SIZE   _SB_MAKE64((256*1024*1024))

Definition at line 847 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_CFG_MATCH_BITS   _SB_MAKE64(0x00AE000000)

Definition at line 865 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_CFG_MATCH_BYTES   _SB_MAKE64(0x002E000000)

Definition at line 855 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_IACK_MATCH_BITS   _SB_MAKE64(0x00A9000000)

Definition at line 863 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_IACK_MATCH_BYTES   _SB_MAKE64(0x0029000000)

Definition at line 853 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_IO_MATCH_BITS   _SB_MAKE64(0x00AC000000)

Definition at line 864 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_IO_MATCH_BYTES   _SB_MAKE64(0x002C000000)

Definition at line 854 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_MEM_MATCH_BITS   _SB_MAKE64(0x00B0000000)

Definition at line 867 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_MEM_MATCH_BYTES   _SB_MAKE64(0x0030000000)

Definition at line 857 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_MISC_MATCH_BITS   _SB_MAKE64(0x00A8000000)

Definition at line 862 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_MISC_MATCH_BYTES   _SB_MAKE64(0x0028000000)

Definition at line 852 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_OMAP_MATCH_BITS   _SB_MAKE64(0x00AF000000)

Definition at line 866 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_OMAP_MATCH_BYTES   _SB_MAKE64(0x002F000000)

Definition at line 856 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_PCI_UPPER   _SB_MAKE64(0x1000000000)

Definition at line 879 of file bcm1480_regs.h.

#define A_BCM1480_PHYS_SYSTEM_CTL   _SB_MAKE64(0x0010000000)

Definition at line 848 of file bcm1480_regs.h.

#define A_BCM1480_PM_BASE   0x0010056000

Definition at line 591 of file bcm1480_regs.h.

#define A_BCM1480_PM_GLOBALDEBUG_PIB   0x0010056FF8

Definition at line 670 of file bcm1480_regs.h.

#define A_BCM1480_PM_GLOBALDEBUG_PID   0x00100567F8

Definition at line 669 of file bcm1480_regs.h.

#define A_BCM1480_PM_GLOBALDEBUG_POB   0x0010057FF8

Definition at line 673 of file bcm1480_regs.h.

#define A_BCM1480_PM_GLOBALDEBUG_POD   0x00100577F8

Definition at line 672 of file bcm1480_regs.h.

#define A_BCM1480_PM_GLOBALDEBUGMODE_PMI   0x0010056000

Definition at line 668 of file bcm1480_regs.h.

#define A_BCM1480_PM_GLOBALDEBUGMODE_PMO   0x0010057000

Definition at line 671 of file bcm1480_regs.h.

#define A_BCM1480_PM_PMO_MAPPING   (A_BCM1480_PMO_GLB_0 + R_BCM1480_PM_PMO_MAPPING)

Definition at line 641 of file bcm1480_regs.h.

#define A_BCM1480_PMI_GLB_0   0x0010056000

Definition at line 632 of file bcm1480_regs.h.

#define A_BCM1480_PMI_INT (   q)    (A_BCM1480_PMI_INT_0 + ((q>>8)<<8))

Definition at line 649 of file bcm1480_regs.h.

#define A_BCM1480_PMI_INT_0   0x0010056800

Definition at line 648 of file bcm1480_regs.h.

#define A_BCM1480_PMI_INT_OFFSET_0   (A_BCM1480_PMI_INT_0 - A_BCM1480_PM_BASE)

Definition at line 650 of file bcm1480_regs.h.

#define A_BCM1480_PMI_LCL_0   0x0010058000

Definition at line 593 of file bcm1480_regs.h.

#define A_BCM1480_PMI_LCL_BASE (   idx)    (A_BCM1480_PMI_LCL_0 + ((idx)*BCM1480_PM_LCL_REGISTER_SPACING))

Definition at line 601 of file bcm1480_regs.h.

#define A_BCM1480_PMI_LCL_REGISTER (   idx,
  reg 
)    (A_BCM1480_PMI_LCL_BASE(idx) + (reg))

Definition at line 602 of file bcm1480_regs.h.

#define A_BCM1480_PMI_OFFSET_0   (A_BCM1480_PMI_LCL_0 - A_BCM1480_PM_BASE)

Definition at line 595 of file bcm1480_regs.h.

#define A_BCM1480_PMO_GLB_0   0x0010057000

Definition at line 633 of file bcm1480_regs.h.

#define A_BCM1480_PMO_INT (   q)    (A_BCM1480_PMO_INT_0 + ((q>>8)<<8))

Definition at line 652 of file bcm1480_regs.h.

#define A_BCM1480_PMO_INT_0   0x0010057800

Definition at line 651 of file bcm1480_regs.h.

#define A_BCM1480_PMO_INT_OFFSET_0   (A_BCM1480_PMO_INT_0 - A_BCM1480_PM_BASE)

Definition at line 653 of file bcm1480_regs.h.

#define A_BCM1480_PMO_LCL_0   0x001005C000

Definition at line 594 of file bcm1480_regs.h.

#define A_BCM1480_PMO_LCL_BASE (   idx)    (A_BCM1480_PMO_LCL_0 + ((idx)*BCM1480_PM_LCL_REGISTER_SPACING))

Definition at line 603 of file bcm1480_regs.h.

#define A_BCM1480_PMO_LCL_REGISTER (   idx,
  reg 
)    (A_BCM1480_PMO_LCL_BASE(idx) + (reg))

Definition at line 604 of file bcm1480_regs.h.

#define A_BCM1480_PMO_OFFSET_0   (A_BCM1480_PMO_LCL_0 - A_BCM1480_PM_BASE)

Definition at line 596 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT (   n)    (A_SCD_PERF_CNT_0+(n*BCM1480_SCD_PERF_CNT_SPACING))

Definition at line 462 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_0   A_SCD_PERF_CNT_0

Definition at line 450 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_1   A_SCD_PERF_CNT_1

Definition at line 451 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_2   A_SCD_PERF_CNT_2

Definition at line 452 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_3   A_SCD_PERF_CNT_3

Definition at line 453 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_4   0x00100204F0

Definition at line 455 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_5   0x00100204F8

Definition at line 456 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_6   0x0010020500

Definition at line 457 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_7   0x0010020508

Definition at line 458 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_BASE   0x00100204C0

Definition at line 443 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_CFG0   0x00100204C0

Definition at line 445 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_CFG1   0x00100204C8

Definition at line 447 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_CFG_0   A_BCM1480_SCD_PERF_CNT_CFG0

Definition at line 446 of file bcm1480_regs.h.

#define A_BCM1480_SCD_PERF_CNT_CFG_1   A_BCM1480_SCD_PERF_CNT_CFG1

Definition at line 448 of file bcm1480_regs.h.

#define A_BCM1480_SCD_SCRATCH   0x100200A0

Definition at line 355 of file bcm1480_regs.h.

#define A_BCM1480_SCD_WDOG_2   0x0010022050

Definition at line 324 of file bcm1480_regs.h.

#define A_BCM1480_SCD_WDOG_3   0x0010022150

Definition at line 325 of file bcm1480_regs.h.

#define A_BCM1480_SCD_WDOG_BASE (   w)    (A_BCM1480_SCD_WDOG_0+((w)&2)*0x1000 + ((w)&1)*0x100)

Definition at line 329 of file bcm1480_regs.h.

#define A_BCM1480_SCD_WDOG_CFG_2   0x0010022060

Definition at line 334 of file bcm1480_regs.h.

#define A_BCM1480_SCD_WDOG_CFG_3   0x0010022160

Definition at line 338 of file bcm1480_regs.h.

#define A_BCM1480_SCD_WDOG_CNT_2   0x0010022058

Definition at line 333 of file bcm1480_regs.h.

#define A_BCM1480_SCD_WDOG_CNT_3   0x0010022158

Definition at line 337 of file bcm1480_regs.h.

#define A_BCM1480_SCD_WDOG_INIT_2   0x0010022050

Definition at line 332 of file bcm1480_regs.h.

#define A_BCM1480_SCD_WDOG_INIT_3   0x0010022150

Definition at line 336 of file bcm1480_regs.h.

#define A_BCM1480_SCD_WDOG_REGISTER (   w,
  r 
)    (A_BCM1480_SCD_WDOG_BASE(w) + (r))

Definition at line 330 of file bcm1480_regs.h.

#define A_BCM1480_SCD_ZBBUS_CYCLE_COUNT   A_SCD_ZBBUS_CYCLE_COUNT

Definition at line 342 of file bcm1480_regs.h.

#define A_BCM1480_SCD_ZBBUS_CYCLE_CP0   A_SCD_ZBBUS_CYCLE_CP0

Definition at line 344 of file bcm1480_regs.h.

#define A_BCM1480_SCD_ZBBUS_CYCLE_CP1   A_SCD_ZBBUS_CYCLE_CP1

Definition at line 345 of file bcm1480_regs.h.

#define A_BCM1480_SCD_ZBBUS_CYCLE_CP2   0x0010020C10

Definition at line 346 of file bcm1480_regs.h.

#define A_BCM1480_SCD_ZBBUS_CYCLE_CP3   0x0010020C18

Definition at line 347 of file bcm1480_regs.h.

#define A_BCM1480_SCD_ZBBUS_CYCLE_CP_BASE   0x0010020C00

Definition at line 343 of file bcm1480_regs.h.

#define A_BCM1480_SWDEBUG_SCHEDSTOP   0xDFB92000

Definition at line 701 of file bcm1480_regs.h.

#define A_BCM1480_SWPERF_CFG   0xdfb91800

Definition at line 679 of file bcm1480_regs.h.

#define A_BCM1480_SWPERF_CNT0   0xdfb91880

Definition at line 680 of file bcm1480_regs.h.

#define A_BCM1480_SWPERF_CNT1   0xdfb91888

Definition at line 681 of file bcm1480_regs.h.

#define A_BCM1480_SWPERF_CNT2   0xdfb91890

Definition at line 682 of file bcm1480_regs.h.

#define A_BCM1480_SWPERF_CNT3   0xdfb91898

Definition at line 683 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_CFG   0xDFB91500

Definition at line 698 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_EVENT (   x)    (A_BCM1480_SWTRC_EVENT_0 + ((x)*8))

Definition at line 704 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_EVENT_0   0xDFB91300

Definition at line 695 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_MATCH_CONTROL (   x)    (A_BCM1480_SWTRC_MATCH_CONTROL_0 + ((x)*8))

Definition at line 703 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_MATCH_CONTROL_0   0xDFB91000

Definition at line 690 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_MATCH_DATA_MASK (   x)    (A_BCM1480_SWTRC_MATCH_DATA_MASK_0 + ((x)*16))

Definition at line 708 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_MATCH_DATA_MASK_0   0xDFB91108

Definition at line 692 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_MATCH_DATA_VALUE (   x)    (A_BCM1480_SWTRC_MATCH_DATA_VALUE_0 + ((x)*16))

Definition at line 707 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_MATCH_DATA_VALUE_0   0xDFB91100

Definition at line 691 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_MATCH_TAG_MAKS_0   0xDFB91208

Definition at line 694 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_MATCH_TAG_MASK (   x)    (A_BCM1480_SWTRC_MATCH_TAG_MASK_0 + ((x)*16))

Definition at line 710 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_MATCH_TAG_VALUE (   x)    (A_BCM1480_SWTRC_MATCH_TAG_VALUE_0 + ((x)*16))

Definition at line 709 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_MATCH_TAG_VALUE_0   0xDFB91200

Definition at line 693 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_READ   0xDFB91508

Definition at line 699 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_SEQUENCE (   x)    (A_BCM1480_SWTRC_SEQUENCE_0 + ((x)*8))

Definition at line 705 of file bcm1480_regs.h.

#define A_BCM1480_SWTRC_SEQUENCE_0   0xDFB91400

Definition at line 696 of file bcm1480_regs.h.

#define A_GPIO_INT_ADD_TYPE   A_BCM1480_GPIO_INT_ADD_TYPE

Definition at line 307 of file bcm1480_regs.h.

#define A_MAC_BASE_2   A_BCM1480_MAC_BASE_2

Definition at line 191 of file bcm1480_regs.h.

#define A_MAC_BASE_3   A_BCM1480_MAC_BASE_3

Definition at line 195 of file bcm1480_regs.h.

#define BCM1480_DUART_CHANREG_SPACING   0x100

Definition at line 222 of file bcm1480_regs.h.

#define BCM1480_DUART_NUM_PORTS   4

Definition at line 216 of file bcm1480_regs.h.

#define BCM1480_HR_LEAF_OFFSET   0x0000000300

Definition at line 568 of file bcm1480_regs.h.

#define BCM1480_HR_LEAF_SPACING   0x0000000010

Definition at line 566 of file bcm1480_regs.h.

#define BCM1480_HR_NUM_LEAVES   10

Definition at line 567 of file bcm1480_regs.h.

#define BCM1480_HR_NUM_PATHS   16

Definition at line 574 of file bcm1480_regs.h.

#define BCM1480_HR_NUM_ROUTES   512

Definition at line 581 of file bcm1480_regs.h.

#define BCM1480_HR_NUM_RULES   16

Definition at line 560 of file bcm1480_regs.h.

#define BCM1480_HR_OP_OFFSET   0x0000000100

Definition at line 561 of file bcm1480_regs.h.

#define BCM1480_HR_PATH_OFFSET   0x0000000600

Definition at line 575 of file bcm1480_regs.h.

#define BCM1480_HR_PATH_SPACING   0x0000000010

Definition at line 573 of file bcm1480_regs.h.

#define BCM1480_HR_REGISTER_SPACING   0x80000

Definition at line 550 of file bcm1480_regs.h.

#define BCM1480_HR_ROUTE_OFFSET   0x0000001000

Definition at line 582 of file bcm1480_regs.h.

#define BCM1480_HR_ROUTE_SPACING   8

Definition at line 580 of file bcm1480_regs.h.

#define BCM1480_HR_RULE_SPACING   0x0000000010

Definition at line 559 of file bcm1480_regs.h.

#define BCM1480_HR_TYPE_OFFSET   0x0000000108

Definition at line 562 of file bcm1480_regs.h.

#define BCM1480_HSP_REGISTER_SPACING   0x80000

Definition at line 721 of file bcm1480_regs.h.

#define BCM1480_HT_NUM_PORTS   3

Definition at line 496 of file bcm1480_regs.h.

#define BCM1480_HT_PORT_SPACING   0x800

Definition at line 497 of file bcm1480_regs.h.

#define BCM1480_IMR_ALIAS_MAILBOX_SPACING   0100

Definition at line 412 of file bcm1480_regs.h.

#define BCM1480_IMR_HL_SPACING   0x1000

Definition at line 379 of file bcm1480_regs.h.

#define BCM1480_IMR_INTERRUPT_MAP_COUNT   64

Definition at line 397 of file bcm1480_regs.h.

#define BCM1480_IMR_INTERRUPT_STATUS_COUNT   8

Definition at line 395 of file bcm1480_regs.h.

#define BCM1480_IMR_REGISTER_SPACING   0x2000

Definition at line 371 of file bcm1480_regs.h.

#define BCM1480_IMR_REGISTER_SPACING_SHIFT   13

Definition at line 372 of file bcm1480_regs.h.

#define BCM1480_MC_CSX_SPACING   0x0000000080 /* CS23 relative to CS01 */

Definition at line 111 of file bcm1480_regs.h.

#define BCM1480_MC_REGISTER_SPACING   0x1000

Definition at line 87 of file bcm1480_regs.h.

#define BCM1480_PHYS_L2CACHE_NUM_WAYS   8

Definition at line 891 of file bcm1480_regs.h.

#define BCM1480_PM_INT_FUNCTION_SPACING   0x40

Definition at line 607 of file bcm1480_regs.h.

#define BCM1480_PM_INT_NUM_FUNCTIONS   3

Definition at line 608 of file bcm1480_regs.h.

#define BCM1480_PM_INT_PACKING   8

Definition at line 606 of file bcm1480_regs.h.

#define BCM1480_PM_LCL_REGISTER_SPACING   0x100

Definition at line 598 of file bcm1480_regs.h.

#define BCM1480_PM_NUM_CHANNELS   32

Definition at line 599 of file bcm1480_regs.h.

#define BCM1480_SCD_NUM_PERF_CNT   8

Definition at line 460 of file bcm1480_regs.h.

#define BCM1480_SCD_NUM_WDOGS   4

Definition at line 327 of file bcm1480_regs.h.

#define BCM1480_SCD_PERF_CNT_SPACING   8

Definition at line 461 of file bcm1480_regs.h.

#define DUART_IMRISR_SPACING   0x20

Definition at line 230 of file bcm1480_regs.h.

#define DUART_INCHNG_SPACING   0x10

Definition at line 231 of file bcm1480_regs.h.

#define R_BCM1480_DUART_IMRREG (   chan)    (R_DUART_IMR_A + ((chan) & 1) * DUART_IMRISR_SPACING)

Definition at line 233 of file bcm1480_regs.h.

#define R_BCM1480_DUART_INCHREG (   chan)    (R_DUART_IN_CHNG_A + ((chan) & 1) * DUART_INCHNG_SPACING)

Definition at line 237 of file bcm1480_regs.h.

#define R_BCM1480_DUART_ISRREG (   chan)    (R_DUART_ISR_A + ((chan) & 1) * DUART_IMRISR_SPACING)

Definition at line 235 of file bcm1480_regs.h.

#define R_BCM1480_GPIO_INT_ADD_TYPE   (-8)

Definition at line 305 of file bcm1480_regs.h.

#define R_BCM1480_HR_CFG   0x0000000000

Definition at line 555 of file bcm1480_regs.h.

#define R_BCM1480_HR_EX_LEAF0   0x00000003A0

Definition at line 571 of file bcm1480_regs.h.

#define R_BCM1480_HR_HA_LEAF0 (   idx)    (BCM1480_HR_LEAF_OFFSET + ((idx)*BCM1480_HR_LEAF_SPACING))

Definition at line 569 of file bcm1480_regs.h.

#define R_BCM1480_HR_MAPPING   0x0000010010

Definition at line 557 of file bcm1480_regs.h.

#define R_BCM1480_HR_PATH (   idx)    (BCM1480_HR_PATH_OFFSET + ((idx)*BCM1480_HR_PATH_SPACING))

Definition at line 576 of file bcm1480_regs.h.

#define R_BCM1480_HR_PATH_DEFAULT   0x0000000700

Definition at line 578 of file bcm1480_regs.h.

#define R_BCM1480_HR_RT_WORD (   idx)    (BCM1480_HR_ROUTE_OFFSET + ((idx)*BCM1480_HR_ROUTE_SPACING))

Definition at line 583 of file bcm1480_regs.h.

#define R_BCM1480_HR_RULE_OP (   idx)    (BCM1480_HR_OP_OFFSET + ((idx)*BCM1480_HR_RULE_SPACING))

Definition at line 563 of file bcm1480_regs.h.

#define R_BCM1480_HR_RULE_TYPE (   idx)    (BCM1480_HR_TYPE_OFFSET + ((idx)*BCM1480_HR_RULE_SPACING))

Definition at line 564 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_CALIBRATION   0x0000000808

Definition at line 737 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_DIAG_CRC_0   0x0000000820

Definition at line 740 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_DIAG_CRC_1   0x0000000828

Definition at line 741 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_DIAG_DETAILS   0x0000000818

Definition at line 739 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_DIAG_HTCMD   0x0000000830

Definition at line 742 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_DIAG_PKTCTL   0x0000000838

Definition at line 743 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_HT_RAMALLOC_0   0x0000020078

Definition at line 758 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_HT_RAMALLOC_1   0x0000020080

Definition at line 759 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_HT_RAMALLOC_2   0x0000020088

Definition at line 760 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_HT_RAMALLOC_3   0x0000020090

Definition at line 761 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_HT_RAMALLOC_4   0x0000020098

Definition at line 762 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_HT_RAMALLOC_5   0x00000200A0

Definition at line 763 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_PKT_RAMALLOC (   idx)    (R_BCM1480_HSP_RX_PKT_RAMALLOC_0 + 8*(idx))

Definition at line 755 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_PKT_RAMALLOC_0   0x0000020020

Definition at line 747 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_PKT_RAMALLOC_1   0x0000020028

Definition at line 748 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_PKT_RAMALLOC_2   0x0000020030

Definition at line 749 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_PKT_RAMALLOC_3   0x0000020038

Definition at line 750 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_PKT_RAMALLOC_4   0x0000020040

Definition at line 751 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_PKT_RAMALLOC_5   0x0000020048

Definition at line 752 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_PKT_RAMALLOC_6   0x0000020050

Definition at line 753 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_PKT_RAMALLOC_7   0x0000020058

Definition at line 754 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_PLL_CNFG   0x0000000800

Definition at line 736 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_RAM_READCTL   0x0000020108

Definition at line 778 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_RAM_READWINDOW   0x0000020110

Definition at line 779 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_RF_READCTL   0x0000020118

Definition at line 780 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_RF_READWINDOW   0x0000020120

Definition at line 781 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI4_CALENDAR_0   0x0000000200

Definition at line 733 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI4_CALENDAR_1   0x0000000208

Definition at line 734 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI4_CFG_0   0x0000000000

Definition at line 726 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI4_CFG_1   0x0000000008

Definition at line 727 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI4_DESKEW_DATAPATH   0x0000000018

Definition at line 729 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI4_DESKEW_OVERRIDE   0x0000000010

Definition at line 728 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI4_PORT_INT_EN   0x0000000020

Definition at line 730 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI4_PORT_INT_STATUS   0x0000000028

Definition at line 731 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI_WATERMARK (   idx)    (R_BCM1480_HSP_RX_SPI_WATERMARK_0 + 8*(idx))

Definition at line 773 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI_WATERMARK_0   0x00000200B0

Definition at line 765 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI_WATERMARK_1   0x00000200B8

Definition at line 766 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI_WATERMARK_2   0x00000200C0

Definition at line 767 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI_WATERMARK_3   0x00000200C8

Definition at line 768 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI_WATERMARK_4   0x00000200D0

Definition at line 769 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI_WATERMARK_5   0x00000200D8

Definition at line 770 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI_WATERMARK_6   0x00000200E0

Definition at line 771 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_SPI_WATERMARK_7   0x00000200E8

Definition at line 772 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_TEST   0x0000000810

Definition at line 738 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_VIS_CMDQ_0   0x00000200F0

Definition at line 775 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_VIS_CMDQ_1   0x00000200F8

Definition at line 776 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_VIS_CMDQ_2   0x0000020100

Definition at line 777 of file bcm1480_regs.h.

#define R_BCM1480_HSP_RX_VIS_FLCTRL_COUNTER   0x0000000870

Definition at line 745 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_CALIBRATION   0x0000040808

Definition at line 823 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_HTCC_RAMALLOC_0   0x0000040090

Definition at line 799 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_HTCC_RAMALLOC_1   0x0000040098

Definition at line 800 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_HTCC_RAMALLOC_2   0x00000400A0

Definition at line 801 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_HTCC_RXPHITCNT   0x00000400D8

Definition at line 809 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_HTCC_TXPHITCNT   0x0000040108

Definition at line 817 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_HTIO_RXPHITCNT   0x00000400D0

Definition at line 808 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_HTIO_TXPHITCNT   0x0000040100

Definition at line 816 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_NEXT_ADDR_BASE   0x000040400

Definition at line 837 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_NEXT_ADDR_REGISTER (   x)    (R_BCM1480_HSP_TX_NEXT_ADDR_BASE+ 8*(x))

Definition at line 838 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_NPC_RAMALLOC   0x0000040078

Definition at line 796 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PC_RAMALLOC   0x0000040088

Definition at line 798 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RAMALLOC (   idx)    (R_BCM1480_HSP_TX_PKT_RAMALLOC_0 + 8*(idx))

Definition at line 795 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RAMALLOC_0   0x0000040020

Definition at line 787 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RAMALLOC_1   0x0000040028

Definition at line 788 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RAMALLOC_2   0x0000040030

Definition at line 789 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RAMALLOC_3   0x0000040038

Definition at line 790 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RAMALLOC_4   0x0000040040

Definition at line 791 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RAMALLOC_5   0x0000040048

Definition at line 792 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RAMALLOC_6   0x0000040050

Definition at line 793 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RAMALLOC_7   0x0000040058

Definition at line 794 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RXPHITCNT (   idx)    (R_BCM1480_HSP_TX_PKT_RXPHITCNT_0 + 8*(idx))

Definition at line 807 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_0   0x00000400B0

Definition at line 803 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_1   0x00000400B8

Definition at line 804 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_2   0x00000400C0

Definition at line 805 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_RXPHITCNT_3   0x00000400C8

Definition at line 806 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_TXPHITCNT (   idx)    (R_BCM1480_HSP_TX_PKT_TXPHITCNT_0 + 8*(idx))

Definition at line 815 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_0   0x00000400E0

Definition at line 811 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_1   0x00000400E8

Definition at line 812 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_2   0x00000400F0

Definition at line 813 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PKT_TXPHITCNT_3   0x00000400F8

Definition at line 814 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_PLL_CNFG   0x0000040800

Definition at line 822 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_RAM_READCTL   0x0000040860

Definition at line 829 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_RAM_READWINDOW   0x0000040868

Definition at line 830 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_RF_READCTL   0x0000040870

Definition at line 831 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_RF_READWINDOW   0x0000040878

Definition at line 832 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_RSP_RAMALLOC   0x0000040080

Definition at line 797 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_SPI4_CALENDAR_0   0x0000040200

Definition at line 819 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_SPI4_CALENDAR_1   0x0000040208

Definition at line 820 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_SPI4_CFG_0   0x0000040000

Definition at line 783 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_SPI4_CFG_1   0x0000040008

Definition at line 784 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_SPI4_PORT_INT_EN   0x0000040888

Definition at line 835 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_SPI4_PORT_INT_STATUS   0x0000040880

Definition at line 834 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_SPI4_TRAINING_FMT   0x0000040010

Definition at line 785 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_TEST   0x0000040810

Definition at line 824 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_VIS_CMDQ_0   0x0000040840

Definition at line 826 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_VIS_CMDQ_1   0x0000040848

Definition at line 827 of file bcm1480_regs.h.

#define R_BCM1480_HSP_TX_VIS_CMDQ_2   0x0000040850

Definition at line 828 of file bcm1480_regs.h.

#define R_BCM1480_IMR_ALIAS_MAILBOX_0   0x0000 /* 0x0x0 */

Definition at line 418 of file bcm1480_regs.h.

#define R_BCM1480_IMR_ALIAS_MAILBOX_0_SET   0x0008 /* 0x0x8 */

Definition at line 419 of file bcm1480_regs.h.

#define R_BCM1480_IMR_INTERRUPT_DIAG_H   0x0010

Definition at line 381 of file bcm1480_regs.h.

#define R_BCM1480_IMR_INTERRUPT_DIAG_L   0x1010

Definition at line 399 of file bcm1480_regs.h.

#define R_BCM1480_IMR_INTERRUPT_MAP_BASE_H   0x0200

Definition at line 396 of file bcm1480_regs.h.

#define R_BCM1480_IMR_INTERRUPT_MAP_BASE_L   0x1200

Definition at line 406 of file bcm1480_regs.h.

#define R_BCM1480_IMR_INTERRUPT_MASK_H   0x0028

Definition at line 384 of file bcm1480_regs.h.

#define R_BCM1480_IMR_INTERRUPT_MASK_L   0x1028

Definition at line 402 of file bcm1480_regs.h.

#define R_BCM1480_IMR_INTERRUPT_SOURCE_STATUS_H   0x0040

Definition at line 386 of file bcm1480_regs.h.

#define R_BCM1480_IMR_INTERRUPT_SOURCE_STATUS_L   0x1040

Definition at line 404 of file bcm1480_regs.h.

#define R_BCM1480_IMR_INTERRUPT_STATUS_BASE_H   0x0100

Definition at line 394 of file bcm1480_regs.h.

#define R_BCM1480_IMR_INTERRUPT_STATUS_BASE_L   0x1100

Definition at line 405 of file bcm1480_regs.h.

#define R_BCM1480_IMR_INTERRUPT_TRACE_H   0x0038

Definition at line 385 of file bcm1480_regs.h.

#define R_BCM1480_IMR_INTERRUPT_TRACE_L   0x1038

Definition at line 403 of file bcm1480_regs.h.

#define R_BCM1480_IMR_LDT_INTERRUPT_CLR_H   0x0020

Definition at line 383 of file bcm1480_regs.h.

#define R_BCM1480_IMR_LDT_INTERRUPT_CLR_L   0x1020

Definition at line 401 of file bcm1480_regs.h.

#define R_BCM1480_IMR_LDT_INTERRUPT_H   0x0018

Definition at line 382 of file bcm1480_regs.h.

#define R_BCM1480_IMR_LDT_INTERRUPT_L   0x1018

Definition at line 400 of file bcm1480_regs.h.

#define R_BCM1480_IMR_LDT_INTERRUPT_SET   0x0048

Definition at line 387 of file bcm1480_regs.h.

#define R_BCM1480_IMR_MAILBOX_0_CLR_CPU   0x00D0

Definition at line 390 of file bcm1480_regs.h.

#define R_BCM1480_IMR_MAILBOX_0_CPU   0x00C0

Definition at line 388 of file bcm1480_regs.h.

#define R_BCM1480_IMR_MAILBOX_0_SET_CPU   0x00C8

Definition at line 389 of file bcm1480_regs.h.

#define R_BCM1480_IMR_MAILBOX_1_CLR_CPU   0x00F0

Definition at line 393 of file bcm1480_regs.h.

#define R_BCM1480_IMR_MAILBOX_1_CPU   0x00E0

Definition at line 391 of file bcm1480_regs.h.

#define R_BCM1480_IMR_MAILBOX_1_SET_CPU   0x00E8

Definition at line 392 of file bcm1480_regs.h.

#define R_BCM1480_IMR_MAILBOX_CLR   0x10

Definition at line 428 of file bcm1480_regs.h.

#define R_BCM1480_IMR_MAILBOX_CPU   0x00

Definition at line 426 of file bcm1480_regs.h.

#define R_BCM1480_IMR_MAILBOX_NUM_SPACING   0x20

Definition at line 429 of file bcm1480_regs.h.

#define R_BCM1480_IMR_MAILBOX_SET   0x08

Definition at line 427 of file bcm1480_regs.h.

#define R_BCM1480_MAC_DMA_OODPKTLOST   0x00000038

Definition at line 197 of file bcm1480_regs.h.

#define R_BCM1480_MC_CLOCK_CFG   0x0000000440

Definition at line 117 of file bcm1480_regs.h.

#define R_BCM1480_MC_CONFIG   0x0000000100

Definition at line 92 of file bcm1480_regs.h.

#define R_BCM1480_MC_CS01_BA   0x0000000380

Definition at line 113 of file bcm1480_regs.h.

#define R_BCM1480_MC_CS01_COL0   0x0000000280

Definition at line 101 of file bcm1480_regs.h.

#define R_BCM1480_MC_CS01_COL1   0x00000002A0

Definition at line 102 of file bcm1480_regs.h.

#define R_BCM1480_MC_CS01_ROW0   0x0000000180

Definition at line 97 of file bcm1480_regs.h.

#define R_BCM1480_MC_CS01_ROW1   0x00000001A0

Definition at line 98 of file bcm1480_regs.h.

#define R_BCM1480_MC_CS23_BA   0x00000003A0

Definition at line 114 of file bcm1480_regs.h.

#define R_BCM1480_MC_CS23_COL0   0x0000000300

Definition at line 103 of file bcm1480_regs.h.

#define R_BCM1480_MC_CS23_COL1   0x0000000320

Definition at line 104 of file bcm1480_regs.h.

#define R_BCM1480_MC_CS23_ROW0   0x0000000200

Definition at line 99 of file bcm1480_regs.h.

#define R_BCM1480_MC_CS23_ROW1   0x0000000220

Definition at line 100 of file bcm1480_regs.h.

#define R_BCM1480_MC_CS_END   0x0000000140

Definition at line 94 of file bcm1480_regs.h.

#define R_BCM1480_MC_CS_START   0x0000000120

Definition at line 93 of file bcm1480_regs.h.

#define R_BCM1480_MC_CSX_BASE   0x0000000180

Definition at line 106 of file bcm1480_regs.h.

#define R_BCM1480_MC_CSX_COL0   0x0000000100 /* relative to CSX_BASE */

Definition at line 109 of file bcm1480_regs.h.

#define R_BCM1480_MC_CSX_COL1   0x0000000120 /* relative to CSX_BASE */

Definition at line 110 of file bcm1480_regs.h.

#define R_BCM1480_MC_CSX_ROW0   0x0000000000 /* relative to CSX_BASE */

Definition at line 107 of file bcm1480_regs.h.

#define R_BCM1480_MC_CSX_ROW1   0x0000000020 /* relative to CSX_BASE */

Definition at line 108 of file bcm1480_regs.h.

#define R_BCM1480_MC_DLL_CFG   0x0000000500

Definition at line 123 of file bcm1480_regs.h.

#define R_BCM1480_MC_DRAMCMD   0x0000000400

Definition at line 115 of file bcm1480_regs.h.

#define R_BCM1480_MC_DRAMMODE   0x0000000420

Definition at line 116 of file bcm1480_regs.h.

#define R_BCM1480_MC_DRIVE_CFG   0x0000000520

Definition at line 124 of file bcm1480_regs.h.

#define R_BCM1480_MC_MCLK_CFG   R_BCM1480_MC_CLOCK_CFG

Definition at line 118 of file bcm1480_regs.h.

#define R_BCM1480_MC_TEST_DATA   0x0000000480

Definition at line 119 of file bcm1480_regs.h.

#define R_BCM1480_MC_TEST_ECC   0x00000004A0

Definition at line 120 of file bcm1480_regs.h.

#define R_BCM1480_MC_TIMING1   0x00000004C0

Definition at line 121 of file bcm1480_regs.h.

#define R_BCM1480_MC_TIMING2   0x00000004E0

Definition at line 122 of file bcm1480_regs.h.

#define R_BCM1480_PM_BASE_SIZE   0x0000000000

Definition at line 614 of file bcm1480_regs.h.

#define R_BCM1480_PM_CACHEABILITY   0x0000000080 /* PMI only */

Definition at line 622 of file bcm1480_regs.h.

#define R_BCM1480_PM_CNT   0x0000000008

Definition at line 615 of file bcm1480_regs.h.

#define R_BCM1480_PM_CONFIG0   0x0000000030

Definition at line 620 of file bcm1480_regs.h.

#define R_BCM1480_PM_DESC_MERGE_TIMER   0x0000000090

Definition at line 624 of file bcm1480_regs.h.

#define R_BCM1480_PM_INT_CLR   0x0000000080

Definition at line 661 of file bcm1480_regs.h.

#define R_BCM1480_PM_INT_CNFG   0x0000000088

Definition at line 623 of file bcm1480_regs.h.

#define R_BCM1480_PM_INT_MSK   0x0000000040

Definition at line 660 of file bcm1480_regs.h.

#define R_BCM1480_PM_INT_ST   0x0000000000

Definition at line 659 of file bcm1480_regs.h.

#define R_BCM1480_PM_INT_WMK   0x0000000028

Definition at line 619 of file bcm1480_regs.h.

#define R_BCM1480_PM_LAST   0x0000000018

Definition at line 617 of file bcm1480_regs.h.

#define R_BCM1480_PM_LOCALDEBUG   0x0000000078

Definition at line 621 of file bcm1480_regs.h.

#define R_BCM1480_PM_LOCALDEBUG_PIB   0x00000000F8 /* PMI only */

Definition at line 625 of file bcm1480_regs.h.

#define R_BCM1480_PM_LOCALDEBUG_POB   0x00000000F8 /* PMO only */

Definition at line 626 of file bcm1480_regs.h.

#define R_BCM1480_PM_MRGD_INT   0x00000000C0

Definition at line 662 of file bcm1480_regs.h.

#define R_BCM1480_PM_PFCNT   0x0000000010

Definition at line 616 of file bcm1480_regs.h.

#define R_BCM1480_PM_PFINDX   0x0000000020

Definition at line 618 of file bcm1480_regs.h.

#define R_BCM1480_PM_PMO_MAPPING   0x00000008C8 /* PMO only */

Definition at line 639 of file bcm1480_regs.h.

#define R_GPIO_INT_ADD_TYPE   R_BCM1480_GPIO_INT_ADD_TYPE

Definition at line 308 of file bcm1480_regs.h.

#define R_MAC_DMA_OODPKTLOST   R_BCM1480_MAC_DMA_OODPKTLOST

Definition at line 200 of file bcm1480_regs.h.

#define S_BCM1480_MC_CS_STARTEND   24

Definition at line 95 of file bcm1480_regs.h.

Generated on Thu Jan 10 2013 15:21:25 for Linux Kernel by   doxygen 1.8.2