Linux Kernel
3.7.1
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#include <linux/types.h>
#include <linux/i2c.h>
Go to the source code of this file.
Data Structures | |
struct | bfin_twi_regs |
struct | bfin_twi_iface |
Macros | |
#define | __BFP(m) u16 m; u16 __pad_##m |
#define | DEFINE_TWI_REG(reg_name, reg) |
#define | CLKLOW(x) ((x) & 0xFF) /* Periods Clock Is Held Low */ |
#define | CLKHI(y) (((y)&0xFF)<<0x8) /* Periods Before New Clock Low */ |
#define | PRESCALE 0x007F /* SCLKs Per Internal Time Reference (10MHz) */ |
#define | TWI_ENA 0x0080 /* TWI Enable */ |
#define | SCCB 0x0200 /* SCCB Compatibility Enable */ |
#define | SEN 0x0001 /* Slave Enable */ |
#define | SADD_LEN 0x0002 /* Slave Address Length */ |
#define | STDVAL 0x0004 /* Slave Transmit Data Valid */ |
#define | NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ |
#define | GEN 0x0010 /* General Call Address Matching Enabled */ |
#define | SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ |
#define | GCALL 0x0002 /* General Call Indicator */ |
#define | MEN 0x0001 /* Master Mode Enable */ |
#define | MADD_LEN 0x0002 /* Master Address Length */ |
#define | MDIR 0x0004 /* Master Transmit Direction (RX/TX*) */ |
#define | FAST 0x0008 /* Use Fast Mode Timing Specs */ |
#define | STOP 0x0010 /* Issue Stop Condition */ |
#define | RSTART 0x0020 /* Repeat Start or Stop* At End Of Transfer */ |
#define | DCNT 0x3FC0 /* Data Bytes To Transfer */ |
#define | SDAOVR 0x4000 /* Serial Data Override */ |
#define | SCLOVR 0x8000 /* Serial Clock Override */ |
#define | MPROG 0x0001 /* Master Transfer In Progress */ |
#define | LOSTARB 0x0002 /* Lost Arbitration Indicator (Xfer Aborted) */ |
#define | ANAK 0x0004 /* Address Not Acknowledged */ |
#define | DNAK 0x0008 /* Data Not Acknowledged */ |
#define | BUFRDERR 0x0010 /* Buffer Read Error */ |
#define | BUFWRERR 0x0020 /* Buffer Write Error */ |
#define | SDASEN 0x0040 /* Serial Data Sense */ |
#define | SCLSEN 0x0080 /* Serial Clock Sense */ |
#define | BUSBUSY 0x0100 /* Bus Busy Indicator */ |
#define | SINIT 0x0001 /* Slave Transfer Initiated */ |
#define | SCOMP 0x0002 /* Slave Transfer Complete */ |
#define | SERR 0x0004 /* Slave Transfer Error */ |
#define | SOVF 0x0008 /* Slave Overflow */ |
#define | MCOMP 0x0010 /* Master Transfer Complete */ |
#define | MERR 0x0020 /* Master Transfer Error */ |
#define | XMTSERV 0x0040 /* Transmit FIFO Service */ |
#define | RCVSERV 0x0080 /* Receive FIFO Service */ |
#define | XMTFLUSH 0x0001 /* Transmit Buffer Flush */ |
#define | RCVFLUSH 0x0002 /* Receive Buffer Flush */ |
#define | XMTINTLEN 0x0004 /* Transmit Buffer Interrupt Length */ |
#define | RCVINTLEN 0x0008 /* Receive Buffer Interrupt Length */ |
#define | XMTSTAT 0x0003 /* Transmit FIFO Status */ |
#define | XMT_EMPTY 0x0000 /* Transmit FIFO Empty */ |
#define | XMT_HALF 0x0001 /* Transmit FIFO Has 1 Byte To Write */ |
#define | XMT_FULL 0x0003 /* Transmit FIFO Full (2 Bytes To Write) */ |
#define | RCVSTAT 0x000C /* Receive FIFO Status */ |
#define | RCV_EMPTY 0x0000 /* Receive FIFO Empty */ |
#define | RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ |
#define | RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ |
#define ANAK 0x0004 /* Address Not Acknowledged */ |
Definition at line 152 of file bfin_twi.h.
#define BUFRDERR 0x0010 /* Buffer Read Error */ |
Definition at line 154 of file bfin_twi.h.
#define BUFWRERR 0x0020 /* Buffer Write Error */ |
Definition at line 155 of file bfin_twi.h.
#define BUSBUSY 0x0100 /* Bus Busy Indicator */ |
Definition at line 158 of file bfin_twi.h.
Definition at line 120 of file bfin_twi.h.
Definition at line 119 of file bfin_twi.h.
#define DCNT 0x3FC0 /* Data Bytes To Transfer */ |
Definition at line 145 of file bfin_twi.h.
Definition at line 67 of file bfin_twi.h.
#define DNAK 0x0008 /* Data Not Acknowledged */ |
Definition at line 153 of file bfin_twi.h.
#define FAST 0x0008 /* Use Fast Mode Timing Specs */ |
Definition at line 142 of file bfin_twi.h.
#define GCALL 0x0002 /* General Call Indicator */ |
Definition at line 136 of file bfin_twi.h.
#define GEN 0x0010 /* General Call Address Matching Enabled */ |
Definition at line 132 of file bfin_twi.h.
#define LOSTARB 0x0002 /* Lost Arbitration Indicator (Xfer Aborted) */ |
Definition at line 151 of file bfin_twi.h.
#define MADD_LEN 0x0002 /* Master Address Length */ |
Definition at line 140 of file bfin_twi.h.
#define MCOMP 0x0010 /* Master Transfer Complete */ |
Definition at line 165 of file bfin_twi.h.
#define MDIR 0x0004 /* Master Transmit Direction (RX/TX*) */ |
Definition at line 141 of file bfin_twi.h.
#define MEN 0x0001 /* Master Mode Enable */ |
Definition at line 139 of file bfin_twi.h.
#define MERR 0x0020 /* Master Transfer Error */ |
Definition at line 166 of file bfin_twi.h.
#define MPROG 0x0001 /* Master Transfer In Progress */ |
Definition at line 150 of file bfin_twi.h.
#define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ |
Definition at line 131 of file bfin_twi.h.
#define PRESCALE 0x007F /* SCLKs Per Internal Time Reference (10MHz) */ |
Definition at line 123 of file bfin_twi.h.
#define RCV_EMPTY 0x0000 /* Receive FIFO Empty */ |
Definition at line 183 of file bfin_twi.h.
#define RCV_FULL 0x000C /* Receive FIFO Full (2 Bytes To Read) */ |
Definition at line 185 of file bfin_twi.h.
#define RCV_HALF 0x0004 /* Receive FIFO Has 1 Byte To Read */ |
Definition at line 184 of file bfin_twi.h.
#define RCVFLUSH 0x0002 /* Receive Buffer Flush */ |
Definition at line 172 of file bfin_twi.h.
#define RCVINTLEN 0x0008 /* Receive Buffer Interrupt Length */ |
Definition at line 174 of file bfin_twi.h.
#define RCVSERV 0x0080 /* Receive FIFO Service */ |
Definition at line 168 of file bfin_twi.h.
#define RCVSTAT 0x000C /* Receive FIFO Status */ |
Definition at line 182 of file bfin_twi.h.
#define RSTART 0x0020 /* Repeat Start or Stop* At End Of Transfer */ |
Definition at line 144 of file bfin_twi.h.
#define SADD_LEN 0x0002 /* Slave Address Length */ |
Definition at line 129 of file bfin_twi.h.
#define SCCB 0x0200 /* SCCB Compatibility Enable */ |
Definition at line 125 of file bfin_twi.h.
#define SCLOVR 0x8000 /* Serial Clock Override */ |
Definition at line 147 of file bfin_twi.h.
#define SCLSEN 0x0080 /* Serial Clock Sense */ |
Definition at line 157 of file bfin_twi.h.
#define SCOMP 0x0002 /* Slave Transfer Complete */ |
Definition at line 162 of file bfin_twi.h.
#define SDAOVR 0x4000 /* Serial Data Override */ |
Definition at line 146 of file bfin_twi.h.
#define SDASEN 0x0040 /* Serial Data Sense */ |
Definition at line 156 of file bfin_twi.h.
#define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ |
Definition at line 135 of file bfin_twi.h.
#define SEN 0x0001 /* Slave Enable */ |
Definition at line 128 of file bfin_twi.h.
#define SERR 0x0004 /* Slave Transfer Error */ |
Definition at line 163 of file bfin_twi.h.
#define SINIT 0x0001 /* Slave Transfer Initiated */ |
Definition at line 161 of file bfin_twi.h.
#define SOVF 0x0008 /* Slave Overflow */ |
Definition at line 164 of file bfin_twi.h.
#define STDVAL 0x0004 /* Slave Transmit Data Valid */ |
Definition at line 130 of file bfin_twi.h.
#define STOP 0x0010 /* Issue Stop Condition */ |
Definition at line 143 of file bfin_twi.h.
#define TWI_ENA 0x0080 /* TWI Enable */ |
Definition at line 124 of file bfin_twi.h.
#define XMT_EMPTY 0x0000 /* Transmit FIFO Empty */ |
Definition at line 178 of file bfin_twi.h.
#define XMT_FULL 0x0003 /* Transmit FIFO Full (2 Bytes To Write) */ |
Definition at line 180 of file bfin_twi.h.
#define XMT_HALF 0x0001 /* Transmit FIFO Has 1 Byte To Write */ |
Definition at line 179 of file bfin_twi.h.
#define XMTFLUSH 0x0001 /* Transmit Buffer Flush */ |
Definition at line 171 of file bfin_twi.h.
#define XMTINTLEN 0x0004 /* Transmit Buffer Interrupt Length */ |
Definition at line 173 of file bfin_twi.h.
#define XMTSERV 0x0040 /* Transmit FIFO Service */ |
Definition at line 167 of file bfin_twi.h.
#define XMTSTAT 0x0003 /* Transmit FIFO Status */ |
Definition at line 177 of file bfin_twi.h.