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Data Structures | Macros | Typedefs
bkm_ax.h File Reference

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Data Structures

struct  I20_REGISTER_FILE
 

Macros

#define SCT_1   1
 
#define SCT_2   2
 
#define SCT_3   3
 
#define SCT_4   4
 
#define BKM_A4T   5
 
#define PLX_ADDR_PLX   0x14 /* Addr PLX configuration */
 
#define PLX_ADDR_ISAC   0x18 /* Addr ISAC */
 
#define PLX_ADDR_HSCX   0x1C /* Addr HSCX */
 
#define PLX_ADDR_ALE   0x20 /* Addr ALE */
 
#define PLX_ADDR_ALEPLUS   0x24 /* Next Addr behind ALE */
 
#define PLX_SUBVEN   0x2C /* Offset SubVendor */
 
#define PLX_SUBSYS   0x2E /* Offset SubSystem */
 
#define sysRESET   0x01000000 /* bit 24:Softreset (Low) */
 
#define sysCFG   0x000000E0 /* GPIO 7,6,5: Input */
 
#define guestWAIT_CFG   0x00005555 /* 4 PCI waits for all */
 
#define guestISDN_INT_E   0x01000000 /* ISDN Int en (low) */
 
#define guestVID_INT_E   0x02000000 /* Video interrupt en (low) */
 
#define guestADI1_INT_R   0x04000000 /* ADI #1 int req (low) */
 
#define guestADI2_INT_R   0x08000000 /* ADI #2 int req (low) */
 
#define guestISDN_RES   0x10000000 /* ISDN reset bit (high) */
 
#define guestADI1_INT_S   0x20000000 /* ADI #1 int pending (low) */
 
#define guestADI2_INT_S   0x40000000 /* ADI #2 int pending (low) */
 
#define guestISDN_INT_S   0x80000000 /* ISAC int pending (low) */
 
#define g_A4T_JADE_RES   0x01000000 /* JADE Reset (High) */
 
#define g_A4T_ISAR_RES   0x02000000 /* ISAR Reset (High) */
 
#define g_A4T_ISAC_RES   0x04000000 /* ISAC Reset (High) */
 
#define g_A4T_JADE_BOOTR   0x08000000 /* JADE enable boot SRAM (Low) NOT USED */
 
#define g_A4T_ISAR_BOOTR   0x10000000 /* ISAR enable boot SRAM (Low) NOT USED */
 
#define g_A4T_JADE_INT_S   0x20000000 /* JADE interrupt pnd (Low) */
 
#define g_A4T_ISAR_INT_S   0x40000000 /* ISAR interrupt pnd (Low) */
 
#define g_A4T_ISAC_INT_S   0x80000000 /* ISAC interrupt pnd (Low) */
 
#define intISDN   0x40000000 /* GIRQ1En (ISAC/ADI) (High) */
 
#define intVID   0x20000000 /* GIRQ0En (VSYNC) (High) */
 
#define intCOD   0x10000000 /* CodRepIrqEn (High) */
 
#define intPCI   0x01000000 /* PCI IntA enable (High) */
 
#define PO_OFFSET   0x00000200 /* Postoffice offset from base */
 
#define GCS_0   0x00000000 /* Guest bus chip selects */
 
#define GCS_1   0x00100000
 
#define GCS_2   0x00200000
 
#define GCS_3   0x00300000
 
#define PO_READ   0x00000000 /* R/W from/to guest bus */
 
#define PO_WRITE   0x00800000
 
#define PO_PEND   0x02000000
 
#define POSTOFFICE(postoffice)   *(volatile unsigned int *)(postoffice)
 
#define __WAITI20__(postoffice)
 

Typedefs

typedef struct I20_REGISTER_FILEPI20_REGISTER_FILE
 

Macro Definition Documentation

#define __WAITI20__ (   postoffice)
Value:
do { \
while ((POSTOFFICE(postoffice) & PO_PEND)) ; \
} while (0)

Definition at line 114 of file bkm_ax.h.

#define BKM_A4T   5

Definition at line 21 of file bkm_ax.h.

#define g_A4T_ISAC_INT_S   0x80000000 /* ISAC interrupt pnd (Low) */

Definition at line 79 of file bkm_ax.h.

#define g_A4T_ISAC_RES   0x04000000 /* ISAC Reset (High) */

Definition at line 74 of file bkm_ax.h.

#define g_A4T_ISAR_BOOTR   0x10000000 /* ISAR enable boot SRAM (Low) NOT USED */

Definition at line 76 of file bkm_ax.h.

#define g_A4T_ISAR_INT_S   0x40000000 /* ISAR interrupt pnd (Low) */

Definition at line 78 of file bkm_ax.h.

#define g_A4T_ISAR_RES   0x02000000 /* ISAR Reset (High) */

Definition at line 73 of file bkm_ax.h.

#define g_A4T_JADE_BOOTR   0x08000000 /* JADE enable boot SRAM (Low) NOT USED */

Definition at line 75 of file bkm_ax.h.

#define g_A4T_JADE_INT_S   0x20000000 /* JADE interrupt pnd (Low) */

Definition at line 77 of file bkm_ax.h.

#define g_A4T_JADE_RES   0x01000000 /* JADE Reset (High) */

Definition at line 72 of file bkm_ax.h.

#define GCS_0   0x00000000 /* Guest bus chip selects */

Definition at line 101 of file bkm_ax.h.

#define GCS_1   0x00100000

Definition at line 102 of file bkm_ax.h.

#define GCS_2   0x00200000

Definition at line 103 of file bkm_ax.h.

#define GCS_3   0x00300000

Definition at line 104 of file bkm_ax.h.

#define guestADI1_INT_R   0x04000000 /* ADI #1 int req (low) */

Definition at line 65 of file bkm_ax.h.

#define guestADI1_INT_S   0x20000000 /* ADI #1 int pending (low) */

Definition at line 68 of file bkm_ax.h.

#define guestADI2_INT_R   0x08000000 /* ADI #2 int req (low) */

Definition at line 66 of file bkm_ax.h.

#define guestADI2_INT_S   0x40000000 /* ADI #2 int pending (low) */

Definition at line 69 of file bkm_ax.h.

#define guestISDN_INT_E   0x01000000 /* ISDN Int en (low) */

Definition at line 63 of file bkm_ax.h.

#define guestISDN_INT_S   0x80000000 /* ISAC int pending (low) */

Definition at line 70 of file bkm_ax.h.

#define guestISDN_RES   0x10000000 /* ISDN reset bit (high) */

Definition at line 67 of file bkm_ax.h.

#define guestVID_INT_E   0x02000000 /* Video interrupt en (low) */

Definition at line 64 of file bkm_ax.h.

#define guestWAIT_CFG   0x00005555 /* 4 PCI waits for all */

Definition at line 62 of file bkm_ax.h.

#define intCOD   0x10000000 /* CodRepIrqEn (High) */

Definition at line 89 of file bkm_ax.h.

#define intISDN   0x40000000 /* GIRQ1En (ISAC/ADI) (High) */

Definition at line 87 of file bkm_ax.h.

#define intPCI   0x01000000 /* PCI IntA enable (High) */

Definition at line 90 of file bkm_ax.h.

#define intVID   0x20000000 /* GIRQ0En (VSYNC) (High) */

Definition at line 88 of file bkm_ax.h.

#define PLX_ADDR_ALE   0x20 /* Addr ALE */

Definition at line 26 of file bkm_ax.h.

#define PLX_ADDR_ALEPLUS   0x24 /* Next Addr behind ALE */

Definition at line 27 of file bkm_ax.h.

#define PLX_ADDR_HSCX   0x1C /* Addr HSCX */

Definition at line 25 of file bkm_ax.h.

#define PLX_ADDR_ISAC   0x18 /* Addr ISAC */

Definition at line 24 of file bkm_ax.h.

#define PLX_ADDR_PLX   0x14 /* Addr PLX configuration */

Definition at line 23 of file bkm_ax.h.

#define PLX_SUBSYS   0x2E /* Offset SubSystem */

Definition at line 30 of file bkm_ax.h.

#define PLX_SUBVEN   0x2C /* Offset SubVendor */

Definition at line 29 of file bkm_ax.h.

#define PO_OFFSET   0x00000200 /* Postoffice offset from base */

Definition at line 99 of file bkm_ax.h.

#define PO_PEND   0x02000000

Definition at line 109 of file bkm_ax.h.

#define PO_READ   0x00000000 /* R/W from/to guest bus */

Definition at line 106 of file bkm_ax.h.

#define PO_WRITE   0x00800000

Definition at line 107 of file bkm_ax.h.

#define POSTOFFICE (   postoffice)    *(volatile unsigned int *)(postoffice)

Definition at line 111 of file bkm_ax.h.

#define SCT_1   1

Definition at line 17 of file bkm_ax.h.

#define SCT_2   2

Definition at line 18 of file bkm_ax.h.

#define SCT_3   3

Definition at line 19 of file bkm_ax.h.

#define SCT_4   4

Definition at line 20 of file bkm_ax.h.

#define sysCFG   0x000000E0 /* GPIO 7,6,5: Input */

Definition at line 59 of file bkm_ax.h.

#define sysRESET   0x01000000 /* bit 24:Softreset (Low) */

Definition at line 57 of file bkm_ax.h.

Typedef Documentation