Linux Kernel
3.7.1
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Go to the source code of this file.
Macros | |
#define | BRCM_PHY_MODEL(phydev) ((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask) |
#define | BRCM_PHY_REV(phydev) ((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask)) |
#define | MII_BCM54XX_ECR 0x10 /* BCM54xx extended control register */ |
#define | MII_BCM54XX_ECR_IM 0x1000 /* Interrupt mask */ |
#define | MII_BCM54XX_ECR_IF 0x0800 /* Interrupt force */ |
#define | MII_BCM54XX_ESR 0x11 /* BCM54xx extended status register */ |
#define | MII_BCM54XX_ESR_IS 0x1000 /* Interrupt status */ |
#define | MII_BCM54XX_EXP_DATA 0x15 /* Expansion register data */ |
#define | MII_BCM54XX_EXP_SEL 0x17 /* Expansion register select */ |
#define | MII_BCM54XX_EXP_SEL_SSD 0x0e00 /* Secondary SerDes select */ |
#define | MII_BCM54XX_EXP_SEL_ER 0x0f00 /* Expansion register select */ |
#define | MII_BCM54XX_AUX_CTL 0x18 /* Auxiliary control register */ |
#define | MII_BCM54XX_ISR 0x1a /* BCM54xx interrupt status register */ |
#define | MII_BCM54XX_IMR 0x1b /* BCM54xx interrupt mask register */ |
#define | MII_BCM54XX_INT_CRCERR 0x0001 /* CRC error */ |
#define | MII_BCM54XX_INT_LINK 0x0002 /* Link status changed */ |
#define | MII_BCM54XX_INT_SPEED 0x0004 /* Link speed change */ |
#define | MII_BCM54XX_INT_DUPLEX 0x0008 /* Duplex mode changed */ |
#define | MII_BCM54XX_INT_LRS 0x0010 /* Local receiver status changed */ |
#define | MII_BCM54XX_INT_RRS 0x0020 /* Remote receiver status changed */ |
#define | MII_BCM54XX_INT_SSERR 0x0040 /* Scrambler synchronization error */ |
#define | MII_BCM54XX_INT_UHCD 0x0080 /* Unsupported HCD negotiated */ |
#define | MII_BCM54XX_INT_NHCD 0x0100 /* No HCD */ |
#define | MII_BCM54XX_INT_NHCDL 0x0200 /* No HCD link */ |
#define | MII_BCM54XX_INT_ANPR 0x0400 /* Auto-negotiation page received */ |
#define | MII_BCM54XX_INT_LC 0x0800 /* All counters below 128 */ |
#define | MII_BCM54XX_INT_HC 0x1000 /* Counter above 32768 */ |
#define | MII_BCM54XX_INT_MDIX 0x2000 /* MDIX status change */ |
#define | MII_BCM54XX_INT_PSERR 0x4000 /* Pair swap error */ |
#define | MII_BCM54XX_SHD 0x1c /* 0x1c shadow registers */ |
#define | MII_BCM54XX_SHD_WRITE 0x8000 |
#define | MII_BCM54XX_SHD_VAL(x) ((x & 0x1f) << 10) |
#define | MII_BCM54XX_SHD_DATA(x) ((x & 0x3ff) << 0) |
#define | MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000 |
#define | MII_BCM54XX_AUXCTL_ACTL_TX_6DB 0x0400 |
#define | MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA 0x0800 |
#define | MII_BCM54XX_AUXCTL_MISC_WREN 0x8000 |
#define | MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200 |
#define | MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC 0x7000 |
#define | MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x0007 |
#define | MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000 |
#define | BCM_LED_SRC_LINKSPD1 0x0 |
#define | BCM_LED_SRC_LINKSPD2 0x1 |
#define | BCM_LED_SRC_XMITLED 0x2 |
#define | BCM_LED_SRC_ACTIVITYLED 0x3 |
#define | BCM_LED_SRC_FDXLED 0x4 |
#define | BCM_LED_SRC_SLAVE 0x5 |
#define | BCM_LED_SRC_INTR 0x6 |
#define | BCM_LED_SRC_QUALITY 0x7 |
#define | BCM_LED_SRC_RCVLED 0x8 |
#define | BCM_LED_SRC_MULTICOLOR1 0xa |
#define | BCM_LED_SRC_OPENSHORT 0xb |
#define | BCM_LED_SRC_OFF 0xe /* Tied high */ |
#define | BCM_LED_SRC_ON 0xf /* Tied low */ |
#define | BCM54XX_SHD_SCR3 0x05 |
#define | BCM54XX_SHD_SCR3_DEF_CLK125 0x0001 |
#define | BCM54XX_SHD_SCR3_DLLAPD_DIS 0x0002 |
#define | BCM54XX_SHD_SCR3_TRDDAPD 0x0004 |
#define | BCM54XX_SHD_APD 0x0a |
#define | BCM54XX_SHD_APD_EN 0x0020 |
#define | BCM5482_SHD_LEDS1 0x0d /* 01101: LED Selector 1 */ |
#define | BCM5482_SHD_LEDS1_LED3(src) ((src & 0xf) << 4) |
#define | BCM5482_SHD_LEDS1_LED1(src) ((src & 0xf) << 0) |
#define | BCM54XX_SHD_RGMII_MODE 0x0b /* 01011: RGMII Mode Selector */ |
#define | BCM5482_SHD_SSD 0x14 /* 10100: Secondary SerDes control */ |
#define | BCM5482_SHD_SSD_LEDM 0x0008 /* SSD LED Mode enable */ |
#define | BCM5482_SHD_SSD_EN 0x0001 /* SSD enable */ |
#define | BCM5482_SHD_MODE 0x1f /* 11111: Mode Control Register */ |
#define | BCM5482_SHD_MODE_1000BX 0x0001 /* Enable 1000BASE-X registers */ |
#define | MII_BCM54XX_EXP_AADJ1CH0 0x001f |
#define | MII_BCM54XX_EXP_AADJ1CH0_SWP_ABCD_OEN 0x0200 |
#define | MII_BCM54XX_EXP_AADJ1CH0_SWSEL_THPF 0x0100 |
#define | MII_BCM54XX_EXP_AADJ1CH3 0x601f |
#define | MII_BCM54XX_EXP_AADJ1CH3_ADCCKADJ 0x0002 |
#define | MII_BCM54XX_EXP_EXP08 0x0F08 |
#define | MII_BCM54XX_EXP_EXP08_RJCT_2MHZ 0x0001 |
#define | MII_BCM54XX_EXP_EXP08_EARLY_DAC_WAKE 0x0200 |
#define | MII_BCM54XX_EXP_EXP75 0x0f75 |
#define | MII_BCM54XX_EXP_EXP75_VDACCTRL 0x003c |
#define | MII_BCM54XX_EXP_EXP75_CM_OSC 0x0001 |
#define | MII_BCM54XX_EXP_EXP96 0x0f96 |
#define | MII_BCM54XX_EXP_EXP96_MYST 0x0010 |
#define | MII_BCM54XX_EXP_EXP97 0x0f97 |
#define | MII_BCM54XX_EXP_EXP97_MYST 0x0c0c |
#define | BCM5482_SSD_1000BX_CTL 0x00 /* 1000BASE-X Control */ |
#define | BCM5482_SSD_1000BX_CTL_PWRDOWN 0x0800 /* Power-down SSD */ |
#define | BCM5482_SSD_SGMII_SLAVE 0x15 /* SGMII Slave Register */ |
#define | BCM5482_SSD_SGMII_SLAVE_EN 0x0002 /* Slave mode enable */ |
#define | BCM5482_SSD_SGMII_SLAVE_AD 0x0001 /* Slave auto-detection */ |
#define | MII_BRCM_FET_INTREG 0x1a /* Interrupt register */ |
#define | MII_BRCM_FET_IR_MASK 0x0100 /* Mask all interrupts */ |
#define | MII_BRCM_FET_IR_LINK_EN 0x0200 /* Link status change enable */ |
#define | MII_BRCM_FET_IR_SPEED_EN 0x0400 /* Link speed change enable */ |
#define | MII_BRCM_FET_IR_DUPLEX_EN 0x0800 /* Duplex mode change enable */ |
#define | MII_BRCM_FET_IR_ENABLE 0x4000 /* Interrupt enable */ |
#define | MII_BRCM_FET_BRCMTEST 0x1f /* Brcm test register */ |
#define | MII_BRCM_FET_BT_SRE 0x0080 /* Shadow register enable */ |
#define | MII_BRCM_FET_SHDW_MISCCTRL 0x10 /* Shadow misc ctrl */ |
#define | MII_BRCM_FET_SHDW_MC_FAME 0x4000 /* Force Auto MDIX enable */ |
#define | MII_BRCM_FET_SHDW_AUXMODE4 0x1a /* Auxiliary mode 4 */ |
#define | MII_BRCM_FET_SHDW_AM4_LED_MASK 0x0003 |
#define | MII_BRCM_FET_SHDW_AM4_LED_MODE1 0x0001 |
#define | MII_BRCM_FET_SHDW_AUXSTAT2 0x1b /* Auxiliary status 2 */ |
#define | MII_BRCM_FET_SHDW_AS2_APDE 0x0020 /* Auto power down enable */ |
Functions | |
MODULE_DESCRIPTION ("Broadcom PHY driver") | |
MODULE_AUTHOR ("Maciej W. Rozycki") | |
MODULE_LICENSE ("GPL") | |
module_init (broadcom_init) | |
module_exit (broadcom_exit) | |
MODULE_DEVICE_TABLE (mdio, broadcom_tbl) | |
#define BCM5482_SHD_LEDS1 0x0d /* 01101: LED Selector 1 */ |
Definition at line 114 of file broadcom.c.
Definition at line 118 of file broadcom.c.
Definition at line 116 of file broadcom.c.
#define BCM5482_SHD_MODE 0x1f /* 11111: Mode Control Register */ |
Definition at line 123 of file broadcom.c.
#define BCM5482_SHD_MODE_1000BX 0x0001 /* Enable 1000BASE-X registers */ |
Definition at line 124 of file broadcom.c.
#define BCM5482_SHD_SSD 0x14 /* 10100: Secondary SerDes control */ |
Definition at line 120 of file broadcom.c.
#define BCM5482_SHD_SSD_EN 0x0001 /* SSD enable */ |
Definition at line 122 of file broadcom.c.
#define BCM5482_SHD_SSD_LEDM 0x0008 /* SSD LED Mode enable */ |
Definition at line 121 of file broadcom.c.
#define BCM5482_SSD_1000BX_CTL 0x00 /* 1000BASE-X Control */ |
Definition at line 149 of file broadcom.c.
#define BCM5482_SSD_1000BX_CTL_PWRDOWN 0x0800 /* Power-down SSD */ |
Definition at line 150 of file broadcom.c.
#define BCM5482_SSD_SGMII_SLAVE 0x15 /* SGMII Slave Register */ |
Definition at line 151 of file broadcom.c.
#define BCM5482_SSD_SGMII_SLAVE_AD 0x0001 /* Slave auto-detection */ |
Definition at line 153 of file broadcom.c.
#define BCM5482_SSD_SGMII_SLAVE_EN 0x0002 /* Slave mode enable */ |
Definition at line 152 of file broadcom.c.
#define BCM54XX_SHD_APD 0x0a |
Definition at line 111 of file broadcom.c.
#define BCM54XX_SHD_APD_EN 0x0020 |
Definition at line 112 of file broadcom.c.
#define BCM54XX_SHD_RGMII_MODE 0x0b /* 01011: RGMII Mode Selector */ |
Definition at line 119 of file broadcom.c.
#define BCM54XX_SHD_SCR3 0x05 |
Definition at line 105 of file broadcom.c.
#define BCM54XX_SHD_SCR3_DEF_CLK125 0x0001 |
Definition at line 106 of file broadcom.c.
#define BCM54XX_SHD_SCR3_DLLAPD_DIS 0x0002 |
Definition at line 107 of file broadcom.c.
#define BCM54XX_SHD_SCR3_TRDDAPD 0x0004 |
Definition at line 108 of file broadcom.c.
#define BCM_LED_SRC_ACTIVITYLED 0x3 |
Definition at line 87 of file broadcom.c.
#define BCM_LED_SRC_FDXLED 0x4 |
Definition at line 88 of file broadcom.c.
#define BCM_LED_SRC_INTR 0x6 |
Definition at line 90 of file broadcom.c.
#define BCM_LED_SRC_LINKSPD1 0x0 |
Definition at line 84 of file broadcom.c.
#define BCM_LED_SRC_LINKSPD2 0x1 |
Definition at line 85 of file broadcom.c.
#define BCM_LED_SRC_MULTICOLOR1 0xa |
Definition at line 93 of file broadcom.c.
#define BCM_LED_SRC_OFF 0xe /* Tied high */ |
Definition at line 95 of file broadcom.c.
#define BCM_LED_SRC_ON 0xf /* Tied low */ |
Definition at line 96 of file broadcom.c.
#define BCM_LED_SRC_OPENSHORT 0xb |
Definition at line 94 of file broadcom.c.
#define BCM_LED_SRC_QUALITY 0x7 |
Definition at line 91 of file broadcom.c.
#define BCM_LED_SRC_RCVLED 0x8 |
Definition at line 92 of file broadcom.c.
#define BCM_LED_SRC_SLAVE 0x5 |
Definition at line 89 of file broadcom.c.
#define BCM_LED_SRC_XMITLED 0x2 |
Definition at line 86 of file broadcom.c.
#define BRCM_PHY_MODEL | ( | phydev | ) | ((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask) |
Definition at line 22 of file broadcom.c.
#define BRCM_PHY_REV | ( | phydev | ) | ((phydev)->drv->phy_id & ~((phydev)->drv->phy_id_mask)) |
Definition at line 25 of file broadcom.c.
#define MII_BCM54XX_AUX_CTL 0x18 /* Auxiliary control register */ |
Definition at line 41 of file broadcom.c.
#define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA 0x0800 |
Definition at line 70 of file broadcom.c.
#define MII_BCM54XX_AUXCTL_ACTL_TX_6DB 0x0400 |
Definition at line 69 of file broadcom.c.
#define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX 0x0200 |
Definition at line 73 of file broadcom.c.
#define MII_BCM54XX_AUXCTL_MISC_RDSEL_MISC 0x7000 |
Definition at line 74 of file broadcom.c.
#define MII_BCM54XX_AUXCTL_MISC_WREN 0x8000 |
Definition at line 72 of file broadcom.c.
#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000 |
Definition at line 77 of file broadcom.c.
#define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL 0x0000 |
Definition at line 77 of file broadcom.c.
#define MII_BCM54XX_AUXCTL_SHDWSEL_MISC 0x0007 |
Definition at line 75 of file broadcom.c.
#define MII_BCM54XX_ECR 0x10 /* BCM54xx extended control register */ |
Definition at line 29 of file broadcom.c.
#define MII_BCM54XX_ECR_IF 0x0800 /* Interrupt force */ |
Definition at line 31 of file broadcom.c.
#define MII_BCM54XX_ECR_IM 0x1000 /* Interrupt mask */ |
Definition at line 30 of file broadcom.c.
#define MII_BCM54XX_ESR 0x11 /* BCM54xx extended status register */ |
Definition at line 33 of file broadcom.c.
#define MII_BCM54XX_ESR_IS 0x1000 /* Interrupt status */ |
Definition at line 34 of file broadcom.c.
#define MII_BCM54XX_EXP_AADJ1CH0 0x001f |
Definition at line 130 of file broadcom.c.
#define MII_BCM54XX_EXP_AADJ1CH0_SWP_ABCD_OEN 0x0200 |
Definition at line 131 of file broadcom.c.
#define MII_BCM54XX_EXP_AADJ1CH0_SWSEL_THPF 0x0100 |
Definition at line 132 of file broadcom.c.
#define MII_BCM54XX_EXP_AADJ1CH3 0x601f |
Definition at line 133 of file broadcom.c.
#define MII_BCM54XX_EXP_AADJ1CH3_ADCCKADJ 0x0002 |
Definition at line 134 of file broadcom.c.
#define MII_BCM54XX_EXP_DATA 0x15 /* Expansion register data */ |
Definition at line 36 of file broadcom.c.
#define MII_BCM54XX_EXP_EXP08 0x0F08 |
Definition at line 135 of file broadcom.c.
#define MII_BCM54XX_EXP_EXP08_EARLY_DAC_WAKE 0x0200 |
Definition at line 137 of file broadcom.c.
#define MII_BCM54XX_EXP_EXP08_RJCT_2MHZ 0x0001 |
Definition at line 136 of file broadcom.c.
#define MII_BCM54XX_EXP_EXP75 0x0f75 |
Definition at line 138 of file broadcom.c.
#define MII_BCM54XX_EXP_EXP75_CM_OSC 0x0001 |
Definition at line 140 of file broadcom.c.
#define MII_BCM54XX_EXP_EXP75_VDACCTRL 0x003c |
Definition at line 139 of file broadcom.c.
#define MII_BCM54XX_EXP_EXP96 0x0f96 |
Definition at line 141 of file broadcom.c.
#define MII_BCM54XX_EXP_EXP96_MYST 0x0010 |
Definition at line 142 of file broadcom.c.
#define MII_BCM54XX_EXP_EXP97 0x0f97 |
Definition at line 143 of file broadcom.c.
#define MII_BCM54XX_EXP_EXP97_MYST 0x0c0c |
Definition at line 144 of file broadcom.c.
#define MII_BCM54XX_EXP_SEL 0x17 /* Expansion register select */ |
Definition at line 37 of file broadcom.c.
#define MII_BCM54XX_EXP_SEL_ER 0x0f00 /* Expansion register select */ |
Definition at line 39 of file broadcom.c.
#define MII_BCM54XX_EXP_SEL_SSD 0x0e00 /* Secondary SerDes select */ |
Definition at line 38 of file broadcom.c.
#define MII_BCM54XX_IMR 0x1b /* BCM54xx interrupt mask register */ |
Definition at line 43 of file broadcom.c.
#define MII_BCM54XX_INT_ANPR 0x0400 /* Auto-negotiation page received */ |
Definition at line 54 of file broadcom.c.
#define MII_BCM54XX_INT_CRCERR 0x0001 /* CRC error */ |
Definition at line 44 of file broadcom.c.
#define MII_BCM54XX_INT_DUPLEX 0x0008 /* Duplex mode changed */ |
Definition at line 47 of file broadcom.c.
#define MII_BCM54XX_INT_HC 0x1000 /* Counter above 32768 */ |
Definition at line 56 of file broadcom.c.
#define MII_BCM54XX_INT_LC 0x0800 /* All counters below 128 */ |
Definition at line 55 of file broadcom.c.
#define MII_BCM54XX_INT_LINK 0x0002 /* Link status changed */ |
Definition at line 45 of file broadcom.c.
#define MII_BCM54XX_INT_LRS 0x0010 /* Local receiver status changed */ |
Definition at line 48 of file broadcom.c.
#define MII_BCM54XX_INT_MDIX 0x2000 /* MDIX status change */ |
Definition at line 57 of file broadcom.c.
#define MII_BCM54XX_INT_NHCD 0x0100 /* No HCD */ |
Definition at line 52 of file broadcom.c.
#define MII_BCM54XX_INT_NHCDL 0x0200 /* No HCD link */ |
Definition at line 53 of file broadcom.c.
#define MII_BCM54XX_INT_PSERR 0x4000 /* Pair swap error */ |
Definition at line 58 of file broadcom.c.
#define MII_BCM54XX_INT_RRS 0x0020 /* Remote receiver status changed */ |
Definition at line 49 of file broadcom.c.
#define MII_BCM54XX_INT_SPEED 0x0004 /* Link speed change */ |
Definition at line 46 of file broadcom.c.
#define MII_BCM54XX_INT_SSERR 0x0040 /* Scrambler synchronization error */ |
Definition at line 50 of file broadcom.c.
#define MII_BCM54XX_INT_UHCD 0x0080 /* Unsupported HCD negotiated */ |
Definition at line 51 of file broadcom.c.
#define MII_BCM54XX_ISR 0x1a /* BCM54xx interrupt status register */ |
Definition at line 42 of file broadcom.c.
#define MII_BCM54XX_SHD 0x1c /* 0x1c shadow registers */ |
Definition at line 60 of file broadcom.c.
Definition at line 63 of file broadcom.c.
Definition at line 62 of file broadcom.c.
#define MII_BCM54XX_SHD_WRITE 0x8000 |
Definition at line 61 of file broadcom.c.
#define MII_BRCM_FET_BRCMTEST 0x1f /* Brcm test register */ |
Definition at line 167 of file broadcom.c.
#define MII_BRCM_FET_BT_SRE 0x0080 /* Shadow register enable */ |
Definition at line 168 of file broadcom.c.
#define MII_BRCM_FET_INTREG 0x1a /* Interrupt register */ |
Definition at line 160 of file broadcom.c.
#define MII_BRCM_FET_IR_DUPLEX_EN 0x0800 /* Duplex mode change enable */ |
Definition at line 164 of file broadcom.c.
#define MII_BRCM_FET_IR_ENABLE 0x4000 /* Interrupt enable */ |
Definition at line 165 of file broadcom.c.
#define MII_BRCM_FET_IR_LINK_EN 0x0200 /* Link status change enable */ |
Definition at line 162 of file broadcom.c.
#define MII_BRCM_FET_IR_MASK 0x0100 /* Mask all interrupts */ |
Definition at line 161 of file broadcom.c.
#define MII_BRCM_FET_IR_SPEED_EN 0x0400 /* Link speed change enable */ |
Definition at line 163 of file broadcom.c.
#define MII_BRCM_FET_SHDW_AM4_LED_MASK 0x0003 |
Definition at line 177 of file broadcom.c.
#define MII_BRCM_FET_SHDW_AM4_LED_MODE1 0x0001 |
Definition at line 178 of file broadcom.c.
#define MII_BRCM_FET_SHDW_AS2_APDE 0x0020 /* Auto power down enable */ |
Definition at line 181 of file broadcom.c.
#define MII_BRCM_FET_SHDW_AUXMODE4 0x1a /* Auxiliary mode 4 */ |
Definition at line 176 of file broadcom.c.
#define MII_BRCM_FET_SHDW_AUXSTAT2 0x1b /* Auxiliary status 2 */ |
Definition at line 180 of file broadcom.c.
#define MII_BRCM_FET_SHDW_MC_FAME 0x4000 /* Force Auto MDIX enable */ |
Definition at line 174 of file broadcom.c.
#define MII_BRCM_FET_SHDW_MISCCTRL 0x10 /* Shadow misc ctrl */ |
Definition at line 173 of file broadcom.c.
MODULE_AUTHOR | ( | "Maciej W. Rozycki" | ) |
MODULE_DEVICE_TABLE | ( | mdio | , |
broadcom_tbl | |||
) |
module_exit | ( | broadcom_exit | ) |
module_init | ( | broadcom_init | ) |
MODULE_LICENSE | ( | "GPL" | ) |