chipcommon.h File Reference

#include "defs.h"

Go to the source code of this file.

Data Structures
struct	chipcregs

Macros
#define	CHIPCREGOFFS(field)   offsetof(struct chipcregs, field)
#define	CID_ID_MASK   0x0000ffff /* Chip Id mask */
#define	CID_REV_MASK   0x000f0000 /* Chip Revision mask */
#define	CID_REV_SHIFT   16 /* Chip Revision shift */
#define	CID_PKG_MASK   0x00f00000 /* Package Option mask */
#define	CID_PKG_SHIFT   20 /* Package Option shift */
#define	CID_CC_MASK   0x0f000000 /* CoreCount (corerev >= 4) */
#define	CID_CC_SHIFT   24
#define	CID_TYPE_MASK   0xf0000000 /* Chip Type */
#define	CID_TYPE_SHIFT   28
#define	CC_CAP_UARTS_MASK   0x00000003 /* Number of UARTs */
#define	CC_CAP_MIPSEB   0x00000004 /* MIPS is in big-endian mode */
#define	CC_CAP_UCLKSEL   0x00000018 /* UARTs clock select */
#define	CC_CAP_UINTCLK   0x00000008
#define	CC_CAP_UARTGPIO   0x00000020 /* UARTs own GPIOs 15:12 */
#define	CC_CAP_EXTBUS_MASK   0x000000c0 /* External bus mask */
#define	CC_CAP_EXTBUS_NONE   0x00000000 /* No ExtBus present */
#define	CC_CAP_EXTBUS_FULL   0x00000040 /* ExtBus: PCMCIA, IDE & Prog */
#define	CC_CAP_EXTBUS_PROG   0x00000080 /* ExtBus: ProgIf only */
#define	CC_CAP_FLASH_MASK   0x00000700 /* Type of flash */
#define	CC_CAP_PLL_MASK   0x00038000 /* Type of PLL */
#define	CC_CAP_PWR_CTL   0x00040000 /* Power control */
#define	CC_CAP_OTPSIZE   0x00380000 /* OTP Size (0 = none) */
#define	CC_CAP_OTPSIZE_SHIFT   19 /* OTP Size shift */
#define	CC_CAP_OTPSIZE_BASE   5 /* OTP Size base */
#define	CC_CAP_JTAGP   0x00400000 /* JTAG Master Present */
#define	CC_CAP_ROM   0x00800000 /* Internal boot rom active */
#define	CC_CAP_BKPLN64   0x08000000 /* 64-bit backplane */
#define	CC_CAP_PMU   0x10000000 /* PMU Present, rev >= 20 */
#define	CC_CAP_SROM   0x40000000 /* Srom Present, rev >= 32 */
#define	CC_CAP_NFLASH   0x80000000
#define	CC_CAP2_SECI   0x00000001 /* SECI Present, rev >= 36 */
#define	CC_CAP2_GSIO   0x00000002
#define	PCAP_REV_MASK   0x000000ff
#define	PCAP_RC_MASK   0x00001f00
#define	PCAP_RC_SHIFT   8
#define	PCAP_TC_MASK   0x0001e000
#define	PCAP_TC_SHIFT   13
#define	PCAP_PC_MASK   0x001e0000
#define	PCAP_PC_SHIFT   17
#define	PCAP_VC_MASK   0x01e00000
#define	PCAP_VC_SHIFT   21
#define	PCAP_CC_MASK   0x1e000000
#define	PCAP_CC_SHIFT   25
#define	PCAP5_PC_MASK   0x003e0000 /* PMU corerev >= 5 */
#define	PCAP5_PC_SHIFT   17
#define	PCAP5_VC_MASK   0x07c00000
#define	PCAP5_VC_SHIFT   22
#define	PCAP5_CC_MASK   0xf8000000
#define	PCAP5_CC_SHIFT   27
#define	PMU_MAX_TRANSITION_DLY   15000

Macro Definition Documentation

#define CC_CAP2_GSIO   0x00000002

Definition at line 259 of file chipcommon.h.

#define CC_CAP2_SECI   0x00000001 /* SECI Present, rev >= 36 */

Definition at line 257 of file chipcommon.h.

#define CC_CAP_BKPLN64   0x08000000 /* 64-bit backplane */

Definition at line 251 of file chipcommon.h.

#define CC_CAP_EXTBUS_FULL   0x00000040 /* ExtBus: PCMCIA, IDE & Prog */

Definition at line 241 of file chipcommon.h.

#define CC_CAP_EXTBUS_MASK   0x000000c0 /* External bus mask */

Definition at line 239 of file chipcommon.h.

#define CC_CAP_EXTBUS_NONE   0x00000000 /* No ExtBus present */

Definition at line 240 of file chipcommon.h.

#define CC_CAP_EXTBUS_PROG   0x00000080 /* ExtBus: ProgIf only */

Definition at line 242 of file chipcommon.h.

#define CC_CAP_FLASH_MASK   0x00000700 /* Type of flash */

Definition at line 243 of file chipcommon.h.

#define CC_CAP_JTAGP   0x00400000 /* JTAG Master Present */

Definition at line 249 of file chipcommon.h.

#define CC_CAP_MIPSEB   0x00000004 /* MIPS is in big-endian mode */

Definition at line 234 of file chipcommon.h.

#define CC_CAP_NFLASH   0x80000000

Definition at line 255 of file chipcommon.h.

#define CC_CAP_OTPSIZE   0x00380000 /* OTP Size (0 = none) */

Definition at line 246 of file chipcommon.h.

#define CC_CAP_OTPSIZE_BASE   5 /* OTP Size base */

Definition at line 248 of file chipcommon.h.

#define CC_CAP_OTPSIZE_SHIFT   19 /* OTP Size shift */

Definition at line 247 of file chipcommon.h.

#define CC_CAP_PLL_MASK   0x00038000 /* Type of PLL */

Definition at line 244 of file chipcommon.h.

#define CC_CAP_PMU   0x10000000 /* PMU Present, rev >= 20 */

Definition at line 252 of file chipcommon.h.

#define CC_CAP_PWR_CTL   0x00040000 /* Power control */

Definition at line 245 of file chipcommon.h.

#define CC_CAP_ROM   0x00800000 /* Internal boot rom active */

Definition at line 250 of file chipcommon.h.

#define CC_CAP_SROM   0x40000000 /* Srom Present, rev >= 32 */

Definition at line 253 of file chipcommon.h.

#define CC_CAP_UARTGPIO   0x00000020 /* UARTs own GPIOs 15:12 */

Definition at line 238 of file chipcommon.h.

#define CC_CAP_UARTS_MASK   0x00000003 /* Number of UARTs */

Definition at line 233 of file chipcommon.h.

#define CC_CAP_UCLKSEL   0x00000018 /* UARTs clock select */

Definition at line 235 of file chipcommon.h.

#define CC_CAP_UINTCLK   0x00000008

Definition at line 237 of file chipcommon.h.

#define CHIPCREGOFFS

(

field

)

offsetof(struct chipcregs, field)

Definition at line 22 of file chipcommon.h.

#define CID_CC_MASK   0x0f000000 /* CoreCount (corerev >= 4) */

Definition at line 227 of file chipcommon.h.

#define CID_CC_SHIFT   24

Definition at line 228 of file chipcommon.h.

#define CID_ID_MASK   0x0000ffff /* Chip Id mask */

Definition at line 222 of file chipcommon.h.

#define CID_PKG_MASK   0x00f00000 /* Package Option mask */

Definition at line 225 of file chipcommon.h.

#define CID_PKG_SHIFT   20 /* Package Option shift */

Definition at line 226 of file chipcommon.h.

#define CID_REV_MASK   0x000f0000 /* Chip Revision mask */

Definition at line 223 of file chipcommon.h.

#define CID_REV_SHIFT   16 /* Chip Revision shift */

Definition at line 224 of file chipcommon.h.

#define CID_TYPE_MASK   0xf0000000 /* Chip Type */

Definition at line 229 of file chipcommon.h.

#define CID_TYPE_SHIFT   28

Definition at line 230 of file chipcommon.h.

#define PCAP5_CC_MASK   0xf8000000

Definition at line 277 of file chipcommon.h.

#define PCAP5_CC_SHIFT   27

Definition at line 278 of file chipcommon.h.

#define PCAP5_PC_MASK   0x003e0000 /* PMU corerev >= 5 */

Definition at line 273 of file chipcommon.h.

#define PCAP5_PC_SHIFT   17

Definition at line 274 of file chipcommon.h.

#define PCAP5_VC_MASK   0x07c00000

Definition at line 275 of file chipcommon.h.

#define PCAP5_VC_SHIFT   22

Definition at line 276 of file chipcommon.h.

#define PCAP_CC_MASK   0x1e000000

Definition at line 271 of file chipcommon.h.

#define PCAP_CC_SHIFT   25

Definition at line 272 of file chipcommon.h.

#define PCAP_PC_MASK   0x001e0000

Definition at line 267 of file chipcommon.h.

#define PCAP_PC_SHIFT   17

Definition at line 268 of file chipcommon.h.

#define PCAP_RC_MASK   0x00001f00

Definition at line 263 of file chipcommon.h.

#define PCAP_RC_SHIFT   8

Definition at line 264 of file chipcommon.h.

#define PCAP_REV_MASK   0x000000ff

Definition at line 262 of file chipcommon.h.

#define PCAP_TC_MASK   0x0001e000

Definition at line 265 of file chipcommon.h.

#define PCAP_TC_SHIFT   13

Definition at line 266 of file chipcommon.h.

#define PCAP_VC_MASK   0x01e00000

Definition at line 269 of file chipcommon.h.

#define PCAP_VC_SHIFT   21

Definition at line 270 of file chipcommon.h.

#define PMU_MAX_TRANSITION_DLY   15000

Definition at line 284 of file chipcommon.h.