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Data Structures | Macros | Functions
chmc.c File Reference
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/list.h>
#include <linux/string.h>
#include <linux/sched.h>
#include <linux/smp.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <asm/spitfire.h>
#include <asm/chmctrl.h>
#include <asm/cpudata.h>
#include <asm/oplib.h>
#include <asm/prom.h>
#include <asm/head.h>
#include <asm/io.h>
#include <asm/memctrl.h>

Go to the source code of this file.

Data Structures

struct  chmc_obp_map
 
struct  chmc_obp_mem_layout
 
struct  chmc_bank_info
 
struct  chmc
 
struct  jbusmc_obp_map
 
struct  jbusmc_obp_mem_layout
 
struct  jbusmc_dimm_group
 
struct  jbusmc
 

Macros

#define DRV_MODULE_NAME   "chmc"
 
#define PFX   DRV_MODULE_NAME ": "
 
#define DRV_MODULE_VERSION   "0.2"
 
#define MC_TYPE_SAFARI   1
 
#define MC_TYPE_JBUS   2
 
#define CHMCTRL_NDGRPS   2
 
#define CHMCTRL_NDIMMS   4
 
#define CHMC_DIMMS_PER_MC   (CHMCTRL_NDGRPS * CHMCTRL_NDIMMS)
 
#define DIMM_LABEL_SZ   8
 
#define CHMCTRL_NBANKS   4
 
#define JBUSMC_REGS_SIZE   8
 
#define JB_MC_REG1_DIMM2_BANK3   0x8000000000000000UL
 
#define JB_MC_REG1_DIMM1_BANK1   0x4000000000000000UL
 
#define JB_MC_REG1_DIMM2_BANK2   0x2000000000000000UL
 
#define JB_MC_REG1_DIMM1_BANK0   0x1000000000000000UL
 
#define JB_MC_REG1_XOR   0x0000010000000000UL
 
#define JB_MC_REG1_ADDR_GEN_2   0x000000e000000000UL
 
#define JB_MC_REG1_ADDR_GEN_2_SHIFT   37
 
#define JB_MC_REG1_ADDR_GEN_1   0x0000001c00000000UL
 
#define JB_MC_REG1_ADDR_GEN_1_SHIFT   34
 
#define JB_MC_REG1_INTERLEAVE   0x0000000001800000UL
 
#define JB_MC_REG1_INTERLEAVE_SHIFT   23
 
#define JB_MC_REG1_DIMM2_PTYPE   0x0000000000200000UL
 
#define JB_MC_REG1_DIMM2_PTYPE_SHIFT   21
 
#define JB_MC_REG1_DIMM1_PTYPE   0x0000000000100000UL
 
#define JB_MC_REG1_DIMM1_PTYPE_SHIFT   20
 
#define PART_TYPE_X8   0
 
#define PART_TYPE_X4   1
 
#define INTERLEAVE_NONE   0
 
#define INTERLEAVE_SAME   1
 
#define INTERLEAVE_INTERNAL   2
 
#define INTERLEAVE_BOTH   3
 
#define ADDR_GEN_128MB   0
 
#define ADDR_GEN_256MB   1
 
#define ADDR_GEN_512MB   2
 
#define ADDR_GEN_1GB   3
 
#define JB_NUM_DIMM_GROUPS   2
 
#define JB_NUM_DIMMS_PER_GROUP   2
 
#define JB_NUM_DIMMS   (JB_NUM_DIMM_GROUPS * JB_NUM_DIMMS_PER_GROUP)
 
#define SYNDROME_MIN   -1
 
#define SYNDROME_MAX   144
 
#define L2_LINE_SIZE   64
 
#define L2_LINE_ADDR_MSK   (L2_LINE_SIZE - 1)
 
#define QW_PER_LINE   4
 
#define QW_BYTES   (L2_LINE_SIZE / QW_PER_LINE)
 
#define QW_BITS   144
 
#define SAFARI_LAST_BIT   (576 - 1)
 
#define JBUS_LAST_BIT   (144 - 1)
 

Functions

 MODULE_AUTHOR ("David S. Miller ([email protected])")
 
 MODULE_DESCRIPTION ("UltraSPARC-III memory controller driver")
 
 MODULE_LICENSE ("GPL")
 
 MODULE_VERSION (DRV_MODULE_VERSION)
 
 MODULE_DEVICE_TABLE (of, us3mc_match)
 
 module_init (us3mc_init)
 
 module_exit (us3mc_cleanup)
 

Macro Definition Documentation

#define ADDR_GEN_128MB   0

Definition at line 131 of file chmc.c.

#define ADDR_GEN_1GB   3

Definition at line 134 of file chmc.c.

#define ADDR_GEN_256MB   1

Definition at line 132 of file chmc.c.

#define ADDR_GEN_512MB   2

Definition at line 133 of file chmc.c.

#define CHMC_DIMMS_PER_MC   (CHMCTRL_NDGRPS * CHMCTRL_NDIMMS)

Definition at line 45 of file chmc.c.

#define CHMCTRL_NBANKS   4

Definition at line 70 of file chmc.c.

#define CHMCTRL_NDGRPS   2

Definition at line 42 of file chmc.c.

#define CHMCTRL_NDIMMS   4

Definition at line 43 of file chmc.c.

#define DIMM_LABEL_SZ   8

Definition at line 53 of file chmc.c.

#define DRV_MODULE_NAME   "chmc"

Definition at line 27 of file chmc.c.

#define DRV_MODULE_VERSION   "0.2"

Definition at line 29 of file chmc.c.

#define INTERLEAVE_BOTH   3

Definition at line 129 of file chmc.c.

#define INTERLEAVE_INTERNAL   2

Definition at line 128 of file chmc.c.

#define INTERLEAVE_NONE   0

Definition at line 126 of file chmc.c.

#define INTERLEAVE_SAME   1

Definition at line 127 of file chmc.c.

#define JB_MC_REG1_ADDR_GEN_1   0x0000001c00000000UL

Definition at line 114 of file chmc.c.

#define JB_MC_REG1_ADDR_GEN_1_SHIFT   34

Definition at line 115 of file chmc.c.

#define JB_MC_REG1_ADDR_GEN_2   0x000000e000000000UL

Definition at line 112 of file chmc.c.

#define JB_MC_REG1_ADDR_GEN_2_SHIFT   37

Definition at line 113 of file chmc.c.

#define JB_MC_REG1_DIMM1_BANK0   0x1000000000000000UL

Definition at line 110 of file chmc.c.

#define JB_MC_REG1_DIMM1_BANK1   0x4000000000000000UL

Definition at line 108 of file chmc.c.

#define JB_MC_REG1_DIMM1_PTYPE   0x0000000000100000UL

Definition at line 120 of file chmc.c.

#define JB_MC_REG1_DIMM1_PTYPE_SHIFT   20

Definition at line 121 of file chmc.c.

#define JB_MC_REG1_DIMM2_BANK2   0x2000000000000000UL

Definition at line 109 of file chmc.c.

#define JB_MC_REG1_DIMM2_BANK3   0x8000000000000000UL

Definition at line 107 of file chmc.c.

#define JB_MC_REG1_DIMM2_PTYPE   0x0000000000200000UL

Definition at line 118 of file chmc.c.

#define JB_MC_REG1_DIMM2_PTYPE_SHIFT   21

Definition at line 119 of file chmc.c.

#define JB_MC_REG1_INTERLEAVE   0x0000000001800000UL

Definition at line 116 of file chmc.c.

#define JB_MC_REG1_INTERLEAVE_SHIFT   23

Definition at line 117 of file chmc.c.

#define JB_MC_REG1_XOR   0x0000010000000000UL

Definition at line 111 of file chmc.c.

#define JB_NUM_DIMM_GROUPS   2

Definition at line 136 of file chmc.c.

#define JB_NUM_DIMMS   (JB_NUM_DIMM_GROUPS * JB_NUM_DIMMS_PER_GROUP)

Definition at line 138 of file chmc.c.

#define JB_NUM_DIMMS_PER_GROUP   2

Definition at line 137 of file chmc.c.

#define JBUS_LAST_BIT   (144 - 1)

Definition at line 227 of file chmc.c.

#define JBUSMC_REGS_SIZE   8

Definition at line 105 of file chmc.c.

#define L2_LINE_ADDR_MSK   (L2_LINE_SIZE - 1)

Definition at line 222 of file chmc.c.

#define L2_LINE_SIZE   64

Definition at line 221 of file chmc.c.

#define MC_TYPE_JBUS   2

Definition at line 38 of file chmc.c.

#define MC_TYPE_SAFARI   1

Definition at line 37 of file chmc.c.

#define PART_TYPE_X4   1

Definition at line 124 of file chmc.c.

#define PART_TYPE_X8   0

Definition at line 123 of file chmc.c.

#define PFX   DRV_MODULE_NAME ": "

Definition at line 28 of file chmc.c.

#define QW_BITS   144

Definition at line 225 of file chmc.c.

#define QW_BYTES   (L2_LINE_SIZE / QW_PER_LINE)

Definition at line 224 of file chmc.c.

#define QW_PER_LINE   4

Definition at line 223 of file chmc.c.

#define SAFARI_LAST_BIT   (576 - 1)

Definition at line 226 of file chmc.c.

#define SYNDROME_MAX   144

Definition at line 198 of file chmc.c.

#define SYNDROME_MIN   -1

Definition at line 197 of file chmc.c.

Function Documentation

MODULE_AUTHOR ( "David S. Miller ([email protected])"  )
MODULE_DESCRIPTION ( "UltraSPARC-III memory controller driver )
MODULE_DEVICE_TABLE ( of  ,
us3mc_match   
)
module_exit ( us3mc_cleanup  )
module_init ( us3mc_init  )
MODULE_LICENSE ( "GPL"  )
MODULE_VERSION ( DRV_MODULE_VERSION  )