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Functions
clkt_clksel.c File Reference
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/bug.h>
#include <plat/clock.h>
#include "clock.h"

Go to the source code of this file.

Functions

u32 omap2_clksel_round_rate_div (struct clk *clk, unsigned long target_rate, u32 *new_div)
 
void omap2_init_clksel_parent (struct clk *clk)
 
unsigned long omap2_clksel_recalc (struct clk *clk)
 
long omap2_clksel_round_rate (struct clk *clk, unsigned long target_rate)
 
int omap2_clksel_set_rate (struct clk *clk, unsigned long rate)
 
int omap2_clksel_set_parent (struct clk *clk, struct clk *new_parent)
 

Function Documentation

unsigned long omap2_clksel_recalc ( struct clk clk)

omap2_clksel_recalc() - function ptr to pass via struct clk .recalc field : struct clk *

This function is intended to be called only by the clock framework. Each clksel clock should have its struct clk .recalc field set to this function. Returns the clock's current rate, based on its parent's rate and its current divisor setting in the hardware.

Definition at line 407 of file clkt_clksel.c.

long omap2_clksel_round_rate ( struct clk clk,
unsigned long  target_rate 
)

omap2_clksel_round_rate() - find rounded rate for the given clock and rate : OMAP struct clk to use : desired clock rate

This function is intended to be called only by the clock framework. Finds best target rate based on the source clock and possible dividers. rates. The divider array must be sorted with smallest divider first.

Returns the rounded clock rate or returns 0xffffffff on error.

Definition at line 437 of file clkt_clksel.c.

u32 omap2_clksel_round_rate_div ( struct clk clk,
unsigned long  target_rate,
u32 new_div 
)

omap2_clksel_round_rate_div() - find divisor for the given clock and rate : OMAP struct clk to use : desired clock rate : ptr to where we should store the divisor

Finds 'best' divider value in an array based on the source and target rates. The divider array must be sorted with smallest divider first. This function is also used by the DPLL3 M2 divider code.

Returns the rounded clock rate or returns 0xffffffff on error.

Definition at line 282 of file clkt_clksel.c.

int omap2_clksel_set_parent ( struct clk clk,
struct clk new_parent 
)

omap2_clksel_set_parent() - change a clock's parent clock : struct clk * of the child clock : struct clk * of the new parent clock

This function is intended to be called only by the clock framework. Change the parent clock of clock to . This is intended to be used while is disabled. This function does not currently check the usecount of the clock, so if multiple drivers are using the clock, and the parent is changed, they will all be affected without any notification. Returns -EINVAL upon error, or 0 upon success.

Definition at line 504 of file clkt_clksel.c.

int omap2_clksel_set_rate ( struct clk clk,
unsigned long  rate 
)

omap2_clksel_set_rate() - program clock rate in hardware : struct clk * to program rate : target rate to program

This function is intended to be called only by the clock framework. Program 's rate to in the hardware. The clock can be either enabled or disabled when this happens, although if the clock is enabled, some downstream devices may glitch or behave unpredictably when the clock rate is changed - this depends on the hardware. This function does not currently check the usecount of the clock, so if multiple drivers are using the clock, and the rate is changed, they will all be affected without any notification. Returns -EINVAL upon error, or 0 upon success.

Definition at line 459 of file clkt_clksel.c.

void omap2_init_clksel_parent ( struct clk clk)

omap2_init_clksel_parent() - set a clksel clk's parent field from the hdwr : OMAP clock struct ptr to use

Given a pointer to a source-selectable struct clk, read the hardware register and determine what its parent is currently set to. Update 's .parent field with the appropriate clk ptr. No return value.

Definition at line 354 of file clkt_clksel.c.