clkt_dpll.c File Reference

#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <asm/div64.h>
#include <plat/clock.h>
#include "soc.h"
#include "clock.h"
#include "cm-regbits-24xx.h"
#include "cm-regbits-34xx.h"

Go to the source code of this file.

Macros
#define	DPLL_MIN_MULTIPLIER   2
#define	DPLL_MIN_DIVIDER   1
#define	DPLL_MULT_UNDERFLOW   -1
#define	DPLL_SCALE_FACTOR   64
#define	DPLL_SCALE_BASE   2
#define	DPLL_ROUNDING_VAL
#define	OMAP3430_DPLL_FINT_BAND1_MIN   750000
#define	OMAP3430_DPLL_FINT_BAND1_MAX   2100000
#define	OMAP3430_DPLL_FINT_BAND2_MIN   7500000
#define	OMAP3430_DPLL_FINT_BAND2_MAX   21000000
#define	OMAP3PLUS_DPLL_FINT_JTYPE_MIN   500000
#define	OMAP3PLUS_DPLL_FINT_JTYPE_MAX   2500000
#define	OMAP3PLUS_DPLL_FINT_MIN   32000
#define	OMAP3PLUS_DPLL_FINT_MAX   52000000
#define	DPLL_FINT_UNDERFLOW   -1
#define	DPLL_FINT_INVALID   -2

Functions
void	omap2_init_dpll_parent (struct clk *clk)
u32	omap2_get_dpll_rate (struct clk *clk)
long	omap2_dpll_round_rate (struct clk *clk, unsigned long target_rate)

Macro Definition Documentation

#define DPLL_FINT_INVALID   -2

Definition at line 66 of file clkt_dpll.c.

#define DPLL_FINT_UNDERFLOW   -1

Definition at line 65 of file clkt_dpll.c.

#define DPLL_MIN_DIVIDER   1

Definition at line 33 of file clkt_dpll.c.

#define DPLL_MIN_MULTIPLIER   2

Definition at line 32 of file clkt_dpll.c.

#define DPLL_MULT_UNDERFLOW   -1

Definition at line 36 of file clkt_dpll.c.

#define DPLL_ROUNDING_VAL

Value:

((DPLL_SCALE_BASE / 2) * \
                     (DPLL_SCALE_FACTOR / DPLL_SCALE_BASE))

Definition at line 46 of file clkt_dpll.c.

#define DPLL_SCALE_BASE   2

Definition at line 45 of file clkt_dpll.c.

#define DPLL_SCALE_FACTOR   64

Definition at line 44 of file clkt_dpll.c.

#define OMAP3430_DPLL_FINT_BAND1_MAX   2100000

Definition at line 51 of file clkt_dpll.c.

#define OMAP3430_DPLL_FINT_BAND1_MIN   750000

Definition at line 50 of file clkt_dpll.c.

#define OMAP3430_DPLL_FINT_BAND2_MAX   21000000

Definition at line 53 of file clkt_dpll.c.

#define OMAP3430_DPLL_FINT_BAND2_MIN   7500000

Definition at line 52 of file clkt_dpll.c.

#define OMAP3PLUS_DPLL_FINT_JTYPE_MAX   2500000

Definition at line 60 of file clkt_dpll.c.

#define OMAP3PLUS_DPLL_FINT_JTYPE_MIN   500000

Definition at line 59 of file clkt_dpll.c.

#define OMAP3PLUS_DPLL_FINT_MAX   52000000

Definition at line 62 of file clkt_dpll.c.

#define OMAP3PLUS_DPLL_FINT_MIN   32000

Definition at line 61 of file clkt_dpll.c.

Function Documentation

long omap2_dpll_round_rate	(	struct clk *	clk,
		unsigned long	target_rate
	)

omap2_dpll_round_rate - round a target rate for an OMAP DPLL : struct clk * for a DPLL : desired DPLL clock rate

Given a DPLL and a desired target rate, round the target rate to a possible, programmable rate for this DPLL. Attempts to select the minimum possible n. Stores the computed (m, n) in the DPLL's dpll_data structure so set_rate() will not need to call this (expensive) function again. Returns ~0 if the target rate cannot be rounded, or the rounded rate upon success.

Definition at line 293 of file clkt_dpll.c.

u32 omap2_get_dpll_rate

(

struct clk *

clk

)

omap2_get_dpll_rate - returns the current DPLL CLKOUT rate : struct clk * of a DPLL

DPLLs can be locked or bypassed - basically, enabled or disabled. When locked, the DPLL output depends on the M and N values. When bypassed, on OMAP2xxx, the output rate is either the 32KiHz clock or sys_clk. Bypass rates on OMAP3 depend on the DPLL: DPLLs 1 and 2 are bypassed with dpll1_fclk and dpll2_fclk respectively (generated by DPLL3), while DPLL 3, 4, and 5 bypass rates are sys_clk. Returns the current DPLL CLKOUT rate (not CLKOUTX2) if the DPLL is locked, or the appropriate bypass rate if the DPLL is bypassed, or 0 if the clock is not a DPLL.

Definition at line 237 of file clkt_dpll.c.

void omap2_init_dpll_parent

(

struct clk *

clk

)

Definition at line 192 of file clkt_dpll.c.