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Linux Kernel
3.7.1
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#include <linux/module.h>#include <linux/kernel.h>#include <linux/init.h>#include <linux/list.h>#include <linux/io.h>#include <linux/clk.h>#include <mach/addr-map.h>#include "common.h"#include "clock.h"Go to the source code of this file.
Macros | |
| #define | APBC_RTC APBC_REG(0x000) |
| #define | APBC_TWSI1 APBC_REG(0x004) |
| #define | APBC_TWSI2 APBC_REG(0x008) |
| #define | APBC_TWSI3 APBC_REG(0x00c) |
| #define | APBC_TWSI4 APBC_REG(0x010) |
| #define | APBC_KPC APBC_REG(0x018) |
| #define | APBC_UART1 APBC_REG(0x02c) |
| #define | APBC_UART2 APBC_REG(0x030) |
| #define | APBC_UART3 APBC_REG(0x034) |
| #define | APBC_GPIO APBC_REG(0x038) |
| #define | APBC_PWM0 APBC_REG(0x03c) |
| #define | APBC_PWM1 APBC_REG(0x040) |
| #define | APBC_PWM2 APBC_REG(0x044) |
| #define | APBC_PWM3 APBC_REG(0x048) |
| #define | APBC_SSP0 APBC_REG(0x04c) |
| #define | APBC_SSP1 APBC_REG(0x050) |
| #define | APBC_SSP2 APBC_REG(0x054) |
| #define | APBC_SSP3 APBC_REG(0x058) |
| #define | APBC_SSP4 APBC_REG(0x05c) |
| #define | APBC_SSP5 APBC_REG(0x060) |
| #define | APBC_TWSI5 APBC_REG(0x07c) |
| #define | APBC_TWSI6 APBC_REG(0x080) |
| #define | APBC_UART4 APBC_REG(0x088) |
| #define | APMU_USB APMU_REG(0x05c) |
| #define | APMU_NAND APMU_REG(0x060) |
| #define | APMU_SDH0 APMU_REG(0x054) |
| #define | APMU_SDH1 APMU_REG(0x058) |
| #define | APMU_SDH2 APMU_REG(0x0e8) |
| #define | APMU_SDH3 APMU_REG(0x0ec) |
Functions | |
| void __init | mmp2_clk_init (void) |
Variables | |
| struct clkops | sdhc_clk_ops |
| #define APBC_GPIO APBC_REG(0x038) |
Definition at line 25 of file clock-mmp2.c.
| #define APBC_KPC APBC_REG(0x018) |
Definition at line 21 of file clock-mmp2.c.
| #define APBC_PWM0 APBC_REG(0x03c) |
Definition at line 26 of file clock-mmp2.c.
| #define APBC_PWM1 APBC_REG(0x040) |
Definition at line 27 of file clock-mmp2.c.
| #define APBC_PWM2 APBC_REG(0x044) |
Definition at line 28 of file clock-mmp2.c.
| #define APBC_PWM3 APBC_REG(0x048) |
Definition at line 29 of file clock-mmp2.c.
| #define APBC_RTC APBC_REG(0x000) |
Definition at line 16 of file clock-mmp2.c.
| #define APBC_SSP0 APBC_REG(0x04c) |
Definition at line 30 of file clock-mmp2.c.
| #define APBC_SSP1 APBC_REG(0x050) |
Definition at line 31 of file clock-mmp2.c.
| #define APBC_SSP2 APBC_REG(0x054) |
Definition at line 32 of file clock-mmp2.c.
| #define APBC_SSP3 APBC_REG(0x058) |
Definition at line 33 of file clock-mmp2.c.
| #define APBC_SSP4 APBC_REG(0x05c) |
Definition at line 34 of file clock-mmp2.c.
| #define APBC_SSP5 APBC_REG(0x060) |
Definition at line 35 of file clock-mmp2.c.
| #define APBC_TWSI1 APBC_REG(0x004) |
Definition at line 17 of file clock-mmp2.c.
| #define APBC_TWSI2 APBC_REG(0x008) |
Definition at line 18 of file clock-mmp2.c.
| #define APBC_TWSI3 APBC_REG(0x00c) |
Definition at line 19 of file clock-mmp2.c.
| #define APBC_TWSI4 APBC_REG(0x010) |
Definition at line 20 of file clock-mmp2.c.
| #define APBC_TWSI5 APBC_REG(0x07c) |
Definition at line 36 of file clock-mmp2.c.
| #define APBC_TWSI6 APBC_REG(0x080) |
Definition at line 37 of file clock-mmp2.c.
| #define APBC_UART1 APBC_REG(0x02c) |
Definition at line 22 of file clock-mmp2.c.
| #define APBC_UART2 APBC_REG(0x030) |
Definition at line 23 of file clock-mmp2.c.
| #define APBC_UART3 APBC_REG(0x034) |
Definition at line 24 of file clock-mmp2.c.
| #define APBC_UART4 APBC_REG(0x088) |
Definition at line 38 of file clock-mmp2.c.
| #define APMU_NAND APMU_REG(0x060) |
Definition at line 41 of file clock-mmp2.c.
| #define APMU_SDH0 APMU_REG(0x054) |
Definition at line 42 of file clock-mmp2.c.
| #define APMU_SDH1 APMU_REG(0x058) |
Definition at line 43 of file clock-mmp2.c.
| #define APMU_SDH2 APMU_REG(0x0e8) |
Definition at line 44 of file clock-mmp2.c.
| #define APMU_SDH3 APMU_REG(0x0ec) |
Definition at line 45 of file clock-mmp2.c.
| #define APMU_USB APMU_REG(0x05c) |
Definition at line 40 of file clock-mmp2.c.
Definition at line 108 of file clock-mmp2.c.
Definition at line 65 of file clock-mmp2.c.
1.8.2