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Data Structures | Macros | Functions | Variables
cs46xx.h File Reference
#include <sound/pcm.h>
#include <sound/pcm-indirect.h>
#include <sound/rawmidi.h>
#include <sound/ac97_codec.h>
#include "cs46xx_dsp_spos.h"

Go to the source code of this file.

Data Structures

struct  snd_cs46xx_pcm
 
struct  snd_cs46xx_region
 
struct  snd_cs46xx
 

Macros

#define BA0_HISR   0x00000000
 
#define BA0_HSR0   0x00000004
 
#define BA0_HICR   0x00000008
 
#define BA0_DMSR   0x00000100
 
#define BA0_HSAR   0x00000110
 
#define BA0_HDAR   0x00000114
 
#define BA0_HDMR   0x00000118
 
#define BA0_HDCR   0x0000011C
 
#define BA0_PFMC   0x00000200
 
#define BA0_PFCV1   0x00000204
 
#define BA0_PFCV2   0x00000208
 
#define BA0_PCICFG00   0x00000300
 
#define BA0_PCICFG04   0x00000304
 
#define BA0_PCICFG08   0x00000308
 
#define BA0_PCICFG0C   0x0000030C
 
#define BA0_PCICFG10   0x00000310
 
#define BA0_PCICFG14   0x00000314
 
#define BA0_PCICFG18   0x00000318
 
#define BA0_PCICFG1C   0x0000031C
 
#define BA0_PCICFG20   0x00000320
 
#define BA0_PCICFG24   0x00000324
 
#define BA0_PCICFG28   0x00000328
 
#define BA0_PCICFG2C   0x0000032C
 
#define BA0_PCICFG30   0x00000330
 
#define BA0_PCICFG34   0x00000334
 
#define BA0_PCICFG38   0x00000338
 
#define BA0_PCICFG3C   0x0000033C
 
#define BA0_CLKCR1   0x00000400
 
#define BA0_CLKCR2   0x00000404
 
#define BA0_PLLM   0x00000408
 
#define BA0_PLLCC   0x0000040C
 
#define BA0_FRR   0x00000410
 
#define BA0_CFL1   0x00000414
 
#define BA0_CFL2   0x00000418
 
#define BA0_SERMC1   0x00000420
 
#define BA0_SERMC2   0x00000424
 
#define BA0_SERC1   0x00000428
 
#define BA0_SERC2   0x0000042C
 
#define BA0_SERC3   0x00000430
 
#define BA0_SERC4   0x00000434
 
#define BA0_SERC5   0x00000438
 
#define BA0_SERBSP   0x0000043C
 
#define BA0_SERBST   0x00000440
 
#define BA0_SERBCM   0x00000444
 
#define BA0_SERBAD   0x00000448
 
#define BA0_SERBCF   0x0000044C
 
#define BA0_SERBWP   0x00000450
 
#define BA0_SERBRP   0x00000454
 
#define BA0_ASER_FADDR   0x00000458
 
#define BA0_ACCTL   0x00000460
 
#define BA0_ACSTS   0x00000464
 
#define BA0_ACOSV   0x00000468
 
#define BA0_ACCAD   0x0000046C
 
#define BA0_ACCDA   0x00000470
 
#define BA0_ACISV   0x00000474
 
#define BA0_ACSAD   0x00000478
 
#define BA0_ACSDA   0x0000047C
 
#define BA0_JSPT   0x00000480
 
#define BA0_JSCTL   0x00000484
 
#define BA0_JSC1   0x00000488
 
#define BA0_JSC2   0x0000048C
 
#define BA0_MIDCR   0x00000490
 
#define BA0_MIDSR   0x00000494
 
#define BA0_MIDWP   0x00000498
 
#define BA0_MIDRP   0x0000049C
 
#define BA0_JSIO   0x000004A0
 
#define BA0_ASER_MASTER   0x000004A4
 
#define BA0_CFGI   0x000004B0
 
#define BA0_SSVID   0x000004B4
 
#define BA0_GPIOR   0x000004B8
 
#define BA0_EGPIODR   0x000004BC
 
#define BA0_EGPIOPTR   0x000004C0
 
#define BA0_EGPIOTR   0x000004C4
 
#define BA0_EGPIOWR   0x000004C8
 
#define BA0_EGPIOSR   0x000004CC
 
#define BA0_SERC6   0x000004D0
 
#define BA0_SERC7   0x000004D4
 
#define BA0_SERACC   0x000004D8
 
#define BA0_ACCTL2   0x000004E0
 
#define BA0_ACSTS2   0x000004E4
 
#define BA0_ACOSV2   0x000004E8
 
#define BA0_ACCAD2   0x000004EC
 
#define BA0_ACCDA2   0x000004F0
 
#define BA0_ACISV2   0x000004F4
 
#define BA0_ACSAD2   0x000004F8
 
#define BA0_ACSDA2   0x000004FC
 
#define BA0_IOTAC0   0x00000500
 
#define BA0_IOTAC1   0x00000504
 
#define BA0_IOTAC2   0x00000508
 
#define BA0_IOTAC3   0x0000050C
 
#define BA0_IOTAC4   0x00000510
 
#define BA0_IOTAC5   0x00000514
 
#define BA0_IOTAC6   0x00000518
 
#define BA0_IOTAC7   0x0000051C
 
#define BA0_IOTAC8   0x00000520
 
#define BA0_IOTAC9   0x00000524
 
#define BA0_IOTAC10   0x00000528
 
#define BA0_IOTAC11   0x0000052C
 
#define BA0_IOTFR0   0x00000540
 
#define BA0_IOTFR1   0x00000544
 
#define BA0_IOTFR2   0x00000548
 
#define BA0_IOTFR3   0x0000054C
 
#define BA0_IOTFR4   0x00000550
 
#define BA0_IOTFR5   0x00000554
 
#define BA0_IOTFR6   0x00000558
 
#define BA0_IOTFR7   0x0000055C
 
#define BA0_IOTFIFO   0x00000580
 
#define BA0_IOTRRD   0x00000584
 
#define BA0_IOTFP   0x00000588
 
#define BA0_IOTCR   0x0000058C
 
#define BA0_DPCID   0x00000590
 
#define BA0_DPCIA   0x00000594
 
#define BA0_DPCIC   0x00000598
 
#define BA0_PCPCIR   0x00000600
 
#define BA0_PCPCIG   0x00000604
 
#define BA0_PCPCIEN   0x00000608
 
#define BA0_EPCIPMC   0x00000610
 
#define BA1_SP_DMEM0   0x00000000
 
#define BA1_SP_DMEM1   0x00010000
 
#define BA1_SP_PMEM   0x00020000
 
#define BA1_SP_REG   0x00030000
 
#define BA1_SPCR   0x00030000
 
#define BA1_DREG   0x00030004
 
#define BA1_DSRWP   0x00030008
 
#define BA1_TWPR   0x0003000C
 
#define BA1_SPWR   0x00030010
 
#define BA1_SPIR   0x00030014
 
#define BA1_FGR1   0x00030020
 
#define BA1_SPCS   0x00030028
 
#define BA1_SDSR   0x0003002C
 
#define BA1_FRMT   0x00030030
 
#define BA1_FRCC   0x00030034
 
#define BA1_FRSC   0x00030038
 
#define BA1_OMNI_MEM   0x000E0000
 
#define HISR_VC_MASK   0x0000FFFF
 
#define HISR_VC0   0x00000001
 
#define HISR_VC1   0x00000002
 
#define HISR_VC2   0x00000004
 
#define HISR_VC3   0x00000008
 
#define HISR_VC4   0x00000010
 
#define HISR_VC5   0x00000020
 
#define HISR_VC6   0x00000040
 
#define HISR_VC7   0x00000080
 
#define HISR_VC8   0x00000100
 
#define HISR_VC9   0x00000200
 
#define HISR_VC10   0x00000400
 
#define HISR_VC11   0x00000800
 
#define HISR_VC12   0x00001000
 
#define HISR_VC13   0x00002000
 
#define HISR_VC14   0x00004000
 
#define HISR_VC15   0x00008000
 
#define HISR_INT0   0x00010000
 
#define HISR_INT1   0x00020000
 
#define HISR_DMAI   0x00040000
 
#define HISR_FROVR   0x00080000
 
#define HISR_MIDI   0x00100000
 
#define HISR_SBINT   0x00200000
 
#define HISR_RESERVED   0x0FC00000
 
#define HISR_H0P   0x40000000
 
#define HISR_INTENA   0x80000000
 
#define HSR0_VC_MASK   0xFFFFFFFF
 
#define HSR0_VC16   0x00000001
 
#define HSR0_VC17   0x00000002
 
#define HSR0_VC18   0x00000004
 
#define HSR0_VC19   0x00000008
 
#define HSR0_VC20   0x00000010
 
#define HSR0_VC21   0x00000020
 
#define HSR0_VC22   0x00000040
 
#define HSR0_VC23   0x00000080
 
#define HSR0_VC24   0x00000100
 
#define HSR0_VC25   0x00000200
 
#define HSR0_VC26   0x00000400
 
#define HSR0_VC27   0x00000800
 
#define HSR0_VC28   0x00001000
 
#define HSR0_VC29   0x00002000
 
#define HSR0_VC30   0x00004000
 
#define HSR0_VC31   0x00008000
 
#define HSR0_VC32   0x00010000
 
#define HSR0_VC33   0x00020000
 
#define HSR0_VC34   0x00040000
 
#define HSR0_VC35   0x00080000
 
#define HSR0_VC36   0x00100000
 
#define HSR0_VC37   0x00200000
 
#define HSR0_VC38   0x00400000
 
#define HSR0_VC39   0x00800000
 
#define HSR0_VC40   0x01000000
 
#define HSR0_VC41   0x02000000
 
#define HSR0_VC42   0x04000000
 
#define HSR0_VC43   0x08000000
 
#define HSR0_VC44   0x10000000
 
#define HSR0_VC45   0x20000000
 
#define HSR0_VC46   0x40000000
 
#define HSR0_VC47   0x80000000
 
#define HICR_IEV   0x00000001
 
#define HICR_CHGM   0x00000002
 
#define DMSR_HP   0x00000001
 
#define DMSR_HR   0x00000002
 
#define DMSR_SP   0x00000004
 
#define DMSR_SR   0x00000008
 
#define HSAR_HOST_ADDR_MASK   0xFFFFFFFF
 
#define HSAR_DSP_ADDR_MASK   0x0000FFFF
 
#define HSAR_MEMID_MASK   0x000F0000
 
#define HSAR_MEMID_SP_DMEM0   0x00000000
 
#define HSAR_MEMID_SP_DMEM1   0x00010000
 
#define HSAR_MEMID_SP_PMEM   0x00020000
 
#define HSAR_MEMID_SP_DEBUG   0x00030000
 
#define HSAR_MEMID_OMNI_MEM   0x000E0000
 
#define HSAR_END   0x40000000
 
#define HSAR_ERR   0x80000000
 
#define HDAR_HOST_ADDR_MASK   0xFFFFFFFF
 
#define HDAR_DSP_ADDR_MASK   0x0000FFFF
 
#define HDAR_MEMID_MASK   0x000F0000
 
#define HDAR_MEMID_SP_DMEM0   0x00000000
 
#define HDAR_MEMID_SP_DMEM1   0x00010000
 
#define HDAR_MEMID_SP_PMEM   0x00020000
 
#define HDAR_MEMID_SP_DEBUG   0x00030000
 
#define HDAR_MEMID_OMNI_MEM   0x000E0000
 
#define HDAR_END   0x40000000
 
#define HDAR_ERR   0x80000000
 
#define HDMR_AC_MASK   0x0000F000
 
#define HDMR_AC_8_16   0x00001000
 
#define HDMR_AC_M_S   0x00002000
 
#define HDMR_AC_B_L   0x00004000
 
#define HDMR_AC_S_U   0x00008000
 
#define HDCR_COUNT_MASK   0x000003FF
 
#define HDCR_DONE   0x00004000
 
#define HDCR_OPT   0x00008000
 
#define HDCR_WBD   0x00400000
 
#define HDCR_WBS   0x00800000
 
#define HDCR_DMS_MASK   0x07000000
 
#define HDCR_DMS_LINEAR   0x00000000
 
#define HDCR_DMS_16_DWORDS   0x01000000
 
#define HDCR_DMS_32_DWORDS   0x02000000
 
#define HDCR_DMS_64_DWORDS   0x03000000
 
#define HDCR_DMS_128_DWORDS   0x04000000
 
#define HDCR_DMS_256_DWORDS   0x05000000
 
#define HDCR_DMS_512_DWORDS   0x06000000
 
#define HDCR_DMS_1024_DWORDS   0x07000000
 
#define HDCR_DH   0x08000000
 
#define HDCR_SMS_MASK   0x70000000
 
#define HDCR_SMS_LINEAR   0x00000000
 
#define HDCR_SMS_16_DWORDS   0x10000000
 
#define HDCR_SMS_32_DWORDS   0x20000000
 
#define HDCR_SMS_64_DWORDS   0x30000000
 
#define HDCR_SMS_128_DWORDS   0x40000000
 
#define HDCR_SMS_256_DWORDS   0x50000000
 
#define HDCR_SMS_512_DWORDS   0x60000000
 
#define HDCR_SMS_1024_DWORDS   0x70000000
 
#define HDCR_SH   0x80000000
 
#define HDCR_COUNT_SHIFT   0
 
#define PFMC_C1SS_MASK   0x0000001F
 
#define PFMC_C1EV   0x00000020
 
#define PFMC_C1RS   0x00008000
 
#define PFMC_C2SS_MASK   0x001F0000
 
#define PFMC_C2EV   0x00200000
 
#define PFMC_C2RS   0x80000000
 
#define PFMC_C1SS_SHIFT   0
 
#define PFMC_C2SS_SHIFT   16
 
#define PFMC_BUS_GRANT   0
 
#define PFMC_GRANT_AFTER_REQ   1
 
#define PFMC_TRANSACTION   2
 
#define PFMC_DWORD_TRANSFER   3
 
#define PFMC_SLAVE_READ   4
 
#define PFMC_SLAVE_WRITE   5
 
#define PFMC_PREEMPTION   6
 
#define PFMC_DISCONNECT_RETRY   7
 
#define PFMC_INTERRUPT   8
 
#define PFMC_BUS_OWNERSHIP   9
 
#define PFMC_TRANSACTION_LAG   10
 
#define PFMC_PCI_CLOCK   11
 
#define PFMC_SERIAL_CLOCK   12
 
#define PFMC_SP_CLOCK   13
 
#define PFCV1_PC1V_MASK   0xFFFFFFFF
 
#define PFCV1_PC1V_SHIFT   0
 
#define PFCV2_PC2V_MASK   0xFFFFFFFF
 
#define PFCV2_PC2V_SHIFT   0
 
#define CLKCR1_OSCS   0x00000001
 
#define CLKCR1_OSCP   0x00000002
 
#define CLKCR1_PLLSS_MASK   0x0000000C
 
#define CLKCR1_PLLSS_SERIAL   0x00000000
 
#define CLKCR1_PLLSS_CRYSTAL   0x00000004
 
#define CLKCR1_PLLSS_PCI   0x00000008
 
#define CLKCR1_PLLSS_RESERVED   0x0000000C
 
#define CLKCR1_PLLP   0x00000010
 
#define CLKCR1_SWCE   0x00000020
 
#define CLKCR1_PLLOS   0x00000040
 
#define CLKCR2_PDIVS_MASK   0x0000000F
 
#define CLKCR2_PDIVS_1   0x00000001
 
#define CLKCR2_PDIVS_2   0x00000002
 
#define CLKCR2_PDIVS_4   0x00000004
 
#define CLKCR2_PDIVS_7   0x00000007
 
#define CLKCR2_PDIVS_8   0x00000008
 
#define CLKCR2_PDIVS_16   0x00000000
 
#define PLLM_MASK   0x000000FF
 
#define PLLM_SHIFT   0
 
#define PLLCC_CDR_MASK   0x00000007
 
#define PLLCC_CDR_240_350_MHZ   0x00000000
 
#define PLLCC_CDR_184_265_MHZ   0x00000001
 
#define PLLCC_CDR_144_205_MHZ   0x00000002
 
#define PLLCC_CDR_111_160_MHZ   0x00000003
 
#define PLLCC_CDR_87_123_MHZ   0x00000004
 
#define PLLCC_CDR_67_96_MHZ   0x00000005
 
#define PLLCC_CDR_52_74_MHZ   0x00000006
 
#define PLLCC_CDR_45_58_MHZ   0x00000007
 
#define PLLCC_CDR_271_398_MHZ   0x00000000
 
#define PLLCC_CDR_227_330_MHZ   0x00000001
 
#define PLLCC_CDR_167_239_MHZ   0x00000002
 
#define PLLCC_CDR_150_215_MHZ   0x00000003
 
#define PLLCC_CDR_107_154_MHZ   0x00000004
 
#define PLLCC_CDR_98_140_MHZ   0x00000005
 
#define PLLCC_CDR_73_104_MHZ   0x00000006
 
#define PLLCC_CDR_63_90_MHZ   0x00000007
 
#define PLLCC_LPF_MASK   0x000000F8
 
#define PLLCC_LPF_23850_60000_KHZ   0x00000000
 
#define PLLCC_LPF_7960_26290_KHZ   0x00000008
 
#define PLLCC_LPF_4160_10980_KHZ   0x00000018
 
#define PLLCC_LPF_1740_4580_KHZ   0x00000038
 
#define PLLCC_LPF_724_1910_KHZ   0x00000078
 
#define PLLCC_LPF_317_798_KHZ   0x000000F8
 
#define PLLCC_LPF_25580_64530_KHZ   0x00000000
 
#define PLLCC_LPF_14360_37270_KHZ   0x00000008
 
#define PLLCC_LPF_6100_16020_KHZ   0x00000018
 
#define PLLCC_LPF_2540_6690_KHZ   0x00000038
 
#define PLLCC_LPF_1050_2780_KHZ   0x00000078
 
#define PLLCC_LPF_450_1160_KHZ   0x000000F8
 
#define FRR_FAB_MASK   0x00000003
 
#define FRR_MASK_MASK   0x0000001C
 
#define FRR_CFOP_MASK   0x00000FE0
 
#define FRR_CFOP_NOT_DVD   0x00000020
 
#define FRR_CFOP_A3D   0x00000040
 
#define FRR_CFOP_128_PIN   0x00000080
 
#define FRR_CFOP_CS4280   0x00000800
 
#define FRR_FAB_SHIFT   0
 
#define FRR_MASK_SHIFT   2
 
#define FRR_CFOP_SHIFT   5
 
#define CFL1_CLOCK_SOURCE_MASK   0x00000003
 
#define CFL1_CLOCK_SOURCE_CS423X   0x00000000
 
#define CFL1_CLOCK_SOURCE_AC97   0x00000001
 
#define CFL1_CLOCK_SOURCE_CRYSTAL   0x00000002
 
#define CFL1_CLOCK_SOURCE_DUAL_AC97   0x00000003
 
#define CFL1_VALID_DATA_MASK   0x000000FF
 
#define CFL2_VALID_DATA_MASK   0x000000FF
 
#define SERMC1_MSPE   0x00000001
 
#define SERMC1_PTC_MASK   0x0000000E
 
#define SERMC1_PTC_CS423X   0x00000000
 
#define SERMC1_PTC_AC97   0x00000002
 
#define SERMC1_PTC_DAC   0x00000004
 
#define SERMC1_PLB   0x00000010
 
#define SERMC1_XLB   0x00000020
 
#define SERMC2_LROE   0x00000001
 
#define SERMC2_MCOE   0x00000002
 
#define SERMC2_MCDIV   0x00000004
 
#define SERC1_SO1EN   0x00000001
 
#define SERC1_SO1F_MASK   0x0000000E
 
#define SERC1_SO1F_CS423X   0x00000000
 
#define SERC1_SO1F_AC97   0x00000002
 
#define SERC1_SO1F_DAC   0x00000004
 
#define SERC1_SO1F_SPDIF   0x00000006
 
#define SERC2_SI1EN   0x00000001
 
#define SERC2_SI1F_MASK   0x0000000E
 
#define SERC2_SI1F_CS423X   0x00000000
 
#define SERC2_SI1F_AC97   0x00000002
 
#define SERC2_SI1F_ADC   0x00000004
 
#define SERC2_SI1F_SPDIF   0x00000006
 
#define SERC3_SO2EN   0x00000001
 
#define SERC3_SO2F_MASK   0x00000006
 
#define SERC3_SO2F_DAC   0x00000000
 
#define SERC3_SO2F_SPDIF   0x00000002
 
#define SERC4_SO3EN   0x00000001
 
#define SERC4_SO3F_MASK   0x00000006
 
#define SERC4_SO3F_DAC   0x00000000
 
#define SERC4_SO3F_SPDIF   0x00000002
 
#define SERC5_SI2EN   0x00000001
 
#define SERC5_SI2F_MASK   0x00000006
 
#define SERC5_SI2F_ADC   0x00000000
 
#define SERC5_SI2F_SPDIF   0x00000002
 
#define SERBSP_FSP_MASK   0x0000000F
 
#define SERBSP_FSP_SHIFT   0
 
#define SERBST_RRDY   0x00000001
 
#define SERBST_WBSY   0x00000002
 
#define SERBCM_RDC   0x00000001
 
#define SERBCM_WRC   0x00000002
 
#define SERBAD_FAD_MASK   0x000001FF
 
#define SERBAD_FAD_SHIFT   0
 
#define SERBCF_HBP   0x00000001
 
#define SERBWP_FWD_MASK   0x000FFFFF
 
#define SERBWP_FWD_SHIFT   0
 
#define SERBRP_FRD_MASK   0x000FFFFF
 
#define SERBRP_FRD_SHIFT   0
 
#define ASER_FADDR_A1_MASK   0x000001FF
 
#define ASER_FADDR_EN1   0x00008000
 
#define ASER_FADDR_A2_MASK   0x01FF0000
 
#define ASER_FADDR_EN2   0x80000000
 
#define ASER_FADDR_A1_SHIFT   0
 
#define ASER_FADDR_A2_SHIFT   16
 
#define ACCTL_RSTN   0x00000001
 
#define ACCTL_ESYN   0x00000002
 
#define ACCTL_VFRM   0x00000004
 
#define ACCTL_DCV   0x00000008
 
#define ACCTL_CRW   0x00000010
 
#define ACCTL_ASYN   0x00000020
 
#define ACCTL_TC   0x00000040
 
#define ACSTS_CRDY   0x00000001
 
#define ACSTS_VSTS   0x00000002
 
#define ACSTS_WKUP   0x00000004
 
#define ACOSV_SLV3   0x00000001
 
#define ACOSV_SLV4   0x00000002
 
#define ACOSV_SLV5   0x00000004
 
#define ACOSV_SLV6   0x00000008
 
#define ACOSV_SLV7   0x00000010
 
#define ACOSV_SLV8   0x00000020
 
#define ACOSV_SLV9   0x00000040
 
#define ACOSV_SLV10   0x00000080
 
#define ACOSV_SLV11   0x00000100
 
#define ACOSV_SLV12   0x00000200
 
#define ACCAD_CI_MASK   0x0000007F
 
#define ACCAD_CI_SHIFT   0
 
#define ACCDA_CD_MASK   0x0000FFFF
 
#define ACCDA_CD_SHIFT   0
 
#define ACISV_ISV3   0x00000001
 
#define ACISV_ISV4   0x00000002
 
#define ACISV_ISV5   0x00000004
 
#define ACISV_ISV6   0x00000008
 
#define ACISV_ISV7   0x00000010
 
#define ACISV_ISV8   0x00000020
 
#define ACISV_ISV9   0x00000040
 
#define ACISV_ISV10   0x00000080
 
#define ACISV_ISV11   0x00000100
 
#define ACISV_ISV12   0x00000200
 
#define ACSAD_SI_MASK   0x0000007F
 
#define ACSAD_SI_SHIFT   0
 
#define ACSDA_SD_MASK   0x0000FFFF
 
#define ACSDA_SD_SHIFT   0
 
#define JSPT_CAX   0x00000001
 
#define JSPT_CAY   0x00000002
 
#define JSPT_CBX   0x00000004
 
#define JSPT_CBY   0x00000008
 
#define JSPT_BA1   0x00000010
 
#define JSPT_BA2   0x00000020
 
#define JSPT_BB1   0x00000040
 
#define JSPT_BB2   0x00000080
 
#define JSCTL_SP_MASK   0x00000003
 
#define JSCTL_SP_SLOW   0x00000000
 
#define JSCTL_SP_MEDIUM_SLOW   0x00000001
 
#define JSCTL_SP_MEDIUM_FAST   0x00000002
 
#define JSCTL_SP_FAST   0x00000003
 
#define JSCTL_ARE   0x00000004
 
#define JSC1_Y1V_MASK   0x0000FFFF
 
#define JSC1_X1V_MASK   0xFFFF0000
 
#define JSC1_Y1V_SHIFT   0
 
#define JSC1_X1V_SHIFT   16
 
#define JSC2_Y2V_MASK   0x0000FFFF
 
#define JSC2_X2V_MASK   0xFFFF0000
 
#define JSC2_Y2V_SHIFT   0
 
#define JSC2_X2V_SHIFT   16
 
#define MIDCR_TXE   0x00000001 /* Enable transmitting. */
 
#define MIDCR_RXE   0x00000002 /* Enable receiving. */
 
#define MIDCR_RIE   0x00000004 /* Interrupt upon tx ready. */
 
#define MIDCR_TIE   0x00000008 /* Interrupt upon rx ready. */
 
#define MIDCR_MLB   0x00000010 /* Enable midi loopback. */
 
#define MIDCR_MRST   0x00000020 /* Reset interface. */
 
#define MIDSR_TBF   0x00000001 /* Tx FIFO is full. */
 
#define MIDSR_RBE   0x00000002 /* Rx FIFO is empty. */
 
#define MIDWP_MWD_MASK   0x000000FF
 
#define MIDWP_MWD_SHIFT   0
 
#define MIDRP_MRD_MASK   0x000000FF
 
#define MIDRP_MRD_SHIFT   0
 
#define JSIO_DAX   0x00000001
 
#define JSIO_DAY   0x00000002
 
#define JSIO_DBX   0x00000004
 
#define JSIO_DBY   0x00000008
 
#define JSIO_AXOE   0x00000010
 
#define JSIO_AYOE   0x00000020
 
#define JSIO_BXOE   0x00000040
 
#define JSIO_BYOE   0x00000080
 
#define ASER_MASTER_ME   0x00000001
 
#define CFGI_CLK   0x00000001
 
#define CFGI_DOUT   0x00000002
 
#define CFGI_DIN_EEN   0x00000004
 
#define CFGI_EELD   0x00000008
 
#define SSVID_VID_MASK   0x0000FFFF
 
#define SSVID_SID_MASK   0xFFFF0000
 
#define SSVID_VID_SHIFT   0
 
#define SSVID_SID_SHIFT   16
 
#define GPIOR_VOLDN   0x00000001
 
#define GPIOR_VOLUP   0x00000002
 
#define GPIOR_SI2D   0x00000004
 
#define GPIOR_SI2OE   0x00000008
 
#define EGPIODR_GPOE0   0x00000001
 
#define EGPIODR_GPOE1   0x00000002
 
#define EGPIODR_GPOE2   0x00000004
 
#define EGPIODR_GPOE3   0x00000008
 
#define EGPIODR_GPOE4   0x00000010
 
#define EGPIODR_GPOE5   0x00000020
 
#define EGPIODR_GPOE6   0x00000040
 
#define EGPIODR_GPOE7   0x00000080
 
#define EGPIODR_GPOE8   0x00000100
 
#define EGPIOPTR_GPPT0   0x00000001
 
#define EGPIOPTR_GPPT1   0x00000002
 
#define EGPIOPTR_GPPT2   0x00000004
 
#define EGPIOPTR_GPPT3   0x00000008
 
#define EGPIOPTR_GPPT4   0x00000010
 
#define EGPIOPTR_GPPT5   0x00000020
 
#define EGPIOPTR_GPPT6   0x00000040
 
#define EGPIOPTR_GPPT7   0x00000080
 
#define EGPIOPTR_GPPT8   0x00000100
 
#define EGPIOTR_GPS0   0x00000001
 
#define EGPIOTR_GPS1   0x00000002
 
#define EGPIOTR_GPS2   0x00000004
 
#define EGPIOTR_GPS3   0x00000008
 
#define EGPIOTR_GPS4   0x00000010
 
#define EGPIOTR_GPS5   0x00000020
 
#define EGPIOTR_GPS6   0x00000040
 
#define EGPIOTR_GPS7   0x00000080
 
#define EGPIOTR_GPS8   0x00000100
 
#define EGPIOWR_GPW0   0x00000001
 
#define EGPIOWR_GPW1   0x00000002
 
#define EGPIOWR_GPW2   0x00000004
 
#define EGPIOWR_GPW3   0x00000008
 
#define EGPIOWR_GPW4   0x00000010
 
#define EGPIOWR_GPW5   0x00000020
 
#define EGPIOWR_GPW6   0x00000040
 
#define EGPIOWR_GPW7   0x00000080
 
#define EGPIOWR_GPW8   0x00000100
 
#define EGPIOSR_GPS0   0x00000001
 
#define EGPIOSR_GPS1   0x00000002
 
#define EGPIOSR_GPS2   0x00000004
 
#define EGPIOSR_GPS3   0x00000008
 
#define EGPIOSR_GPS4   0x00000010
 
#define EGPIOSR_GPS5   0x00000020
 
#define EGPIOSR_GPS6   0x00000040
 
#define EGPIOSR_GPS7   0x00000080
 
#define EGPIOSR_GPS8   0x00000100
 
#define SERC6_ASDO2EN   0x00000001
 
#define SERC7_ASDI2EN   0x00000001
 
#define SERC7_POSILB   0x00000002
 
#define SERC7_SIPOLB   0x00000004
 
#define SERC7_SOSILB   0x00000008
 
#define SERC7_SISOLB   0x00000010
 
#define SERACC_CHIP_TYPE_MASK   0x00000001
 
#define SERACC_CHIP_TYPE_1_03   0x00000000
 
#define SERACC_CHIP_TYPE_2_0   0x00000001
 
#define SERACC_TWO_CODECS   0x00000002
 
#define SERACC_MDM   0x00000004
 
#define SERACC_HSP   0x00000008
 
#define SERACC_ODT   0x00000010 /* only CS4630 */
 
#define ACCTL2_RSTN   0x00000001
 
#define ACCTL2_ESYN   0x00000002
 
#define ACCTL2_VFRM   0x00000004
 
#define ACCTL2_DCV   0x00000008
 
#define ACCTL2_CRW   0x00000010
 
#define ACCTL2_ASYN   0x00000020
 
#define ACSTS2_CRDY   0x00000001
 
#define ACSTS2_VSTS   0x00000002
 
#define ACOSV2_SLV3   0x00000001
 
#define ACOSV2_SLV4   0x00000002
 
#define ACOSV2_SLV5   0x00000004
 
#define ACOSV2_SLV6   0x00000008
 
#define ACOSV2_SLV7   0x00000010
 
#define ACOSV2_SLV8   0x00000020
 
#define ACOSV2_SLV9   0x00000040
 
#define ACOSV2_SLV10   0x00000080
 
#define ACOSV2_SLV11   0x00000100
 
#define ACOSV2_SLV12   0x00000200
 
#define ACCAD2_CI_MASK   0x0000007F
 
#define ACCAD2_CI_SHIFT   0
 
#define ACCDA2_CD_MASK   0x0000FFFF
 
#define ACCDA2_CD_SHIFT   0
 
#define ACISV2_ISV3   0x00000001
 
#define ACISV2_ISV4   0x00000002
 
#define ACISV2_ISV5   0x00000004
 
#define ACISV2_ISV6   0x00000008
 
#define ACISV2_ISV7   0x00000010
 
#define ACISV2_ISV8   0x00000020
 
#define ACISV2_ISV9   0x00000040
 
#define ACISV2_ISV10   0x00000080
 
#define ACISV2_ISV11   0x00000100
 
#define ACISV2_ISV12   0x00000200
 
#define ACSAD2_SI_MASK   0x0000007F
 
#define ACSAD2_SI_SHIFT   0
 
#define ACSDA2_SD_MASK   0x0000FFFF
 
#define ACSDA2_SD_SHIFT   0
 
#define IOTAC_SA_MASK   0x0000FFFF
 
#define IOTAC_MSK_MASK   0x000F0000
 
#define IOTAC_IODC_MASK   0x06000000
 
#define IOTAC_IODC_16_BIT   0x00000000
 
#define IOTAC_IODC_10_BIT   0x02000000
 
#define IOTAC_IODC_12_BIT   0x04000000
 
#define IOTAC_WSPI   0x08000000
 
#define IOTAC_RSPI   0x10000000
 
#define IOTAC_WSE   0x20000000
 
#define IOTAC_WE   0x40000000
 
#define IOTAC_RE   0x80000000
 
#define IOTAC_SA_SHIFT   0
 
#define IOTAC_MSK_SHIFT   16
 
#define IOTFR_D_MASK   0x0000FFFF
 
#define IOTFR_A_MASK   0x000F0000
 
#define IOTFR_R_MASK   0x0F000000
 
#define IOTFR_ALL   0x40000000
 
#define IOTFR_VL   0x80000000
 
#define IOTFR_D_SHIFT   0
 
#define IOTFR_A_SHIFT   16
 
#define IOTFR_R_SHIFT   24
 
#define IOTFIFO_BA_MASK   0x00003FFF
 
#define IOTFIFO_S_MASK   0x00FF0000
 
#define IOTFIFO_OF   0x40000000
 
#define IOTFIFO_SPIOF   0x80000000
 
#define IOTFIFO_BA_SHIFT   0
 
#define IOTFIFO_S_SHIFT   16
 
#define IOTRRD_D_MASK   0x0000FFFF
 
#define IOTRRD_RDV   0x80000000
 
#define IOTRRD_D_SHIFT   0
 
#define IOTFP_CA_MASK   0x00003FFF
 
#define IOTFP_PA_MASK   0x3FFF0000
 
#define IOTFP_CA_SHIFT   0
 
#define IOTFP_PA_SHIFT   16
 
#define IOTCR_ITD   0x00000001
 
#define IOTCR_HRV   0x00000002
 
#define IOTCR_SRV   0x00000004
 
#define IOTCR_DTI   0x00000008
 
#define IOTCR_DFI   0x00000010
 
#define IOTCR_DDP   0x00000020
 
#define IOTCR_JTE   0x00000040
 
#define IOTCR_PPE   0x00000080
 
#define DPCID_D_MASK   0xFFFFFFFF
 
#define DPCID_D_SHIFT   0
 
#define DPCIA_A_MASK   0xFFFFFFFF
 
#define DPCIA_A_SHIFT   0
 
#define DPCIC_C_MASK   0x0000000F
 
#define DPCIC_C_IOREAD   0x00000002
 
#define DPCIC_C_IOWRITE   0x00000003
 
#define DPCIC_BE_MASK   0x000000F0
 
#define PCPCIR_RDC_MASK   0x00000007
 
#define PCPCIR_C_MASK   0x00007000
 
#define PCPCIR_REQ   0x00008000
 
#define PCPCIR_RDC_SHIFT   0
 
#define PCPCIR_C_SHIFT   12
 
#define PCPCIG_GDC_MASK   0x00000007
 
#define PCPCIG_VL   0x00008000
 
#define PCPCIG_GDC_SHIFT   0
 
#define PCPCIEN_EN   0x00000001
 
#define EPCIPMC_GWU   0x00000001
 
#define EPCIPMC_FSPC   0x00000002
 
#define SPCR_RUN   0x00000001
 
#define SPCR_STPFR   0x00000002
 
#define SPCR_RUNFR   0x00000004
 
#define SPCR_TICK   0x00000008
 
#define SPCR_DRQEN   0x00000020
 
#define SPCR_RSTSP   0x00000040
 
#define SPCR_OREN   0x00000080
 
#define SPCR_PCIINT   0x00000100
 
#define SPCR_OINTD   0x00000200
 
#define SPCR_CRE   0x00008000
 
#define DREG_REGID_MASK   0x0000007F
 
#define DREG_DEBUG   0x00000080
 
#define DREG_RGBK_MASK   0x00000700
 
#define DREG_TRAP   0x00000800
 
#define DREG_TRAPX   0x00001000
 
#define DREG_REGID_SHIFT   0
 
#define DREG_RGBK_SHIFT   8
 
#define DREG_RGBK_REGID_MASK   0x0000077F
 
#define DREG_REGID_R0   0x00000010
 
#define DREG_REGID_R1   0x00000011
 
#define DREG_REGID_R2   0x00000012
 
#define DREG_REGID_R3   0x00000013
 
#define DREG_REGID_R4   0x00000014
 
#define DREG_REGID_R5   0x00000015
 
#define DREG_REGID_R6   0x00000016
 
#define DREG_REGID_R7   0x00000017
 
#define DREG_REGID_R8   0x00000018
 
#define DREG_REGID_R9   0x00000019
 
#define DREG_REGID_RA   0x0000001A
 
#define DREG_REGID_RB   0x0000001B
 
#define DREG_REGID_RC   0x0000001C
 
#define DREG_REGID_RD   0x0000001D
 
#define DREG_REGID_RE   0x0000001E
 
#define DREG_REGID_RF   0x0000001F
 
#define DREG_REGID_RA_BUS_LOW   0x00000020
 
#define DREG_REGID_RA_BUS_HIGH   0x00000038
 
#define DREG_REGID_YBUS_LOW   0x00000050
 
#define DREG_REGID_YBUS_HIGH   0x00000058
 
#define DREG_REGID_TRAP_0   0x00000100
 
#define DREG_REGID_TRAP_1   0x00000101
 
#define DREG_REGID_TRAP_2   0x00000102
 
#define DREG_REGID_TRAP_3   0x00000103
 
#define DREG_REGID_TRAP_4   0x00000104
 
#define DREG_REGID_TRAP_5   0x00000105
 
#define DREG_REGID_TRAP_6   0x00000106
 
#define DREG_REGID_TRAP_7   0x00000107
 
#define DREG_REGID_INDIRECT_ADDRESS   0x0000010E
 
#define DREG_REGID_TOP_OF_STACK   0x0000010F
 
#define DREG_REGID_TRAP_8   0x00000110
 
#define DREG_REGID_TRAP_9   0x00000111
 
#define DREG_REGID_TRAP_10   0x00000112
 
#define DREG_REGID_TRAP_11   0x00000113
 
#define DREG_REGID_TRAP_12   0x00000114
 
#define DREG_REGID_TRAP_13   0x00000115
 
#define DREG_REGID_TRAP_14   0x00000116
 
#define DREG_REGID_TRAP_15   0x00000117
 
#define DREG_REGID_TRAP_16   0x00000118
 
#define DREG_REGID_TRAP_17   0x00000119
 
#define DREG_REGID_TRAP_18   0x0000011A
 
#define DREG_REGID_TRAP_19   0x0000011B
 
#define DREG_REGID_TRAP_20   0x0000011C
 
#define DREG_REGID_TRAP_21   0x0000011D
 
#define DREG_REGID_TRAP_22   0x0000011E
 
#define DREG_REGID_TRAP_23   0x0000011F
 
#define DREG_REGID_RSA0_LOW   0x00000200
 
#define DREG_REGID_RSA0_HIGH   0x00000201
 
#define DREG_REGID_RSA1_LOW   0x00000202
 
#define DREG_REGID_RSA1_HIGH   0x00000203
 
#define DREG_REGID_RSA2   0x00000204
 
#define DREG_REGID_RSA3   0x00000205
 
#define DREG_REGID_RSI0_LOW   0x00000206
 
#define DREG_REGID_RSI0_HIGH   0x00000207
 
#define DREG_REGID_RSI1   0x00000208
 
#define DREG_REGID_RSI2   0x00000209
 
#define DREG_REGID_SAGUSTATUS   0x0000020A
 
#define DREG_REGID_RSCONFIG01_LOW   0x0000020B
 
#define DREG_REGID_RSCONFIG01_HIGH   0x0000020C
 
#define DREG_REGID_RSCONFIG23_LOW   0x0000020D
 
#define DREG_REGID_RSCONFIG23_HIGH   0x0000020E
 
#define DREG_REGID_RSDMA01E   0x0000020F
 
#define DREG_REGID_RSDMA23E   0x00000210
 
#define DREG_REGID_RSD0_LOW   0x00000211
 
#define DREG_REGID_RSD0_HIGH   0x00000212
 
#define DREG_REGID_RSD1_LOW   0x00000213
 
#define DREG_REGID_RSD1_HIGH   0x00000214
 
#define DREG_REGID_RSD2_LOW   0x00000215
 
#define DREG_REGID_RSD2_HIGH   0x00000216
 
#define DREG_REGID_RSD3_LOW   0x00000217
 
#define DREG_REGID_RSD3_HIGH   0x00000218
 
#define DREG_REGID_SRAR_HIGH   0x0000021A
 
#define DREG_REGID_SRAR_LOW   0x0000021B
 
#define DREG_REGID_DMA_STATE   0x0000021C
 
#define DREG_REGID_CURRENT_DMA_STREAM   0x0000021D
 
#define DREG_REGID_NEXT_DMA_STREAM   0x0000021E
 
#define DREG_REGID_CPU_STATUS   0x00000300
 
#define DREG_REGID_MAC_MODE   0x00000301
 
#define DREG_REGID_STACK_AND_REPEAT   0x00000302
 
#define DREG_REGID_INDEX0   0x00000304
 
#define DREG_REGID_INDEX1   0x00000305
 
#define DREG_REGID_DMA_STATE_0_3   0x00000400
 
#define DREG_REGID_DMA_STATE_4_7   0x00000404
 
#define DREG_REGID_DMA_STATE_8_11   0x00000408
 
#define DREG_REGID_DMA_STATE_12_15   0x0000040C
 
#define DREG_REGID_DMA_STATE_16_19   0x00000410
 
#define DREG_REGID_DMA_STATE_20_23   0x00000414
 
#define DREG_REGID_DMA_STATE_24_27   0x00000418
 
#define DREG_REGID_DMA_STATE_28_31   0x0000041C
 
#define DREG_REGID_DMA_STATE_32_35   0x00000420
 
#define DREG_REGID_DMA_STATE_36_39   0x00000424
 
#define DREG_REGID_DMA_STATE_40_43   0x00000428
 
#define DREG_REGID_DMA_STATE_44_47   0x0000042C
 
#define DREG_REGID_DMA_STATE_48_51   0x00000430
 
#define DREG_REGID_DMA_STATE_52_55   0x00000434
 
#define DREG_REGID_DMA_STATE_56_59   0x00000438
 
#define DREG_REGID_DMA_STATE_60_63   0x0000043C
 
#define DREG_REGID_DMA_STATE_64_67   0x00000440
 
#define DREG_REGID_DMA_STATE_68_71   0x00000444
 
#define DREG_REGID_DMA_STATE_72_75   0x00000448
 
#define DREG_REGID_DMA_STATE_76_79   0x0000044C
 
#define DREG_REGID_DMA_STATE_80_83   0x00000450
 
#define DREG_REGID_DMA_STATE_84_87   0x00000454
 
#define DREG_REGID_DMA_STATE_88_91   0x00000458
 
#define DREG_REGID_DMA_STATE_92_95   0x0000045C
 
#define DREG_REGID_TRAP_SELECT   0x00000500
 
#define DREG_REGID_TRAP_WRITE_0   0x00000500
 
#define DREG_REGID_TRAP_WRITE_1   0x00000501
 
#define DREG_REGID_TRAP_WRITE_2   0x00000502
 
#define DREG_REGID_TRAP_WRITE_3   0x00000503
 
#define DREG_REGID_TRAP_WRITE_4   0x00000504
 
#define DREG_REGID_TRAP_WRITE_5   0x00000505
 
#define DREG_REGID_TRAP_WRITE_6   0x00000506
 
#define DREG_REGID_TRAP_WRITE_7   0x00000507
 
#define DREG_REGID_TRAP_WRITE_8   0x00000510
 
#define DREG_REGID_TRAP_WRITE_9   0x00000511
 
#define DREG_REGID_TRAP_WRITE_10   0x00000512
 
#define DREG_REGID_TRAP_WRITE_11   0x00000513
 
#define DREG_REGID_TRAP_WRITE_12   0x00000514
 
#define DREG_REGID_TRAP_WRITE_13   0x00000515
 
#define DREG_REGID_TRAP_WRITE_14   0x00000516
 
#define DREG_REGID_TRAP_WRITE_15   0x00000517
 
#define DREG_REGID_TRAP_WRITE_16   0x00000518
 
#define DREG_REGID_TRAP_WRITE_17   0x00000519
 
#define DREG_REGID_TRAP_WRITE_18   0x0000051A
 
#define DREG_REGID_TRAP_WRITE_19   0x0000051B
 
#define DREG_REGID_TRAP_WRITE_20   0x0000051C
 
#define DREG_REGID_TRAP_WRITE_21   0x0000051D
 
#define DREG_REGID_TRAP_WRITE_22   0x0000051E
 
#define DREG_REGID_TRAP_WRITE_23   0x0000051F
 
#define DREG_REGID_MAC0_ACC0_LOW   0x00000600
 
#define DREG_REGID_MAC0_ACC1_LOW   0x00000601
 
#define DREG_REGID_MAC0_ACC2_LOW   0x00000602
 
#define DREG_REGID_MAC0_ACC3_LOW   0x00000603
 
#define DREG_REGID_MAC1_ACC0_LOW   0x00000604
 
#define DREG_REGID_MAC1_ACC1_LOW   0x00000605
 
#define DREG_REGID_MAC1_ACC2_LOW   0x00000606
 
#define DREG_REGID_MAC1_ACC3_LOW   0x00000607
 
#define DREG_REGID_MAC0_ACC0_MID   0x00000608
 
#define DREG_REGID_MAC0_ACC1_MID   0x00000609
 
#define DREG_REGID_MAC0_ACC2_MID   0x0000060A
 
#define DREG_REGID_MAC0_ACC3_MID   0x0000060B
 
#define DREG_REGID_MAC1_ACC0_MID   0x0000060C
 
#define DREG_REGID_MAC1_ACC1_MID   0x0000060D
 
#define DREG_REGID_MAC1_ACC2_MID   0x0000060E
 
#define DREG_REGID_MAC1_ACC3_MID   0x0000060F
 
#define DREG_REGID_MAC0_ACC0_HIGH   0x00000610
 
#define DREG_REGID_MAC0_ACC1_HIGH   0x00000611
 
#define DREG_REGID_MAC0_ACC2_HIGH   0x00000612
 
#define DREG_REGID_MAC0_ACC3_HIGH   0x00000613
 
#define DREG_REGID_MAC1_ACC0_HIGH   0x00000614
 
#define DREG_REGID_MAC1_ACC1_HIGH   0x00000615
 
#define DREG_REGID_MAC1_ACC2_HIGH   0x00000616
 
#define DREG_REGID_MAC1_ACC3_HIGH   0x00000617
 
#define DREG_REGID_RSHOUT_LOW   0x00000620
 
#define DREG_REGID_RSHOUT_MID   0x00000628
 
#define DREG_REGID_RSHOUT_HIGH   0x00000630
 
#define DSRWP_DSR_MASK   0x0000000F
 
#define DSRWP_DSR_BG_RQ   0x00000001
 
#define DSRWP_DSR_PRIORITY_MASK   0x00000006
 
#define DSRWP_DSR_PRIORITY_0   0x00000000
 
#define DSRWP_DSR_PRIORITY_1   0x00000002
 
#define DSRWP_DSR_PRIORITY_2   0x00000004
 
#define DSRWP_DSR_PRIORITY_3   0x00000006
 
#define DSRWP_DSR_RQ_PENDING   0x00000008
 
#define TWPR_TW_MASK   0x0000FFFF
 
#define TWPR_TW_SHIFT   0
 
#define SPWR_STKP_MASK   0x0000000F
 
#define SPWR_STKP_SHIFT   0
 
#define SPIR_FRI   0x00000001
 
#define SPIR_DOI   0x00000002
 
#define SPIR_GPI2   0x00000004
 
#define SPIR_GPI3   0x00000008
 
#define SPIR_IP0   0x00000010
 
#define SPIR_IP1   0x00000020
 
#define SPIR_IP2   0x00000040
 
#define SPIR_IP3   0x00000080
 
#define FGR1_F1S_MASK   0x0000FFFF
 
#define FGR1_F1S_SHIFT   0
 
#define SPCS_FRI   0x00000001
 
#define SPCS_DOI   0x00000002
 
#define SPCS_GPI2   0x00000004
 
#define SPCS_GPI3   0x00000008
 
#define SPCS_IP0   0x00000010
 
#define SPCS_IP1   0x00000020
 
#define SPCS_IP2   0x00000040
 
#define SPCS_IP3   0x00000080
 
#define SPCS_SPRUN   0x00000100
 
#define SPCS_SLEEP   0x00000200
 
#define SPCS_FG   0x00000400
 
#define SPCS_ORUN   0x00000800
 
#define SPCS_IRQ   0x00001000
 
#define SPCS_FGN_MASK   0x0000E000
 
#define SPCS_FGN_SHIFT   13
 
#define SDSR_DCS_MASK   0x000000FF
 
#define SDSR_DCS_SHIFT   0
 
#define SDSR_DCS_NONE   0x00000007
 
#define FRMT_FTV_MASK   0x0000FFFF
 
#define FRMT_FTV_SHIFT   0
 
#define FRCC_FCC_MASK   0x0000FFFF
 
#define FRCC_FCC_SHIFT   0
 
#define FRSC_FCS_MASK   0x0000FFFF
 
#define FRSC_FCS_SHIFT   0
 
#define DMA_SG_NEXT_ENTRY_MASK   0x00000FF8
 
#define DMA_SG_SAMPLE_END_MASK   0x0FFF0000
 
#define DMA_SG_SAMPLE_END_FLAG   0x10000000
 
#define DMA_SG_LOOP_END_FLAG   0x20000000
 
#define DMA_SG_SIGNAL_END_FLAG   0x40000000
 
#define DMA_SG_SIGNAL_PAGE_FLAG   0x80000000
 
#define DMA_SG_NEXT_ENTRY_SHIFT   3
 
#define DMA_SG_SAMPLE_END_SHIFT   16
 
#define DMA_RQ_CONTROL1   0x00000000
 
#define DMA_RQ_CONTROL2   0x00000004
 
#define DMA_RQ_SOURCE_ADDR   0x00000008
 
#define DMA_RQ_DESTINATION_ADDR   0x0000000C
 
#define DMA_RQ_NEXT_PAGE_ADDR   0x00000010
 
#define DMA_RQ_NEXT_PAGE_SGDESC   0x00000014
 
#define DMA_RQ_LOOP_START_ADDR   0x00000018
 
#define DMA_RQ_POST_LOOP_ADDR   0x0000001C
 
#define DMA_RQ_PAGE_MAP_ADDR   0x00000020
 
#define DMA_RQ_C1_COUNT_MASK   0x000003FF
 
#define DMA_RQ_C1_DESTINATION_SCATTER   0x00001000
 
#define DMA_RQ_C1_SOURCE_GATHER   0x00002000
 
#define DMA_RQ_C1_DONE_FLAG   0x00004000
 
#define DMA_RQ_C1_OPTIMIZE_STATE   0x00008000
 
#define DMA_RQ_C1_SAMPLE_END_STATE_MASK   0x00030000
 
#define DMA_RQ_C1_FULL_PAGE   0x00000000
 
#define DMA_RQ_C1_BEFORE_SAMPLE_END   0x00010000
 
#define DMA_RQ_C1_PAGE_MAP_ERROR   0x00020000
 
#define DMA_RQ_C1_AT_SAMPLE_END   0x00030000
 
#define DMA_RQ_C1_LOOP_END_STATE_MASK   0x000C0000
 
#define DMA_RQ_C1_NOT_LOOP_END   0x00000000
 
#define DMA_RQ_C1_BEFORE_LOOP_END   0x00040000
 
#define DMA_RQ_C1_2PAGE_LOOP_BEGIN   0x00080000
 
#define DMA_RQ_C1_LOOP_BEGIN   0x000C0000
 
#define DMA_RQ_C1_PAGE_MAP_MASK   0x00300000
 
#define DMA_RQ_C1_PM_NONE_PENDING   0x00000000
 
#define DMA_RQ_C1_PM_NEXT_PENDING   0x00100000
 
#define DMA_RQ_C1_PM_RESERVED   0x00200000
 
#define DMA_RQ_C1_PM_LOOP_NEXT_PENDING   0x00300000
 
#define DMA_RQ_C1_WRITEBACK_DEST_FLAG   0x00400000
 
#define DMA_RQ_C1_WRITEBACK_SRC_FLAG   0x00800000
 
#define DMA_RQ_C1_DEST_SIZE_MASK   0x07000000
 
#define DMA_RQ_C1_DEST_LINEAR   0x00000000
 
#define DMA_RQ_C1_DEST_MOD16   0x01000000
 
#define DMA_RQ_C1_DEST_MOD32   0x02000000
 
#define DMA_RQ_C1_DEST_MOD64   0x03000000
 
#define DMA_RQ_C1_DEST_MOD128   0x04000000
 
#define DMA_RQ_C1_DEST_MOD256   0x05000000
 
#define DMA_RQ_C1_DEST_MOD512   0x06000000
 
#define DMA_RQ_C1_DEST_MOD1024   0x07000000
 
#define DMA_RQ_C1_DEST_ON_HOST   0x08000000
 
#define DMA_RQ_C1_SOURCE_SIZE_MASK   0x70000000
 
#define DMA_RQ_C1_SOURCE_LINEAR   0x00000000
 
#define DMA_RQ_C1_SOURCE_MOD16   0x10000000
 
#define DMA_RQ_C1_SOURCE_MOD32   0x20000000
 
#define DMA_RQ_C1_SOURCE_MOD64   0x30000000
 
#define DMA_RQ_C1_SOURCE_MOD128   0x40000000
 
#define DMA_RQ_C1_SOURCE_MOD256   0x50000000
 
#define DMA_RQ_C1_SOURCE_MOD512   0x60000000
 
#define DMA_RQ_C1_SOURCE_MOD1024   0x70000000
 
#define DMA_RQ_C1_SOURCE_ON_HOST   0x80000000
 
#define DMA_RQ_C1_COUNT_SHIFT   0
 
#define DMA_RQ_C2_VIRTUAL_CHANNEL_MASK   0x0000003F
 
#define DMA_RQ_C2_VIRTUAL_SIGNAL_MASK   0x00000300
 
#define DMA_RQ_C2_NO_VIRTUAL_SIGNAL   0x00000000
 
#define DMA_RQ_C2_SIGNAL_EVERY_DMA   0x00000100
 
#define DMA_RQ_C2_SIGNAL_SOURCE_PINGPONG   0x00000200
 
#define DMA_RQ_C2_SIGNAL_DEST_PINGPONG   0x00000300
 
#define DMA_RQ_C2_AUDIO_CONVERT_MASK   0x0000F000
 
#define DMA_RQ_C2_AC_NONE   0x00000000
 
#define DMA_RQ_C2_AC_8_TO_16_BIT   0x00001000
 
#define DMA_RQ_C2_AC_MONO_TO_STEREO   0x00002000
 
#define DMA_RQ_C2_AC_ENDIAN_CONVERT   0x00004000
 
#define DMA_RQ_C2_AC_SIGNED_CONVERT   0x00008000
 
#define DMA_RQ_C2_LOOP_END_MASK   0x0FFF0000
 
#define DMA_RQ_C2_LOOP_MASK   0x30000000
 
#define DMA_RQ_C2_NO_LOOP   0x00000000
 
#define DMA_RQ_C2_ONE_PAGE_LOOP   0x10000000
 
#define DMA_RQ_C2_TWO_PAGE_LOOP   0x20000000
 
#define DMA_RQ_C2_MULTI_PAGE_LOOP   0x30000000
 
#define DMA_RQ_C2_SIGNAL_LOOP_BACK   0x40000000
 
#define DMA_RQ_C2_SIGNAL_POST_BEGIN_PAGE   0x80000000
 
#define DMA_RQ_C2_VIRTUAL_CHANNEL_SHIFT   0
 
#define DMA_RQ_C2_LOOP_END_SHIFT   16
 
#define DMA_RQ_SD_ADDRESS_MASK   0x0000FFFF
 
#define DMA_RQ_SD_MEMORY_ID_MASK   0x000F0000
 
#define DMA_RQ_SD_SP_PARAM_ADDR   0x00000000
 
#define DMA_RQ_SD_SP_SAMPLE_ADDR   0x00010000
 
#define DMA_RQ_SD_SP_PROGRAM_ADDR   0x00020000
 
#define DMA_RQ_SD_SP_DEBUG_ADDR   0x00030000
 
#define DMA_RQ_SD_OMNIMEM_ADDR   0x000E0000
 
#define DMA_RQ_SD_END_FLAG   0x40000000
 
#define DMA_RQ_SD_ERROR_FLAG   0x80000000
 
#define DMA_RQ_SD_ADDRESS_SHIFT   0
 
#define DMA_RQ_PMA_LOOP_THIRD_PAGE_ENTRY_MASK   0x00000FF8
 
#define DMA_RQ_PMA_PAGE_TABLE_MASK   0xFFFFF000
 
#define DMA_RQ_PMA_LOOP_THIRD_PAGE_ENTRY_SHIFT   3
 
#define DMA_RQ_PMA_PAGE_TABLE_SHIFT   12
 
#define BA1_VARIDEC_BUF_1   0x000
 
#define BA1_PDTC   0x0c0 /* BA1_PLAY_DMA_TRANSACTION_COUNT_REG */
 
#define BA1_PFIE   0x0c4 /* BA1_PLAY_FORMAT_&_INTERRUPT_ENABLE_REG */
 
#define BA1_PBA   0x0c8 /* BA1_PLAY_BUFFER_ADDRESS */
 
#define BA1_PVOL   0x0f8 /* BA1_PLAY_VOLUME_REG */
 
#define BA1_PSRC   0x288 /* BA1_PLAY_SAMPLE_RATE_CORRECTION_REG */
 
#define BA1_PCTL   0x2a4 /* BA1_PLAY_CONTROL_REG */
 
#define BA1_PPI   0x2b4 /* BA1_PLAY_PHASE_INCREMENT_REG */
 
#define BA1_CCTL   0x064 /* BA1_CAPTURE_CONTROL_REG */
 
#define BA1_CIE   0x104 /* BA1_CAPTURE_INTERRUPT_ENABLE_REG */
 
#define BA1_CBA   0x10c /* BA1_CAPTURE_BUFFER_ADDRESS */
 
#define BA1_CSRC   0x2c8 /* BA1_CAPTURE_SAMPLE_RATE_CORRECTION_REG */
 
#define BA1_CCI   0x2d8 /* BA1_CAPTURE_COEFFICIENT_INCREMENT_REG */
 
#define BA1_CD   0x2e0 /* BA1_CAPTURE_DELAY_REG */
 
#define BA1_CPI   0x2f4 /* BA1_CAPTURE_PHASE_INCREMENT_REG */
 
#define BA1_CVOL   0x2f8 /* BA1_CAPTURE_VOLUME_REG */
 
#define BA1_CFG1   0x134 /* BA1_CAPTURE_FRAME_GROUP_1_REG */
 
#define BA1_CFG2   0x138 /* BA1_CAPTURE_FRAME_GROUP_2_REG */
 
#define BA1_CCST   0x13c /* BA1_CAPTURE_CONSTANT_REG */
 
#define BA1_CSPB   0x340 /* BA1_CAPTURE_SPB_ADDRESS */
 
#define CS46XX_MODE_OUTPUT   (1<<0) /* MIDI UART - output */
 
#define CS46XX_MODE_INPUT   (1<<1) /* MIDI UART - input */
 
#define SAVE_REG_MAX   0x10
 
#define POWER_DOWN_ALL   0x7f0f
 
#define MAX_NR_AC97   4
 
#define CS46XX_PRIMARY_CODEC_INDEX   0
 
#define CS46XX_SECONDARY_CODEC_INDEX   1
 
#define CS46XX_SECONDARY_CODEC_OFFSET   0x80
 
#define CS46XX_DSP_CAPTURE_CHANNEL   1
 
#define CS46XX_DSP_CAPTURE_CHANNEL   1
 
#define CS46XX_MIXER_SPDIF_INPUT_ELEMENT   1
 
#define CS46XX_MIXER_SPDIF_OUTPUT_ELEMENT   2
 

Functions

int snd_cs46xx_create (struct snd_card *card, struct pci_dev *pci, int external_amp, int thinkpad, struct snd_cs46xx **rcodec)
 
int snd_cs46xx_pcm (struct snd_cs46xx *chip, int device, struct snd_pcm **rpcm)
 
int snd_cs46xx_pcm_rear (struct snd_cs46xx *chip, int device, struct snd_pcm **rpcm)
 
int snd_cs46xx_pcm_iec958 (struct snd_cs46xx *chip, int device, struct snd_pcm **rpcm)
 
int snd_cs46xx_pcm_center_lfe (struct snd_cs46xx *chip, int device, struct snd_pcm **rpcm)
 
int snd_cs46xx_mixer (struct snd_cs46xx *chip, int spdif_device)
 
int snd_cs46xx_midi (struct snd_cs46xx *chip, int device, struct snd_rawmidi **rmidi)
 
int snd_cs46xx_start_dsp (struct snd_cs46xx *chip)
 
int snd_cs46xx_gameport (struct snd_cs46xx *chip)
 

Variables

struct dev_pm_ops snd_cs46xx_pm
 

Macro Definition Documentation

#define ACCAD2_CI_MASK   0x0000007F

Definition at line 977 of file cs46xx.h.

#define ACCAD2_CI_SHIFT   0

Definition at line 978 of file cs46xx.h.

#define ACCAD_CI_MASK   0x0000007F

Definition at line 669 of file cs46xx.h.

#define ACCAD_CI_SHIFT   0

Definition at line 670 of file cs46xx.h.

#define ACCDA2_CD_MASK   0x0000FFFF

Definition at line 986 of file cs46xx.h.

#define ACCDA2_CD_SHIFT   0

Definition at line 987 of file cs46xx.h.

#define ACCDA_CD_MASK   0x0000FFFF

Definition at line 675 of file cs46xx.h.

#define ACCDA_CD_SHIFT   0

Definition at line 676 of file cs46xx.h.

#define ACCTL2_ASYN   0x00000020

Definition at line 944 of file cs46xx.h.

#define ACCTL2_CRW   0x00000010

Definition at line 943 of file cs46xx.h.

#define ACCTL2_DCV   0x00000008

Definition at line 942 of file cs46xx.h.

#define ACCTL2_ESYN   0x00000002

Definition at line 940 of file cs46xx.h.

#define ACCTL2_RSTN   0x00000001

Definition at line 939 of file cs46xx.h.

#define ACCTL2_VFRM   0x00000004

Definition at line 941 of file cs46xx.h.

#define ACCTL_ASYN   0x00000020

Definition at line 636 of file cs46xx.h.

#define ACCTL_CRW   0x00000010

Definition at line 635 of file cs46xx.h.

#define ACCTL_DCV   0x00000008

Definition at line 634 of file cs46xx.h.

#define ACCTL_ESYN   0x00000002

Definition at line 632 of file cs46xx.h.

#define ACCTL_RSTN   0x00000001

Definition at line 631 of file cs46xx.h.

#define ACCTL_TC   0x00000040

Definition at line 638 of file cs46xx.h.

#define ACCTL_VFRM   0x00000004

Definition at line 633 of file cs46xx.h.

#define ACISV2_ISV10   0x00000080

Definition at line 1002 of file cs46xx.h.

#define ACISV2_ISV11   0x00000100

Definition at line 1003 of file cs46xx.h.

#define ACISV2_ISV12   0x00000200

Definition at line 1004 of file cs46xx.h.

#define ACISV2_ISV3   0x00000001

Definition at line 995 of file cs46xx.h.

#define ACISV2_ISV4   0x00000002

Definition at line 996 of file cs46xx.h.

#define ACISV2_ISV5   0x00000004

Definition at line 997 of file cs46xx.h.

#define ACISV2_ISV6   0x00000008

Definition at line 998 of file cs46xx.h.

#define ACISV2_ISV7   0x00000010

Definition at line 999 of file cs46xx.h.

#define ACISV2_ISV8   0x00000020

Definition at line 1000 of file cs46xx.h.

#define ACISV2_ISV9   0x00000040

Definition at line 1001 of file cs46xx.h.

#define ACISV_ISV10   0x00000080

Definition at line 689 of file cs46xx.h.

#define ACISV_ISV11   0x00000100

Definition at line 690 of file cs46xx.h.

#define ACISV_ISV12   0x00000200

Definition at line 691 of file cs46xx.h.

#define ACISV_ISV3   0x00000001

Definition at line 682 of file cs46xx.h.

#define ACISV_ISV4   0x00000002

Definition at line 683 of file cs46xx.h.

#define ACISV_ISV5   0x00000004

Definition at line 684 of file cs46xx.h.

#define ACISV_ISV6   0x00000008

Definition at line 685 of file cs46xx.h.

#define ACISV_ISV7   0x00000010

Definition at line 686 of file cs46xx.h.

#define ACISV_ISV8   0x00000020

Definition at line 687 of file cs46xx.h.

#define ACISV_ISV9   0x00000040

Definition at line 688 of file cs46xx.h.

#define ACOSV2_SLV10   0x00000080

Definition at line 967 of file cs46xx.h.

#define ACOSV2_SLV11   0x00000100

Definition at line 968 of file cs46xx.h.

#define ACOSV2_SLV12   0x00000200

Definition at line 969 of file cs46xx.h.

#define ACOSV2_SLV3   0x00000001

Definition at line 960 of file cs46xx.h.

#define ACOSV2_SLV4   0x00000002

Definition at line 961 of file cs46xx.h.

#define ACOSV2_SLV5   0x00000004

Definition at line 962 of file cs46xx.h.

#define ACOSV2_SLV6   0x00000008

Definition at line 963 of file cs46xx.h.

#define ACOSV2_SLV7   0x00000010

Definition at line 964 of file cs46xx.h.

#define ACOSV2_SLV8   0x00000020

Definition at line 965 of file cs46xx.h.

#define ACOSV2_SLV9   0x00000040

Definition at line 966 of file cs46xx.h.

#define ACOSV_SLV10   0x00000080

Definition at line 661 of file cs46xx.h.

#define ACOSV_SLV11   0x00000100

Definition at line 662 of file cs46xx.h.

#define ACOSV_SLV12   0x00000200

Definition at line 663 of file cs46xx.h.

#define ACOSV_SLV3   0x00000001

Definition at line 654 of file cs46xx.h.

#define ACOSV_SLV4   0x00000002

Definition at line 655 of file cs46xx.h.

#define ACOSV_SLV5   0x00000004

Definition at line 656 of file cs46xx.h.

#define ACOSV_SLV6   0x00000008

Definition at line 657 of file cs46xx.h.

#define ACOSV_SLV7   0x00000010

Definition at line 658 of file cs46xx.h.

#define ACOSV_SLV8   0x00000020

Definition at line 659 of file cs46xx.h.

#define ACOSV_SLV9   0x00000040

Definition at line 660 of file cs46xx.h.

#define ACSAD2_SI_MASK   0x0000007F

Definition at line 1012 of file cs46xx.h.

#define ACSAD2_SI_SHIFT   0

Definition at line 1013 of file cs46xx.h.

#define ACSAD_SI_MASK   0x0000007F

Definition at line 697 of file cs46xx.h.

#define ACSAD_SI_SHIFT   0

Definition at line 698 of file cs46xx.h.

#define ACSDA2_SD_MASK   0x0000FFFF

Definition at line 1020 of file cs46xx.h.

#define ACSDA2_SD_SHIFT   0

Definition at line 1021 of file cs46xx.h.

#define ACSDA_SD_MASK   0x0000FFFF

Definition at line 703 of file cs46xx.h.

#define ACSDA_SD_SHIFT   0

Definition at line 704 of file cs46xx.h.

#define ACSTS2_CRDY   0x00000001

Definition at line 951 of file cs46xx.h.

#define ACSTS2_VSTS   0x00000002

Definition at line 952 of file cs46xx.h.

#define ACSTS_CRDY   0x00000001

Definition at line 644 of file cs46xx.h.

#define ACSTS_VSTS   0x00000002

Definition at line 645 of file cs46xx.h.

#define ACSTS_WKUP   0x00000004

Definition at line 647 of file cs46xx.h.

#define ASER_FADDR_A1_MASK   0x000001FF

Definition at line 620 of file cs46xx.h.

#define ASER_FADDR_A1_SHIFT   0

Definition at line 624 of file cs46xx.h.

#define ASER_FADDR_A2_MASK   0x01FF0000

Definition at line 622 of file cs46xx.h.

#define ASER_FADDR_A2_SHIFT   16

Definition at line 625 of file cs46xx.h.

#define ASER_FADDR_EN1   0x00008000

Definition at line 621 of file cs46xx.h.

#define ASER_FADDR_EN2   0x80000000

Definition at line 623 of file cs46xx.h.

#define ASER_MASTER_ME   0x00000001

Definition at line 792 of file cs46xx.h.

#define BA0_ACCAD   0x0000046C

Definition at line 94 of file cs46xx.h.

#define BA0_ACCAD2   0x000004EC

Definition at line 126 of file cs46xx.h.

#define BA0_ACCDA   0x00000470

Definition at line 95 of file cs46xx.h.

#define BA0_ACCDA2   0x000004F0

Definition at line 127 of file cs46xx.h.

#define BA0_ACCTL   0x00000460

Definition at line 91 of file cs46xx.h.

#define BA0_ACCTL2   0x000004E0

Definition at line 123 of file cs46xx.h.

#define BA0_ACISV   0x00000474

Definition at line 96 of file cs46xx.h.

#define BA0_ACISV2   0x000004F4

Definition at line 128 of file cs46xx.h.

#define BA0_ACOSV   0x00000468

Definition at line 93 of file cs46xx.h.

#define BA0_ACOSV2   0x000004E8

Definition at line 125 of file cs46xx.h.

#define BA0_ACSAD   0x00000478

Definition at line 97 of file cs46xx.h.

#define BA0_ACSAD2   0x000004F8

Definition at line 129 of file cs46xx.h.

#define BA0_ACSDA   0x0000047C

Definition at line 98 of file cs46xx.h.

#define BA0_ACSDA2   0x000004FC

Definition at line 130 of file cs46xx.h.

#define BA0_ACSTS   0x00000464

Definition at line 92 of file cs46xx.h.

#define BA0_ACSTS2   0x000004E4

Definition at line 124 of file cs46xx.h.

#define BA0_ASER_FADDR   0x00000458

Definition at line 89 of file cs46xx.h.

#define BA0_ASER_MASTER   0x000004A4

Definition at line 109 of file cs46xx.h.

#define BA0_CFGI   0x000004B0

Definition at line 111 of file cs46xx.h.

#define BA0_CFL1   0x00000414

Definition at line 72 of file cs46xx.h.

#define BA0_CFL2   0x00000418

Definition at line 73 of file cs46xx.h.

#define BA0_CLKCR1   0x00000400

Definition at line 67 of file cs46xx.h.

#define BA0_CLKCR2   0x00000404

Definition at line 68 of file cs46xx.h.

#define BA0_DMSR   0x00000100

Definition at line 43 of file cs46xx.h.

#define BA0_DPCIA   0x00000594

Definition at line 156 of file cs46xx.h.

#define BA0_DPCIC   0x00000598

Definition at line 157 of file cs46xx.h.

#define BA0_DPCID   0x00000590

Definition at line 155 of file cs46xx.h.

#define BA0_EGPIODR   0x000004BC

Definition at line 115 of file cs46xx.h.

#define BA0_EGPIOPTR   0x000004C0

Definition at line 116 of file cs46xx.h.

#define BA0_EGPIOSR   0x000004CC

Definition at line 119 of file cs46xx.h.

#define BA0_EGPIOTR   0x000004C4

Definition at line 117 of file cs46xx.h.

#define BA0_EGPIOWR   0x000004C8

Definition at line 118 of file cs46xx.h.

#define BA0_EPCIPMC   0x00000610

Definition at line 161 of file cs46xx.h.

#define BA0_FRR   0x00000410

Definition at line 71 of file cs46xx.h.

#define BA0_GPIOR   0x000004B8

Definition at line 113 of file cs46xx.h.

#define BA0_HDAR   0x00000114

Definition at line 45 of file cs46xx.h.

#define BA0_HDCR   0x0000011C

Definition at line 47 of file cs46xx.h.

#define BA0_HDMR   0x00000118

Definition at line 46 of file cs46xx.h.

#define BA0_HICR   0x00000008

Definition at line 42 of file cs46xx.h.

#define BA0_HISR   0x00000000

Definition at line 40 of file cs46xx.h.

#define BA0_HSAR   0x00000110

Definition at line 44 of file cs46xx.h.

#define BA0_HSR0   0x00000004

Definition at line 41 of file cs46xx.h.

#define BA0_IOTAC0   0x00000500

Definition at line 131 of file cs46xx.h.

#define BA0_IOTAC1   0x00000504

Definition at line 132 of file cs46xx.h.

#define BA0_IOTAC10   0x00000528

Definition at line 141 of file cs46xx.h.

#define BA0_IOTAC11   0x0000052C

Definition at line 142 of file cs46xx.h.

#define BA0_IOTAC2   0x00000508

Definition at line 133 of file cs46xx.h.

#define BA0_IOTAC3   0x0000050C

Definition at line 134 of file cs46xx.h.

#define BA0_IOTAC4   0x00000510

Definition at line 135 of file cs46xx.h.

#define BA0_IOTAC5   0x00000514

Definition at line 136 of file cs46xx.h.

#define BA0_IOTAC6   0x00000518

Definition at line 137 of file cs46xx.h.

#define BA0_IOTAC7   0x0000051C

Definition at line 138 of file cs46xx.h.

#define BA0_IOTAC8   0x00000520

Definition at line 139 of file cs46xx.h.

#define BA0_IOTAC9   0x00000524

Definition at line 140 of file cs46xx.h.

#define BA0_IOTCR   0x0000058C

Definition at line 154 of file cs46xx.h.

#define BA0_IOTFIFO   0x00000580

Definition at line 151 of file cs46xx.h.

#define BA0_IOTFP   0x00000588

Definition at line 153 of file cs46xx.h.

#define BA0_IOTFR0   0x00000540

Definition at line 143 of file cs46xx.h.

#define BA0_IOTFR1   0x00000544

Definition at line 144 of file cs46xx.h.

#define BA0_IOTFR2   0x00000548

Definition at line 145 of file cs46xx.h.

#define BA0_IOTFR3   0x0000054C

Definition at line 146 of file cs46xx.h.

#define BA0_IOTFR4   0x00000550

Definition at line 147 of file cs46xx.h.

#define BA0_IOTFR5   0x00000554

Definition at line 148 of file cs46xx.h.

#define BA0_IOTFR6   0x00000558

Definition at line 149 of file cs46xx.h.

#define BA0_IOTFR7   0x0000055C

Definition at line 150 of file cs46xx.h.

#define BA0_IOTRRD   0x00000584

Definition at line 152 of file cs46xx.h.

#define BA0_JSC1   0x00000488

Definition at line 101 of file cs46xx.h.

#define BA0_JSC2   0x0000048C

Definition at line 102 of file cs46xx.h.

#define BA0_JSCTL   0x00000484

Definition at line 100 of file cs46xx.h.

#define BA0_JSIO   0x000004A0

Definition at line 107 of file cs46xx.h.

#define BA0_JSPT   0x00000480

Definition at line 99 of file cs46xx.h.

#define BA0_MIDCR   0x00000490

Definition at line 103 of file cs46xx.h.

#define BA0_MIDRP   0x0000049C

Definition at line 106 of file cs46xx.h.

#define BA0_MIDSR   0x00000494

Definition at line 104 of file cs46xx.h.

#define BA0_MIDWP   0x00000498

Definition at line 105 of file cs46xx.h.

#define BA0_PCICFG00   0x00000300

Definition at line 51 of file cs46xx.h.

#define BA0_PCICFG04   0x00000304

Definition at line 52 of file cs46xx.h.

#define BA0_PCICFG08   0x00000308

Definition at line 53 of file cs46xx.h.

#define BA0_PCICFG0C   0x0000030C

Definition at line 54 of file cs46xx.h.

#define BA0_PCICFG10   0x00000310

Definition at line 55 of file cs46xx.h.

#define BA0_PCICFG14   0x00000314

Definition at line 56 of file cs46xx.h.

#define BA0_PCICFG18   0x00000318

Definition at line 57 of file cs46xx.h.

#define BA0_PCICFG1C   0x0000031C

Definition at line 58 of file cs46xx.h.

#define BA0_PCICFG20   0x00000320

Definition at line 59 of file cs46xx.h.

#define BA0_PCICFG24   0x00000324

Definition at line 60 of file cs46xx.h.

#define BA0_PCICFG28   0x00000328

Definition at line 61 of file cs46xx.h.

#define BA0_PCICFG2C   0x0000032C

Definition at line 62 of file cs46xx.h.

#define BA0_PCICFG30   0x00000330

Definition at line 63 of file cs46xx.h.

#define BA0_PCICFG34   0x00000334

Definition at line 64 of file cs46xx.h.

#define BA0_PCICFG38   0x00000338

Definition at line 65 of file cs46xx.h.

#define BA0_PCICFG3C   0x0000033C

Definition at line 66 of file cs46xx.h.

#define BA0_PCPCIEN   0x00000608

Definition at line 160 of file cs46xx.h.

#define BA0_PCPCIG   0x00000604

Definition at line 159 of file cs46xx.h.

#define BA0_PCPCIR   0x00000600

Definition at line 158 of file cs46xx.h.

#define BA0_PFCV1   0x00000204

Definition at line 49 of file cs46xx.h.

#define BA0_PFCV2   0x00000208

Definition at line 50 of file cs46xx.h.

#define BA0_PFMC   0x00000200

Definition at line 48 of file cs46xx.h.

#define BA0_PLLCC   0x0000040C

Definition at line 70 of file cs46xx.h.

#define BA0_PLLM   0x00000408

Definition at line 69 of file cs46xx.h.

#define BA0_SERACC   0x000004D8

Definition at line 122 of file cs46xx.h.

#define BA0_SERBAD   0x00000448

Definition at line 84 of file cs46xx.h.

#define BA0_SERBCF   0x0000044C

Definition at line 85 of file cs46xx.h.

#define BA0_SERBCM   0x00000444

Definition at line 83 of file cs46xx.h.

#define BA0_SERBRP   0x00000454

Definition at line 87 of file cs46xx.h.

#define BA0_SERBSP   0x0000043C

Definition at line 81 of file cs46xx.h.

#define BA0_SERBST   0x00000440

Definition at line 82 of file cs46xx.h.

#define BA0_SERBWP   0x00000450

Definition at line 86 of file cs46xx.h.

#define BA0_SERC1   0x00000428

Definition at line 76 of file cs46xx.h.

#define BA0_SERC2   0x0000042C

Definition at line 77 of file cs46xx.h.

#define BA0_SERC3   0x00000430

Definition at line 78 of file cs46xx.h.

#define BA0_SERC4   0x00000434

Definition at line 79 of file cs46xx.h.

#define BA0_SERC5   0x00000438

Definition at line 80 of file cs46xx.h.

#define BA0_SERC6   0x000004D0

Definition at line 120 of file cs46xx.h.

#define BA0_SERC7   0x000004D4

Definition at line 121 of file cs46xx.h.

#define BA0_SERMC1   0x00000420

Definition at line 74 of file cs46xx.h.

#define BA0_SERMC2   0x00000424

Definition at line 75 of file cs46xx.h.

#define BA0_SSVID   0x000004B4

Definition at line 112 of file cs46xx.h.

#define BA1_CBA   0x10c /* BA1_CAPTURE_BUFFER_ADDRESS */

Definition at line 1594 of file cs46xx.h.

#define BA1_CCI   0x2d8 /* BA1_CAPTURE_COEFFICIENT_INCREMENT_REG */

Definition at line 1596 of file cs46xx.h.

#define BA1_CCST   0x13c /* BA1_CAPTURE_CONSTANT_REG */

Definition at line 1603 of file cs46xx.h.

#define BA1_CCTL   0x064 /* BA1_CAPTURE_CONTROL_REG */

Definition at line 1592 of file cs46xx.h.

#define BA1_CD   0x2e0 /* BA1_CAPTURE_DELAY_REG */

Definition at line 1597 of file cs46xx.h.

#define BA1_CFG1   0x134 /* BA1_CAPTURE_FRAME_GROUP_1_REG */

Definition at line 1601 of file cs46xx.h.

#define BA1_CFG2   0x138 /* BA1_CAPTURE_FRAME_GROUP_2_REG */

Definition at line 1602 of file cs46xx.h.

#define BA1_CIE   0x104 /* BA1_CAPTURE_INTERRUPT_ENABLE_REG */

Definition at line 1593 of file cs46xx.h.

#define BA1_CPI   0x2f4 /* BA1_CAPTURE_PHASE_INCREMENT_REG */

Definition at line 1598 of file cs46xx.h.

#define BA1_CSPB   0x340 /* BA1_CAPTURE_SPB_ADDRESS */

Definition at line 1604 of file cs46xx.h.

#define BA1_CSRC   0x2c8 /* BA1_CAPTURE_SAMPLE_RATE_CORRECTION_REG */

Definition at line 1595 of file cs46xx.h.

#define BA1_CVOL   0x2f8 /* BA1_CAPTURE_VOLUME_REG */

Definition at line 1599 of file cs46xx.h.

#define BA1_DREG   0x00030004

Definition at line 173 of file cs46xx.h.

#define BA1_DSRWP   0x00030008

Definition at line 174 of file cs46xx.h.

#define BA1_FGR1   0x00030020

Definition at line 178 of file cs46xx.h.

#define BA1_FRCC   0x00030034

Definition at line 182 of file cs46xx.h.

#define BA1_FRMT   0x00030030

Definition at line 181 of file cs46xx.h.

#define BA1_FRSC   0x00030038

Definition at line 183 of file cs46xx.h.

#define BA1_OMNI_MEM   0x000E0000

Definition at line 184 of file cs46xx.h.

#define BA1_PBA   0x0c8 /* BA1_PLAY_BUFFER_ADDRESS */

Definition at line 1586 of file cs46xx.h.

#define BA1_PCTL   0x2a4 /* BA1_PLAY_CONTROL_REG */

Definition at line 1589 of file cs46xx.h.

#define BA1_PDTC   0x0c0 /* BA1_PLAY_DMA_TRANSACTION_COUNT_REG */

Definition at line 1584 of file cs46xx.h.

#define BA1_PFIE   0x0c4 /* BA1_PLAY_FORMAT_&_INTERRUPT_ENABLE_REG */

Definition at line 1585 of file cs46xx.h.

#define BA1_PPI   0x2b4 /* BA1_PLAY_PHASE_INCREMENT_REG */

Definition at line 1590 of file cs46xx.h.

#define BA1_PSRC   0x288 /* BA1_PLAY_SAMPLE_RATE_CORRECTION_REG */

Definition at line 1588 of file cs46xx.h.

#define BA1_PVOL   0x0f8 /* BA1_PLAY_VOLUME_REG */

Definition at line 1587 of file cs46xx.h.

#define BA1_SDSR   0x0003002C

Definition at line 180 of file cs46xx.h.

#define BA1_SP_DMEM0   0x00000000

Definition at line 168 of file cs46xx.h.

#define BA1_SP_DMEM1   0x00010000

Definition at line 169 of file cs46xx.h.

#define BA1_SP_PMEM   0x00020000

Definition at line 170 of file cs46xx.h.

#define BA1_SP_REG   0x00030000

Definition at line 171 of file cs46xx.h.

#define BA1_SPCR   0x00030000

Definition at line 172 of file cs46xx.h.

#define BA1_SPCS   0x00030028

Definition at line 179 of file cs46xx.h.

#define BA1_SPIR   0x00030014

Definition at line 177 of file cs46xx.h.

#define BA1_SPWR   0x00030010

Definition at line 176 of file cs46xx.h.

#define BA1_TWPR   0x0003000C

Definition at line 175 of file cs46xx.h.

#define BA1_VARIDEC_BUF_1   0x000

Definition at line 1582 of file cs46xx.h.

#define CFGI_CLK   0x00000001

Definition at line 799 of file cs46xx.h.

#define CFGI_DIN_EEN   0x00000004

Definition at line 801 of file cs46xx.h.

#define CFGI_DOUT   0x00000002

Definition at line 800 of file cs46xx.h.

#define CFGI_EELD   0x00000008

Definition at line 802 of file cs46xx.h.

#define CFL1_CLOCK_SOURCE_AC97   0x00000001

Definition at line 484 of file cs46xx.h.

#define CFL1_CLOCK_SOURCE_CRYSTAL   0x00000002

Definition at line 485 of file cs46xx.h.

#define CFL1_CLOCK_SOURCE_CS423X   0x00000000

Definition at line 483 of file cs46xx.h.

#define CFL1_CLOCK_SOURCE_DUAL_AC97   0x00000003

Definition at line 486 of file cs46xx.h.

#define CFL1_CLOCK_SOURCE_MASK   0x00000003

Definition at line 482 of file cs46xx.h.

#define CFL1_VALID_DATA_MASK   0x000000FF

Definition at line 487 of file cs46xx.h.

#define CFL2_VALID_DATA_MASK   0x000000FF

Definition at line 493 of file cs46xx.h.

#define CLKCR1_OSCP   0x00000002

Definition at line 388 of file cs46xx.h.

#define CLKCR1_OSCS   0x00000001

Definition at line 387 of file cs46xx.h.

#define CLKCR1_PLLOS   0x00000040

Definition at line 396 of file cs46xx.h.

#define CLKCR1_PLLP   0x00000010

Definition at line 394 of file cs46xx.h.

#define CLKCR1_PLLSS_CRYSTAL   0x00000004

Definition at line 391 of file cs46xx.h.

#define CLKCR1_PLLSS_MASK   0x0000000C

Definition at line 389 of file cs46xx.h.

#define CLKCR1_PLLSS_PCI   0x00000008

Definition at line 392 of file cs46xx.h.

#define CLKCR1_PLLSS_RESERVED   0x0000000C

Definition at line 393 of file cs46xx.h.

#define CLKCR1_PLLSS_SERIAL   0x00000000

Definition at line 390 of file cs46xx.h.

#define CLKCR1_SWCE   0x00000020

Definition at line 395 of file cs46xx.h.

#define CLKCR2_PDIVS_1   0x00000001

Definition at line 402 of file cs46xx.h.

#define CLKCR2_PDIVS_16   0x00000000

Definition at line 407 of file cs46xx.h.

#define CLKCR2_PDIVS_2   0x00000002

Definition at line 403 of file cs46xx.h.

#define CLKCR2_PDIVS_4   0x00000004

Definition at line 404 of file cs46xx.h.

#define CLKCR2_PDIVS_7   0x00000007

Definition at line 405 of file cs46xx.h.

#define CLKCR2_PDIVS_8   0x00000008

Definition at line 406 of file cs46xx.h.

#define CLKCR2_PDIVS_MASK   0x0000000F

Definition at line 401 of file cs46xx.h.

#define CS46XX_DSP_CAPTURE_CHANNEL   1

Definition at line 1628 of file cs46xx.h.

#define CS46XX_DSP_CAPTURE_CHANNEL   1

Definition at line 1628 of file cs46xx.h.

#define CS46XX_MIXER_SPDIF_INPUT_ELEMENT   1

Definition at line 1631 of file cs46xx.h.

#define CS46XX_MIXER_SPDIF_OUTPUT_ELEMENT   2

Definition at line 1632 of file cs46xx.h.

#define CS46XX_MODE_INPUT   (1<<1) /* MIDI UART - input */

Definition at line 1611 of file cs46xx.h.

#define CS46XX_MODE_OUTPUT   (1<<0) /* MIDI UART - output */

Definition at line 1610 of file cs46xx.h.

#define CS46XX_PRIMARY_CODEC_INDEX   0

Definition at line 1622 of file cs46xx.h.

#define CS46XX_SECONDARY_CODEC_INDEX   1

Definition at line 1623 of file cs46xx.h.

#define CS46XX_SECONDARY_CODEC_OFFSET   0x80

Definition at line 1624 of file cs46xx.h.

#define DMA_RQ_C1_2PAGE_LOOP_BEGIN   0x00080000

Definition at line 1500 of file cs46xx.h.

#define DMA_RQ_C1_AT_SAMPLE_END   0x00030000

Definition at line 1496 of file cs46xx.h.

#define DMA_RQ_C1_BEFORE_LOOP_END   0x00040000

Definition at line 1499 of file cs46xx.h.

#define DMA_RQ_C1_BEFORE_SAMPLE_END   0x00010000

Definition at line 1494 of file cs46xx.h.

#define DMA_RQ_C1_COUNT_MASK   0x000003FF

Definition at line 1487 of file cs46xx.h.

#define DMA_RQ_C1_COUNT_SHIFT   0

Definition at line 1529 of file cs46xx.h.

#define DMA_RQ_C1_DEST_LINEAR   0x00000000

Definition at line 1510 of file cs46xx.h.

#define DMA_RQ_C1_DEST_MOD1024   0x07000000

Definition at line 1517 of file cs46xx.h.

#define DMA_RQ_C1_DEST_MOD128   0x04000000

Definition at line 1514 of file cs46xx.h.

#define DMA_RQ_C1_DEST_MOD16   0x01000000

Definition at line 1511 of file cs46xx.h.

#define DMA_RQ_C1_DEST_MOD256   0x05000000

Definition at line 1515 of file cs46xx.h.

#define DMA_RQ_C1_DEST_MOD32   0x02000000

Definition at line 1512 of file cs46xx.h.

#define DMA_RQ_C1_DEST_MOD512   0x06000000

Definition at line 1516 of file cs46xx.h.

#define DMA_RQ_C1_DEST_MOD64   0x03000000

Definition at line 1513 of file cs46xx.h.

#define DMA_RQ_C1_DEST_ON_HOST   0x08000000

Definition at line 1518 of file cs46xx.h.

#define DMA_RQ_C1_DEST_SIZE_MASK   0x07000000

Definition at line 1509 of file cs46xx.h.

#define DMA_RQ_C1_DESTINATION_SCATTER   0x00001000

Definition at line 1488 of file cs46xx.h.

#define DMA_RQ_C1_DONE_FLAG   0x00004000

Definition at line 1490 of file cs46xx.h.

#define DMA_RQ_C1_FULL_PAGE   0x00000000

Definition at line 1493 of file cs46xx.h.

#define DMA_RQ_C1_LOOP_BEGIN   0x000C0000

Definition at line 1501 of file cs46xx.h.

#define DMA_RQ_C1_LOOP_END_STATE_MASK   0x000C0000

Definition at line 1497 of file cs46xx.h.

#define DMA_RQ_C1_NOT_LOOP_END   0x00000000

Definition at line 1498 of file cs46xx.h.

#define DMA_RQ_C1_OPTIMIZE_STATE   0x00008000

Definition at line 1491 of file cs46xx.h.

#define DMA_RQ_C1_PAGE_MAP_ERROR   0x00020000

Definition at line 1495 of file cs46xx.h.

#define DMA_RQ_C1_PAGE_MAP_MASK   0x00300000

Definition at line 1502 of file cs46xx.h.

#define DMA_RQ_C1_PM_LOOP_NEXT_PENDING   0x00300000

Definition at line 1506 of file cs46xx.h.

#define DMA_RQ_C1_PM_NEXT_PENDING   0x00100000

Definition at line 1504 of file cs46xx.h.

#define DMA_RQ_C1_PM_NONE_PENDING   0x00000000

Definition at line 1503 of file cs46xx.h.

#define DMA_RQ_C1_PM_RESERVED   0x00200000

Definition at line 1505 of file cs46xx.h.

#define DMA_RQ_C1_SAMPLE_END_STATE_MASK   0x00030000

Definition at line 1492 of file cs46xx.h.

#define DMA_RQ_C1_SOURCE_GATHER   0x00002000

Definition at line 1489 of file cs46xx.h.

#define DMA_RQ_C1_SOURCE_LINEAR   0x00000000

Definition at line 1520 of file cs46xx.h.

#define DMA_RQ_C1_SOURCE_MOD1024   0x70000000

Definition at line 1527 of file cs46xx.h.

#define DMA_RQ_C1_SOURCE_MOD128   0x40000000

Definition at line 1524 of file cs46xx.h.

#define DMA_RQ_C1_SOURCE_MOD16   0x10000000

Definition at line 1521 of file cs46xx.h.

#define DMA_RQ_C1_SOURCE_MOD256   0x50000000

Definition at line 1525 of file cs46xx.h.

#define DMA_RQ_C1_SOURCE_MOD32   0x20000000

Definition at line 1522 of file cs46xx.h.

#define DMA_RQ_C1_SOURCE_MOD512   0x60000000

Definition at line 1526 of file cs46xx.h.

#define DMA_RQ_C1_SOURCE_MOD64   0x30000000

Definition at line 1523 of file cs46xx.h.

#define DMA_RQ_C1_SOURCE_ON_HOST   0x80000000

Definition at line 1528 of file cs46xx.h.

#define DMA_RQ_C1_SOURCE_SIZE_MASK   0x70000000

Definition at line 1519 of file cs46xx.h.

#define DMA_RQ_C1_WRITEBACK_DEST_FLAG   0x00400000

Definition at line 1507 of file cs46xx.h.

#define DMA_RQ_C1_WRITEBACK_SRC_FLAG   0x00800000

Definition at line 1508 of file cs46xx.h.

#define DMA_RQ_C2_AC_8_TO_16_BIT   0x00001000

Definition at line 1543 of file cs46xx.h.

#define DMA_RQ_C2_AC_ENDIAN_CONVERT   0x00004000

Definition at line 1545 of file cs46xx.h.

#define DMA_RQ_C2_AC_MONO_TO_STEREO   0x00002000

Definition at line 1544 of file cs46xx.h.

#define DMA_RQ_C2_AC_NONE   0x00000000

Definition at line 1542 of file cs46xx.h.

#define DMA_RQ_C2_AC_SIGNED_CONVERT   0x00008000

Definition at line 1546 of file cs46xx.h.

#define DMA_RQ_C2_AUDIO_CONVERT_MASK   0x0000F000

Definition at line 1541 of file cs46xx.h.

#define DMA_RQ_C2_LOOP_END_MASK   0x0FFF0000

Definition at line 1547 of file cs46xx.h.

#define DMA_RQ_C2_LOOP_END_SHIFT   16

Definition at line 1556 of file cs46xx.h.

#define DMA_RQ_C2_LOOP_MASK   0x30000000

Definition at line 1548 of file cs46xx.h.

#define DMA_RQ_C2_MULTI_PAGE_LOOP   0x30000000

Definition at line 1552 of file cs46xx.h.

#define DMA_RQ_C2_NO_LOOP   0x00000000

Definition at line 1549 of file cs46xx.h.

#define DMA_RQ_C2_NO_VIRTUAL_SIGNAL   0x00000000

Definition at line 1537 of file cs46xx.h.

#define DMA_RQ_C2_ONE_PAGE_LOOP   0x10000000

Definition at line 1550 of file cs46xx.h.

#define DMA_RQ_C2_SIGNAL_DEST_PINGPONG   0x00000300

Definition at line 1540 of file cs46xx.h.

#define DMA_RQ_C2_SIGNAL_EVERY_DMA   0x00000100

Definition at line 1538 of file cs46xx.h.

#define DMA_RQ_C2_SIGNAL_LOOP_BACK   0x40000000

Definition at line 1553 of file cs46xx.h.

#define DMA_RQ_C2_SIGNAL_POST_BEGIN_PAGE   0x80000000

Definition at line 1554 of file cs46xx.h.

#define DMA_RQ_C2_SIGNAL_SOURCE_PINGPONG   0x00000200

Definition at line 1539 of file cs46xx.h.

#define DMA_RQ_C2_TWO_PAGE_LOOP   0x20000000

Definition at line 1551 of file cs46xx.h.

#define DMA_RQ_C2_VIRTUAL_CHANNEL_MASK   0x0000003F

Definition at line 1535 of file cs46xx.h.

#define DMA_RQ_C2_VIRTUAL_CHANNEL_SHIFT   0

Definition at line 1555 of file cs46xx.h.

#define DMA_RQ_C2_VIRTUAL_SIGNAL_MASK   0x00000300

Definition at line 1536 of file cs46xx.h.

#define DMA_RQ_CONTROL1   0x00000000

Definition at line 1473 of file cs46xx.h.

#define DMA_RQ_CONTROL2   0x00000004

Definition at line 1474 of file cs46xx.h.

#define DMA_RQ_DESTINATION_ADDR   0x0000000C

Definition at line 1476 of file cs46xx.h.

#define DMA_RQ_LOOP_START_ADDR   0x00000018

Definition at line 1479 of file cs46xx.h.

#define DMA_RQ_NEXT_PAGE_ADDR   0x00000010

Definition at line 1477 of file cs46xx.h.

#define DMA_RQ_NEXT_PAGE_SGDESC   0x00000014

Definition at line 1478 of file cs46xx.h.

#define DMA_RQ_PAGE_MAP_ADDR   0x00000020

Definition at line 1481 of file cs46xx.h.

#define DMA_RQ_PMA_LOOP_THIRD_PAGE_ENTRY_MASK   0x00000FF8

Definition at line 1577 of file cs46xx.h.

#define DMA_RQ_PMA_LOOP_THIRD_PAGE_ENTRY_SHIFT   3

Definition at line 1579 of file cs46xx.h.

#define DMA_RQ_PMA_PAGE_TABLE_MASK   0xFFFFF000

Definition at line 1578 of file cs46xx.h.

#define DMA_RQ_PMA_PAGE_TABLE_SHIFT   12

Definition at line 1580 of file cs46xx.h.

#define DMA_RQ_POST_LOOP_ADDR   0x0000001C

Definition at line 1480 of file cs46xx.h.

#define DMA_RQ_SD_ADDRESS_MASK   0x0000FFFF

Definition at line 1562 of file cs46xx.h.

#define DMA_RQ_SD_ADDRESS_SHIFT   0

Definition at line 1571 of file cs46xx.h.

#define DMA_RQ_SD_END_FLAG   0x40000000

Definition at line 1569 of file cs46xx.h.

#define DMA_RQ_SD_ERROR_FLAG   0x80000000

Definition at line 1570 of file cs46xx.h.

#define DMA_RQ_SD_MEMORY_ID_MASK   0x000F0000

Definition at line 1563 of file cs46xx.h.

#define DMA_RQ_SD_OMNIMEM_ADDR   0x000E0000

Definition at line 1568 of file cs46xx.h.

#define DMA_RQ_SD_SP_DEBUG_ADDR   0x00030000

Definition at line 1567 of file cs46xx.h.

#define DMA_RQ_SD_SP_PARAM_ADDR   0x00000000

Definition at line 1564 of file cs46xx.h.

#define DMA_RQ_SD_SP_PROGRAM_ADDR   0x00020000

Definition at line 1566 of file cs46xx.h.

#define DMA_RQ_SD_SP_SAMPLE_ADDR   0x00010000

Definition at line 1565 of file cs46xx.h.

#define DMA_RQ_SOURCE_ADDR   0x00000008

Definition at line 1475 of file cs46xx.h.

#define DMA_SG_LOOP_END_FLAG   0x20000000

Definition at line 1463 of file cs46xx.h.

#define DMA_SG_NEXT_ENTRY_MASK   0x00000FF8

Definition at line 1460 of file cs46xx.h.

#define DMA_SG_NEXT_ENTRY_SHIFT   3

Definition at line 1466 of file cs46xx.h.

#define DMA_SG_SAMPLE_END_FLAG   0x10000000

Definition at line 1462 of file cs46xx.h.

#define DMA_SG_SAMPLE_END_MASK   0x0FFF0000

Definition at line 1461 of file cs46xx.h.

#define DMA_SG_SAMPLE_END_SHIFT   16

Definition at line 1467 of file cs46xx.h.

#define DMA_SG_SIGNAL_END_FLAG   0x40000000

Definition at line 1464 of file cs46xx.h.

#define DMA_SG_SIGNAL_PAGE_FLAG   0x80000000

Definition at line 1465 of file cs46xx.h.

#define DMSR_HP   0x00000001

Definition at line 269 of file cs46xx.h.

#define DMSR_HR   0x00000002

Definition at line 270 of file cs46xx.h.

#define DMSR_SP   0x00000004

Definition at line 271 of file cs46xx.h.

#define DMSR_SR   0x00000008

Definition at line 272 of file cs46xx.h.

#define DPCIA_A_MASK   0xFFFFFFFF

Definition at line 1118 of file cs46xx.h.

#define DPCIA_A_SHIFT   0

Definition at line 1119 of file cs46xx.h.

#define DPCIC_BE_MASK   0x000000F0

Definition at line 1129 of file cs46xx.h.

#define DPCIC_C_IOREAD   0x00000002

Definition at line 1127 of file cs46xx.h.

#define DPCIC_C_IOWRITE   0x00000003

Definition at line 1128 of file cs46xx.h.

#define DPCIC_C_MASK   0x0000000F

Definition at line 1126 of file cs46xx.h.

#define DPCID_D_MASK   0xFFFFFFFF

Definition at line 1110 of file cs46xx.h.

#define DPCID_D_SHIFT   0

Definition at line 1111 of file cs46xx.h.

#define DREG_DEBUG   0x00000080

Definition at line 1189 of file cs46xx.h.

#define DREG_REGID_CPU_STATUS   0x00000300

Definition at line 1280 of file cs46xx.h.

#define DREG_REGID_CURRENT_DMA_STREAM   0x0000021D

Definition at line 1278 of file cs46xx.h.

#define DREG_REGID_DMA_STATE   0x0000021C

Definition at line 1277 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_0_3   0x00000400

Definition at line 1285 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_12_15   0x0000040C

Definition at line 1288 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_16_19   0x00000410

Definition at line 1289 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_20_23   0x00000414

Definition at line 1290 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_24_27   0x00000418

Definition at line 1291 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_28_31   0x0000041C

Definition at line 1292 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_32_35   0x00000420

Definition at line 1293 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_36_39   0x00000424

Definition at line 1294 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_40_43   0x00000428

Definition at line 1295 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_44_47   0x0000042C

Definition at line 1296 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_48_51   0x00000430

Definition at line 1297 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_4_7   0x00000404

Definition at line 1286 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_52_55   0x00000434

Definition at line 1298 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_56_59   0x00000438

Definition at line 1299 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_60_63   0x0000043C

Definition at line 1300 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_64_67   0x00000440

Definition at line 1301 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_68_71   0x00000444

Definition at line 1302 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_72_75   0x00000448

Definition at line 1303 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_76_79   0x0000044C

Definition at line 1304 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_80_83   0x00000450

Definition at line 1305 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_84_87   0x00000454

Definition at line 1306 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_88_91   0x00000458

Definition at line 1307 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_8_11   0x00000408

Definition at line 1287 of file cs46xx.h.

#define DREG_REGID_DMA_STATE_92_95   0x0000045C

Definition at line 1308 of file cs46xx.h.

#define DREG_REGID_INDEX0   0x00000304

Definition at line 1283 of file cs46xx.h.

#define DREG_REGID_INDEX1   0x00000305

Definition at line 1284 of file cs46xx.h.

#define DREG_REGID_INDIRECT_ADDRESS   0x0000010E

Definition at line 1228 of file cs46xx.h.

#define DREG_REGID_MAC0_ACC0_HIGH   0x00000610

Definition at line 1354 of file cs46xx.h.

#define DREG_REGID_MAC0_ACC0_LOW   0x00000600

Definition at line 1338 of file cs46xx.h.

#define DREG_REGID_MAC0_ACC0_MID   0x00000608

Definition at line 1346 of file cs46xx.h.

#define DREG_REGID_MAC0_ACC1_HIGH   0x00000611

Definition at line 1355 of file cs46xx.h.

#define DREG_REGID_MAC0_ACC1_LOW   0x00000601

Definition at line 1339 of file cs46xx.h.

#define DREG_REGID_MAC0_ACC1_MID   0x00000609

Definition at line 1347 of file cs46xx.h.

#define DREG_REGID_MAC0_ACC2_HIGH   0x00000612

Definition at line 1356 of file cs46xx.h.

#define DREG_REGID_MAC0_ACC2_LOW   0x00000602

Definition at line 1340 of file cs46xx.h.

#define DREG_REGID_MAC0_ACC2_MID   0x0000060A

Definition at line 1348 of file cs46xx.h.

#define DREG_REGID_MAC0_ACC3_HIGH   0x00000613

Definition at line 1357 of file cs46xx.h.

#define DREG_REGID_MAC0_ACC3_LOW   0x00000603

Definition at line 1341 of file cs46xx.h.

#define DREG_REGID_MAC0_ACC3_MID   0x0000060B

Definition at line 1349 of file cs46xx.h.

#define DREG_REGID_MAC1_ACC0_HIGH   0x00000614

Definition at line 1358 of file cs46xx.h.

#define DREG_REGID_MAC1_ACC0_LOW   0x00000604

Definition at line 1342 of file cs46xx.h.

#define DREG_REGID_MAC1_ACC0_MID   0x0000060C

Definition at line 1350 of file cs46xx.h.

#define DREG_REGID_MAC1_ACC1_HIGH   0x00000615

Definition at line 1359 of file cs46xx.h.

#define DREG_REGID_MAC1_ACC1_LOW   0x00000605

Definition at line 1343 of file cs46xx.h.

#define DREG_REGID_MAC1_ACC1_MID   0x0000060D

Definition at line 1351 of file cs46xx.h.

#define DREG_REGID_MAC1_ACC2_HIGH   0x00000616

Definition at line 1360 of file cs46xx.h.

#define DREG_REGID_MAC1_ACC2_LOW   0x00000606

Definition at line 1344 of file cs46xx.h.

#define DREG_REGID_MAC1_ACC2_MID   0x0000060E

Definition at line 1352 of file cs46xx.h.

#define DREG_REGID_MAC1_ACC3_HIGH   0x00000617

Definition at line 1361 of file cs46xx.h.

#define DREG_REGID_MAC1_ACC3_LOW   0x00000607

Definition at line 1345 of file cs46xx.h.

#define DREG_REGID_MAC1_ACC3_MID   0x0000060F

Definition at line 1353 of file cs46xx.h.

#define DREG_REGID_MAC_MODE   0x00000301

Definition at line 1281 of file cs46xx.h.

#define DREG_REGID_MASK   0x0000007F

Definition at line 1188 of file cs46xx.h.

#define DREG_REGID_NEXT_DMA_STREAM   0x0000021E

Definition at line 1279 of file cs46xx.h.

#define DREG_REGID_R0   0x00000010

Definition at line 1200 of file cs46xx.h.

#define DREG_REGID_R1   0x00000011

Definition at line 1201 of file cs46xx.h.

#define DREG_REGID_R2   0x00000012

Definition at line 1202 of file cs46xx.h.

#define DREG_REGID_R3   0x00000013

Definition at line 1203 of file cs46xx.h.

#define DREG_REGID_R4   0x00000014

Definition at line 1204 of file cs46xx.h.

#define DREG_REGID_R5   0x00000015

Definition at line 1205 of file cs46xx.h.

#define DREG_REGID_R6   0x00000016

Definition at line 1206 of file cs46xx.h.

#define DREG_REGID_R7   0x00000017

Definition at line 1207 of file cs46xx.h.

#define DREG_REGID_R8   0x00000018

Definition at line 1208 of file cs46xx.h.

#define DREG_REGID_R9   0x00000019

Definition at line 1209 of file cs46xx.h.

#define DREG_REGID_RA   0x0000001A

Definition at line 1210 of file cs46xx.h.

#define DREG_REGID_RA_BUS_HIGH   0x00000038

Definition at line 1217 of file cs46xx.h.

#define DREG_REGID_RA_BUS_LOW   0x00000020

Definition at line 1216 of file cs46xx.h.

#define DREG_REGID_RB   0x0000001B

Definition at line 1211 of file cs46xx.h.

#define DREG_REGID_RC   0x0000001C

Definition at line 1212 of file cs46xx.h.

#define DREG_REGID_RD   0x0000001D

Definition at line 1213 of file cs46xx.h.

#define DREG_REGID_RE   0x0000001E

Definition at line 1214 of file cs46xx.h.

#define DREG_REGID_RF   0x0000001F

Definition at line 1215 of file cs46xx.h.

#define DREG_REGID_RSA0_HIGH   0x00000201

Definition at line 1251 of file cs46xx.h.

#define DREG_REGID_RSA0_LOW   0x00000200

Definition at line 1250 of file cs46xx.h.

#define DREG_REGID_RSA1_HIGH   0x00000203

Definition at line 1253 of file cs46xx.h.

#define DREG_REGID_RSA1_LOW   0x00000202

Definition at line 1252 of file cs46xx.h.

#define DREG_REGID_RSA2   0x00000204

Definition at line 1254 of file cs46xx.h.

#define DREG_REGID_RSA3   0x00000205

Definition at line 1255 of file cs46xx.h.

#define DREG_REGID_RSCONFIG01_HIGH   0x0000020C

Definition at line 1262 of file cs46xx.h.

#define DREG_REGID_RSCONFIG01_LOW   0x0000020B

Definition at line 1261 of file cs46xx.h.

#define DREG_REGID_RSCONFIG23_HIGH   0x0000020E

Definition at line 1264 of file cs46xx.h.

#define DREG_REGID_RSCONFIG23_LOW   0x0000020D

Definition at line 1263 of file cs46xx.h.

#define DREG_REGID_RSD0_HIGH   0x00000212

Definition at line 1268 of file cs46xx.h.

#define DREG_REGID_RSD0_LOW   0x00000211

Definition at line 1267 of file cs46xx.h.

#define DREG_REGID_RSD1_HIGH   0x00000214

Definition at line 1270 of file cs46xx.h.

#define DREG_REGID_RSD1_LOW   0x00000213

Definition at line 1269 of file cs46xx.h.

#define DREG_REGID_RSD2_HIGH   0x00000216

Definition at line 1272 of file cs46xx.h.

#define DREG_REGID_RSD2_LOW   0x00000215

Definition at line 1271 of file cs46xx.h.

#define DREG_REGID_RSD3_HIGH   0x00000218

Definition at line 1274 of file cs46xx.h.

#define DREG_REGID_RSD3_LOW   0x00000217

Definition at line 1273 of file cs46xx.h.

#define DREG_REGID_RSDMA01E   0x0000020F

Definition at line 1265 of file cs46xx.h.

#define DREG_REGID_RSDMA23E   0x00000210

Definition at line 1266 of file cs46xx.h.

#define DREG_REGID_RSHOUT_HIGH   0x00000630

Definition at line 1364 of file cs46xx.h.

#define DREG_REGID_RSHOUT_LOW   0x00000620

Definition at line 1362 of file cs46xx.h.

#define DREG_REGID_RSHOUT_MID   0x00000628

Definition at line 1363 of file cs46xx.h.

#define DREG_REGID_RSI0_HIGH   0x00000207

Definition at line 1257 of file cs46xx.h.

#define DREG_REGID_RSI0_LOW   0x00000206

Definition at line 1256 of file cs46xx.h.

#define DREG_REGID_RSI1   0x00000208

Definition at line 1258 of file cs46xx.h.

#define DREG_REGID_RSI2   0x00000209

Definition at line 1259 of file cs46xx.h.

#define DREG_REGID_SAGUSTATUS   0x0000020A

Definition at line 1260 of file cs46xx.h.

#define DREG_REGID_SHIFT   0

Definition at line 1197 of file cs46xx.h.

#define DREG_REGID_SRAR_HIGH   0x0000021A

Definition at line 1275 of file cs46xx.h.

#define DREG_REGID_SRAR_LOW   0x0000021B

Definition at line 1276 of file cs46xx.h.

#define DREG_REGID_STACK_AND_REPEAT   0x00000302

Definition at line 1282 of file cs46xx.h.

#define DREG_REGID_TOP_OF_STACK   0x0000010F

Definition at line 1229 of file cs46xx.h.

#define DREG_REGID_TRAP_0   0x00000100

Definition at line 1220 of file cs46xx.h.

#define DREG_REGID_TRAP_1   0x00000101

Definition at line 1221 of file cs46xx.h.

#define DREG_REGID_TRAP_10   0x00000112

Definition at line 1234 of file cs46xx.h.

#define DREG_REGID_TRAP_11   0x00000113

Definition at line 1235 of file cs46xx.h.

#define DREG_REGID_TRAP_12   0x00000114

Definition at line 1236 of file cs46xx.h.

#define DREG_REGID_TRAP_13   0x00000115

Definition at line 1237 of file cs46xx.h.

#define DREG_REGID_TRAP_14   0x00000116

Definition at line 1238 of file cs46xx.h.

#define DREG_REGID_TRAP_15   0x00000117

Definition at line 1239 of file cs46xx.h.

#define DREG_REGID_TRAP_16   0x00000118

Definition at line 1240 of file cs46xx.h.

#define DREG_REGID_TRAP_17   0x00000119

Definition at line 1241 of file cs46xx.h.

#define DREG_REGID_TRAP_18   0x0000011A

Definition at line 1242 of file cs46xx.h.

#define DREG_REGID_TRAP_19   0x0000011B

Definition at line 1243 of file cs46xx.h.

#define DREG_REGID_TRAP_2   0x00000102

Definition at line 1222 of file cs46xx.h.

#define DREG_REGID_TRAP_20   0x0000011C

Definition at line 1244 of file cs46xx.h.

#define DREG_REGID_TRAP_21   0x0000011D

Definition at line 1245 of file cs46xx.h.

#define DREG_REGID_TRAP_22   0x0000011E

Definition at line 1246 of file cs46xx.h.

#define DREG_REGID_TRAP_23   0x0000011F

Definition at line 1247 of file cs46xx.h.

#define DREG_REGID_TRAP_3   0x00000103

Definition at line 1223 of file cs46xx.h.

#define DREG_REGID_TRAP_4   0x00000104

Definition at line 1224 of file cs46xx.h.

#define DREG_REGID_TRAP_5   0x00000105

Definition at line 1225 of file cs46xx.h.

#define DREG_REGID_TRAP_6   0x00000106

Definition at line 1226 of file cs46xx.h.

#define DREG_REGID_TRAP_7   0x00000107

Definition at line 1227 of file cs46xx.h.

#define DREG_REGID_TRAP_8   0x00000110

Definition at line 1232 of file cs46xx.h.

#define DREG_REGID_TRAP_9   0x00000111

Definition at line 1233 of file cs46xx.h.

#define DREG_REGID_TRAP_SELECT   0x00000500

Definition at line 1309 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_0   0x00000500

Definition at line 1310 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_1   0x00000501

Definition at line 1311 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_10   0x00000512

Definition at line 1322 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_11   0x00000513

Definition at line 1323 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_12   0x00000514

Definition at line 1324 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_13   0x00000515

Definition at line 1325 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_14   0x00000516

Definition at line 1326 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_15   0x00000517

Definition at line 1327 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_16   0x00000518

Definition at line 1328 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_17   0x00000519

Definition at line 1329 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_18   0x0000051A

Definition at line 1330 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_19   0x0000051B

Definition at line 1331 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_2   0x00000502

Definition at line 1312 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_20   0x0000051C

Definition at line 1332 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_21   0x0000051D

Definition at line 1333 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_22   0x0000051E

Definition at line 1334 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_23   0x0000051F

Definition at line 1335 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_3   0x00000503

Definition at line 1313 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_4   0x00000504

Definition at line 1314 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_5   0x00000505

Definition at line 1315 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_6   0x00000506

Definition at line 1316 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_7   0x00000507

Definition at line 1317 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_8   0x00000510

Definition at line 1320 of file cs46xx.h.

#define DREG_REGID_TRAP_WRITE_9   0x00000511

Definition at line 1321 of file cs46xx.h.

#define DREG_REGID_YBUS_HIGH   0x00000058

Definition at line 1219 of file cs46xx.h.

#define DREG_REGID_YBUS_LOW   0x00000050

Definition at line 1218 of file cs46xx.h.

#define DREG_RGBK_MASK   0x00000700

Definition at line 1190 of file cs46xx.h.

#define DREG_RGBK_REGID_MASK   0x0000077F

Definition at line 1199 of file cs46xx.h.

#define DREG_RGBK_SHIFT   8

Definition at line 1198 of file cs46xx.h.

#define DREG_TRAP   0x00000800

Definition at line 1191 of file cs46xx.h.

#define DREG_TRAPX   0x00001000

Definition at line 1194 of file cs46xx.h.

#define DSRWP_DSR_BG_RQ   0x00000001

Definition at line 1370 of file cs46xx.h.

#define DSRWP_DSR_MASK   0x0000000F

Definition at line 1369 of file cs46xx.h.

#define DSRWP_DSR_PRIORITY_0   0x00000000

Definition at line 1372 of file cs46xx.h.

#define DSRWP_DSR_PRIORITY_1   0x00000002

Definition at line 1373 of file cs46xx.h.

#define DSRWP_DSR_PRIORITY_2   0x00000004

Definition at line 1374 of file cs46xx.h.

#define DSRWP_DSR_PRIORITY_3   0x00000006

Definition at line 1375 of file cs46xx.h.

#define DSRWP_DSR_PRIORITY_MASK   0x00000006

Definition at line 1371 of file cs46xx.h.

#define DSRWP_DSR_RQ_PENDING   0x00000008

Definition at line 1376 of file cs46xx.h.

#define EGPIODR_GPOE0   0x00000001

Definition at line 826 of file cs46xx.h.

#define EGPIODR_GPOE1   0x00000002

Definition at line 827 of file cs46xx.h.

#define EGPIODR_GPOE2   0x00000004

Definition at line 828 of file cs46xx.h.

#define EGPIODR_GPOE3   0x00000008

Definition at line 829 of file cs46xx.h.

#define EGPIODR_GPOE4   0x00000010

Definition at line 830 of file cs46xx.h.

#define EGPIODR_GPOE5   0x00000020

Definition at line 831 of file cs46xx.h.

#define EGPIODR_GPOE6   0x00000040

Definition at line 832 of file cs46xx.h.

#define EGPIODR_GPOE7   0x00000080

Definition at line 833 of file cs46xx.h.

#define EGPIODR_GPOE8   0x00000100

Definition at line 834 of file cs46xx.h.

#define EGPIOPTR_GPPT0   0x00000001

Definition at line 842 of file cs46xx.h.

#define EGPIOPTR_GPPT1   0x00000002

Definition at line 843 of file cs46xx.h.

#define EGPIOPTR_GPPT2   0x00000004

Definition at line 844 of file cs46xx.h.

#define EGPIOPTR_GPPT3   0x00000008

Definition at line 845 of file cs46xx.h.

#define EGPIOPTR_GPPT4   0x00000010

Definition at line 846 of file cs46xx.h.

#define EGPIOPTR_GPPT5   0x00000020

Definition at line 847 of file cs46xx.h.

#define EGPIOPTR_GPPT6   0x00000040

Definition at line 848 of file cs46xx.h.

#define EGPIOPTR_GPPT7   0x00000080

Definition at line 849 of file cs46xx.h.

#define EGPIOPTR_GPPT8   0x00000100

Definition at line 850 of file cs46xx.h.

#define EGPIOSR_GPS0   0x00000001

Definition at line 890 of file cs46xx.h.

#define EGPIOSR_GPS1   0x00000002

Definition at line 891 of file cs46xx.h.

#define EGPIOSR_GPS2   0x00000004

Definition at line 892 of file cs46xx.h.

#define EGPIOSR_GPS3   0x00000008

Definition at line 893 of file cs46xx.h.

#define EGPIOSR_GPS4   0x00000010

Definition at line 894 of file cs46xx.h.

#define EGPIOSR_GPS5   0x00000020

Definition at line 895 of file cs46xx.h.

#define EGPIOSR_GPS6   0x00000040

Definition at line 896 of file cs46xx.h.

#define EGPIOSR_GPS7   0x00000080

Definition at line 897 of file cs46xx.h.

#define EGPIOSR_GPS8   0x00000100

Definition at line 898 of file cs46xx.h.

#define EGPIOTR_GPS0   0x00000001

Definition at line 858 of file cs46xx.h.

#define EGPIOTR_GPS1   0x00000002

Definition at line 859 of file cs46xx.h.

#define EGPIOTR_GPS2   0x00000004

Definition at line 860 of file cs46xx.h.

#define EGPIOTR_GPS3   0x00000008

Definition at line 861 of file cs46xx.h.

#define EGPIOTR_GPS4   0x00000010

Definition at line 862 of file cs46xx.h.

#define EGPIOTR_GPS5   0x00000020

Definition at line 863 of file cs46xx.h.

#define EGPIOTR_GPS6   0x00000040

Definition at line 864 of file cs46xx.h.

#define EGPIOTR_GPS7   0x00000080

Definition at line 865 of file cs46xx.h.

#define EGPIOTR_GPS8   0x00000100

Definition at line 866 of file cs46xx.h.

#define EGPIOWR_GPW0   0x00000001

Definition at line 874 of file cs46xx.h.

#define EGPIOWR_GPW1   0x00000002

Definition at line 875 of file cs46xx.h.

#define EGPIOWR_GPW2   0x00000004

Definition at line 876 of file cs46xx.h.

#define EGPIOWR_GPW3   0x00000008

Definition at line 877 of file cs46xx.h.

#define EGPIOWR_GPW4   0x00000010

Definition at line 878 of file cs46xx.h.

#define EGPIOWR_GPW5   0x00000020

Definition at line 879 of file cs46xx.h.

#define EGPIOWR_GPW6   0x00000040

Definition at line 880 of file cs46xx.h.

#define EGPIOWR_GPW7   0x00000080

Definition at line 881 of file cs46xx.h.

#define EGPIOWR_GPW8   0x00000100

Definition at line 882 of file cs46xx.h.

#define EPCIPMC_FSPC   0x00000002

Definition at line 1166 of file cs46xx.h.

#define EPCIPMC_GWU   0x00000001

Definition at line 1165 of file cs46xx.h.

#define FGR1_F1S_MASK   0x0000FFFF

Definition at line 1406 of file cs46xx.h.

#define FGR1_F1S_SHIFT   0

Definition at line 1407 of file cs46xx.h.

#define FRCC_FCC_MASK   0x0000FFFF

Definition at line 1446 of file cs46xx.h.

#define FRCC_FCC_SHIFT   0

Definition at line 1447 of file cs46xx.h.

#define FRMT_FTV_MASK   0x0000FFFF

Definition at line 1439 of file cs46xx.h.

#define FRMT_FTV_SHIFT   0

Definition at line 1440 of file cs46xx.h.

#define FRR_CFOP_128_PIN   0x00000080

Definition at line 470 of file cs46xx.h.

#define FRR_CFOP_A3D   0x00000040

Definition at line 469 of file cs46xx.h.

#define FRR_CFOP_CS4280   0x00000800

Definition at line 472 of file cs46xx.h.

#define FRR_CFOP_MASK   0x00000FE0

Definition at line 466 of file cs46xx.h.

#define FRR_CFOP_NOT_DVD   0x00000020

Definition at line 468 of file cs46xx.h.

#define FRR_CFOP_SHIFT   5

Definition at line 476 of file cs46xx.h.

#define FRR_FAB_MASK   0x00000003

Definition at line 461 of file cs46xx.h.

#define FRR_FAB_SHIFT   0

Definition at line 474 of file cs46xx.h.

#define FRR_MASK_MASK   0x0000001C

Definition at line 462 of file cs46xx.h.

#define FRR_MASK_SHIFT   2

Definition at line 475 of file cs46xx.h.

#define FRSC_FCS_MASK   0x0000FFFF

Definition at line 1453 of file cs46xx.h.

#define FRSC_FCS_SHIFT   0

Definition at line 1454 of file cs46xx.h.

#define GPIOR_SI2D   0x00000004

Definition at line 818 of file cs46xx.h.

#define GPIOR_SI2OE   0x00000008

Definition at line 819 of file cs46xx.h.

#define GPIOR_VOLDN   0x00000001

Definition at line 816 of file cs46xx.h.

#define GPIOR_VOLUP   0x00000002

Definition at line 817 of file cs46xx.h.

#define HDAR_DSP_ADDR_MASK   0x0000FFFF

Definition at line 294 of file cs46xx.h.

#define HDAR_END   0x40000000

Definition at line 301 of file cs46xx.h.

#define HDAR_ERR   0x80000000

Definition at line 302 of file cs46xx.h.

#define HDAR_HOST_ADDR_MASK   0xFFFFFFFF

Definition at line 293 of file cs46xx.h.

#define HDAR_MEMID_MASK   0x000F0000

Definition at line 295 of file cs46xx.h.

#define HDAR_MEMID_OMNI_MEM   0x000E0000

Definition at line 300 of file cs46xx.h.

#define HDAR_MEMID_SP_DEBUG   0x00030000

Definition at line 299 of file cs46xx.h.

#define HDAR_MEMID_SP_DMEM0   0x00000000

Definition at line 296 of file cs46xx.h.

#define HDAR_MEMID_SP_DMEM1   0x00010000

Definition at line 297 of file cs46xx.h.

#define HDAR_MEMID_SP_PMEM   0x00020000

Definition at line 298 of file cs46xx.h.

#define HDCR_COUNT_MASK   0x000003FF

Definition at line 316 of file cs46xx.h.

#define HDCR_COUNT_SHIFT   0

Definition at line 341 of file cs46xx.h.

#define HDCR_DH   0x08000000

Definition at line 330 of file cs46xx.h.

#define HDCR_DMS_1024_DWORDS   0x07000000

Definition at line 329 of file cs46xx.h.

#define HDCR_DMS_128_DWORDS   0x04000000

Definition at line 326 of file cs46xx.h.

#define HDCR_DMS_16_DWORDS   0x01000000

Definition at line 323 of file cs46xx.h.

#define HDCR_DMS_256_DWORDS   0x05000000

Definition at line 327 of file cs46xx.h.

#define HDCR_DMS_32_DWORDS   0x02000000

Definition at line 324 of file cs46xx.h.

#define HDCR_DMS_512_DWORDS   0x06000000

Definition at line 328 of file cs46xx.h.

#define HDCR_DMS_64_DWORDS   0x03000000

Definition at line 325 of file cs46xx.h.

#define HDCR_DMS_LINEAR   0x00000000

Definition at line 322 of file cs46xx.h.

#define HDCR_DMS_MASK   0x07000000

Definition at line 321 of file cs46xx.h.

#define HDCR_DONE   0x00004000

Definition at line 317 of file cs46xx.h.

#define HDCR_OPT   0x00008000

Definition at line 318 of file cs46xx.h.

#define HDCR_SH   0x80000000

Definition at line 340 of file cs46xx.h.

#define HDCR_SMS_1024_DWORDS   0x70000000

Definition at line 339 of file cs46xx.h.

#define HDCR_SMS_128_DWORDS   0x40000000

Definition at line 336 of file cs46xx.h.

#define HDCR_SMS_16_DWORDS   0x10000000

Definition at line 333 of file cs46xx.h.

#define HDCR_SMS_256_DWORDS   0x50000000

Definition at line 337 of file cs46xx.h.

#define HDCR_SMS_32_DWORDS   0x20000000

Definition at line 334 of file cs46xx.h.

#define HDCR_SMS_512_DWORDS   0x60000000

Definition at line 338 of file cs46xx.h.

#define HDCR_SMS_64_DWORDS   0x30000000

Definition at line 335 of file cs46xx.h.

#define HDCR_SMS_LINEAR   0x00000000

Definition at line 332 of file cs46xx.h.

#define HDCR_SMS_MASK   0x70000000

Definition at line 331 of file cs46xx.h.

#define HDCR_WBD   0x00400000

Definition at line 319 of file cs46xx.h.

#define HDCR_WBS   0x00800000

Definition at line 320 of file cs46xx.h.

#define HDMR_AC_8_16   0x00001000

Definition at line 308 of file cs46xx.h.

#define HDMR_AC_B_L   0x00004000

Definition at line 310 of file cs46xx.h.

#define HDMR_AC_M_S   0x00002000

Definition at line 309 of file cs46xx.h.

#define HDMR_AC_MASK   0x0000F000

Definition at line 307 of file cs46xx.h.

#define HDMR_AC_S_U   0x00008000

Definition at line 311 of file cs46xx.h.

#define HICR_CHGM   0x00000002

Definition at line 264 of file cs46xx.h.

#define HICR_IEV   0x00000001

Definition at line 263 of file cs46xx.h.

#define HISR_DMAI   0x00040000

Definition at line 210 of file cs46xx.h.

#define HISR_FROVR   0x00080000

Definition at line 211 of file cs46xx.h.

#define HISR_H0P   0x40000000

Definition at line 219 of file cs46xx.h.

#define HISR_INT0   0x00010000

Definition at line 208 of file cs46xx.h.

#define HISR_INT1   0x00020000

Definition at line 209 of file cs46xx.h.

#define HISR_INTENA   0x80000000

Definition at line 220 of file cs46xx.h.

#define HISR_MIDI   0x00100000

Definition at line 212 of file cs46xx.h.

#define HISR_RESERVED   0x0FC00000

Definition at line 217 of file cs46xx.h.

#define HISR_SBINT   0x00200000

Definition at line 216 of file cs46xx.h.

#define HISR_VC0   0x00000001

Definition at line 192 of file cs46xx.h.

#define HISR_VC1   0x00000002

Definition at line 193 of file cs46xx.h.

#define HISR_VC10   0x00000400

Definition at line 202 of file cs46xx.h.

#define HISR_VC11   0x00000800

Definition at line 203 of file cs46xx.h.

#define HISR_VC12   0x00001000

Definition at line 204 of file cs46xx.h.

#define HISR_VC13   0x00002000

Definition at line 205 of file cs46xx.h.

#define HISR_VC14   0x00004000

Definition at line 206 of file cs46xx.h.

#define HISR_VC15   0x00008000

Definition at line 207 of file cs46xx.h.

#define HISR_VC2   0x00000004

Definition at line 194 of file cs46xx.h.

#define HISR_VC3   0x00000008

Definition at line 195 of file cs46xx.h.

#define HISR_VC4   0x00000010

Definition at line 196 of file cs46xx.h.

#define HISR_VC5   0x00000020

Definition at line 197 of file cs46xx.h.

#define HISR_VC6   0x00000040

Definition at line 198 of file cs46xx.h.

#define HISR_VC7   0x00000080

Definition at line 199 of file cs46xx.h.

#define HISR_VC8   0x00000100

Definition at line 200 of file cs46xx.h.

#define HISR_VC9   0x00000200

Definition at line 201 of file cs46xx.h.

#define HISR_VC_MASK   0x0000FFFF

Definition at line 191 of file cs46xx.h.

#define HSAR_DSP_ADDR_MASK   0x0000FFFF

Definition at line 279 of file cs46xx.h.

#define HSAR_END   0x40000000

Definition at line 286 of file cs46xx.h.

#define HSAR_ERR   0x80000000

Definition at line 287 of file cs46xx.h.

#define HSAR_HOST_ADDR_MASK   0xFFFFFFFF

Definition at line 278 of file cs46xx.h.

#define HSAR_MEMID_MASK   0x000F0000

Definition at line 280 of file cs46xx.h.

#define HSAR_MEMID_OMNI_MEM   0x000E0000

Definition at line 285 of file cs46xx.h.

#define HSAR_MEMID_SP_DEBUG   0x00030000

Definition at line 284 of file cs46xx.h.

#define HSAR_MEMID_SP_DMEM0   0x00000000

Definition at line 281 of file cs46xx.h.

#define HSAR_MEMID_SP_DMEM1   0x00010000

Definition at line 282 of file cs46xx.h.

#define HSAR_MEMID_SP_PMEM   0x00020000

Definition at line 283 of file cs46xx.h.

#define HSR0_VC16   0x00000001

Definition at line 226 of file cs46xx.h.

#define HSR0_VC17   0x00000002

Definition at line 227 of file cs46xx.h.

#define HSR0_VC18   0x00000004

Definition at line 228 of file cs46xx.h.

#define HSR0_VC19   0x00000008

Definition at line 229 of file cs46xx.h.

#define HSR0_VC20   0x00000010

Definition at line 230 of file cs46xx.h.

#define HSR0_VC21   0x00000020

Definition at line 231 of file cs46xx.h.

#define HSR0_VC22   0x00000040

Definition at line 232 of file cs46xx.h.

#define HSR0_VC23   0x00000080

Definition at line 233 of file cs46xx.h.

#define HSR0_VC24   0x00000100

Definition at line 234 of file cs46xx.h.

#define HSR0_VC25   0x00000200

Definition at line 235 of file cs46xx.h.

#define HSR0_VC26   0x00000400

Definition at line 236 of file cs46xx.h.

#define HSR0_VC27   0x00000800

Definition at line 237 of file cs46xx.h.

#define HSR0_VC28   0x00001000

Definition at line 238 of file cs46xx.h.

#define HSR0_VC29   0x00002000

Definition at line 239 of file cs46xx.h.

#define HSR0_VC30   0x00004000

Definition at line 240 of file cs46xx.h.

#define HSR0_VC31   0x00008000

Definition at line 241 of file cs46xx.h.

#define HSR0_VC32   0x00010000

Definition at line 242 of file cs46xx.h.

#define HSR0_VC33   0x00020000

Definition at line 243 of file cs46xx.h.

#define HSR0_VC34   0x00040000

Definition at line 244 of file cs46xx.h.

#define HSR0_VC35   0x00080000

Definition at line 245 of file cs46xx.h.

#define HSR0_VC36   0x00100000

Definition at line 246 of file cs46xx.h.

#define HSR0_VC37   0x00200000

Definition at line 247 of file cs46xx.h.

#define HSR0_VC38   0x00400000

Definition at line 248 of file cs46xx.h.

#define HSR0_VC39   0x00800000

Definition at line 249 of file cs46xx.h.

#define HSR0_VC40   0x01000000

Definition at line 250 of file cs46xx.h.

#define HSR0_VC41   0x02000000

Definition at line 251 of file cs46xx.h.

#define HSR0_VC42   0x04000000

Definition at line 252 of file cs46xx.h.

#define HSR0_VC43   0x08000000

Definition at line 253 of file cs46xx.h.

#define HSR0_VC44   0x10000000

Definition at line 254 of file cs46xx.h.

#define HSR0_VC45   0x20000000

Definition at line 255 of file cs46xx.h.

#define HSR0_VC46   0x40000000

Definition at line 256 of file cs46xx.h.

#define HSR0_VC47   0x80000000

Definition at line 257 of file cs46xx.h.

#define HSR0_VC_MASK   0xFFFFFFFF

Definition at line 225 of file cs46xx.h.

#define IOTAC_IODC_10_BIT   0x02000000

Definition at line 1033 of file cs46xx.h.

#define IOTAC_IODC_12_BIT   0x04000000

Definition at line 1034 of file cs46xx.h.

#define IOTAC_IODC_16_BIT   0x00000000

Definition at line 1032 of file cs46xx.h.

#define IOTAC_IODC_MASK   0x06000000

Definition at line 1031 of file cs46xx.h.

#define IOTAC_MSK_MASK   0x000F0000

Definition at line 1030 of file cs46xx.h.

#define IOTAC_MSK_SHIFT   16

Definition at line 1041 of file cs46xx.h.

#define IOTAC_RE   0x80000000

Definition at line 1039 of file cs46xx.h.

#define IOTAC_RSPI   0x10000000

Definition at line 1036 of file cs46xx.h.

#define IOTAC_SA_MASK   0x0000FFFF

Definition at line 1029 of file cs46xx.h.

#define IOTAC_SA_SHIFT   0

Definition at line 1040 of file cs46xx.h.

#define IOTAC_WE   0x40000000

Definition at line 1038 of file cs46xx.h.

#define IOTAC_WSE   0x20000000

Definition at line 1037 of file cs46xx.h.

#define IOTAC_WSPI   0x08000000

Definition at line 1035 of file cs46xx.h.

#define IOTCR_DDP   0x00000020

Definition at line 1101 of file cs46xx.h.

#define IOTCR_DFI   0x00000010

Definition at line 1100 of file cs46xx.h.

#define IOTCR_DTI   0x00000008

Definition at line 1099 of file cs46xx.h.

#define IOTCR_HRV   0x00000002

Definition at line 1097 of file cs46xx.h.

#define IOTCR_ITD   0x00000001

Definition at line 1096 of file cs46xx.h.

#define IOTCR_JTE   0x00000040

Definition at line 1102 of file cs46xx.h.

#define IOTCR_PPE   0x00000080

Definition at line 1103 of file cs46xx.h.

#define IOTCR_SRV   0x00000004

Definition at line 1098 of file cs46xx.h.

#define IOTFIFO_BA_MASK   0x00003FFF

Definition at line 1063 of file cs46xx.h.

#define IOTFIFO_BA_SHIFT   0

Definition at line 1067 of file cs46xx.h.

#define IOTFIFO_OF   0x40000000

Definition at line 1065 of file cs46xx.h.

#define IOTFIFO_S_MASK   0x00FF0000

Definition at line 1064 of file cs46xx.h.

#define IOTFIFO_S_SHIFT   16

Definition at line 1068 of file cs46xx.h.

#define IOTFIFO_SPIOF   0x80000000

Definition at line 1066 of file cs46xx.h.

#define IOTFP_CA_MASK   0x00003FFF

Definition at line 1086 of file cs46xx.h.

#define IOTFP_CA_SHIFT   0

Definition at line 1088 of file cs46xx.h.

#define IOTFP_PA_MASK   0x3FFF0000

Definition at line 1087 of file cs46xx.h.

#define IOTFP_PA_SHIFT   16

Definition at line 1089 of file cs46xx.h.

#define IOTFR_A_MASK   0x000F0000

Definition at line 1050 of file cs46xx.h.

#define IOTFR_A_SHIFT   16

Definition at line 1055 of file cs46xx.h.

#define IOTFR_ALL   0x40000000

Definition at line 1052 of file cs46xx.h.

#define IOTFR_D_MASK   0x0000FFFF

Definition at line 1049 of file cs46xx.h.

#define IOTFR_D_SHIFT   0

Definition at line 1054 of file cs46xx.h.

#define IOTFR_R_MASK   0x0F000000

Definition at line 1051 of file cs46xx.h.

#define IOTFR_R_SHIFT   24

Definition at line 1056 of file cs46xx.h.

#define IOTFR_VL   0x80000000

Definition at line 1053 of file cs46xx.h.

#define IOTRRD_D_MASK   0x0000FFFF

Definition at line 1076 of file cs46xx.h.

#define IOTRRD_D_SHIFT   0

Definition at line 1078 of file cs46xx.h.

#define IOTRRD_RDV   0x80000000

Definition at line 1077 of file cs46xx.h.

#define JSC1_X1V_MASK   0xFFFF0000

Definition at line 734 of file cs46xx.h.

#define JSC1_X1V_SHIFT   16

Definition at line 736 of file cs46xx.h.

#define JSC1_Y1V_MASK   0x0000FFFF

Definition at line 733 of file cs46xx.h.

#define JSC1_Y1V_SHIFT   0

Definition at line 735 of file cs46xx.h.

#define JSC2_X2V_MASK   0xFFFF0000

Definition at line 743 of file cs46xx.h.

#define JSC2_X2V_SHIFT   16

Definition at line 745 of file cs46xx.h.

#define JSC2_Y2V_MASK   0x0000FFFF

Definition at line 742 of file cs46xx.h.

#define JSC2_Y2V_SHIFT   0

Definition at line 744 of file cs46xx.h.

#define JSCTL_ARE   0x00000004

Definition at line 727 of file cs46xx.h.

#define JSCTL_SP_FAST   0x00000003

Definition at line 726 of file cs46xx.h.

#define JSCTL_SP_MASK   0x00000003

Definition at line 722 of file cs46xx.h.

#define JSCTL_SP_MEDIUM_FAST   0x00000002

Definition at line 725 of file cs46xx.h.

#define JSCTL_SP_MEDIUM_SLOW   0x00000001

Definition at line 724 of file cs46xx.h.

#define JSCTL_SP_SLOW   0x00000000

Definition at line 723 of file cs46xx.h.

#define JSIO_AXOE   0x00000010

Definition at line 782 of file cs46xx.h.

#define JSIO_AYOE   0x00000020

Definition at line 783 of file cs46xx.h.

#define JSIO_BXOE   0x00000040

Definition at line 784 of file cs46xx.h.

#define JSIO_BYOE   0x00000080

Definition at line 785 of file cs46xx.h.

#define JSIO_DAX   0x00000001

Definition at line 778 of file cs46xx.h.

#define JSIO_DAY   0x00000002

Definition at line 779 of file cs46xx.h.

#define JSIO_DBX   0x00000004

Definition at line 780 of file cs46xx.h.

#define JSIO_DBY   0x00000008

Definition at line 781 of file cs46xx.h.

#define JSPT_BA1   0x00000010

Definition at line 714 of file cs46xx.h.

#define JSPT_BA2   0x00000020

Definition at line 715 of file cs46xx.h.

#define JSPT_BB1   0x00000040

Definition at line 716 of file cs46xx.h.

#define JSPT_BB2   0x00000080

Definition at line 717 of file cs46xx.h.

#define JSPT_CAX   0x00000001

Definition at line 710 of file cs46xx.h.

#define JSPT_CAY   0x00000002

Definition at line 711 of file cs46xx.h.

#define JSPT_CBX   0x00000004

Definition at line 712 of file cs46xx.h.

#define JSPT_CBY   0x00000008

Definition at line 713 of file cs46xx.h.

#define MAX_NR_AC97   4

Definition at line 1621 of file cs46xx.h.

#define MIDCR_MLB   0x00000010 /* Enable midi loopback. */

Definition at line 754 of file cs46xx.h.

#define MIDCR_MRST   0x00000020 /* Reset interface. */

Definition at line 755 of file cs46xx.h.

#define MIDCR_RIE   0x00000004 /* Interrupt upon tx ready. */

Definition at line 752 of file cs46xx.h.

#define MIDCR_RXE   0x00000002 /* Enable receiving. */

Definition at line 751 of file cs46xx.h.

#define MIDCR_TIE   0x00000008 /* Interrupt upon rx ready. */

Definition at line 753 of file cs46xx.h.

#define MIDCR_TXE   0x00000001 /* Enable transmitting. */

Definition at line 750 of file cs46xx.h.

#define MIDRP_MRD_MASK   0x000000FF

Definition at line 772 of file cs46xx.h.

#define MIDRP_MRD_SHIFT   0

Definition at line 773 of file cs46xx.h.

#define MIDSR_RBE   0x00000002 /* Rx FIFO is empty. */

Definition at line 761 of file cs46xx.h.

#define MIDSR_TBF   0x00000001 /* Tx FIFO is full. */

Definition at line 760 of file cs46xx.h.

#define MIDWP_MWD_MASK   0x000000FF

Definition at line 766 of file cs46xx.h.

#define MIDWP_MWD_SHIFT   0

Definition at line 767 of file cs46xx.h.

#define PCPCIEN_EN   0x00000001

Definition at line 1157 of file cs46xx.h.

#define PCPCIG_GDC_MASK   0x00000007

Definition at line 1147 of file cs46xx.h.

#define PCPCIG_GDC_SHIFT   0

Definition at line 1149 of file cs46xx.h.

#define PCPCIG_VL   0x00008000

Definition at line 1148 of file cs46xx.h.

#define PCPCIR_C_MASK   0x00007000

Definition at line 1137 of file cs46xx.h.

#define PCPCIR_C_SHIFT   12

Definition at line 1140 of file cs46xx.h.

#define PCPCIR_RDC_MASK   0x00000007

Definition at line 1136 of file cs46xx.h.

#define PCPCIR_RDC_SHIFT   0

Definition at line 1139 of file cs46xx.h.

#define PCPCIR_REQ   0x00008000

Definition at line 1138 of file cs46xx.h.

#define PFCV1_PC1V_MASK   0xFFFFFFFF

Definition at line 374 of file cs46xx.h.

#define PFCV1_PC1V_SHIFT   0

Definition at line 375 of file cs46xx.h.

#define PFCV2_PC2V_MASK   0xFFFFFFFF

Definition at line 381 of file cs46xx.h.

#define PFCV2_PC2V_SHIFT   0

Definition at line 382 of file cs46xx.h.

#define PFMC_BUS_GRANT   0

Definition at line 355 of file cs46xx.h.

#define PFMC_BUS_OWNERSHIP   9

Definition at line 364 of file cs46xx.h.

#define PFMC_C1EV   0x00000020

Definition at line 348 of file cs46xx.h.

#define PFMC_C1RS   0x00008000

Definition at line 349 of file cs46xx.h.

#define PFMC_C1SS_MASK   0x0000001F

Definition at line 347 of file cs46xx.h.

#define PFMC_C1SS_SHIFT   0

Definition at line 353 of file cs46xx.h.

#define PFMC_C2EV   0x00200000

Definition at line 351 of file cs46xx.h.

#define PFMC_C2RS   0x80000000

Definition at line 352 of file cs46xx.h.

#define PFMC_C2SS_MASK   0x001F0000

Definition at line 350 of file cs46xx.h.

#define PFMC_C2SS_SHIFT   16

Definition at line 354 of file cs46xx.h.

#define PFMC_DISCONNECT_RETRY   7

Definition at line 362 of file cs46xx.h.

#define PFMC_DWORD_TRANSFER   3

Definition at line 358 of file cs46xx.h.

#define PFMC_GRANT_AFTER_REQ   1

Definition at line 356 of file cs46xx.h.

#define PFMC_INTERRUPT   8

Definition at line 363 of file cs46xx.h.

#define PFMC_PCI_CLOCK   11

Definition at line 366 of file cs46xx.h.

#define PFMC_PREEMPTION   6

Definition at line 361 of file cs46xx.h.

#define PFMC_SERIAL_CLOCK   12

Definition at line 367 of file cs46xx.h.

#define PFMC_SLAVE_READ   4

Definition at line 359 of file cs46xx.h.

#define PFMC_SLAVE_WRITE   5

Definition at line 360 of file cs46xx.h.

#define PFMC_SP_CLOCK   13

Definition at line 368 of file cs46xx.h.

#define PFMC_TRANSACTION   2

Definition at line 357 of file cs46xx.h.

#define PFMC_TRANSACTION_LAG   10

Definition at line 365 of file cs46xx.h.

#define PLLCC_CDR_107_154_MHZ   0x00000004

Definition at line 435 of file cs46xx.h.

#define PLLCC_CDR_111_160_MHZ   0x00000003

Definition at line 424 of file cs46xx.h.

#define PLLCC_CDR_144_205_MHZ   0x00000002

Definition at line 423 of file cs46xx.h.

#define PLLCC_CDR_150_215_MHZ   0x00000003

Definition at line 434 of file cs46xx.h.

#define PLLCC_CDR_167_239_MHZ   0x00000002

Definition at line 433 of file cs46xx.h.

#define PLLCC_CDR_184_265_MHZ   0x00000001

Definition at line 422 of file cs46xx.h.

#define PLLCC_CDR_227_330_MHZ   0x00000001

Definition at line 432 of file cs46xx.h.

#define PLLCC_CDR_240_350_MHZ   0x00000000

Definition at line 421 of file cs46xx.h.

#define PLLCC_CDR_271_398_MHZ   0x00000000

Definition at line 431 of file cs46xx.h.

#define PLLCC_CDR_45_58_MHZ   0x00000007

Definition at line 428 of file cs46xx.h.

#define PLLCC_CDR_52_74_MHZ   0x00000006

Definition at line 427 of file cs46xx.h.

#define PLLCC_CDR_63_90_MHZ   0x00000007

Definition at line 438 of file cs46xx.h.

#define PLLCC_CDR_67_96_MHZ   0x00000005

Definition at line 426 of file cs46xx.h.

#define PLLCC_CDR_73_104_MHZ   0x00000006

Definition at line 437 of file cs46xx.h.

#define PLLCC_CDR_87_123_MHZ   0x00000004

Definition at line 425 of file cs46xx.h.

#define PLLCC_CDR_98_140_MHZ   0x00000005

Definition at line 436 of file cs46xx.h.

#define PLLCC_CDR_MASK   0x00000007

Definition at line 419 of file cs46xx.h.

#define PLLCC_LPF_1050_2780_KHZ   0x00000078

Definition at line 454 of file cs46xx.h.

#define PLLCC_LPF_14360_37270_KHZ   0x00000008

Definition at line 451 of file cs46xx.h.

#define PLLCC_LPF_1740_4580_KHZ   0x00000038

Definition at line 445 of file cs46xx.h.

#define PLLCC_LPF_23850_60000_KHZ   0x00000000

Definition at line 442 of file cs46xx.h.

#define PLLCC_LPF_2540_6690_KHZ   0x00000038

Definition at line 453 of file cs46xx.h.

#define PLLCC_LPF_25580_64530_KHZ   0x00000000

Definition at line 450 of file cs46xx.h.

#define PLLCC_LPF_317_798_KHZ   0x000000F8

Definition at line 447 of file cs46xx.h.

#define PLLCC_LPF_4160_10980_KHZ   0x00000018

Definition at line 444 of file cs46xx.h.

#define PLLCC_LPF_450_1160_KHZ   0x000000F8

Definition at line 455 of file cs46xx.h.

#define PLLCC_LPF_6100_16020_KHZ   0x00000018

Definition at line 452 of file cs46xx.h.

#define PLLCC_LPF_724_1910_KHZ   0x00000078

Definition at line 446 of file cs46xx.h.

#define PLLCC_LPF_7960_26290_KHZ   0x00000008

Definition at line 443 of file cs46xx.h.

#define PLLCC_LPF_MASK   0x000000F8

Definition at line 440 of file cs46xx.h.

#define PLLM_MASK   0x000000FF

Definition at line 412 of file cs46xx.h.

#define PLLM_SHIFT   0

Definition at line 413 of file cs46xx.h.

#define POWER_DOWN_ALL   0x7f0f

Definition at line 1618 of file cs46xx.h.

#define SAVE_REG_MAX   0x10

Definition at line 1617 of file cs46xx.h.

#define SDSR_DCS_MASK   0x000000FF

Definition at line 1432 of file cs46xx.h.

#define SDSR_DCS_NONE   0x00000007

Definition at line 1434 of file cs46xx.h.

#define SDSR_DCS_SHIFT   0

Definition at line 1433 of file cs46xx.h.

#define SERACC_CHIP_TYPE_1_03   0x00000000

Definition at line 927 of file cs46xx.h.

#define SERACC_CHIP_TYPE_2_0   0x00000001

Definition at line 928 of file cs46xx.h.

#define SERACC_CHIP_TYPE_MASK   0x00000001

Definition at line 926 of file cs46xx.h.

#define SERACC_HSP   0x00000008

Definition at line 931 of file cs46xx.h.

#define SERACC_MDM   0x00000004

Definition at line 930 of file cs46xx.h.

#define SERACC_ODT   0x00000010 /* only CS4630 */

Definition at line 932 of file cs46xx.h.

#define SERACC_TWO_CODECS   0x00000002

Definition at line 929 of file cs46xx.h.

#define SERBAD_FAD_MASK   0x000001FF

Definition at line 592 of file cs46xx.h.

#define SERBAD_FAD_SHIFT   0

Definition at line 594 of file cs46xx.h.

#define SERBCF_HBP   0x00000001

Definition at line 600 of file cs46xx.h.

#define SERBCM_RDC   0x00000001

Definition at line 582 of file cs46xx.h.

#define SERBCM_WRC   0x00000002

Definition at line 583 of file cs46xx.h.

#define SERBRP_FRD_MASK   0x000FFFFF

Definition at line 613 of file cs46xx.h.

#define SERBRP_FRD_SHIFT   0

Definition at line 614 of file cs46xx.h.

#define SERBSP_FSP_MASK   0x0000000F

Definition at line 568 of file cs46xx.h.

#define SERBSP_FSP_SHIFT   0

Definition at line 569 of file cs46xx.h.

#define SERBST_RRDY   0x00000001

Definition at line 575 of file cs46xx.h.

#define SERBST_WBSY   0x00000002

Definition at line 576 of file cs46xx.h.

#define SERBWP_FWD_MASK   0x000FFFFF

Definition at line 606 of file cs46xx.h.

#define SERBWP_FWD_SHIFT   0

Definition at line 607 of file cs46xx.h.

#define SERC1_SO1EN   0x00000001

Definition at line 519 of file cs46xx.h.

#define SERC1_SO1F_AC97   0x00000002

Definition at line 522 of file cs46xx.h.

#define SERC1_SO1F_CS423X   0x00000000

Definition at line 521 of file cs46xx.h.

#define SERC1_SO1F_DAC   0x00000004

Definition at line 523 of file cs46xx.h.

#define SERC1_SO1F_MASK   0x0000000E

Definition at line 520 of file cs46xx.h.

#define SERC1_SO1F_SPDIF   0x00000006

Definition at line 524 of file cs46xx.h.

#define SERC2_SI1EN   0x00000001

Definition at line 530 of file cs46xx.h.

#define SERC2_SI1F_AC97   0x00000002

Definition at line 533 of file cs46xx.h.

#define SERC2_SI1F_ADC   0x00000004

Definition at line 534 of file cs46xx.h.

#define SERC2_SI1F_CS423X   0x00000000

Definition at line 532 of file cs46xx.h.

#define SERC2_SI1F_MASK   0x0000000E

Definition at line 531 of file cs46xx.h.

#define SERC2_SI1F_SPDIF   0x00000006

Definition at line 535 of file cs46xx.h.

#define SERC3_SO2EN   0x00000001

Definition at line 541 of file cs46xx.h.

#define SERC3_SO2F_DAC   0x00000000

Definition at line 543 of file cs46xx.h.

#define SERC3_SO2F_MASK   0x00000006

Definition at line 542 of file cs46xx.h.

#define SERC3_SO2F_SPDIF   0x00000002

Definition at line 544 of file cs46xx.h.

#define SERC4_SO3EN   0x00000001

Definition at line 550 of file cs46xx.h.

#define SERC4_SO3F_DAC   0x00000000

Definition at line 552 of file cs46xx.h.

#define SERC4_SO3F_MASK   0x00000006

Definition at line 551 of file cs46xx.h.

#define SERC4_SO3F_SPDIF   0x00000002

Definition at line 553 of file cs46xx.h.

#define SERC5_SI2EN   0x00000001

Definition at line 559 of file cs46xx.h.

#define SERC5_SI2F_ADC   0x00000000

Definition at line 561 of file cs46xx.h.

#define SERC5_SI2F_MASK   0x00000006

Definition at line 560 of file cs46xx.h.

#define SERC5_SI2F_SPDIF   0x00000002

Definition at line 562 of file cs46xx.h.

#define SERC6_ASDO2EN   0x00000001

Definition at line 906 of file cs46xx.h.

#define SERC7_ASDI2EN   0x00000001

Definition at line 914 of file cs46xx.h.

#define SERC7_POSILB   0x00000002

Definition at line 915 of file cs46xx.h.

#define SERC7_SIPOLB   0x00000004

Definition at line 916 of file cs46xx.h.

#define SERC7_SISOLB   0x00000010

Definition at line 918 of file cs46xx.h.

#define SERC7_SOSILB   0x00000008

Definition at line 917 of file cs46xx.h.

#define SERMC1_MSPE   0x00000001

Definition at line 499 of file cs46xx.h.

#define SERMC1_PLB   0x00000010

Definition at line 504 of file cs46xx.h.

#define SERMC1_PTC_AC97   0x00000002

Definition at line 502 of file cs46xx.h.

#define SERMC1_PTC_CS423X   0x00000000

Definition at line 501 of file cs46xx.h.

#define SERMC1_PTC_DAC   0x00000004

Definition at line 503 of file cs46xx.h.

#define SERMC1_PTC_MASK   0x0000000E

Definition at line 500 of file cs46xx.h.

#define SERMC1_XLB   0x00000020

Definition at line 505 of file cs46xx.h.

#define SERMC2_LROE   0x00000001

Definition at line 511 of file cs46xx.h.

#define SERMC2_MCDIV   0x00000004

Definition at line 513 of file cs46xx.h.

#define SERMC2_MCOE   0x00000002

Definition at line 512 of file cs46xx.h.

#define SPCR_CRE   0x00008000

Definition at line 1182 of file cs46xx.h.

#define SPCR_DRQEN   0x00000020

Definition at line 1176 of file cs46xx.h.

#define SPCR_OINTD   0x00000200

Definition at line 1181 of file cs46xx.h.

#define SPCR_OREN   0x00000080

Definition at line 1178 of file cs46xx.h.

#define SPCR_PCIINT   0x00000100

Definition at line 1180 of file cs46xx.h.

#define SPCR_RSTSP   0x00000040

Definition at line 1177 of file cs46xx.h.

#define SPCR_RUN   0x00000001

Definition at line 1172 of file cs46xx.h.

#define SPCR_RUNFR   0x00000004

Definition at line 1174 of file cs46xx.h.

#define SPCR_STPFR   0x00000002

Definition at line 1173 of file cs46xx.h.

#define SPCR_TICK   0x00000008

Definition at line 1175 of file cs46xx.h.

#define SPCS_DOI   0x00000002

Definition at line 1413 of file cs46xx.h.

#define SPCS_FG   0x00000400

Definition at line 1422 of file cs46xx.h.

#define SPCS_FGN_MASK   0x0000E000

Definition at line 1425 of file cs46xx.h.

#define SPCS_FGN_SHIFT   13

Definition at line 1426 of file cs46xx.h.

#define SPCS_FRI   0x00000001

Definition at line 1412 of file cs46xx.h.

#define SPCS_GPI2   0x00000004

Definition at line 1414 of file cs46xx.h.

#define SPCS_GPI3   0x00000008

Definition at line 1415 of file cs46xx.h.

#define SPCS_IP0   0x00000010

Definition at line 1416 of file cs46xx.h.

#define SPCS_IP1   0x00000020

Definition at line 1417 of file cs46xx.h.

#define SPCS_IP2   0x00000040

Definition at line 1418 of file cs46xx.h.

#define SPCS_IP3   0x00000080

Definition at line 1419 of file cs46xx.h.

#define SPCS_IRQ   0x00001000

Definition at line 1424 of file cs46xx.h.

#define SPCS_ORUN   0x00000800

Definition at line 1423 of file cs46xx.h.

#define SPCS_SLEEP   0x00000200

Definition at line 1421 of file cs46xx.h.

#define SPCS_SPRUN   0x00000100

Definition at line 1420 of file cs46xx.h.

#define SPIR_DOI   0x00000002

Definition at line 1395 of file cs46xx.h.

#define SPIR_FRI   0x00000001

Definition at line 1394 of file cs46xx.h.

#define SPIR_GPI2   0x00000004

Definition at line 1396 of file cs46xx.h.

#define SPIR_GPI3   0x00000008

Definition at line 1397 of file cs46xx.h.

#define SPIR_IP0   0x00000010

Definition at line 1398 of file cs46xx.h.

#define SPIR_IP1   0x00000020

Definition at line 1399 of file cs46xx.h.

#define SPIR_IP2   0x00000040

Definition at line 1400 of file cs46xx.h.

#define SPIR_IP3   0x00000080

Definition at line 1401 of file cs46xx.h.

#define SPWR_STKP_MASK   0x0000000F

Definition at line 1388 of file cs46xx.h.

#define SPWR_STKP_SHIFT   0

Definition at line 1389 of file cs46xx.h.

#define SSVID_SID_MASK   0xFFFF0000

Definition at line 809 of file cs46xx.h.

#define SSVID_SID_SHIFT   16

Definition at line 811 of file cs46xx.h.

#define SSVID_VID_MASK   0x0000FFFF

Definition at line 808 of file cs46xx.h.

#define SSVID_VID_SHIFT   0

Definition at line 810 of file cs46xx.h.

#define TWPR_TW_MASK   0x0000FFFF

Definition at line 1381 of file cs46xx.h.

#define TWPR_TW_SHIFT   0

Definition at line 1382 of file cs46xx.h.

Function Documentation

int snd_cs46xx_create ( struct snd_card card,
struct pci_dev pci,
int  external_amp,
int  thinkpad,
struct snd_cs46xx **  rcodec 
)

Definition at line 3720 of file cs46xx_lib.c.

int snd_cs46xx_gameport ( struct snd_cs46xx chip)

Definition at line 2652 of file cs46xx_lib.c.

int snd_cs46xx_midi ( struct snd_cs46xx chip,
int  device,
struct snd_rawmidi **  rmidi 
)

Definition at line 2534 of file cs46xx_lib.c.

int snd_cs46xx_mixer ( struct snd_cs46xx chip,
int  spdif_device 
)

Definition at line 2314 of file cs46xx_lib.c.

int snd_cs46xx_pcm ( struct snd_cs46xx chip,
int  device,
struct snd_pcm **  rpcm 
)

Definition at line 1593 of file cs46xx_lib.c.

int snd_cs46xx_pcm_center_lfe ( struct snd_cs46xx chip,
int  device,
struct snd_pcm **  rpcm 
)
int snd_cs46xx_pcm_iec958 ( struct snd_cs46xx chip,
int  device,
struct snd_pcm **  rpcm 
)
int snd_cs46xx_pcm_rear ( struct snd_cs46xx chip,
int  device,
struct snd_pcm **  rpcm 
)
int snd_cs46xx_start_dsp ( struct snd_cs46xx chip)

Definition at line 3064 of file cs46xx_lib.c.

Variable Documentation

struct dev_pm_ops snd_cs46xx_pm