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Macros
ctrl_module_pad_core_44xx.h File Reference

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Macros

#define OMAP4_CTRL_MODULE_PAD_CORE   0x4a100000
 
#define OMAP4_CTRL_MODULE_PAD_CORE_IP_REVISION   0x0000
 
#define OMAP4_CTRL_MODULE_PAD_CORE_IP_HWINFO   0x0004
 
#define OMAP4_CTRL_MODULE_PAD_CORE_IP_SYSCONFIG   0x0010
 
#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_0   0x01d8
 
#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_1   0x01dc
 
#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_2   0x01e0
 
#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_3   0x01e4
 
#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_4   0x01e8
 
#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_5   0x01ec
 
#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_6   0x01f0
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PADCONF_GLOBAL   0x05a0
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PADCONF_MODE   0x05a4
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART1IO_PADCONF_0   0x05a8
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART1IO_PADCONF_1   0x05ac
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_0   0x05b0
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_1   0x05b4
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_0   0x05b8
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_1   0x05bc
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_2   0x05c0
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USBB_HSIC   0x05c4
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SLIMBUS   0x05c8
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE   0x0600
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0   0x0604
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_CAMERA_RX   0x0608
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_AVDAC   0x060c
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HDMI_TX_PHY   0x0610
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC2   0x0614
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY   0x0618
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP   0x061c
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USB2PHYCORE   0x0620
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1   0x0624
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC1   0x0628
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HSI   0x062c
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USB   0x0630
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HDQ   0x0634
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_0   0x0638
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_1   0x063c
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_2   0x0640
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_3   0x0644
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_0   0x0648
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_1   0x064c
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_2   0x0650
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_3   0x0654
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_BUS_HOLD   0x0658
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_C2C   0x065c
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_RW   0x0660
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_R   0x0664
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_R_C0   0x0668
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_1   0x0700
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_2   0x0704
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_3   0x0708
 
#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_4   0x070c
 
#define OMAP4_IP_REV_SCHEME_SHIFT   30
 
#define OMAP4_IP_REV_SCHEME_MASK   (0x3 << 30)
 
#define OMAP4_IP_REV_FUNC_SHIFT   16
 
#define OMAP4_IP_REV_FUNC_MASK   (0xfff << 16)
 
#define OMAP4_IP_REV_RTL_SHIFT   11
 
#define OMAP4_IP_REV_RTL_MASK   (0x1f << 11)
 
#define OMAP4_IP_REV_MAJOR_SHIFT   8
 
#define OMAP4_IP_REV_MAJOR_MASK   (0x7 << 8)
 
#define OMAP4_IP_REV_CUSTOM_SHIFT   6
 
#define OMAP4_IP_REV_CUSTOM_MASK   (0x3 << 6)
 
#define OMAP4_IP_REV_MINOR_SHIFT   0
 
#define OMAP4_IP_REV_MINOR_MASK   (0x3f << 0)
 
#define OMAP4_IP_HWINFO_SHIFT   0
 
#define OMAP4_IP_HWINFO_MASK   (0xffffffff << 0)
 
#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT   2
 
#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK   (0x3 << 2)
 
#define OMAP4_GPMC_CLK_DUPLICATEWAKEUPEVENT_SHIFT   31
 
#define OMAP4_GPMC_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 31)
 
#define OMAP4_GPMC_NWP_DUPLICATEWAKEUPEVENT_SHIFT   30
 
#define OMAP4_GPMC_NWP_DUPLICATEWAKEUPEVENT_MASK   (1 << 30)
 
#define OMAP4_GPMC_NCS3_DUPLICATEWAKEUPEVENT_SHIFT   29
 
#define OMAP4_GPMC_NCS3_DUPLICATEWAKEUPEVENT_MASK   (1 << 29)
 
#define OMAP4_GPMC_NCS2_DUPLICATEWAKEUPEVENT_SHIFT   28
 
#define OMAP4_GPMC_NCS2_DUPLICATEWAKEUPEVENT_MASK   (1 << 28)
 
#define OMAP4_GPMC_NCS1_DUPLICATEWAKEUPEVENT_SHIFT   27
 
#define OMAP4_GPMC_NCS1_DUPLICATEWAKEUPEVENT_MASK   (1 << 27)
 
#define OMAP4_GPMC_NCS0_DUPLICATEWAKEUPEVENT_SHIFT   26
 
#define OMAP4_GPMC_NCS0_DUPLICATEWAKEUPEVENT_MASK   (1 << 26)
 
#define OMAP4_GPMC_A25_DUPLICATEWAKEUPEVENT_SHIFT   25
 
#define OMAP4_GPMC_A25_DUPLICATEWAKEUPEVENT_MASK   (1 << 25)
 
#define OMAP4_GPMC_A24_DUPLICATEWAKEUPEVENT_SHIFT   24
 
#define OMAP4_GPMC_A24_DUPLICATEWAKEUPEVENT_MASK   (1 << 24)
 
#define OMAP4_GPMC_A23_DUPLICATEWAKEUPEVENT_SHIFT   23
 
#define OMAP4_GPMC_A23_DUPLICATEWAKEUPEVENT_MASK   (1 << 23)
 
#define OMAP4_GPMC_A22_DUPLICATEWAKEUPEVENT_SHIFT   22
 
#define OMAP4_GPMC_A22_DUPLICATEWAKEUPEVENT_MASK   (1 << 22)
 
#define OMAP4_GPMC_A21_DUPLICATEWAKEUPEVENT_SHIFT   21
 
#define OMAP4_GPMC_A21_DUPLICATEWAKEUPEVENT_MASK   (1 << 21)
 
#define OMAP4_GPMC_A20_DUPLICATEWAKEUPEVENT_SHIFT   20
 
#define OMAP4_GPMC_A20_DUPLICATEWAKEUPEVENT_MASK   (1 << 20)
 
#define OMAP4_GPMC_A19_DUPLICATEWAKEUPEVENT_SHIFT   19
 
#define OMAP4_GPMC_A19_DUPLICATEWAKEUPEVENT_MASK   (1 << 19)
 
#define OMAP4_GPMC_A18_DUPLICATEWAKEUPEVENT_SHIFT   18
 
#define OMAP4_GPMC_A18_DUPLICATEWAKEUPEVENT_MASK   (1 << 18)
 
#define OMAP4_GPMC_A17_DUPLICATEWAKEUPEVENT_SHIFT   17
 
#define OMAP4_GPMC_A17_DUPLICATEWAKEUPEVENT_MASK   (1 << 17)
 
#define OMAP4_GPMC_A16_DUPLICATEWAKEUPEVENT_SHIFT   16
 
#define OMAP4_GPMC_A16_DUPLICATEWAKEUPEVENT_MASK   (1 << 16)
 
#define OMAP4_GPMC_AD15_DUPLICATEWAKEUPEVENT_SHIFT   15
 
#define OMAP4_GPMC_AD15_DUPLICATEWAKEUPEVENT_MASK   (1 << 15)
 
#define OMAP4_GPMC_AD14_DUPLICATEWAKEUPEVENT_SHIFT   14
 
#define OMAP4_GPMC_AD14_DUPLICATEWAKEUPEVENT_MASK   (1 << 14)
 
#define OMAP4_GPMC_AD13_DUPLICATEWAKEUPEVENT_SHIFT   13
 
#define OMAP4_GPMC_AD13_DUPLICATEWAKEUPEVENT_MASK   (1 << 13)
 
#define OMAP4_GPMC_AD12_DUPLICATEWAKEUPEVENT_SHIFT   12
 
#define OMAP4_GPMC_AD12_DUPLICATEWAKEUPEVENT_MASK   (1 << 12)
 
#define OMAP4_GPMC_AD11_DUPLICATEWAKEUPEVENT_SHIFT   11
 
#define OMAP4_GPMC_AD11_DUPLICATEWAKEUPEVENT_MASK   (1 << 11)
 
#define OMAP4_GPMC_AD10_DUPLICATEWAKEUPEVENT_SHIFT   10
 
#define OMAP4_GPMC_AD10_DUPLICATEWAKEUPEVENT_MASK   (1 << 10)
 
#define OMAP4_GPMC_AD9_DUPLICATEWAKEUPEVENT_SHIFT   9
 
#define OMAP4_GPMC_AD9_DUPLICATEWAKEUPEVENT_MASK   (1 << 9)
 
#define OMAP4_GPMC_AD8_DUPLICATEWAKEUPEVENT_SHIFT   8
 
#define OMAP4_GPMC_AD8_DUPLICATEWAKEUPEVENT_MASK   (1 << 8)
 
#define OMAP4_GPMC_AD7_DUPLICATEWAKEUPEVENT_SHIFT   7
 
#define OMAP4_GPMC_AD7_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)
 
#define OMAP4_GPMC_AD6_DUPLICATEWAKEUPEVENT_SHIFT   6
 
#define OMAP4_GPMC_AD6_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)
 
#define OMAP4_GPMC_AD5_DUPLICATEWAKEUPEVENT_SHIFT   5
 
#define OMAP4_GPMC_AD5_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)
 
#define OMAP4_GPMC_AD4_DUPLICATEWAKEUPEVENT_SHIFT   4
 
#define OMAP4_GPMC_AD4_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)
 
#define OMAP4_GPMC_AD3_DUPLICATEWAKEUPEVENT_SHIFT   3
 
#define OMAP4_GPMC_AD3_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)
 
#define OMAP4_GPMC_AD2_DUPLICATEWAKEUPEVENT_SHIFT   2
 
#define OMAP4_GPMC_AD2_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)
 
#define OMAP4_GPMC_AD1_DUPLICATEWAKEUPEVENT_SHIFT   1
 
#define OMAP4_GPMC_AD1_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)
 
#define OMAP4_GPMC_AD0_DUPLICATEWAKEUPEVENT_SHIFT   0
 
#define OMAP4_GPMC_AD0_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)
 
#define OMAP4_CAM_STROBE_DUPLICATEWAKEUPEVENT_SHIFT   31
 
#define OMAP4_CAM_STROBE_DUPLICATEWAKEUPEVENT_MASK   (1 << 31)
 
#define OMAP4_CAM_SHUTTER_DUPLICATEWAKEUPEVENT_SHIFT   30
 
#define OMAP4_CAM_SHUTTER_DUPLICATEWAKEUPEVENT_MASK   (1 << 30)
 
#define OMAP4_CSI22_DY1_DUPLICATEWAKEUPEVENT_SHIFT   29
 
#define OMAP4_CSI22_DY1_DUPLICATEWAKEUPEVENT_MASK   (1 << 29)
 
#define OMAP4_CSI22_DX1_DUPLICATEWAKEUPEVENT_SHIFT   28
 
#define OMAP4_CSI22_DX1_DUPLICATEWAKEUPEVENT_MASK   (1 << 28)
 
#define OMAP4_CSI22_DY0_DUPLICATEWAKEUPEVENT_SHIFT   27
 
#define OMAP4_CSI22_DY0_DUPLICATEWAKEUPEVENT_MASK   (1 << 27)
 
#define OMAP4_CSI22_DX0_DUPLICATEWAKEUPEVENT_SHIFT   26
 
#define OMAP4_CSI22_DX0_DUPLICATEWAKEUPEVENT_MASK   (1 << 26)
 
#define OMAP4_CSI21_DY4_DUPLICATEWAKEUPEVENT_SHIFT   25
 
#define OMAP4_CSI21_DY4_DUPLICATEWAKEUPEVENT_MASK   (1 << 25)
 
#define OMAP4_CSI21_DX4_DUPLICATEWAKEUPEVENT_SHIFT   24
 
#define OMAP4_CSI21_DX4_DUPLICATEWAKEUPEVENT_MASK   (1 << 24)
 
#define OMAP4_CSI21_DY3_DUPLICATEWAKEUPEVENT_SHIFT   23
 
#define OMAP4_CSI21_DY3_DUPLICATEWAKEUPEVENT_MASK   (1 << 23)
 
#define OMAP4_CSI21_DX3_DUPLICATEWAKEUPEVENT_SHIFT   22
 
#define OMAP4_CSI21_DX3_DUPLICATEWAKEUPEVENT_MASK   (1 << 22)
 
#define OMAP4_CSI21_DY2_DUPLICATEWAKEUPEVENT_SHIFT   21
 
#define OMAP4_CSI21_DY2_DUPLICATEWAKEUPEVENT_MASK   (1 << 21)
 
#define OMAP4_CSI21_DX2_DUPLICATEWAKEUPEVENT_SHIFT   20
 
#define OMAP4_CSI21_DX2_DUPLICATEWAKEUPEVENT_MASK   (1 << 20)
 
#define OMAP4_CSI21_DY1_DUPLICATEWAKEUPEVENT_SHIFT   19
 
#define OMAP4_CSI21_DY1_DUPLICATEWAKEUPEVENT_MASK   (1 << 19)
 
#define OMAP4_CSI21_DX1_DUPLICATEWAKEUPEVENT_SHIFT   18
 
#define OMAP4_CSI21_DX1_DUPLICATEWAKEUPEVENT_MASK   (1 << 18)
 
#define OMAP4_CSI21_DY0_DUPLICATEWAKEUPEVENT_SHIFT   17
 
#define OMAP4_CSI21_DY0_DUPLICATEWAKEUPEVENT_MASK   (1 << 17)
 
#define OMAP4_CSI21_DX0_DUPLICATEWAKEUPEVENT_SHIFT   16
 
#define OMAP4_CSI21_DX0_DUPLICATEWAKEUPEVENT_MASK   (1 << 16)
 
#define OMAP4_HDMI_DDC_SDA_DUPLICATEWAKEUPEVENT_SHIFT   15
 
#define OMAP4_HDMI_DDC_SDA_DUPLICATEWAKEUPEVENT_MASK   (1 << 15)
 
#define OMAP4_HDMI_DDC_SCL_DUPLICATEWAKEUPEVENT_SHIFT   14
 
#define OMAP4_HDMI_DDC_SCL_DUPLICATEWAKEUPEVENT_MASK   (1 << 14)
 
#define OMAP4_HDMI_CEC_DUPLICATEWAKEUPEVENT_SHIFT   13
 
#define OMAP4_HDMI_CEC_DUPLICATEWAKEUPEVENT_MASK   (1 << 13)
 
#define OMAP4_HDMI_HPD_DUPLICATEWAKEUPEVENT_SHIFT   12
 
#define OMAP4_HDMI_HPD_DUPLICATEWAKEUPEVENT_MASK   (1 << 12)
 
#define OMAP4_C2C_DATA15_DUPLICATEWAKEUPEVENT_SHIFT   11
 
#define OMAP4_C2C_DATA15_DUPLICATEWAKEUPEVENT_MASK   (1 << 11)
 
#define OMAP4_C2C_DATA14_DUPLICATEWAKEUPEVENT_SHIFT   10
 
#define OMAP4_C2C_DATA14_DUPLICATEWAKEUPEVENT_MASK   (1 << 10)
 
#define OMAP4_C2C_DATA13_DUPLICATEWAKEUPEVENT_SHIFT   9
 
#define OMAP4_C2C_DATA13_DUPLICATEWAKEUPEVENT_MASK   (1 << 9)
 
#define OMAP4_C2C_DATA12_DUPLICATEWAKEUPEVENT_SHIFT   8
 
#define OMAP4_C2C_DATA12_DUPLICATEWAKEUPEVENT_MASK   (1 << 8)
 
#define OMAP4_C2C_DATA11_DUPLICATEWAKEUPEVENT_SHIFT   7
 
#define OMAP4_C2C_DATA11_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)
 
#define OMAP4_GPMC_WAIT1_DUPLICATEWAKEUPEVENT_SHIFT   6
 
#define OMAP4_GPMC_WAIT1_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)
 
#define OMAP4_GPMC_WAIT0_DUPLICATEWAKEUPEVENT_SHIFT   5
 
#define OMAP4_GPMC_WAIT0_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)
 
#define OMAP4_GPMC_NBE1_DUPLICATEWAKEUPEVENT_SHIFT   4
 
#define OMAP4_GPMC_NBE1_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)
 
#define OMAP4_GPMC_NBE0_CLE_DUPLICATEWAKEUPEVENT_SHIFT   3
 
#define OMAP4_GPMC_NBE0_CLE_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)
 
#define OMAP4_GPMC_NWE_DUPLICATEWAKEUPEVENT_SHIFT   2
 
#define OMAP4_GPMC_NWE_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)
 
#define OMAP4_GPMC_NOE_DUPLICATEWAKEUPEVENT_SHIFT   1
 
#define OMAP4_GPMC_NOE_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)
 
#define OMAP4_GPMC_NADV_ALE_DUPLICATEWAKEUPEVENT_SHIFT   0
 
#define OMAP4_GPMC_NADV_ALE_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)
 
#define OMAP4_ABE_MCBSP1_CLKX_DUPLICATEWAKEUPEVENT_SHIFT   31
 
#define OMAP4_ABE_MCBSP1_CLKX_DUPLICATEWAKEUPEVENT_MASK   (1 << 31)
 
#define OMAP4_ABE_MCBSP2_FSX_DUPLICATEWAKEUPEVENT_SHIFT   30
 
#define OMAP4_ABE_MCBSP2_FSX_DUPLICATEWAKEUPEVENT_MASK   (1 << 30)
 
#define OMAP4_ABE_MCBSP2_DX_DUPLICATEWAKEUPEVENT_SHIFT   29
 
#define OMAP4_ABE_MCBSP2_DX_DUPLICATEWAKEUPEVENT_MASK   (1 << 29)
 
#define OMAP4_ABE_MCBSP2_DR_DUPLICATEWAKEUPEVENT_SHIFT   28
 
#define OMAP4_ABE_MCBSP2_DR_DUPLICATEWAKEUPEVENT_MASK   (1 << 28)
 
#define OMAP4_ABE_MCBSP2_CLKX_DUPLICATEWAKEUPEVENT_SHIFT   27
 
#define OMAP4_ABE_MCBSP2_CLKX_DUPLICATEWAKEUPEVENT_MASK   (1 << 27)
 
#define OMAP4_SDMMC1_DAT7_DUPLICATEWAKEUPEVENT_SHIFT   26
 
#define OMAP4_SDMMC1_DAT7_DUPLICATEWAKEUPEVENT_MASK   (1 << 26)
 
#define OMAP4_SDMMC1_DAT6_DUPLICATEWAKEUPEVENT_SHIFT   25
 
#define OMAP4_SDMMC1_DAT6_DUPLICATEWAKEUPEVENT_MASK   (1 << 25)
 
#define OMAP4_SDMMC1_DAT5_DUPLICATEWAKEUPEVENT_SHIFT   24
 
#define OMAP4_SDMMC1_DAT5_DUPLICATEWAKEUPEVENT_MASK   (1 << 24)
 
#define OMAP4_SDMMC1_DAT4_DUPLICATEWAKEUPEVENT_SHIFT   23
 
#define OMAP4_SDMMC1_DAT4_DUPLICATEWAKEUPEVENT_MASK   (1 << 23)
 
#define OMAP4_SDMMC1_DAT3_DUPLICATEWAKEUPEVENT_SHIFT   22
 
#define OMAP4_SDMMC1_DAT3_DUPLICATEWAKEUPEVENT_MASK   (1 << 22)
 
#define OMAP4_SDMMC1_DAT2_DUPLICATEWAKEUPEVENT_SHIFT   21
 
#define OMAP4_SDMMC1_DAT2_DUPLICATEWAKEUPEVENT_MASK   (1 << 21)
 
#define OMAP4_SDMMC1_DAT1_DUPLICATEWAKEUPEVENT_SHIFT   20
 
#define OMAP4_SDMMC1_DAT1_DUPLICATEWAKEUPEVENT_MASK   (1 << 20)
 
#define OMAP4_SDMMC1_DAT0_DUPLICATEWAKEUPEVENT_SHIFT   19
 
#define OMAP4_SDMMC1_DAT0_DUPLICATEWAKEUPEVENT_MASK   (1 << 19)
 
#define OMAP4_SDMMC1_CMD_DUPLICATEWAKEUPEVENT_SHIFT   18
 
#define OMAP4_SDMMC1_CMD_DUPLICATEWAKEUPEVENT_MASK   (1 << 18)
 
#define OMAP4_SDMMC1_CLK_DUPLICATEWAKEUPEVENT_SHIFT   17
 
#define OMAP4_SDMMC1_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 17)
 
#define OMAP4_USBC1_ICUSB_DM_DUPLICATEWAKEUPEVENT_SHIFT   16
 
#define OMAP4_USBC1_ICUSB_DM_DUPLICATEWAKEUPEVENT_MASK   (1 << 16)
 
#define OMAP4_USBC1_ICUSB_DP_DUPLICATEWAKEUPEVENT_SHIFT   15
 
#define OMAP4_USBC1_ICUSB_DP_DUPLICATEWAKEUPEVENT_MASK   (1 << 15)
 
#define OMAP4_USBB1_HSIC_STROBE_DUPLICATEWAKEUPEVENT_SHIFT   14
 
#define OMAP4_USBB1_HSIC_STROBE_DUPLICATEWAKEUPEVENT_MASK   (1 << 14)
 
#define OMAP4_USBB1_HSIC_DATA_DUPLICATEWAKEUPEVENT_SHIFT   13
 
#define OMAP4_USBB1_HSIC_DATA_DUPLICATEWAKEUPEVENT_MASK   (1 << 13)
 
#define OMAP4_USBB1_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_SHIFT   12
 
#define OMAP4_USBB1_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_MASK   (1 << 12)
 
#define OMAP4_USBB1_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_SHIFT   11
 
#define OMAP4_USBB1_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_MASK   (1 << 11)
 
#define OMAP4_USBB1_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_SHIFT   10
 
#define OMAP4_USBB1_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_MASK   (1 << 10)
 
#define OMAP4_USBB1_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_SHIFT   9
 
#define OMAP4_USBB1_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_MASK   (1 << 9)
 
#define OMAP4_USBB1_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_SHIFT   8
 
#define OMAP4_USBB1_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_MASK   (1 << 8)
 
#define OMAP4_USBB1_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_SHIFT   7
 
#define OMAP4_USBB1_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)
 
#define OMAP4_USBB1_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_SHIFT   6
 
#define OMAP4_USBB1_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)
 
#define OMAP4_USBB1_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_SHIFT   5
 
#define OMAP4_USBB1_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)
 
#define OMAP4_USBB1_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_SHIFT   4
 
#define OMAP4_USBB1_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)
 
#define OMAP4_USBB1_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_SHIFT   3
 
#define OMAP4_USBB1_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)
 
#define OMAP4_USBB1_ULPITLL_STP_DUPLICATEWAKEUPEVENT_SHIFT   2
 
#define OMAP4_USBB1_ULPITLL_STP_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)
 
#define OMAP4_USBB1_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_SHIFT   1
 
#define OMAP4_USBB1_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)
 
#define OMAP4_CAM_GLOBALRESET_DUPLICATEWAKEUPEVENT_SHIFT   0
 
#define OMAP4_CAM_GLOBALRESET_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)
 
#define OMAP4_MCSPI1_CS3_DUPLICATEWAKEUPEVENT_SHIFT   31
 
#define OMAP4_MCSPI1_CS3_DUPLICATEWAKEUPEVENT_MASK   (1 << 31)
 
#define OMAP4_MCSPI1_CS2_DUPLICATEWAKEUPEVENT_SHIFT   30
 
#define OMAP4_MCSPI1_CS2_DUPLICATEWAKEUPEVENT_MASK   (1 << 30)
 
#define OMAP4_MCSPI1_CS1_DUPLICATEWAKEUPEVENT_SHIFT   29
 
#define OMAP4_MCSPI1_CS1_DUPLICATEWAKEUPEVENT_MASK   (1 << 29)
 
#define OMAP4_MCSPI1_CS0_DUPLICATEWAKEUPEVENT_SHIFT   28
 
#define OMAP4_MCSPI1_CS0_DUPLICATEWAKEUPEVENT_MASK   (1 << 28)
 
#define OMAP4_MCSPI1_SIMO_DUPLICATEWAKEUPEVENT_SHIFT   27
 
#define OMAP4_MCSPI1_SIMO_DUPLICATEWAKEUPEVENT_MASK   (1 << 27)
 
#define OMAP4_MCSPI1_SOMI_DUPLICATEWAKEUPEVENT_SHIFT   26
 
#define OMAP4_MCSPI1_SOMI_DUPLICATEWAKEUPEVENT_MASK   (1 << 26)
 
#define OMAP4_MCSPI1_CLK_DUPLICATEWAKEUPEVENT_SHIFT   25
 
#define OMAP4_MCSPI1_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 25)
 
#define OMAP4_I2C4_SDA_DUPLICATEWAKEUPEVENT_SHIFT   24
 
#define OMAP4_I2C4_SDA_DUPLICATEWAKEUPEVENT_MASK   (1 << 24)
 
#define OMAP4_I2C4_SCL_DUPLICATEWAKEUPEVENT_SHIFT   23
 
#define OMAP4_I2C4_SCL_DUPLICATEWAKEUPEVENT_MASK   (1 << 23)
 
#define OMAP4_I2C3_SDA_DUPLICATEWAKEUPEVENT_SHIFT   22
 
#define OMAP4_I2C3_SDA_DUPLICATEWAKEUPEVENT_MASK   (1 << 22)
 
#define OMAP4_I2C3_SCL_DUPLICATEWAKEUPEVENT_SHIFT   21
 
#define OMAP4_I2C3_SCL_DUPLICATEWAKEUPEVENT_MASK   (1 << 21)
 
#define OMAP4_I2C2_SDA_DUPLICATEWAKEUPEVENT_SHIFT   20
 
#define OMAP4_I2C2_SDA_DUPLICATEWAKEUPEVENT_MASK   (1 << 20)
 
#define OMAP4_I2C2_SCL_DUPLICATEWAKEUPEVENT_SHIFT   19
 
#define OMAP4_I2C2_SCL_DUPLICATEWAKEUPEVENT_MASK   (1 << 19)
 
#define OMAP4_I2C1_SDA_DUPLICATEWAKEUPEVENT_SHIFT   18
 
#define OMAP4_I2C1_SDA_DUPLICATEWAKEUPEVENT_MASK   (1 << 18)
 
#define OMAP4_I2C1_SCL_DUPLICATEWAKEUPEVENT_SHIFT   17
 
#define OMAP4_I2C1_SCL_DUPLICATEWAKEUPEVENT_MASK   (1 << 17)
 
#define OMAP4_HDQ_SIO_DUPLICATEWAKEUPEVENT_SHIFT   16
 
#define OMAP4_HDQ_SIO_DUPLICATEWAKEUPEVENT_MASK   (1 << 16)
 
#define OMAP4_UART2_TX_DUPLICATEWAKEUPEVENT_SHIFT   15
 
#define OMAP4_UART2_TX_DUPLICATEWAKEUPEVENT_MASK   (1 << 15)
 
#define OMAP4_UART2_RX_DUPLICATEWAKEUPEVENT_SHIFT   14
 
#define OMAP4_UART2_RX_DUPLICATEWAKEUPEVENT_MASK   (1 << 14)
 
#define OMAP4_UART2_RTS_DUPLICATEWAKEUPEVENT_SHIFT   13
 
#define OMAP4_UART2_RTS_DUPLICATEWAKEUPEVENT_MASK   (1 << 13)
 
#define OMAP4_UART2_CTS_DUPLICATEWAKEUPEVENT_SHIFT   12
 
#define OMAP4_UART2_CTS_DUPLICATEWAKEUPEVENT_MASK   (1 << 12)
 
#define OMAP4_ABE_DMIC_DIN3_DUPLICATEWAKEUPEVENT_SHIFT   11
 
#define OMAP4_ABE_DMIC_DIN3_DUPLICATEWAKEUPEVENT_MASK   (1 << 11)
 
#define OMAP4_ABE_DMIC_DIN2_DUPLICATEWAKEUPEVENT_SHIFT   10
 
#define OMAP4_ABE_DMIC_DIN2_DUPLICATEWAKEUPEVENT_MASK   (1 << 10)
 
#define OMAP4_ABE_DMIC_DIN1_DUPLICATEWAKEUPEVENT_SHIFT   9
 
#define OMAP4_ABE_DMIC_DIN1_DUPLICATEWAKEUPEVENT_MASK   (1 << 9)
 
#define OMAP4_ABE_DMIC_CLK1_DUPLICATEWAKEUPEVENT_SHIFT   8
 
#define OMAP4_ABE_DMIC_CLK1_DUPLICATEWAKEUPEVENT_MASK   (1 << 8)
 
#define OMAP4_ABE_CLKS_DUPLICATEWAKEUPEVENT_SHIFT   7
 
#define OMAP4_ABE_CLKS_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)
 
#define OMAP4_ABE_PDM_LB_CLK_DUPLICATEWAKEUPEVENT_SHIFT   6
 
#define OMAP4_ABE_PDM_LB_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)
 
#define OMAP4_ABE_PDM_FRAME_DUPLICATEWAKEUPEVENT_SHIFT   5
 
#define OMAP4_ABE_PDM_FRAME_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)
 
#define OMAP4_ABE_PDM_DL_DATA_DUPLICATEWAKEUPEVENT_SHIFT   4
 
#define OMAP4_ABE_PDM_DL_DATA_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)
 
#define OMAP4_ABE_PDM_UL_DATA_DUPLICATEWAKEUPEVENT_SHIFT   3
 
#define OMAP4_ABE_PDM_UL_DATA_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)
 
#define OMAP4_ABE_MCBSP1_FSX_DUPLICATEWAKEUPEVENT_SHIFT   2
 
#define OMAP4_ABE_MCBSP1_FSX_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)
 
#define OMAP4_ABE_MCBSP1_DX_DUPLICATEWAKEUPEVENT_SHIFT   1
 
#define OMAP4_ABE_MCBSP1_DX_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)
 
#define OMAP4_ABE_MCBSP1_DR_DUPLICATEWAKEUPEVENT_SHIFT   0
 
#define OMAP4_ABE_MCBSP1_DR_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)
 
#define OMAP4_UNIPRO_TY0_DUPLICATEWAKEUPEVENT_SHIFT   31
 
#define OMAP4_UNIPRO_TY0_DUPLICATEWAKEUPEVENT_MASK   (1 << 31)
 
#define OMAP4_UNIPRO_TX0_DUPLICATEWAKEUPEVENT_SHIFT   30
 
#define OMAP4_UNIPRO_TX0_DUPLICATEWAKEUPEVENT_MASK   (1 << 30)
 
#define OMAP4_USBB2_HSIC_STROBE_DUPLICATEWAKEUPEVENT_SHIFT   29
 
#define OMAP4_USBB2_HSIC_STROBE_DUPLICATEWAKEUPEVENT_MASK   (1 << 29)
 
#define OMAP4_USBB2_HSIC_DATA_DUPLICATEWAKEUPEVENT_SHIFT   28
 
#define OMAP4_USBB2_HSIC_DATA_DUPLICATEWAKEUPEVENT_MASK   (1 << 28)
 
#define OMAP4_USBB2_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_SHIFT   27
 
#define OMAP4_USBB2_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_MASK   (1 << 27)
 
#define OMAP4_USBB2_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_SHIFT   26
 
#define OMAP4_USBB2_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_MASK   (1 << 26)
 
#define OMAP4_USBB2_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_SHIFT   25
 
#define OMAP4_USBB2_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_MASK   (1 << 25)
 
#define OMAP4_USBB2_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_SHIFT   24
 
#define OMAP4_USBB2_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_MASK   (1 << 24)
 
#define OMAP4_USBB2_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_SHIFT   23
 
#define OMAP4_USBB2_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_MASK   (1 << 23)
 
#define OMAP4_USBB2_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_SHIFT   22
 
#define OMAP4_USBB2_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_MASK   (1 << 22)
 
#define OMAP4_USBB2_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_SHIFT   21
 
#define OMAP4_USBB2_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_MASK   (1 << 21)
 
#define OMAP4_USBB2_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_SHIFT   20
 
#define OMAP4_USBB2_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_MASK   (1 << 20)
 
#define OMAP4_USBB2_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_SHIFT   19
 
#define OMAP4_USBB2_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_MASK   (1 << 19)
 
#define OMAP4_USBB2_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_SHIFT   18
 
#define OMAP4_USBB2_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_MASK   (1 << 18)
 
#define OMAP4_USBB2_ULPITLL_STP_DUPLICATEWAKEUPEVENT_SHIFT   17
 
#define OMAP4_USBB2_ULPITLL_STP_DUPLICATEWAKEUPEVENT_MASK   (1 << 17)
 
#define OMAP4_USBB2_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_SHIFT   16
 
#define OMAP4_USBB2_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 16)
 
#define OMAP4_UART4_TX_DUPLICATEWAKEUPEVENT_SHIFT   15
 
#define OMAP4_UART4_TX_DUPLICATEWAKEUPEVENT_MASK   (1 << 15)
 
#define OMAP4_UART4_RX_DUPLICATEWAKEUPEVENT_SHIFT   14
 
#define OMAP4_UART4_RX_DUPLICATEWAKEUPEVENT_MASK   (1 << 14)
 
#define OMAP4_MCSPI4_CS0_DUPLICATEWAKEUPEVENT_SHIFT   13
 
#define OMAP4_MCSPI4_CS0_DUPLICATEWAKEUPEVENT_MASK   (1 << 13)
 
#define OMAP4_MCSPI4_SOMI_DUPLICATEWAKEUPEVENT_SHIFT   12
 
#define OMAP4_MCSPI4_SOMI_DUPLICATEWAKEUPEVENT_MASK   (1 << 12)
 
#define OMAP4_MCSPI4_SIMO_DUPLICATEWAKEUPEVENT_SHIFT   11
 
#define OMAP4_MCSPI4_SIMO_DUPLICATEWAKEUPEVENT_MASK   (1 << 11)
 
#define OMAP4_MCSPI4_CLK_DUPLICATEWAKEUPEVENT_SHIFT   10
 
#define OMAP4_MCSPI4_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 10)
 
#define OMAP4_SDMMC5_DAT3_DUPLICATEWAKEUPEVENT_SHIFT   9
 
#define OMAP4_SDMMC5_DAT3_DUPLICATEWAKEUPEVENT_MASK   (1 << 9)
 
#define OMAP4_SDMMC5_DAT2_DUPLICATEWAKEUPEVENT_SHIFT   8
 
#define OMAP4_SDMMC5_DAT2_DUPLICATEWAKEUPEVENT_MASK   (1 << 8)
 
#define OMAP4_SDMMC5_DAT1_DUPLICATEWAKEUPEVENT_SHIFT   7
 
#define OMAP4_SDMMC5_DAT1_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)
 
#define OMAP4_SDMMC5_DAT0_DUPLICATEWAKEUPEVENT_SHIFT   6
 
#define OMAP4_SDMMC5_DAT0_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)
 
#define OMAP4_SDMMC5_CMD_DUPLICATEWAKEUPEVENT_SHIFT   5
 
#define OMAP4_SDMMC5_CMD_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)
 
#define OMAP4_SDMMC5_CLK_DUPLICATEWAKEUPEVENT_SHIFT   4
 
#define OMAP4_SDMMC5_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)
 
#define OMAP4_UART3_TX_IRTX_DUPLICATEWAKEUPEVENT_SHIFT   3
 
#define OMAP4_UART3_TX_IRTX_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)
 
#define OMAP4_UART3_RX_IRRX_DUPLICATEWAKEUPEVENT_SHIFT   2
 
#define OMAP4_UART3_RX_IRRX_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)
 
#define OMAP4_UART3_RTS_SD_DUPLICATEWAKEUPEVENT_SHIFT   1
 
#define OMAP4_UART3_RTS_SD_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)
 
#define OMAP4_UART3_CTS_RCTX_DUPLICATEWAKEUPEVENT_SHIFT   0
 
#define OMAP4_UART3_CTS_RCTX_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)
 
#define OMAP4_DPM_EMU11_DUPLICATEWAKEUPEVENT_SHIFT   31
 
#define OMAP4_DPM_EMU11_DUPLICATEWAKEUPEVENT_MASK   (1 << 31)
 
#define OMAP4_DPM_EMU10_DUPLICATEWAKEUPEVENT_SHIFT   30
 
#define OMAP4_DPM_EMU10_DUPLICATEWAKEUPEVENT_MASK   (1 << 30)
 
#define OMAP4_DPM_EMU9_DUPLICATEWAKEUPEVENT_SHIFT   29
 
#define OMAP4_DPM_EMU9_DUPLICATEWAKEUPEVENT_MASK   (1 << 29)
 
#define OMAP4_DPM_EMU8_DUPLICATEWAKEUPEVENT_SHIFT   28
 
#define OMAP4_DPM_EMU8_DUPLICATEWAKEUPEVENT_MASK   (1 << 28)
 
#define OMAP4_DPM_EMU7_DUPLICATEWAKEUPEVENT_SHIFT   27
 
#define OMAP4_DPM_EMU7_DUPLICATEWAKEUPEVENT_MASK   (1 << 27)
 
#define OMAP4_DPM_EMU6_DUPLICATEWAKEUPEVENT_SHIFT   26
 
#define OMAP4_DPM_EMU6_DUPLICATEWAKEUPEVENT_MASK   (1 << 26)
 
#define OMAP4_DPM_EMU5_DUPLICATEWAKEUPEVENT_SHIFT   25
 
#define OMAP4_DPM_EMU5_DUPLICATEWAKEUPEVENT_MASK   (1 << 25)
 
#define OMAP4_DPM_EMU4_DUPLICATEWAKEUPEVENT_SHIFT   24
 
#define OMAP4_DPM_EMU4_DUPLICATEWAKEUPEVENT_MASK   (1 << 24)
 
#define OMAP4_DPM_EMU3_DUPLICATEWAKEUPEVENT_SHIFT   23
 
#define OMAP4_DPM_EMU3_DUPLICATEWAKEUPEVENT_MASK   (1 << 23)
 
#define OMAP4_DPM_EMU2_DUPLICATEWAKEUPEVENT_SHIFT   22
 
#define OMAP4_DPM_EMU2_DUPLICATEWAKEUPEVENT_MASK   (1 << 22)
 
#define OMAP4_DPM_EMU1_DUPLICATEWAKEUPEVENT_SHIFT   21
 
#define OMAP4_DPM_EMU1_DUPLICATEWAKEUPEVENT_MASK   (1 << 21)
 
#define OMAP4_DPM_EMU0_DUPLICATEWAKEUPEVENT_SHIFT   20
 
#define OMAP4_DPM_EMU0_DUPLICATEWAKEUPEVENT_MASK   (1 << 20)
 
#define OMAP4_SYS_BOOT5_DUPLICATEWAKEUPEVENT_SHIFT   19
 
#define OMAP4_SYS_BOOT5_DUPLICATEWAKEUPEVENT_MASK   (1 << 19)
 
#define OMAP4_SYS_BOOT4_DUPLICATEWAKEUPEVENT_SHIFT   18
 
#define OMAP4_SYS_BOOT4_DUPLICATEWAKEUPEVENT_MASK   (1 << 18)
 
#define OMAP4_SYS_BOOT3_DUPLICATEWAKEUPEVENT_SHIFT   17
 
#define OMAP4_SYS_BOOT3_DUPLICATEWAKEUPEVENT_MASK   (1 << 17)
 
#define OMAP4_SYS_BOOT2_DUPLICATEWAKEUPEVENT_SHIFT   16
 
#define OMAP4_SYS_BOOT2_DUPLICATEWAKEUPEVENT_MASK   (1 << 16)
 
#define OMAP4_SYS_BOOT1_DUPLICATEWAKEUPEVENT_SHIFT   15
 
#define OMAP4_SYS_BOOT1_DUPLICATEWAKEUPEVENT_MASK   (1 << 15)
 
#define OMAP4_SYS_BOOT0_DUPLICATEWAKEUPEVENT_SHIFT   14
 
#define OMAP4_SYS_BOOT0_DUPLICATEWAKEUPEVENT_MASK   (1 << 14)
 
#define OMAP4_SYS_NIRQ2_DUPLICATEWAKEUPEVENT_SHIFT   13
 
#define OMAP4_SYS_NIRQ2_DUPLICATEWAKEUPEVENT_MASK   (1 << 13)
 
#define OMAP4_SYS_NIRQ1_DUPLICATEWAKEUPEVENT_SHIFT   12
 
#define OMAP4_SYS_NIRQ1_DUPLICATEWAKEUPEVENT_MASK   (1 << 12)
 
#define OMAP4_FREF_CLK2_OUT_DUPLICATEWAKEUPEVENT_SHIFT   11
 
#define OMAP4_FREF_CLK2_OUT_DUPLICATEWAKEUPEVENT_MASK   (1 << 11)
 
#define OMAP4_FREF_CLK1_OUT_DUPLICATEWAKEUPEVENT_SHIFT   10
 
#define OMAP4_FREF_CLK1_OUT_DUPLICATEWAKEUPEVENT_MASK   (1 << 10)
 
#define OMAP4_UNIPRO_RY2_DUPLICATEWAKEUPEVENT_SHIFT   9
 
#define OMAP4_UNIPRO_RY2_DUPLICATEWAKEUPEVENT_MASK   (1 << 9)
 
#define OMAP4_UNIPRO_RX2_DUPLICATEWAKEUPEVENT_SHIFT   8
 
#define OMAP4_UNIPRO_RX2_DUPLICATEWAKEUPEVENT_MASK   (1 << 8)
 
#define OMAP4_UNIPRO_RY1_DUPLICATEWAKEUPEVENT_SHIFT   7
 
#define OMAP4_UNIPRO_RY1_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)
 
#define OMAP4_UNIPRO_RX1_DUPLICATEWAKEUPEVENT_SHIFT   6
 
#define OMAP4_UNIPRO_RX1_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)
 
#define OMAP4_UNIPRO_RY0_DUPLICATEWAKEUPEVENT_SHIFT   5
 
#define OMAP4_UNIPRO_RY0_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)
 
#define OMAP4_UNIPRO_RX0_DUPLICATEWAKEUPEVENT_SHIFT   4
 
#define OMAP4_UNIPRO_RX0_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)
 
#define OMAP4_UNIPRO_TY2_DUPLICATEWAKEUPEVENT_SHIFT   3
 
#define OMAP4_UNIPRO_TY2_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)
 
#define OMAP4_UNIPRO_TX2_DUPLICATEWAKEUPEVENT_SHIFT   2
 
#define OMAP4_UNIPRO_TX2_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)
 
#define OMAP4_UNIPRO_TY1_DUPLICATEWAKEUPEVENT_SHIFT   1
 
#define OMAP4_UNIPRO_TY1_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)
 
#define OMAP4_UNIPRO_TX1_DUPLICATEWAKEUPEVENT_SHIFT   0
 
#define OMAP4_UNIPRO_TX1_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)
 
#define OMAP4_DPM_EMU19_DUPLICATEWAKEUPEVENT_SHIFT   7
 
#define OMAP4_DPM_EMU19_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)
 
#define OMAP4_DPM_EMU18_DUPLICATEWAKEUPEVENT_SHIFT   6
 
#define OMAP4_DPM_EMU18_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)
 
#define OMAP4_DPM_EMU17_DUPLICATEWAKEUPEVENT_SHIFT   5
 
#define OMAP4_DPM_EMU17_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)
 
#define OMAP4_DPM_EMU16_DUPLICATEWAKEUPEVENT_SHIFT   4
 
#define OMAP4_DPM_EMU16_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)
 
#define OMAP4_DPM_EMU15_DUPLICATEWAKEUPEVENT_SHIFT   3
 
#define OMAP4_DPM_EMU15_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)
 
#define OMAP4_DPM_EMU14_DUPLICATEWAKEUPEVENT_SHIFT   2
 
#define OMAP4_DPM_EMU14_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)
 
#define OMAP4_DPM_EMU13_DUPLICATEWAKEUPEVENT_SHIFT   1
 
#define OMAP4_DPM_EMU13_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)
 
#define OMAP4_DPM_EMU12_DUPLICATEWAKEUPEVENT_SHIFT   0
 
#define OMAP4_DPM_EMU12_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)
 
#define OMAP4_FORCE_OFFMODE_EN_SHIFT   31
 
#define OMAP4_FORCE_OFFMODE_EN_MASK   (1 << 31)
 
#define OMAP4_VDDS_DV_BANK0_SHIFT   31
 
#define OMAP4_VDDS_DV_BANK0_MASK   (1 << 31)
 
#define OMAP4_VDDS_DV_BANK1_SHIFT   30
 
#define OMAP4_VDDS_DV_BANK1_MASK   (1 << 30)
 
#define OMAP4_VDDS_DV_BANK3_SHIFT   29
 
#define OMAP4_VDDS_DV_BANK3_MASK   (1 << 29)
 
#define OMAP4_VDDS_DV_BANK4_SHIFT   28
 
#define OMAP4_VDDS_DV_BANK4_MASK   (1 << 28)
 
#define OMAP4_VDDS_DV_BANK5_SHIFT   27
 
#define OMAP4_VDDS_DV_BANK5_MASK   (1 << 27)
 
#define OMAP4_VDDS_DV_BANK6_SHIFT   26
 
#define OMAP4_VDDS_DV_BANK6_MASK   (1 << 26)
 
#define OMAP4_VDDS_DV_C2C_SHIFT   25
 
#define OMAP4_VDDS_DV_C2C_MASK   (1 << 25)
 
#define OMAP4_VDDS_DV_CAM_SHIFT   24
 
#define OMAP4_VDDS_DV_CAM_MASK   (1 << 24)
 
#define OMAP4_VDDS_DV_GPMC_SHIFT   23
 
#define OMAP4_VDDS_DV_GPMC_MASK   (1 << 23)
 
#define OMAP4_VDDS_DV_SDMMC2_SHIFT   22
 
#define OMAP4_VDDS_DV_SDMMC2_MASK   (1 << 22)
 
#define OMAP4_ABE_DR0_SC_SHIFT   30
 
#define OMAP4_ABE_DR0_SC_MASK   (0x3 << 30)
 
#define OMAP4_CAM_DR0_SC_SHIFT   28
 
#define OMAP4_CAM_DR0_SC_MASK   (0x3 << 28)
 
#define OMAP4_FREF_DR2_SC_SHIFT   26
 
#define OMAP4_FREF_DR2_SC_MASK   (0x3 << 26)
 
#define OMAP4_FREF_DR3_SC_SHIFT   24
 
#define OMAP4_FREF_DR3_SC_MASK   (0x3 << 24)
 
#define OMAP4_GPIO_DR8_SC_SHIFT   22
 
#define OMAP4_GPIO_DR8_SC_MASK   (0x3 << 22)
 
#define OMAP4_GPIO_DR9_SC_SHIFT   20
 
#define OMAP4_GPIO_DR9_SC_MASK   (0x3 << 20)
 
#define OMAP4_GPMC_DR2_SC_SHIFT   18
 
#define OMAP4_GPMC_DR2_SC_MASK   (0x3 << 18)
 
#define OMAP4_GPMC_DR3_SC_SHIFT   16
 
#define OMAP4_GPMC_DR3_SC_MASK   (0x3 << 16)
 
#define OMAP4_GPMC_DR6_SC_SHIFT   14
 
#define OMAP4_GPMC_DR6_SC_MASK   (0x3 << 14)
 
#define OMAP4_HDMI_DR0_SC_SHIFT   12
 
#define OMAP4_HDMI_DR0_SC_MASK   (0x3 << 12)
 
#define OMAP4_MCSPI1_DR0_SC_SHIFT   10
 
#define OMAP4_MCSPI1_DR0_SC_MASK   (0x3 << 10)
 
#define OMAP4_UART1_DR0_SC_SHIFT   8
 
#define OMAP4_UART1_DR0_SC_MASK   (0x3 << 8)
 
#define OMAP4_UART3_DR0_SC_SHIFT   6
 
#define OMAP4_UART3_DR0_SC_MASK   (0x3 << 6)
 
#define OMAP4_UART3_DR1_SC_SHIFT   4
 
#define OMAP4_UART3_DR1_SC_MASK   (0x3 << 4)
 
#define OMAP4_UNIPRO_DR0_SC_SHIFT   2
 
#define OMAP4_UNIPRO_DR0_SC_MASK   (0x3 << 2)
 
#define OMAP4_UNIPRO_DR1_SC_SHIFT   0
 
#define OMAP4_UNIPRO_DR1_SC_MASK   (0x3 << 0)
 
#define OMAP4_ABE_DR0_LB_SHIFT   30
 
#define OMAP4_ABE_DR0_LB_MASK   (0x3 << 30)
 
#define OMAP4_CAM_DR0_LB_SHIFT   28
 
#define OMAP4_CAM_DR0_LB_MASK   (0x3 << 28)
 
#define OMAP4_FREF_DR2_LB_SHIFT   26
 
#define OMAP4_FREF_DR2_LB_MASK   (0x3 << 26)
 
#define OMAP4_FREF_DR3_LB_SHIFT   24
 
#define OMAP4_FREF_DR3_LB_MASK   (0x3 << 24)
 
#define OMAP4_GPIO_DR8_LB_SHIFT   22
 
#define OMAP4_GPIO_DR8_LB_MASK   (0x3 << 22)
 
#define OMAP4_GPIO_DR9_LB_SHIFT   20
 
#define OMAP4_GPIO_DR9_LB_MASK   (0x3 << 20)
 
#define OMAP4_GPMC_DR2_LB_SHIFT   18
 
#define OMAP4_GPMC_DR2_LB_MASK   (0x3 << 18)
 
#define OMAP4_GPMC_DR3_LB_SHIFT   16
 
#define OMAP4_GPMC_DR3_LB_MASK   (0x3 << 16)
 
#define OMAP4_GPMC_DR6_LB_SHIFT   14
 
#define OMAP4_GPMC_DR6_LB_MASK   (0x3 << 14)
 
#define OMAP4_HDMI_DR0_LB_SHIFT   12
 
#define OMAP4_HDMI_DR0_LB_MASK   (0x3 << 12)
 
#define OMAP4_MCSPI1_DR0_LB_SHIFT   10
 
#define OMAP4_MCSPI1_DR0_LB_MASK   (0x3 << 10)
 
#define OMAP4_UART1_DR0_LB_SHIFT   8
 
#define OMAP4_UART1_DR0_LB_MASK   (0x3 << 8)
 
#define OMAP4_UART3_DR0_LB_SHIFT   6
 
#define OMAP4_UART3_DR0_LB_MASK   (0x3 << 6)
 
#define OMAP4_UART3_DR1_LB_SHIFT   4
 
#define OMAP4_UART3_DR1_LB_MASK   (0x3 << 4)
 
#define OMAP4_UNIPRO_DR0_LB_SHIFT   2
 
#define OMAP4_UNIPRO_DR0_LB_MASK   (0x3 << 2)
 
#define OMAP4_UNIPRO_DR1_LB_SHIFT   0
 
#define OMAP4_UNIPRO_DR1_LB_MASK   (0x3 << 0)
 
#define OMAP4_C2C_DR0_LB_SHIFT   31
 
#define OMAP4_C2C_DR0_LB_MASK   (1 << 31)
 
#define OMAP4_DPM_DR1_LB_SHIFT   30
 
#define OMAP4_DPM_DR1_LB_MASK   (1 << 30)
 
#define OMAP4_DPM_DR2_LB_SHIFT   29
 
#define OMAP4_DPM_DR2_LB_MASK   (1 << 29)
 
#define OMAP4_DPM_DR3_LB_SHIFT   28
 
#define OMAP4_DPM_DR3_LB_MASK   (1 << 28)
 
#define OMAP4_GPIO_DR0_LB_SHIFT   27
 
#define OMAP4_GPIO_DR0_LB_MASK   (1 << 27)
 
#define OMAP4_GPIO_DR1_LB_SHIFT   26
 
#define OMAP4_GPIO_DR1_LB_MASK   (1 << 26)
 
#define OMAP4_GPIO_DR10_LB_SHIFT   25
 
#define OMAP4_GPIO_DR10_LB_MASK   (1 << 25)
 
#define OMAP4_GPIO_DR2_LB_SHIFT   24
 
#define OMAP4_GPIO_DR2_LB_MASK   (1 << 24)
 
#define OMAP4_GPMC_DR0_LB_SHIFT   23
 
#define OMAP4_GPMC_DR0_LB_MASK   (1 << 23)
 
#define OMAP4_GPMC_DR1_LB_SHIFT   22
 
#define OMAP4_GPMC_DR1_LB_MASK   (1 << 22)
 
#define OMAP4_GPMC_DR4_LB_SHIFT   21
 
#define OMAP4_GPMC_DR4_LB_MASK   (1 << 21)
 
#define OMAP4_GPMC_DR5_LB_SHIFT   20
 
#define OMAP4_GPMC_DR5_LB_MASK   (1 << 20)
 
#define OMAP4_GPMC_DR7_LB_SHIFT   19
 
#define OMAP4_GPMC_DR7_LB_MASK   (1 << 19)
 
#define OMAP4_HSI2_DR0_LB_SHIFT   18
 
#define OMAP4_HSI2_DR0_LB_MASK   (1 << 18)
 
#define OMAP4_HSI2_DR1_LB_SHIFT   17
 
#define OMAP4_HSI2_DR1_LB_MASK   (1 << 17)
 
#define OMAP4_HSI2_DR2_LB_SHIFT   16
 
#define OMAP4_HSI2_DR2_LB_MASK   (1 << 16)
 
#define OMAP4_KPD_DR0_LB_SHIFT   15
 
#define OMAP4_KPD_DR0_LB_MASK   (1 << 15)
 
#define OMAP4_KPD_DR1_LB_SHIFT   14
 
#define OMAP4_KPD_DR1_LB_MASK   (1 << 14)
 
#define OMAP4_PDM_DR0_LB_SHIFT   13
 
#define OMAP4_PDM_DR0_LB_MASK   (1 << 13)
 
#define OMAP4_SDMMC2_DR0_LB_SHIFT   12
 
#define OMAP4_SDMMC2_DR0_LB_MASK   (1 << 12)
 
#define OMAP4_SDMMC3_DR0_LB_SHIFT   11
 
#define OMAP4_SDMMC3_DR0_LB_MASK   (1 << 11)
 
#define OMAP4_SDMMC4_DR0_LB_SHIFT   10
 
#define OMAP4_SDMMC4_DR0_LB_MASK   (1 << 10)
 
#define OMAP4_SDMMC4_DR1_LB_SHIFT   9
 
#define OMAP4_SDMMC4_DR1_LB_MASK   (1 << 9)
 
#define OMAP4_SPI3_DR0_LB_SHIFT   8
 
#define OMAP4_SPI3_DR0_LB_MASK   (1 << 8)
 
#define OMAP4_SPI3_DR1_LB_SHIFT   7
 
#define OMAP4_SPI3_DR1_LB_MASK   (1 << 7)
 
#define OMAP4_UART3_DR2_LB_SHIFT   6
 
#define OMAP4_UART3_DR2_LB_MASK   (1 << 6)
 
#define OMAP4_UART3_DR3_LB_SHIFT   5
 
#define OMAP4_UART3_DR3_LB_MASK   (1 << 5)
 
#define OMAP4_UART3_DR4_LB_SHIFT   4
 
#define OMAP4_UART3_DR4_LB_MASK   (1 << 4)
 
#define OMAP4_UART3_DR5_LB_SHIFT   3
 
#define OMAP4_UART3_DR5_LB_MASK   (1 << 3)
 
#define OMAP4_USBA0_DR1_LB_SHIFT   2
 
#define OMAP4_USBA0_DR1_LB_MASK   (1 << 2)
 
#define OMAP4_USBA_DR2_LB_SHIFT   1
 
#define OMAP4_USBA_DR2_LB_MASK   (1 << 1)
 
#define OMAP4_USBB1_DR0_LB_SHIFT   31
 
#define OMAP4_USBB1_DR0_LB_MASK   (1 << 31)
 
#define OMAP4_USBB2_DR0_LB_SHIFT   30
 
#define OMAP4_USBB2_DR0_LB_MASK   (1 << 30)
 
#define OMAP4_USBA0_DR0_LB_SHIFT   29
 
#define OMAP4_USBA0_DR0_LB_MASK   (1 << 29)
 
#define OMAP4_DMIC_DR0_MB_SHIFT   30
 
#define OMAP4_DMIC_DR0_MB_MASK   (0x3 << 30)
 
#define OMAP4_GPIO_DR3_MB_SHIFT   28
 
#define OMAP4_GPIO_DR3_MB_MASK   (0x3 << 28)
 
#define OMAP4_GPIO_DR4_MB_SHIFT   26
 
#define OMAP4_GPIO_DR4_MB_MASK   (0x3 << 26)
 
#define OMAP4_GPIO_DR5_MB_SHIFT   24
 
#define OMAP4_GPIO_DR5_MB_MASK   (0x3 << 24)
 
#define OMAP4_GPIO_DR6_MB_SHIFT   22
 
#define OMAP4_GPIO_DR6_MB_MASK   (0x3 << 22)
 
#define OMAP4_HSI_DR1_MB_SHIFT   20
 
#define OMAP4_HSI_DR1_MB_MASK   (0x3 << 20)
 
#define OMAP4_HSI_DR2_MB_SHIFT   18
 
#define OMAP4_HSI_DR2_MB_MASK   (0x3 << 18)
 
#define OMAP4_HSI_DR3_MB_SHIFT   16
 
#define OMAP4_HSI_DR3_MB_MASK   (0x3 << 16)
 
#define OMAP4_MCBSP2_DR0_MB_SHIFT   14
 
#define OMAP4_MCBSP2_DR0_MB_MASK   (0x3 << 14)
 
#define OMAP4_MCSPI4_DR0_MB_SHIFT   12
 
#define OMAP4_MCSPI4_DR0_MB_MASK   (0x3 << 12)
 
#define OMAP4_MCSPI4_DR1_MB_SHIFT   10
 
#define OMAP4_MCSPI4_DR1_MB_MASK   (0x3 << 10)
 
#define OMAP4_SDMMC3_DR0_MB_SHIFT   8
 
#define OMAP4_SDMMC3_DR0_MB_MASK   (0x3 << 8)
 
#define OMAP4_SPI2_DR0_MB_SHIFT   0
 
#define OMAP4_SPI2_DR0_MB_MASK   (0x3 << 0)
 
#define OMAP4_SPI2_DR1_MB_SHIFT   30
 
#define OMAP4_SPI2_DR1_MB_MASK   (0x3 << 30)
 
#define OMAP4_SPI2_DR2_MB_SHIFT   28
 
#define OMAP4_SPI2_DR2_MB_MASK   (0x3 << 28)
 
#define OMAP4_UART2_DR0_MB_SHIFT   26
 
#define OMAP4_UART2_DR0_MB_MASK   (0x3 << 26)
 
#define OMAP4_UART2_DR1_MB_SHIFT   24
 
#define OMAP4_UART2_DR1_MB_MASK   (0x3 << 24)
 
#define OMAP4_UART4_DR0_MB_SHIFT   22
 
#define OMAP4_UART4_DR0_MB_MASK   (0x3 << 22)
 
#define OMAP4_HSI_DR0_MB_SHIFT   20
 
#define OMAP4_HSI_DR0_MB_MASK   (0x3 << 20)
 
#define OMAP4_DMIC_DR0_LB_SHIFT   31
 
#define OMAP4_DMIC_DR0_LB_MASK   (1 << 31)
 
#define OMAP4_GPIO_DR3_LB_SHIFT   30
 
#define OMAP4_GPIO_DR3_LB_MASK   (1 << 30)
 
#define OMAP4_GPIO_DR4_LB_SHIFT   29
 
#define OMAP4_GPIO_DR4_LB_MASK   (1 << 29)
 
#define OMAP4_GPIO_DR5_LB_SHIFT   28
 
#define OMAP4_GPIO_DR5_LB_MASK   (1 << 28)
 
#define OMAP4_GPIO_DR6_LB_SHIFT   27
 
#define OMAP4_GPIO_DR6_LB_MASK   (1 << 27)
 
#define OMAP4_HSI_DR1_LB_SHIFT   26
 
#define OMAP4_HSI_DR1_LB_MASK   (1 << 26)
 
#define OMAP4_HSI_DR2_LB_SHIFT   25
 
#define OMAP4_HSI_DR2_LB_MASK   (1 << 25)
 
#define OMAP4_HSI_DR3_LB_SHIFT   24
 
#define OMAP4_HSI_DR3_LB_MASK   (1 << 24)
 
#define OMAP4_MCBSP2_DR0_LB_SHIFT   23
 
#define OMAP4_MCBSP2_DR0_LB_MASK   (1 << 23)
 
#define OMAP4_MCSPI4_DR0_LB_SHIFT   22
 
#define OMAP4_MCSPI4_DR0_LB_MASK   (1 << 22)
 
#define OMAP4_MCSPI4_DR1_LB_SHIFT   21
 
#define OMAP4_MCSPI4_DR1_LB_MASK   (1 << 21)
 
#define OMAP4_SLIMBUS2_DR0_LB_SHIFT   18
 
#define OMAP4_SLIMBUS2_DR0_LB_MASK   (1 << 18)
 
#define OMAP4_SPI2_DR0_LB_SHIFT   16
 
#define OMAP4_SPI2_DR0_LB_MASK   (1 << 16)
 
#define OMAP4_SPI2_DR1_LB_SHIFT   15
 
#define OMAP4_SPI2_DR1_LB_MASK   (1 << 15)
 
#define OMAP4_SPI2_DR2_LB_SHIFT   14
 
#define OMAP4_SPI2_DR2_LB_MASK   (1 << 14)
 
#define OMAP4_UART2_DR0_LB_SHIFT   13
 
#define OMAP4_UART2_DR0_LB_MASK   (1 << 13)
 
#define OMAP4_UART2_DR1_LB_SHIFT   12
 
#define OMAP4_UART2_DR1_LB_MASK   (1 << 12)
 
#define OMAP4_UART4_DR0_LB_SHIFT   11
 
#define OMAP4_UART4_DR0_LB_MASK   (1 << 11)
 
#define OMAP4_HSI_DR0_LB_SHIFT   10
 
#define OMAP4_HSI_DR0_LB_MASK   (1 << 10)
 
#define OMAP4_USBB2_DR1_SR_SHIFT   30
 
#define OMAP4_USBB2_DR1_SR_MASK   (0x3 << 30)
 
#define OMAP4_USBB2_DR1_I_SHIFT   27
 
#define OMAP4_USBB2_DR1_I_MASK   (0x7 << 27)
 
#define OMAP4_USBB1_DR1_SR_SHIFT   25
 
#define OMAP4_USBB1_DR1_SR_MASK   (0x3 << 25)
 
#define OMAP4_USBB1_DR1_I_SHIFT   22
 
#define OMAP4_USBB1_DR1_I_MASK   (0x7 << 22)
 
#define OMAP4_USBB1_HSIC_DATA_WD_SHIFT   20
 
#define OMAP4_USBB1_HSIC_DATA_WD_MASK   (0x3 << 20)
 
#define OMAP4_USBB1_HSIC_STROBE_WD_SHIFT   18
 
#define OMAP4_USBB1_HSIC_STROBE_WD_MASK   (0x3 << 18)
 
#define OMAP4_USBB2_HSIC_DATA_WD_SHIFT   16
 
#define OMAP4_USBB2_HSIC_DATA_WD_MASK   (0x3 << 16)
 
#define OMAP4_USBB2_HSIC_STROBE_WD_SHIFT   14
 
#define OMAP4_USBB2_HSIC_STROBE_WD_MASK   (0x3 << 14)
 
#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_ENABLE_SHIFT   13
 
#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_ENABLE_MASK   (1 << 13)
 
#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_SHIFT   11
 
#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_MASK   (0x3 << 11)
 
#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_ENABLE_SHIFT   10
 
#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_ENABLE_MASK   (1 << 10)
 
#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_SHIFT   8
 
#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_MASK   (0x3 << 8)
 
#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_ENABLE_SHIFT   7
 
#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_ENABLE_MASK   (1 << 7)
 
#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_SHIFT   5
 
#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_MASK   (0x3 << 5)
 
#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_ENABLE_SHIFT   4
 
#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_ENABLE_MASK   (1 << 4)
 
#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_SHIFT   2
 
#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_MASK   (0x3 << 2)
 
#define OMAP4_SLIMBUS1_DR0_MB_SHIFT   30
 
#define OMAP4_SLIMBUS1_DR0_MB_MASK   (0x3 << 30)
 
#define OMAP4_SLIMBUS1_DR1_MB_SHIFT   28
 
#define OMAP4_SLIMBUS1_DR1_MB_MASK   (0x3 << 28)
 
#define OMAP4_SLIMBUS2_DR0_MB_SHIFT   26
 
#define OMAP4_SLIMBUS2_DR0_MB_MASK   (0x3 << 26)
 
#define OMAP4_SLIMBUS2_DR1_MB_SHIFT   24
 
#define OMAP4_SLIMBUS2_DR1_MB_MASK   (0x3 << 24)
 
#define OMAP4_SLIMBUS2_DR2_MB_SHIFT   22
 
#define OMAP4_SLIMBUS2_DR2_MB_MASK   (0x3 << 22)
 
#define OMAP4_SLIMBUS2_DR3_MB_SHIFT   20
 
#define OMAP4_SLIMBUS2_DR3_MB_MASK   (0x3 << 20)
 
#define OMAP4_SLIMBUS1_DR0_LB_SHIFT   19
 
#define OMAP4_SLIMBUS1_DR0_LB_MASK   (1 << 19)
 
#define OMAP4_SLIMBUS2_DR1_LB_SHIFT   18
 
#define OMAP4_SLIMBUS2_DR1_LB_MASK   (1 << 18)
 
#define OMAP4_USIM_PBIASLITE_HIZ_MODE_SHIFT   31
 
#define OMAP4_USIM_PBIASLITE_HIZ_MODE_MASK   (1 << 31)
 
#define OMAP4_USIM_PBIASLITE_SUPPLY_HI_OUT_SHIFT   30
 
#define OMAP4_USIM_PBIASLITE_SUPPLY_HI_OUT_MASK   (1 << 30)
 
#define OMAP4_USIM_PBIASLITE_VMODE_ERROR_SHIFT   29
 
#define OMAP4_USIM_PBIASLITE_VMODE_ERROR_MASK   (1 << 29)
 
#define OMAP4_USIM_PBIASLITE_PWRDNZ_SHIFT   28
 
#define OMAP4_USIM_PBIASLITE_PWRDNZ_MASK   (1 << 28)
 
#define OMAP4_USIM_PBIASLITE_VMODE_SHIFT   27
 
#define OMAP4_USIM_PBIASLITE_VMODE_MASK   (1 << 27)
 
#define OMAP4_MMC1_PWRDNZ_SHIFT   26
 
#define OMAP4_MMC1_PWRDNZ_MASK   (1 << 26)
 
#define OMAP4_MMC1_PBIASLITE_HIZ_MODE_SHIFT   25
 
#define OMAP4_MMC1_PBIASLITE_HIZ_MODE_MASK   (1 << 25)
 
#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT_SHIFT   24
 
#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT_MASK   (1 << 24)
 
#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_SHIFT   23
 
#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK   (1 << 23)
 
#define OMAP4_MMC1_PBIASLITE_PWRDNZ_SHIFT   22
 
#define OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK   (1 << 22)
 
#define OMAP4_MMC1_PBIASLITE_VMODE_SHIFT   21
 
#define OMAP4_MMC1_PBIASLITE_VMODE_MASK   (1 << 21)
 
#define OMAP4_USBC1_ICUSB_PWRDNZ_SHIFT   20
 
#define OMAP4_USBC1_ICUSB_PWRDNZ_MASK   (1 << 20)
 
#define OMAP4_I2C4_SDA_GLFENB_SHIFT   31
 
#define OMAP4_I2C4_SDA_GLFENB_MASK   (1 << 31)
 
#define OMAP4_I2C4_SDA_LOAD_BITS_SHIFT   29
 
#define OMAP4_I2C4_SDA_LOAD_BITS_MASK   (0x3 << 29)
 
#define OMAP4_I2C4_SDA_PULLUPRESX_SHIFT   28
 
#define OMAP4_I2C4_SDA_PULLUPRESX_MASK   (1 << 28)
 
#define OMAP4_I2C3_SDA_GLFENB_SHIFT   27
 
#define OMAP4_I2C3_SDA_GLFENB_MASK   (1 << 27)
 
#define OMAP4_I2C3_SDA_LOAD_BITS_SHIFT   25
 
#define OMAP4_I2C3_SDA_LOAD_BITS_MASK   (0x3 << 25)
 
#define OMAP4_I2C3_SDA_PULLUPRESX_SHIFT   24
 
#define OMAP4_I2C3_SDA_PULLUPRESX_MASK   (1 << 24)
 
#define OMAP4_I2C2_SDA_GLFENB_SHIFT   23
 
#define OMAP4_I2C2_SDA_GLFENB_MASK   (1 << 23)
 
#define OMAP4_I2C2_SDA_LOAD_BITS_SHIFT   21
 
#define OMAP4_I2C2_SDA_LOAD_BITS_MASK   (0x3 << 21)
 
#define OMAP4_I2C2_SDA_PULLUPRESX_SHIFT   20
 
#define OMAP4_I2C2_SDA_PULLUPRESX_MASK   (1 << 20)
 
#define OMAP4_I2C1_SDA_GLFENB_SHIFT   19
 
#define OMAP4_I2C1_SDA_GLFENB_MASK   (1 << 19)
 
#define OMAP4_I2C1_SDA_LOAD_BITS_SHIFT   17
 
#define OMAP4_I2C1_SDA_LOAD_BITS_MASK   (0x3 << 17)
 
#define OMAP4_I2C1_SDA_PULLUPRESX_SHIFT   16
 
#define OMAP4_I2C1_SDA_PULLUPRESX_MASK   (1 << 16)
 
#define OMAP4_I2C4_SCL_GLFENB_SHIFT   15
 
#define OMAP4_I2C4_SCL_GLFENB_MASK   (1 << 15)
 
#define OMAP4_I2C4_SCL_LOAD_BITS_SHIFT   13
 
#define OMAP4_I2C4_SCL_LOAD_BITS_MASK   (0x3 << 13)
 
#define OMAP4_I2C4_SCL_PULLUPRESX_SHIFT   12
 
#define OMAP4_I2C4_SCL_PULLUPRESX_MASK   (1 << 12)
 
#define OMAP4_I2C3_SCL_GLFENB_SHIFT   11
 
#define OMAP4_I2C3_SCL_GLFENB_MASK   (1 << 11)
 
#define OMAP4_I2C3_SCL_LOAD_BITS_SHIFT   9
 
#define OMAP4_I2C3_SCL_LOAD_BITS_MASK   (0x3 << 9)
 
#define OMAP4_I2C3_SCL_PULLUPRESX_SHIFT   8
 
#define OMAP4_I2C3_SCL_PULLUPRESX_MASK   (1 << 8)
 
#define OMAP4_I2C2_SCL_GLFENB_SHIFT   7
 
#define OMAP4_I2C2_SCL_GLFENB_MASK   (1 << 7)
 
#define OMAP4_I2C2_SCL_LOAD_BITS_SHIFT   5
 
#define OMAP4_I2C2_SCL_LOAD_BITS_MASK   (0x3 << 5)
 
#define OMAP4_I2C2_SCL_PULLUPRESX_SHIFT   4
 
#define OMAP4_I2C2_SCL_PULLUPRESX_MASK   (1 << 4)
 
#define OMAP4_I2C1_SCL_GLFENB_SHIFT   3
 
#define OMAP4_I2C1_SCL_GLFENB_MASK   (1 << 3)
 
#define OMAP4_I2C1_SCL_LOAD_BITS_SHIFT   1
 
#define OMAP4_I2C1_SCL_LOAD_BITS_MASK   (0x3 << 1)
 
#define OMAP4_I2C1_SCL_PULLUPRESX_SHIFT   0
 
#define OMAP4_I2C1_SCL_PULLUPRESX_MASK   (1 << 0)
 
#define OMAP4_CAMERARX_UNIPRO_CTRLCLKEN_SHIFT   31
 
#define OMAP4_CAMERARX_UNIPRO_CTRLCLKEN_MASK   (1 << 31)
 
#define OMAP4_CAMERARX_CSI22_LANEENABLE_SHIFT   29
 
#define OMAP4_CAMERARX_CSI22_LANEENABLE_MASK   (0x3 << 29)
 
#define OMAP4_CAMERARX_CSI21_LANEENABLE_SHIFT   24
 
#define OMAP4_CAMERARX_CSI21_LANEENABLE_MASK   (0x1f << 24)
 
#define OMAP4_CAMERARX_UNIPRO_CAMMODE_SHIFT   22
 
#define OMAP4_CAMERARX_UNIPRO_CAMMODE_MASK   (0x3 << 22)
 
#define OMAP4_CAMERARX_CSI22_CTRLCLKEN_SHIFT   21
 
#define OMAP4_CAMERARX_CSI22_CTRLCLKEN_MASK   (1 << 21)
 
#define OMAP4_CAMERARX_CSI22_CAMMODE_SHIFT   19
 
#define OMAP4_CAMERARX_CSI22_CAMMODE_MASK   (0x3 << 19)
 
#define OMAP4_CAMERARX_CSI21_CTRLCLKEN_SHIFT   18
 
#define OMAP4_CAMERARX_CSI21_CTRLCLKEN_MASK   (1 << 18)
 
#define OMAP4_CAMERARX_CSI21_CAMMODE_SHIFT   16
 
#define OMAP4_CAMERARX_CSI21_CAMMODE_MASK   (0x3 << 16)
 
#define OMAP4_AVDAC_ACEN_SHIFT   31
 
#define OMAP4_AVDAC_ACEN_MASK   (1 << 31)
 
#define OMAP4_AVDAC_TVOUTBYPASS_SHIFT   30
 
#define OMAP4_AVDAC_TVOUTBYPASS_MASK   (1 << 30)
 
#define OMAP4_AVDAC_INPUTINV_SHIFT   29
 
#define OMAP4_AVDAC_INPUTINV_MASK   (1 << 29)
 
#define OMAP4_AVDAC_CTL_SHIFT   13
 
#define OMAP4_AVDAC_CTL_MASK   (0xffff << 13)
 
#define OMAP4_AVDAC_CTL_WR_ACK_SHIFT   12
 
#define OMAP4_AVDAC_CTL_WR_ACK_MASK   (1 << 12)
 
#define OMAP4_HDMITXPHY_PADORDER_SHIFT   31
 
#define OMAP4_HDMITXPHY_PADORDER_MASK   (1 << 31)
 
#define OMAP4_HDMITXPHY_TXVALID_SHIFT   30
 
#define OMAP4_HDMITXPHY_TXVALID_MASK   (1 << 30)
 
#define OMAP4_HDMITXPHY_ENBYPASSCLK_SHIFT   29
 
#define OMAP4_HDMITXPHY_ENBYPASSCLK_MASK   (1 << 29)
 
#define OMAP4_HDMITXPHY_PD_PULLUPDET_SHIFT   28
 
#define OMAP4_HDMITXPHY_PD_PULLUPDET_MASK   (1 << 28)
 
#define OMAP4_MMC2_FEEDBACK_CLK_SEL_SHIFT   31
 
#define OMAP4_MMC2_FEEDBACK_CLK_SEL_MASK   (1 << 31)
 
#define OMAP4_DSI2_LANEENABLE_SHIFT   29
 
#define OMAP4_DSI2_LANEENABLE_MASK   (0x7 << 29)
 
#define OMAP4_DSI1_LANEENABLE_SHIFT   24
 
#define OMAP4_DSI1_LANEENABLE_MASK   (0x1f << 24)
 
#define OMAP4_DSI1_PIPD_SHIFT   19
 
#define OMAP4_DSI1_PIPD_MASK   (0x1f << 19)
 
#define OMAP4_DSI2_PIPD_SHIFT   14
 
#define OMAP4_DSI2_PIPD_MASK   (0x1f << 14)
 
#define OMAP4_ALBCTRLRX_FSX_SHIFT   31
 
#define OMAP4_ALBCTRLRX_FSX_MASK   (1 << 31)
 
#define OMAP4_ALBCTRLRX_CLKX_SHIFT   30
 
#define OMAP4_ALBCTRLRX_CLKX_MASK   (1 << 30)
 
#define OMAP4_ABE_MCBSP1_DR_EN_SHIFT   29
 
#define OMAP4_ABE_MCBSP1_DR_EN_MASK   (1 << 29)
 
#define OMAP4_USB2PHY_AUTORESUME_EN_SHIFT   31
 
#define OMAP4_USB2PHY_AUTORESUME_EN_MASK   (1 << 31)
 
#define OMAP4_USB2PHY_DISCHGDET_SHIFT   30
 
#define OMAP4_USB2PHY_DISCHGDET_MASK   (1 << 30)
 
#define OMAP4_USB2PHY_GPIOMODE_SHIFT   29
 
#define OMAP4_USB2PHY_GPIOMODE_MASK   (1 << 29)
 
#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_SHIFT   28
 
#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_MASK   (1 << 28)
 
#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_SHIFT   27
 
#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_MASK   (1 << 27)
 
#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_SHIFT   26
 
#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_MASK   (1 << 26)
 
#define OMAP4_USB2PHY_CHG_VSRC_EN_SHIFT   25
 
#define OMAP4_USB2PHY_CHG_VSRC_EN_MASK   (1 << 25)
 
#define OMAP4_USB2PHY_CHG_ISINK_EN_SHIFT   24
 
#define OMAP4_USB2PHY_CHG_ISINK_EN_MASK   (1 << 24)
 
#define OMAP4_USB2PHY_CHG_DET_STATUS_SHIFT   21
 
#define OMAP4_USB2PHY_CHG_DET_STATUS_MASK   (0x7 << 21)
 
#define OMAP4_USB2PHY_CHG_DET_DM_COMP_SHIFT   20
 
#define OMAP4_USB2PHY_CHG_DET_DM_COMP_MASK   (1 << 20)
 
#define OMAP4_USB2PHY_CHG_DET_DP_COMP_SHIFT   19
 
#define OMAP4_USB2PHY_CHG_DET_DP_COMP_MASK   (1 << 19)
 
#define OMAP4_USB2PHY_DATADET_SHIFT   18
 
#define OMAP4_USB2PHY_DATADET_MASK   (1 << 18)
 
#define OMAP4_USB2PHY_SINKONDP_SHIFT   17
 
#define OMAP4_USB2PHY_SINKONDP_MASK   (1 << 17)
 
#define OMAP4_USB2PHY_SRCONDM_SHIFT   16
 
#define OMAP4_USB2PHY_SRCONDM_MASK   (1 << 16)
 
#define OMAP4_USB2PHY_RESTARTCHGDET_SHIFT   15
 
#define OMAP4_USB2PHY_RESTARTCHGDET_MASK   (1 << 15)
 
#define OMAP4_USB2PHY_CHGDETDONE_SHIFT   14
 
#define OMAP4_USB2PHY_CHGDETDONE_MASK   (1 << 14)
 
#define OMAP4_USB2PHY_CHGDETECTED_SHIFT   13
 
#define OMAP4_USB2PHY_CHGDETECTED_MASK   (1 << 13)
 
#define OMAP4_USB2PHY_MCPCPUEN_SHIFT   12
 
#define OMAP4_USB2PHY_MCPCPUEN_MASK   (1 << 12)
 
#define OMAP4_USB2PHY_MCPCMODEEN_SHIFT   11
 
#define OMAP4_USB2PHY_MCPCMODEEN_MASK   (1 << 11)
 
#define OMAP4_USB2PHY_RESETDONEMCLK_SHIFT   10
 
#define OMAP4_USB2PHY_RESETDONEMCLK_MASK   (1 << 10)
 
#define OMAP4_USB2PHY_UTMIRESETDONE_SHIFT   9
 
#define OMAP4_USB2PHY_UTMIRESETDONE_MASK   (1 << 9)
 
#define OMAP4_USB2PHY_TXBITSTUFFENABLE_SHIFT   8
 
#define OMAP4_USB2PHY_TXBITSTUFFENABLE_MASK   (1 << 8)
 
#define OMAP4_USB2PHY_DATAPOLARITYN_SHIFT   7
 
#define OMAP4_USB2PHY_DATAPOLARITYN_MASK   (1 << 7)
 
#define OMAP4_USBDPLL_FREQLOCK_SHIFT   6
 
#define OMAP4_USBDPLL_FREQLOCK_MASK   (1 << 6)
 
#define OMAP4_USB2PHY_RESETDONETCLK_SHIFT   5
 
#define OMAP4_USB2PHY_RESETDONETCLK_MASK   (1 << 5)
 
#define OMAP4_HDMI_DDC_SDA_GLFENB_SHIFT   31
 
#define OMAP4_HDMI_DDC_SDA_GLFENB_MASK   (1 << 31)
 
#define OMAP4_HDMI_DDC_SDA_LOAD_BITS_SHIFT   29
 
#define OMAP4_HDMI_DDC_SDA_LOAD_BITS_MASK   (0x3 << 29)
 
#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_SHIFT   28
 
#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK   (1 << 28)
 
#define OMAP4_HDMI_DDC_SCL_GLFENB_SHIFT   27
 
#define OMAP4_HDMI_DDC_SCL_GLFENB_MASK   (1 << 27)
 
#define OMAP4_HDMI_DDC_SCL_LOAD_BITS_SHIFT   25
 
#define OMAP4_HDMI_DDC_SCL_LOAD_BITS_MASK   (0x3 << 25)
 
#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_SHIFT   24
 
#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK   (1 << 24)
 
#define OMAP4_HDMI_DDC_SDA_HSMODE_SHIFT   23
 
#define OMAP4_HDMI_DDC_SDA_HSMODE_MASK   (1 << 23)
 
#define OMAP4_HDMI_DDC_SDA_NMODE_SHIFT   22
 
#define OMAP4_HDMI_DDC_SDA_NMODE_MASK   (1 << 22)
 
#define OMAP4_HDMI_DDC_SCL_HSMODE_SHIFT   21
 
#define OMAP4_HDMI_DDC_SCL_HSMODE_MASK   (1 << 21)
 
#define OMAP4_HDMI_DDC_SCL_NMODE_SHIFT   20
 
#define OMAP4_HDMI_DDC_SCL_NMODE_MASK   (1 << 20)
 
#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_SHIFT   31
 
#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_MASK   (1 << 31)
 
#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_SHIFT   30
 
#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK   (1 << 30)
 
#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_SHIFT   29
 
#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK   (1 << 29)
 
#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_SHIFT   28
 
#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK   (1 << 28)
 
#define OMAP4_SDMMC1_DR0_SPEEDCTRL_SHIFT   27
 
#define OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK   (1 << 27)
 
#define OMAP4_SDMMC1_DR1_SPEEDCTRL_SHIFT   26
 
#define OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK   (1 << 26)
 
#define OMAP4_SDMMC1_DR2_SPEEDCTRL_SHIFT   25
 
#define OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK   (1 << 25)
 
#define OMAP4_USBC1_DR0_SPEEDCTRL_SHIFT   24
 
#define OMAP4_USBC1_DR0_SPEEDCTRL_MASK   (1 << 24)
 
#define OMAP4_USB_FD_CDEN_SHIFT   23
 
#define OMAP4_USB_FD_CDEN_MASK   (1 << 23)
 
#define OMAP4_USBC1_ICUSB_DP_PDDIS_SHIFT   22
 
#define OMAP4_USBC1_ICUSB_DP_PDDIS_MASK   (1 << 22)
 
#define OMAP4_USBC1_ICUSB_DM_PDDIS_SHIFT   21
 
#define OMAP4_USBC1_ICUSB_DM_PDDIS_MASK   (1 << 21)
 
#define OMAP4_HSI1_CALLOOP_SEL_SHIFT   31
 
#define OMAP4_HSI1_CALLOOP_SEL_MASK   (1 << 31)
 
#define OMAP4_HSI1_CALMUX_SEL_SHIFT   30
 
#define OMAP4_HSI1_CALMUX_SEL_MASK   (1 << 30)
 
#define OMAP4_HSI2_CALLOOP_SEL_SHIFT   29
 
#define OMAP4_HSI2_CALLOOP_SEL_MASK   (1 << 29)
 
#define OMAP4_HSI2_CALMUX_SEL_SHIFT   28
 
#define OMAP4_HSI2_CALMUX_SEL_MASK   (1 << 28)
 
#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT0_AUTO_EN_SHIFT   31
 
#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT0_AUTO_EN_MASK   (1 << 31)
 
#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT1_AUTO_EN_SHIFT   30
 
#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT1_AUTO_EN_MASK   (1 << 30)
 
#define OMAP4_HDQ_SIO_PWRDNZ_SHIFT   31
 
#define OMAP4_HDQ_SIO_PWRDNZ_MASK   (1 << 31)
 
#define OMAP4_LPDDR2IO1_GR4_SR_SHIFT   30
 
#define OMAP4_LPDDR2IO1_GR4_SR_MASK   (0x3 << 30)
 
#define OMAP4_LPDDR2IO1_GR4_I_SHIFT   27
 
#define OMAP4_LPDDR2IO1_GR4_I_MASK   (0x7 << 27)
 
#define OMAP4_LPDDR2IO1_GR4_WD_SHIFT   25
 
#define OMAP4_LPDDR2IO1_GR4_WD_MASK   (0x3 << 25)
 
#define OMAP4_LPDDR2IO1_GR3_SR_SHIFT   22
 
#define OMAP4_LPDDR2IO1_GR3_SR_MASK   (0x3 << 22)
 
#define OMAP4_LPDDR2IO1_GR3_I_SHIFT   19
 
#define OMAP4_LPDDR2IO1_GR3_I_MASK   (0x7 << 19)
 
#define OMAP4_LPDDR2IO1_GR3_WD_SHIFT   17
 
#define OMAP4_LPDDR2IO1_GR3_WD_MASK   (0x3 << 17)
 
#define OMAP4_LPDDR2IO1_GR2_SR_SHIFT   14
 
#define OMAP4_LPDDR2IO1_GR2_SR_MASK   (0x3 << 14)
 
#define OMAP4_LPDDR2IO1_GR2_I_SHIFT   11
 
#define OMAP4_LPDDR2IO1_GR2_I_MASK   (0x7 << 11)
 
#define OMAP4_LPDDR2IO1_GR2_WD_SHIFT   9
 
#define OMAP4_LPDDR2IO1_GR2_WD_MASK   (0x3 << 9)
 
#define OMAP4_LPDDR2IO1_GR1_SR_SHIFT   6
 
#define OMAP4_LPDDR2IO1_GR1_SR_MASK   (0x3 << 6)
 
#define OMAP4_LPDDR2IO1_GR1_I_SHIFT   3
 
#define OMAP4_LPDDR2IO1_GR1_I_MASK   (0x7 << 3)
 
#define OMAP4_LPDDR2IO1_GR1_WD_SHIFT   1
 
#define OMAP4_LPDDR2IO1_GR1_WD_MASK   (0x3 << 1)
 
#define OMAP4_LPDDR2IO1_GR8_SR_SHIFT   30
 
#define OMAP4_LPDDR2IO1_GR8_SR_MASK   (0x3 << 30)
 
#define OMAP4_LPDDR2IO1_GR8_I_SHIFT   27
 
#define OMAP4_LPDDR2IO1_GR8_I_MASK   (0x7 << 27)
 
#define OMAP4_LPDDR2IO1_GR8_WD_SHIFT   25
 
#define OMAP4_LPDDR2IO1_GR8_WD_MASK   (0x3 << 25)
 
#define OMAP4_LPDDR2IO1_GR7_SR_SHIFT   22
 
#define OMAP4_LPDDR2IO1_GR7_SR_MASK   (0x3 << 22)
 
#define OMAP4_LPDDR2IO1_GR7_I_SHIFT   19
 
#define OMAP4_LPDDR2IO1_GR7_I_MASK   (0x7 << 19)
 
#define OMAP4_LPDDR2IO1_GR7_WD_SHIFT   17
 
#define OMAP4_LPDDR2IO1_GR7_WD_MASK   (0x3 << 17)
 
#define OMAP4_LPDDR2IO1_GR6_SR_SHIFT   14
 
#define OMAP4_LPDDR2IO1_GR6_SR_MASK   (0x3 << 14)
 
#define OMAP4_LPDDR2IO1_GR6_I_SHIFT   11
 
#define OMAP4_LPDDR2IO1_GR6_I_MASK   (0x7 << 11)
 
#define OMAP4_LPDDR2IO1_GR6_WD_SHIFT   9
 
#define OMAP4_LPDDR2IO1_GR6_WD_MASK   (0x3 << 9)
 
#define OMAP4_LPDDR2IO1_GR5_SR_SHIFT   6
 
#define OMAP4_LPDDR2IO1_GR5_SR_MASK   (0x3 << 6)
 
#define OMAP4_LPDDR2IO1_GR5_I_SHIFT   3
 
#define OMAP4_LPDDR2IO1_GR5_I_MASK   (0x7 << 3)
 
#define OMAP4_LPDDR2IO1_GR5_WD_SHIFT   1
 
#define OMAP4_LPDDR2IO1_GR5_WD_MASK   (0x3 << 1)
 
#define OMAP4_LPDDR2IO1_GR11_SR_SHIFT   30
 
#define OMAP4_LPDDR2IO1_GR11_SR_MASK   (0x3 << 30)
 
#define OMAP4_LPDDR2IO1_GR11_I_SHIFT   27
 
#define OMAP4_LPDDR2IO1_GR11_I_MASK   (0x7 << 27)
 
#define OMAP4_LPDDR2IO1_GR11_WD_SHIFT   25
 
#define OMAP4_LPDDR2IO1_GR11_WD_MASK   (0x3 << 25)
 
#define OMAP4_LPDDR2IO1_GR10_SR_SHIFT   22
 
#define OMAP4_LPDDR2IO1_GR10_SR_MASK   (0x3 << 22)
 
#define OMAP4_LPDDR2IO1_GR10_I_SHIFT   19
 
#define OMAP4_LPDDR2IO1_GR10_I_MASK   (0x7 << 19)
 
#define OMAP4_LPDDR2IO1_GR10_WD_SHIFT   17
 
#define OMAP4_LPDDR2IO1_GR10_WD_MASK   (0x3 << 17)
 
#define OMAP4_LPDDR2IO1_GR9_SR_SHIFT   14
 
#define OMAP4_LPDDR2IO1_GR9_SR_MASK   (0x3 << 14)
 
#define OMAP4_LPDDR2IO1_GR9_I_SHIFT   11
 
#define OMAP4_LPDDR2IO1_GR9_I_MASK   (0x7 << 11)
 
#define OMAP4_LPDDR2IO1_GR9_WD_SHIFT   9
 
#define OMAP4_LPDDR2IO1_GR9_WD_MASK   (0x3 << 9)
 
#define OMAP4_LPDDR21_VREF_CA_CCAP0_SHIFT   31
 
#define OMAP4_LPDDR21_VREF_CA_CCAP0_MASK   (1 << 31)
 
#define OMAP4_LPDDR21_VREF_CA_CCAP1_SHIFT   30
 
#define OMAP4_LPDDR21_VREF_CA_CCAP1_MASK   (1 << 30)
 
#define OMAP4_LPDDR21_VREF_CA_INT_CCAP0_SHIFT   29
 
#define OMAP4_LPDDR21_VREF_CA_INT_CCAP0_MASK   (1 << 29)
 
#define OMAP4_LPDDR21_VREF_CA_INT_CCAP1_SHIFT   28
 
#define OMAP4_LPDDR21_VREF_CA_INT_CCAP1_MASK   (1 << 28)
 
#define OMAP4_LPDDR21_VREF_CA_INT_TAP0_SHIFT   27
 
#define OMAP4_LPDDR21_VREF_CA_INT_TAP0_MASK   (1 << 27)
 
#define OMAP4_LPDDR21_VREF_CA_INT_TAP1_SHIFT   26
 
#define OMAP4_LPDDR21_VREF_CA_INT_TAP1_MASK   (1 << 26)
 
#define OMAP4_LPDDR21_VREF_CA_TAP0_SHIFT   25
 
#define OMAP4_LPDDR21_VREF_CA_TAP0_MASK   (1 << 25)
 
#define OMAP4_LPDDR21_VREF_CA_TAP1_SHIFT   24
 
#define OMAP4_LPDDR21_VREF_CA_TAP1_MASK   (1 << 24)
 
#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP0_SHIFT   23
 
#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP0_MASK   (1 << 23)
 
#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP1_SHIFT   22
 
#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP1_MASK   (1 << 22)
 
#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP0_SHIFT   21
 
#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP0_MASK   (1 << 21)
 
#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP1_SHIFT   20
 
#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP1_MASK   (1 << 20)
 
#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP0_SHIFT   19
 
#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP0_MASK   (1 << 19)
 
#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP1_SHIFT   18
 
#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP1_MASK   (1 << 18)
 
#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP0_SHIFT   17
 
#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP0_MASK   (1 << 17)
 
#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP1_SHIFT   16
 
#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP1_MASK   (1 << 16)
 
#define OMAP4_LPDDR21_VREF_DQ_CCAP0_SHIFT   15
 
#define OMAP4_LPDDR21_VREF_DQ_CCAP0_MASK   (1 << 15)
 
#define OMAP4_LPDDR21_VREF_DQ_CCAP1_SHIFT   14
 
#define OMAP4_LPDDR21_VREF_DQ_CCAP1_MASK   (1 << 14)
 
#define OMAP4_LPDDR21_VREF_DQ_TAP0_SHIFT   13
 
#define OMAP4_LPDDR21_VREF_DQ_TAP0_MASK   (1 << 13)
 
#define OMAP4_LPDDR21_VREF_DQ_TAP1_SHIFT   12
 
#define OMAP4_LPDDR21_VREF_DQ_TAP1_MASK   (1 << 12)
 
#define OMAP4_LPDDR2IO2_GR4_SR_SHIFT   30
 
#define OMAP4_LPDDR2IO2_GR4_SR_MASK   (0x3 << 30)
 
#define OMAP4_LPDDR2IO2_GR4_I_SHIFT   27
 
#define OMAP4_LPDDR2IO2_GR4_I_MASK   (0x7 << 27)
 
#define OMAP4_LPDDR2IO2_GR4_WD_SHIFT   25
 
#define OMAP4_LPDDR2IO2_GR4_WD_MASK   (0x3 << 25)
 
#define OMAP4_LPDDR2IO2_GR3_SR_SHIFT   22
 
#define OMAP4_LPDDR2IO2_GR3_SR_MASK   (0x3 << 22)
 
#define OMAP4_LPDDR2IO2_GR3_I_SHIFT   19
 
#define OMAP4_LPDDR2IO2_GR3_I_MASK   (0x7 << 19)
 
#define OMAP4_LPDDR2IO2_GR3_WD_SHIFT   17
 
#define OMAP4_LPDDR2IO2_GR3_WD_MASK   (0x3 << 17)
 
#define OMAP4_LPDDR2IO2_GR2_SR_SHIFT   14
 
#define OMAP4_LPDDR2IO2_GR2_SR_MASK   (0x3 << 14)
 
#define OMAP4_LPDDR2IO2_GR2_I_SHIFT   11
 
#define OMAP4_LPDDR2IO2_GR2_I_MASK   (0x7 << 11)
 
#define OMAP4_LPDDR2IO2_GR2_WD_SHIFT   9
 
#define OMAP4_LPDDR2IO2_GR2_WD_MASK   (0x3 << 9)
 
#define OMAP4_LPDDR2IO2_GR1_SR_SHIFT   6
 
#define OMAP4_LPDDR2IO2_GR1_SR_MASK   (0x3 << 6)
 
#define OMAP4_LPDDR2IO2_GR1_I_SHIFT   3
 
#define OMAP4_LPDDR2IO2_GR1_I_MASK   (0x7 << 3)
 
#define OMAP4_LPDDR2IO2_GR1_WD_SHIFT   1
 
#define OMAP4_LPDDR2IO2_GR1_WD_MASK   (0x3 << 1)
 
#define OMAP4_LPDDR2IO2_GR8_SR_SHIFT   30
 
#define OMAP4_LPDDR2IO2_GR8_SR_MASK   (0x3 << 30)
 
#define OMAP4_LPDDR2IO2_GR8_I_SHIFT   27
 
#define OMAP4_LPDDR2IO2_GR8_I_MASK   (0x7 << 27)
 
#define OMAP4_LPDDR2IO2_GR8_WD_SHIFT   25
 
#define OMAP4_LPDDR2IO2_GR8_WD_MASK   (0x3 << 25)
 
#define OMAP4_LPDDR2IO2_GR7_SR_SHIFT   22
 
#define OMAP4_LPDDR2IO2_GR7_SR_MASK   (0x3 << 22)
 
#define OMAP4_LPDDR2IO2_GR7_I_SHIFT   19
 
#define OMAP4_LPDDR2IO2_GR7_I_MASK   (0x7 << 19)
 
#define OMAP4_LPDDR2IO2_GR7_WD_SHIFT   17
 
#define OMAP4_LPDDR2IO2_GR7_WD_MASK   (0x3 << 17)
 
#define OMAP4_LPDDR2IO2_GR6_SR_SHIFT   14
 
#define OMAP4_LPDDR2IO2_GR6_SR_MASK   (0x3 << 14)
 
#define OMAP4_LPDDR2IO2_GR6_I_SHIFT   11
 
#define OMAP4_LPDDR2IO2_GR6_I_MASK   (0x7 << 11)
 
#define OMAP4_LPDDR2IO2_GR6_WD_SHIFT   9
 
#define OMAP4_LPDDR2IO2_GR6_WD_MASK   (0x3 << 9)
 
#define OMAP4_LPDDR2IO2_GR5_SR_SHIFT   6
 
#define OMAP4_LPDDR2IO2_GR5_SR_MASK   (0x3 << 6)
 
#define OMAP4_LPDDR2IO2_GR5_I_SHIFT   3
 
#define OMAP4_LPDDR2IO2_GR5_I_MASK   (0x7 << 3)
 
#define OMAP4_LPDDR2IO2_GR5_WD_SHIFT   1
 
#define OMAP4_LPDDR2IO2_GR5_WD_MASK   (0x3 << 1)
 
#define OMAP4_LPDDR2IO2_GR11_SR_SHIFT   30
 
#define OMAP4_LPDDR2IO2_GR11_SR_MASK   (0x3 << 30)
 
#define OMAP4_LPDDR2IO2_GR11_I_SHIFT   27
 
#define OMAP4_LPDDR2IO2_GR11_I_MASK   (0x7 << 27)
 
#define OMAP4_LPDDR2IO2_GR11_WD_SHIFT   25
 
#define OMAP4_LPDDR2IO2_GR11_WD_MASK   (0x3 << 25)
 
#define OMAP4_LPDDR2IO2_GR10_SR_SHIFT   22
 
#define OMAP4_LPDDR2IO2_GR10_SR_MASK   (0x3 << 22)
 
#define OMAP4_LPDDR2IO2_GR10_I_SHIFT   19
 
#define OMAP4_LPDDR2IO2_GR10_I_MASK   (0x7 << 19)
 
#define OMAP4_LPDDR2IO2_GR10_WD_SHIFT   17
 
#define OMAP4_LPDDR2IO2_GR10_WD_MASK   (0x3 << 17)
 
#define OMAP4_LPDDR2IO2_GR9_SR_SHIFT   14
 
#define OMAP4_LPDDR2IO2_GR9_SR_MASK   (0x3 << 14)
 
#define OMAP4_LPDDR2IO2_GR9_I_SHIFT   11
 
#define OMAP4_LPDDR2IO2_GR9_I_MASK   (0x7 << 11)
 
#define OMAP4_LPDDR2IO2_GR9_WD_SHIFT   9
 
#define OMAP4_LPDDR2IO2_GR9_WD_MASK   (0x3 << 9)
 
#define OMAP4_LPDDR22_VREF_CA_CCAP0_SHIFT   31
 
#define OMAP4_LPDDR22_VREF_CA_CCAP0_MASK   (1 << 31)
 
#define OMAP4_LPDDR22_VREF_CA_CCAP1_SHIFT   30
 
#define OMAP4_LPDDR22_VREF_CA_CCAP1_MASK   (1 << 30)
 
#define OMAP4_LPDDR22_VREF_CA_INT_CCAP0_SHIFT   29
 
#define OMAP4_LPDDR22_VREF_CA_INT_CCAP0_MASK   (1 << 29)
 
#define OMAP4_LPDDR22_VREF_CA_INT_CCAP1_SHIFT   28
 
#define OMAP4_LPDDR22_VREF_CA_INT_CCAP1_MASK   (1 << 28)
 
#define OMAP4_LPDDR22_VREF_CA_INT_TAP0_SHIFT   27
 
#define OMAP4_LPDDR22_VREF_CA_INT_TAP0_MASK   (1 << 27)
 
#define OMAP4_LPDDR22_VREF_CA_INT_TAP1_SHIFT   26
 
#define OMAP4_LPDDR22_VREF_CA_INT_TAP1_MASK   (1 << 26)
 
#define OMAP4_LPDDR22_VREF_CA_TAP0_SHIFT   25
 
#define OMAP4_LPDDR22_VREF_CA_TAP0_MASK   (1 << 25)
 
#define OMAP4_LPDDR22_VREF_CA_TAP1_SHIFT   24
 
#define OMAP4_LPDDR22_VREF_CA_TAP1_MASK   (1 << 24)
 
#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP0_SHIFT   23
 
#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP0_MASK   (1 << 23)
 
#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP1_SHIFT   22
 
#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP1_MASK   (1 << 22)
 
#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP0_SHIFT   21
 
#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP0_MASK   (1 << 21)
 
#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP1_SHIFT   20
 
#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP1_MASK   (1 << 20)
 
#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP0_SHIFT   19
 
#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP0_MASK   (1 << 19)
 
#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP1_SHIFT   18
 
#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP1_MASK   (1 << 18)
 
#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP0_SHIFT   17
 
#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP0_MASK   (1 << 17)
 
#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP1_SHIFT   16
 
#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP1_MASK   (1 << 16)
 
#define OMAP4_LPDDR22_VREF_DQ_CCAP0_SHIFT   15
 
#define OMAP4_LPDDR22_VREF_DQ_CCAP0_MASK   (1 << 15)
 
#define OMAP4_LPDDR22_VREF_DQ_CCAP1_SHIFT   14
 
#define OMAP4_LPDDR22_VREF_DQ_CCAP1_MASK   (1 << 14)
 
#define OMAP4_LPDDR22_VREF_DQ_TAP0_SHIFT   13
 
#define OMAP4_LPDDR22_VREF_DQ_TAP0_MASK   (1 << 13)
 
#define OMAP4_LPDDR22_VREF_DQ_TAP1_SHIFT   12
 
#define OMAP4_LPDDR22_VREF_DQ_TAP1_MASK   (1 << 12)
 
#define OMAP4_ABE_DMIC_DIN3_EN_SHIFT   31
 
#define OMAP4_ABE_DMIC_DIN3_EN_MASK   (1 << 31)
 
#define OMAP4_MCSPI1_CS3_EN_SHIFT   30
 
#define OMAP4_MCSPI1_CS3_EN_MASK   (1 << 30)
 
#define OMAP4_MIRROR_MODE_EN_SHIFT   31
 
#define OMAP4_MIRROR_MODE_EN_MASK   (1 << 31)
 
#define OMAP4_C2C_SPARE_SHIFT   24
 
#define OMAP4_C2C_SPARE_MASK   (0x7f << 24)
 
#define OMAP4_CORE_CONTROL_SPARE_RW_SHIFT   0
 
#define OMAP4_CORE_CONTROL_SPARE_RW_MASK   (0xffffffff << 0)
 
#define OMAP4_CORE_CONTROL_SPARE_R_SHIFT   0
 
#define OMAP4_CORE_CONTROL_SPARE_R_MASK   (0xffffffff << 0)
 
#define OMAP4_CORE_CONTROL_SPARE_R_C0_SHIFT   31
 
#define OMAP4_CORE_CONTROL_SPARE_R_C0_MASK   (1 << 31)
 
#define OMAP4_CORE_CONTROL_SPARE_R_C1_SHIFT   30
 
#define OMAP4_CORE_CONTROL_SPARE_R_C1_MASK   (1 << 30)
 
#define OMAP4_CORE_CONTROL_SPARE_R_C2_SHIFT   29
 
#define OMAP4_CORE_CONTROL_SPARE_R_C2_MASK   (1 << 29)
 
#define OMAP4_CORE_CONTROL_SPARE_R_C3_SHIFT   28
 
#define OMAP4_CORE_CONTROL_SPARE_R_C3_MASK   (1 << 28)
 
#define OMAP4_CORE_CONTROL_SPARE_R_C4_SHIFT   27
 
#define OMAP4_CORE_CONTROL_SPARE_R_C4_MASK   (1 << 27)
 
#define OMAP4_CORE_CONTROL_SPARE_R_C5_SHIFT   26
 
#define OMAP4_CORE_CONTROL_SPARE_R_C5_MASK   (1 << 26)
 
#define OMAP4_CORE_CONTROL_SPARE_R_C6_SHIFT   25
 
#define OMAP4_CORE_CONTROL_SPARE_R_C6_MASK   (1 << 25)
 
#define OMAP4_CORE_CONTROL_SPARE_R_C7_SHIFT   24
 
#define OMAP4_CORE_CONTROL_SPARE_R_C7_MASK   (1 << 24)
 
#define OMAP4_AVDAC_TRIM_BYTE3_SHIFT   24
 
#define OMAP4_AVDAC_TRIM_BYTE3_MASK   (0x7f << 24)
 
#define OMAP4_AVDAC_TRIM_BYTE2_SHIFT   16
 
#define OMAP4_AVDAC_TRIM_BYTE2_MASK   (0xff << 16)
 
#define OMAP4_AVDAC_TRIM_BYTE1_SHIFT   8
 
#define OMAP4_AVDAC_TRIM_BYTE1_MASK   (0xff << 8)
 
#define OMAP4_AVDAC_TRIM_BYTE0_SHIFT   0
 
#define OMAP4_AVDAC_TRIM_BYTE0_MASK   (0xff << 0)
 
#define OMAP4_EFUSE_SMART2TEST_P0_SHIFT   31
 
#define OMAP4_EFUSE_SMART2TEST_P0_MASK   (1 << 31)
 
#define OMAP4_EFUSE_SMART2TEST_P1_SHIFT   30
 
#define OMAP4_EFUSE_SMART2TEST_P1_MASK   (1 << 30)
 
#define OMAP4_EFUSE_SMART2TEST_P2_SHIFT   29
 
#define OMAP4_EFUSE_SMART2TEST_P2_MASK   (1 << 29)
 
#define OMAP4_EFUSE_SMART2TEST_P3_SHIFT   28
 
#define OMAP4_EFUSE_SMART2TEST_P3_MASK   (1 << 28)
 
#define OMAP4_EFUSE_SMART2TEST_N0_SHIFT   27
 
#define OMAP4_EFUSE_SMART2TEST_N0_MASK   (1 << 27)
 
#define OMAP4_EFUSE_SMART2TEST_N1_SHIFT   26
 
#define OMAP4_EFUSE_SMART2TEST_N1_MASK   (1 << 26)
 
#define OMAP4_EFUSE_SMART2TEST_N2_SHIFT   25
 
#define OMAP4_EFUSE_SMART2TEST_N2_MASK   (1 << 25)
 
#define OMAP4_EFUSE_SMART2TEST_N3_SHIFT   24
 
#define OMAP4_EFUSE_SMART2TEST_N3_MASK   (1 << 24)
 
#define OMAP4_LPDDR2_PTV_N1_SHIFT   23
 
#define OMAP4_LPDDR2_PTV_N1_MASK   (1 << 23)
 
#define OMAP4_LPDDR2_PTV_N2_SHIFT   22
 
#define OMAP4_LPDDR2_PTV_N2_MASK   (1 << 22)
 
#define OMAP4_LPDDR2_PTV_N3_SHIFT   21
 
#define OMAP4_LPDDR2_PTV_N3_MASK   (1 << 21)
 
#define OMAP4_LPDDR2_PTV_N4_SHIFT   20
 
#define OMAP4_LPDDR2_PTV_N4_MASK   (1 << 20)
 
#define OMAP4_LPDDR2_PTV_N5_SHIFT   19
 
#define OMAP4_LPDDR2_PTV_N5_MASK   (1 << 19)
 
#define OMAP4_LPDDR2_PTV_P1_SHIFT   18
 
#define OMAP4_LPDDR2_PTV_P1_MASK   (1 << 18)
 
#define OMAP4_LPDDR2_PTV_P2_SHIFT   17
 
#define OMAP4_LPDDR2_PTV_P2_MASK   (1 << 17)
 
#define OMAP4_LPDDR2_PTV_P3_SHIFT   16
 
#define OMAP4_LPDDR2_PTV_P3_MASK   (1 << 16)
 
#define OMAP4_LPDDR2_PTV_P4_SHIFT   15
 
#define OMAP4_LPDDR2_PTV_P4_MASK   (1 << 15)
 
#define OMAP4_LPDDR2_PTV_P5_SHIFT   14
 
#define OMAP4_LPDDR2_PTV_P5_MASK   (1 << 14)
 
#define OMAP4_STD_FUSE_SPARE_1_SHIFT   24
 
#define OMAP4_STD_FUSE_SPARE_1_MASK   (0xff << 24)
 
#define OMAP4_STD_FUSE_SPARE_2_SHIFT   16
 
#define OMAP4_STD_FUSE_SPARE_2_MASK   (0xff << 16)
 
#define OMAP4_STD_FUSE_SPARE_3_SHIFT   8
 
#define OMAP4_STD_FUSE_SPARE_3_MASK   (0xff << 8)
 
#define OMAP4_STD_FUSE_SPARE_4_SHIFT   0
 
#define OMAP4_STD_FUSE_SPARE_4_MASK   (0xff << 0)
 
#define OMAP4_STD_FUSE_SPARE_5_SHIFT   24
 
#define OMAP4_STD_FUSE_SPARE_5_MASK   (0xff << 24)
 
#define OMAP4_STD_FUSE_SPARE_6_SHIFT   16
 
#define OMAP4_STD_FUSE_SPARE_6_MASK   (0xff << 16)
 
#define OMAP4_STD_FUSE_SPARE_7_SHIFT   8
 
#define OMAP4_STD_FUSE_SPARE_7_MASK   (0xff << 8)
 
#define OMAP4_STD_FUSE_SPARE_8_SHIFT   0
 
#define OMAP4_STD_FUSE_SPARE_8_MASK   (0xff << 0)
 

Macro Definition Documentation

#define OMAP4_ABE_CLKS_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)

Definition at line 353 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_CLKS_DUPLICATEWAKEUPEVENT_SHIFT   7

Definition at line 352 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DMIC_CLK1_DUPLICATEWAKEUPEVENT_MASK   (1 << 8)

Definition at line 351 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DMIC_CLK1_DUPLICATEWAKEUPEVENT_SHIFT   8

Definition at line 350 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DMIC_DIN1_DUPLICATEWAKEUPEVENT_MASK   (1 << 9)

Definition at line 349 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DMIC_DIN1_DUPLICATEWAKEUPEVENT_SHIFT   9

Definition at line 348 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DMIC_DIN2_DUPLICATEWAKEUPEVENT_MASK   (1 << 10)

Definition at line 347 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DMIC_DIN2_DUPLICATEWAKEUPEVENT_SHIFT   10

Definition at line 346 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DMIC_DIN3_DUPLICATEWAKEUPEVENT_MASK   (1 << 11)

Definition at line 345 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DMIC_DIN3_DUPLICATEWAKEUPEVENT_SHIFT   11

Definition at line 344 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DMIC_DIN3_EN_MASK   (1 << 31)

Definition at line 1305 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DMIC_DIN3_EN_SHIFT   31

Definition at line 1304 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DR0_LB_MASK   (0x3 << 30)

Definition at line 581 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DR0_LB_SHIFT   30

Definition at line 580 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DR0_SC_MASK   (0x3 << 30)

Definition at line 547 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_DR0_SC_SHIFT   30

Definition at line 546 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP1_CLKX_DUPLICATEWAKEUPEVENT_MASK   (1 << 31)

Definition at line 239 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP1_CLKX_DUPLICATEWAKEUPEVENT_SHIFT   31

Definition at line 238 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP1_DR_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)

Definition at line 367 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP1_DR_DUPLICATEWAKEUPEVENT_SHIFT   0

Definition at line 366 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP1_DR_EN_MASK   (1 << 29)

Definition at line 955 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP1_DR_EN_SHIFT   29

Definition at line 954 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP1_DX_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)

Definition at line 365 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP1_DX_DUPLICATEWAKEUPEVENT_SHIFT   1

Definition at line 364 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP1_FSX_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)

Definition at line 363 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP1_FSX_DUPLICATEWAKEUPEVENT_SHIFT   2

Definition at line 362 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP2_CLKX_DUPLICATEWAKEUPEVENT_MASK   (1 << 27)

Definition at line 247 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP2_CLKX_DUPLICATEWAKEUPEVENT_SHIFT   27

Definition at line 246 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP2_DR_DUPLICATEWAKEUPEVENT_MASK   (1 << 28)

Definition at line 245 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP2_DR_DUPLICATEWAKEUPEVENT_SHIFT   28

Definition at line 244 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP2_DX_DUPLICATEWAKEUPEVENT_MASK   (1 << 29)

Definition at line 243 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP2_DX_DUPLICATEWAKEUPEVENT_SHIFT   29

Definition at line 242 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP2_FSX_DUPLICATEWAKEUPEVENT_MASK   (1 << 30)

Definition at line 241 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_MCBSP2_FSX_DUPLICATEWAKEUPEVENT_SHIFT   30

Definition at line 240 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_PDM_DL_DATA_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)

Definition at line 359 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_PDM_DL_DATA_DUPLICATEWAKEUPEVENT_SHIFT   4

Definition at line 358 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_PDM_FRAME_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)

Definition at line 357 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_PDM_FRAME_DUPLICATEWAKEUPEVENT_SHIFT   5

Definition at line 356 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_PDM_LB_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)

Definition at line 355 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_PDM_LB_CLK_DUPLICATEWAKEUPEVENT_SHIFT   6

Definition at line 354 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_PDM_UL_DATA_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)

Definition at line 361 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ABE_PDM_UL_DATA_DUPLICATEWAKEUPEVENT_SHIFT   3

Definition at line 360 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ALBCTRLRX_CLKX_MASK   (1 << 30)

Definition at line 953 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ALBCTRLRX_CLKX_SHIFT   30

Definition at line 952 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ALBCTRLRX_FSX_MASK   (1 << 31)

Definition at line 951 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_ALBCTRLRX_FSX_SHIFT   31

Definition at line 950 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_ACEN_MASK   (1 << 31)

Definition at line 915 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_ACEN_SHIFT   31

Definition at line 914 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_CTL_MASK   (0xffff << 13)

Definition at line 921 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_CTL_SHIFT   13

Definition at line 920 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_CTL_WR_ACK_MASK   (1 << 12)

Definition at line 923 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_CTL_WR_ACK_SHIFT   12

Definition at line 922 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_INPUTINV_MASK   (1 << 29)

Definition at line 919 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_INPUTINV_SHIFT   29

Definition at line 918 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_TRIM_BYTE0_MASK   (0xff << 0)

Definition at line 1349 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_TRIM_BYTE0_SHIFT   0

Definition at line 1348 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_TRIM_BYTE1_MASK   (0xff << 8)

Definition at line 1347 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_TRIM_BYTE1_SHIFT   8

Definition at line 1346 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_TRIM_BYTE2_MASK   (0xff << 16)

Definition at line 1345 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_TRIM_BYTE2_SHIFT   16

Definition at line 1344 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_TRIM_BYTE3_MASK   (0x7f << 24)

Definition at line 1343 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_TRIM_BYTE3_SHIFT   24

Definition at line 1342 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_TVOUTBYPASS_MASK   (1 << 30)

Definition at line 917 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_AVDAC_TVOUTBYPASS_SHIFT   30

Definition at line 916 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_DATA11_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)

Definition at line 221 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_DATA11_DUPLICATEWAKEUPEVENT_SHIFT   7

Definition at line 220 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_DATA12_DUPLICATEWAKEUPEVENT_MASK   (1 << 8)

Definition at line 219 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_DATA12_DUPLICATEWAKEUPEVENT_SHIFT   8

Definition at line 218 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_DATA13_DUPLICATEWAKEUPEVENT_MASK   (1 << 9)

Definition at line 217 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_DATA13_DUPLICATEWAKEUPEVENT_SHIFT   9

Definition at line 216 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_DATA14_DUPLICATEWAKEUPEVENT_MASK   (1 << 10)

Definition at line 215 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_DATA14_DUPLICATEWAKEUPEVENT_SHIFT   10

Definition at line 214 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_DATA15_DUPLICATEWAKEUPEVENT_MASK   (1 << 11)

Definition at line 213 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_DATA15_DUPLICATEWAKEUPEVENT_SHIFT   11

Definition at line 212 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_DR0_LB_MASK   (1 << 31)

Definition at line 615 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_DR0_LB_SHIFT   31

Definition at line 614 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_SPARE_MASK   (0x7f << 24)

Definition at line 1313 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_C2C_SPARE_SHIFT   24

Definition at line 1312 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAM_DR0_LB_MASK   (0x3 << 28)

Definition at line 583 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAM_DR0_LB_SHIFT   28

Definition at line 582 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAM_DR0_SC_MASK   (0x3 << 28)

Definition at line 549 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAM_DR0_SC_SHIFT   28

Definition at line 548 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAM_GLOBALRESET_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)

Definition at line 301 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAM_GLOBALRESET_DUPLICATEWAKEUPEVENT_SHIFT   0

Definition at line 300 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAM_SHUTTER_DUPLICATEWAKEUPEVENT_MASK   (1 << 30)

Definition at line 175 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAM_SHUTTER_DUPLICATEWAKEUPEVENT_SHIFT   30

Definition at line 174 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAM_STROBE_DUPLICATEWAKEUPEVENT_MASK   (1 << 31)

Definition at line 173 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAM_STROBE_DUPLICATEWAKEUPEVENT_SHIFT   31

Definition at line 172 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_CSI21_CAMMODE_MASK   (0x3 << 16)

Definition at line 911 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_CSI21_CAMMODE_SHIFT   16

Definition at line 910 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_CSI21_CTRLCLKEN_MASK   (1 << 18)

Definition at line 909 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_CSI21_CTRLCLKEN_SHIFT   18

Definition at line 908 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_CSI21_LANEENABLE_MASK   (0x1f << 24)

Definition at line 901 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_CSI21_LANEENABLE_SHIFT   24

Definition at line 900 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_CSI22_CAMMODE_MASK   (0x3 << 19)

Definition at line 907 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_CSI22_CAMMODE_SHIFT   19

Definition at line 906 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_CSI22_CTRLCLKEN_MASK   (1 << 21)

Definition at line 905 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_CSI22_CTRLCLKEN_SHIFT   21

Definition at line 904 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_CSI22_LANEENABLE_MASK   (0x3 << 29)

Definition at line 899 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_CSI22_LANEENABLE_SHIFT   29

Definition at line 898 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_UNIPRO_CAMMODE_MASK   (0x3 << 22)

Definition at line 903 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_UNIPRO_CAMMODE_SHIFT   22

Definition at line 902 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_UNIPRO_CTRLCLKEN_MASK   (1 << 31)

Definition at line 897 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CAMERARX_UNIPRO_CTRLCLKEN_SHIFT   31

Definition at line 896 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT0_AUTO_EN_MASK   (1 << 31)

Definition at line 1067 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT0_AUTO_EN_SHIFT   31

Definition at line 1066 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT1_AUTO_EN_MASK   (1 << 30)

Definition at line 1069 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CARKIT_USBA0_ULPIPHY_DAT1_AUTO_EN_SHIFT   30

Definition at line 1068 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C0_MASK   (1 << 31)

Definition at line 1325 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C0_SHIFT   31

Definition at line 1324 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C1_MASK   (1 << 30)

Definition at line 1327 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C1_SHIFT   30

Definition at line 1326 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C2_MASK   (1 << 29)

Definition at line 1329 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C2_SHIFT   29

Definition at line 1328 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C3_MASK   (1 << 28)

Definition at line 1331 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C3_SHIFT   28

Definition at line 1330 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C4_MASK   (1 << 27)

Definition at line 1333 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C4_SHIFT   27

Definition at line 1332 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C5_MASK   (1 << 26)

Definition at line 1335 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C5_SHIFT   26

Definition at line 1334 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C6_MASK   (1 << 25)

Definition at line 1337 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C6_SHIFT   25

Definition at line 1336 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C7_MASK   (1 << 24)

Definition at line 1339 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_C7_SHIFT   24

Definition at line 1338 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_MASK   (0xffffffff << 0)

Definition at line 1321 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_R_SHIFT   0

Definition at line 1320 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_RW_MASK   (0xffffffff << 0)

Definition at line 1317 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CORE_CONTROL_SPARE_RW_SHIFT   0

Definition at line 1316 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DX0_DUPLICATEWAKEUPEVENT_MASK   (1 << 16)

Definition at line 203 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DX0_DUPLICATEWAKEUPEVENT_SHIFT   16

Definition at line 202 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DX1_DUPLICATEWAKEUPEVENT_MASK   (1 << 18)

Definition at line 199 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DX1_DUPLICATEWAKEUPEVENT_SHIFT   18

Definition at line 198 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DX2_DUPLICATEWAKEUPEVENT_MASK   (1 << 20)

Definition at line 195 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DX2_DUPLICATEWAKEUPEVENT_SHIFT   20

Definition at line 194 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DX3_DUPLICATEWAKEUPEVENT_MASK   (1 << 22)

Definition at line 191 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DX3_DUPLICATEWAKEUPEVENT_SHIFT   22

Definition at line 190 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DX4_DUPLICATEWAKEUPEVENT_MASK   (1 << 24)

Definition at line 187 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DX4_DUPLICATEWAKEUPEVENT_SHIFT   24

Definition at line 186 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DY0_DUPLICATEWAKEUPEVENT_MASK   (1 << 17)

Definition at line 201 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DY0_DUPLICATEWAKEUPEVENT_SHIFT   17

Definition at line 200 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DY1_DUPLICATEWAKEUPEVENT_MASK   (1 << 19)

Definition at line 197 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DY1_DUPLICATEWAKEUPEVENT_SHIFT   19

Definition at line 196 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DY2_DUPLICATEWAKEUPEVENT_MASK   (1 << 21)

Definition at line 193 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DY2_DUPLICATEWAKEUPEVENT_SHIFT   21

Definition at line 192 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DY3_DUPLICATEWAKEUPEVENT_MASK   (1 << 23)

Definition at line 189 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DY3_DUPLICATEWAKEUPEVENT_SHIFT   23

Definition at line 188 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DY4_DUPLICATEWAKEUPEVENT_MASK   (1 << 25)

Definition at line 185 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI21_DY4_DUPLICATEWAKEUPEVENT_SHIFT   25

Definition at line 184 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI22_DX0_DUPLICATEWAKEUPEVENT_MASK   (1 << 26)

Definition at line 183 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI22_DX0_DUPLICATEWAKEUPEVENT_SHIFT   26

Definition at line 182 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI22_DX1_DUPLICATEWAKEUPEVENT_MASK   (1 << 28)

Definition at line 179 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI22_DX1_DUPLICATEWAKEUPEVENT_SHIFT   28

Definition at line 178 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI22_DY0_DUPLICATEWAKEUPEVENT_MASK   (1 << 27)

Definition at line 181 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI22_DY0_DUPLICATEWAKEUPEVENT_SHIFT   27

Definition at line 180 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI22_DY1_DUPLICATEWAKEUPEVENT_MASK   (1 << 29)

Definition at line 177 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CSI22_DY1_DUPLICATEWAKEUPEVENT_SHIFT   29

Definition at line 176 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE   0x4a100000

Definition at line 25 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_AVDAC   0x060c

Definition at line 52 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_BUS_HOLD   0x0658

Definition at line 71 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_C2C   0x065c

Definition at line 72 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_CAMERA_RX   0x0608

Definition at line 51 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_DSIPHY   0x0618

Definition at line 55 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_1   0x0700

Definition at line 76 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_2   0x0704

Definition at line 77 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_3   0x0708

Definition at line 78 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_EFUSE_4   0x070c

Definition at line 79 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HDMI_TX_PHY   0x0610

Definition at line 53 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HDQ   0x0634

Definition at line 62 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_HSI   0x062c

Definition at line 60 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_0   0x0604

Definition at line 50 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_I2C_1   0x0624

Definition at line 58 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_0   0x0638

Definition at line 63 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_1   0x063c

Definition at line 64 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_2   0x0640

Definition at line 65 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO1_3   0x0644

Definition at line 66 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_0   0x0648

Definition at line 67 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_1   0x064c

Definition at line 68 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_2   0x0650

Definition at line 69 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_LPDDR2IO2_3   0x0654

Definition at line 70 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MCBSPLP   0x061c

Definition at line 56 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC1   0x0628

Definition at line 59 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC2   0x0614

Definition at line 54 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PADCONF_GLOBAL   0x05a0

Definition at line 38 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PADCONF_MODE   0x05a4

Definition at line 39 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE   0x0600

Definition at line 49 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SLIMBUS   0x05c8

Definition at line 48 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART1IO_PADCONF_0   0x05a8

Definition at line 40 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART1IO_PADCONF_1   0x05ac

Definition at line 41 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_0   0x05b0

Definition at line 42 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART2IO_PADCONF_1   0x05b4

Definition at line 43 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_0   0x05b8

Definition at line 44 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_1   0x05bc

Definition at line 45 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_SMART3IO_PADCONF_2   0x05c0

Definition at line 46 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USB   0x0630

Definition at line 61 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USB2PHYCORE   0x0620

Definition at line 57 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_USBB_HSIC   0x05c4

Definition at line 47 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_R   0x0664

Definition at line 74 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_R_C0   0x0668

Definition at line 75 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_CORE_CONTROL_SPARE_RW   0x0660

Definition at line 73 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_IP_HWINFO   0x0004

Definition at line 29 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_IP_REVISION   0x0000

Definition at line 28 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_IP_SYSCONFIG   0x0010

Definition at line 30 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_0   0x01d8

Definition at line 31 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_1   0x01dc

Definition at line 32 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_2   0x01e0

Definition at line 33 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_3   0x01e4

Definition at line 34 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_4   0x01e8

Definition at line 35 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_5   0x01ec

Definition at line 36 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_CTRL_MODULE_PAD_CORE_PADCONF_WAKEUPEVENT_6   0x01f0

Definition at line 37 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DMIC_DR0_LB_MASK   (1 << 31)

Definition at line 729 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DMIC_DR0_LB_SHIFT   31

Definition at line 728 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DMIC_DR0_MB_MASK   (0x3 << 30)

Definition at line 687 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DMIC_DR0_MB_SHIFT   30

Definition at line 686 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_DR1_LB_MASK   (1 << 30)

Definition at line 617 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_DR1_LB_SHIFT   30

Definition at line 616 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_DR2_LB_MASK   (1 << 29)

Definition at line 619 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_DR2_LB_SHIFT   29

Definition at line 618 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_DR3_LB_MASK   (1 << 28)

Definition at line 621 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_DR3_LB_SHIFT   28

Definition at line 620 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU0_DUPLICATEWAKEUPEVENT_MASK   (1 << 20)

Definition at line 459 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU0_DUPLICATEWAKEUPEVENT_SHIFT   20

Definition at line 458 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU10_DUPLICATEWAKEUPEVENT_MASK   (1 << 30)

Definition at line 439 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU10_DUPLICATEWAKEUPEVENT_SHIFT   30

Definition at line 438 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU11_DUPLICATEWAKEUPEVENT_MASK   (1 << 31)

Definition at line 437 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU11_DUPLICATEWAKEUPEVENT_SHIFT   31

Definition at line 436 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU12_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)

Definition at line 517 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU12_DUPLICATEWAKEUPEVENT_SHIFT   0

Definition at line 516 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU13_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)

Definition at line 515 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU13_DUPLICATEWAKEUPEVENT_SHIFT   1

Definition at line 514 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU14_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)

Definition at line 513 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU14_DUPLICATEWAKEUPEVENT_SHIFT   2

Definition at line 512 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU15_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)

Definition at line 511 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU15_DUPLICATEWAKEUPEVENT_SHIFT   3

Definition at line 510 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU16_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)

Definition at line 509 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU16_DUPLICATEWAKEUPEVENT_SHIFT   4

Definition at line 508 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU17_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)

Definition at line 507 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU17_DUPLICATEWAKEUPEVENT_SHIFT   5

Definition at line 506 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU18_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)

Definition at line 505 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU18_DUPLICATEWAKEUPEVENT_SHIFT   6

Definition at line 504 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU19_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)

Definition at line 503 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU19_DUPLICATEWAKEUPEVENT_SHIFT   7

Definition at line 502 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU1_DUPLICATEWAKEUPEVENT_MASK   (1 << 21)

Definition at line 457 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU1_DUPLICATEWAKEUPEVENT_SHIFT   21

Definition at line 456 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU2_DUPLICATEWAKEUPEVENT_MASK   (1 << 22)

Definition at line 455 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU2_DUPLICATEWAKEUPEVENT_SHIFT   22

Definition at line 454 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU3_DUPLICATEWAKEUPEVENT_MASK   (1 << 23)

Definition at line 453 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU3_DUPLICATEWAKEUPEVENT_SHIFT   23

Definition at line 452 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU4_DUPLICATEWAKEUPEVENT_MASK   (1 << 24)

Definition at line 451 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU4_DUPLICATEWAKEUPEVENT_SHIFT   24

Definition at line 450 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU5_DUPLICATEWAKEUPEVENT_MASK   (1 << 25)

Definition at line 449 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU5_DUPLICATEWAKEUPEVENT_SHIFT   25

Definition at line 448 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU6_DUPLICATEWAKEUPEVENT_MASK   (1 << 26)

Definition at line 447 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU6_DUPLICATEWAKEUPEVENT_SHIFT   26

Definition at line 446 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU7_DUPLICATEWAKEUPEVENT_MASK   (1 << 27)

Definition at line 445 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU7_DUPLICATEWAKEUPEVENT_SHIFT   27

Definition at line 444 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU8_DUPLICATEWAKEUPEVENT_MASK   (1 << 28)

Definition at line 443 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU8_DUPLICATEWAKEUPEVENT_SHIFT   28

Definition at line 442 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU9_DUPLICATEWAKEUPEVENT_MASK   (1 << 29)

Definition at line 441 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DPM_EMU9_DUPLICATEWAKEUPEVENT_SHIFT   29

Definition at line 440 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DSI1_LANEENABLE_MASK   (0x1f << 24)

Definition at line 943 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DSI1_LANEENABLE_SHIFT   24

Definition at line 942 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DSI1_PIPD_MASK   (0x1f << 19)

Definition at line 945 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DSI1_PIPD_SHIFT   19

Definition at line 944 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DSI2_LANEENABLE_MASK   (0x7 << 29)

Definition at line 941 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DSI2_LANEENABLE_SHIFT   29

Definition at line 940 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DSI2_PIPD_MASK   (0x1f << 14)

Definition at line 947 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_DSI2_PIPD_SHIFT   14

Definition at line 946 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_N0_MASK   (1 << 27)

Definition at line 1361 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_N0_SHIFT   27

Definition at line 1360 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_N1_MASK   (1 << 26)

Definition at line 1363 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_N1_SHIFT   26

Definition at line 1362 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_N2_MASK   (1 << 25)

Definition at line 1365 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_N2_SHIFT   25

Definition at line 1364 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_N3_MASK   (1 << 24)

Definition at line 1367 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_N3_SHIFT   24

Definition at line 1366 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_P0_MASK   (1 << 31)

Definition at line 1353 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_P0_SHIFT   31

Definition at line 1352 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_P1_MASK   (1 << 30)

Definition at line 1355 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_P1_SHIFT   30

Definition at line 1354 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_P2_MASK   (1 << 29)

Definition at line 1357 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_P2_SHIFT   29

Definition at line 1356 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_P3_MASK   (1 << 28)

Definition at line 1359 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_EFUSE_SMART2TEST_P3_SHIFT   28

Definition at line 1358 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FORCE_OFFMODE_EN_MASK   (1 << 31)

Definition at line 521 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FORCE_OFFMODE_EN_SHIFT   31

Definition at line 520 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FREF_CLK1_OUT_DUPLICATEWAKEUPEVENT_MASK   (1 << 10)

Definition at line 479 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FREF_CLK1_OUT_DUPLICATEWAKEUPEVENT_SHIFT   10

Definition at line 478 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FREF_CLK2_OUT_DUPLICATEWAKEUPEVENT_MASK   (1 << 11)

Definition at line 477 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FREF_CLK2_OUT_DUPLICATEWAKEUPEVENT_SHIFT   11

Definition at line 476 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FREF_DR2_LB_MASK   (0x3 << 26)

Definition at line 585 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FREF_DR2_LB_SHIFT   26

Definition at line 584 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FREF_DR2_SC_MASK   (0x3 << 26)

Definition at line 551 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FREF_DR2_SC_SHIFT   26

Definition at line 550 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FREF_DR3_LB_MASK   (0x3 << 24)

Definition at line 587 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FREF_DR3_LB_SHIFT   24

Definition at line 586 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FREF_DR3_SC_MASK   (0x3 << 24)

Definition at line 553 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_FREF_DR3_SC_SHIFT   24

Definition at line 552 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR0_LB_MASK   (1 << 27)

Definition at line 623 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR0_LB_SHIFT   27

Definition at line 622 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR10_LB_MASK   (1 << 25)

Definition at line 627 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR10_LB_SHIFT   25

Definition at line 626 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR1_LB_MASK   (1 << 26)

Definition at line 625 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR1_LB_SHIFT   26

Definition at line 624 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR2_LB_MASK   (1 << 24)

Definition at line 629 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR2_LB_SHIFT   24

Definition at line 628 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR3_LB_MASK   (1 << 30)

Definition at line 731 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR3_LB_SHIFT   30

Definition at line 730 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR3_MB_MASK   (0x3 << 28)

Definition at line 689 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR3_MB_SHIFT   28

Definition at line 688 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR4_LB_MASK   (1 << 29)

Definition at line 733 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR4_LB_SHIFT   29

Definition at line 732 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR4_MB_MASK   (0x3 << 26)

Definition at line 691 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR4_MB_SHIFT   26

Definition at line 690 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR5_LB_MASK   (1 << 28)

Definition at line 735 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR5_LB_SHIFT   28

Definition at line 734 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR5_MB_MASK   (0x3 << 24)

Definition at line 693 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR5_MB_SHIFT   24

Definition at line 692 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR6_LB_MASK   (1 << 27)

Definition at line 737 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR6_LB_SHIFT   27

Definition at line 736 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR6_MB_MASK   (0x3 << 22)

Definition at line 695 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR6_MB_SHIFT   22

Definition at line 694 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR8_LB_MASK   (0x3 << 22)

Definition at line 589 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR8_LB_SHIFT   22

Definition at line 588 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR8_SC_MASK   (0x3 << 22)

Definition at line 555 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR8_SC_SHIFT   22

Definition at line 554 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR9_LB_MASK   (0x3 << 20)

Definition at line 591 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR9_LB_SHIFT   20

Definition at line 590 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR9_SC_MASK   (0x3 << 20)

Definition at line 557 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPIO_DR9_SC_SHIFT   20

Definition at line 556 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A16_DUPLICATEWAKEUPEVENT_MASK   (1 << 16)

Definition at line 137 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A16_DUPLICATEWAKEUPEVENT_SHIFT   16

Definition at line 136 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A17_DUPLICATEWAKEUPEVENT_MASK   (1 << 17)

Definition at line 135 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A17_DUPLICATEWAKEUPEVENT_SHIFT   17

Definition at line 134 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A18_DUPLICATEWAKEUPEVENT_MASK   (1 << 18)

Definition at line 133 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A18_DUPLICATEWAKEUPEVENT_SHIFT   18

Definition at line 132 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A19_DUPLICATEWAKEUPEVENT_MASK   (1 << 19)

Definition at line 131 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A19_DUPLICATEWAKEUPEVENT_SHIFT   19

Definition at line 130 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A20_DUPLICATEWAKEUPEVENT_MASK   (1 << 20)

Definition at line 129 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A20_DUPLICATEWAKEUPEVENT_SHIFT   20

Definition at line 128 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A21_DUPLICATEWAKEUPEVENT_MASK   (1 << 21)

Definition at line 127 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A21_DUPLICATEWAKEUPEVENT_SHIFT   21

Definition at line 126 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A22_DUPLICATEWAKEUPEVENT_MASK   (1 << 22)

Definition at line 125 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A22_DUPLICATEWAKEUPEVENT_SHIFT   22

Definition at line 124 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A23_DUPLICATEWAKEUPEVENT_MASK   (1 << 23)

Definition at line 123 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A23_DUPLICATEWAKEUPEVENT_SHIFT   23

Definition at line 122 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A24_DUPLICATEWAKEUPEVENT_MASK   (1 << 24)

Definition at line 121 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A24_DUPLICATEWAKEUPEVENT_SHIFT   24

Definition at line 120 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A25_DUPLICATEWAKEUPEVENT_MASK   (1 << 25)

Definition at line 119 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_A25_DUPLICATEWAKEUPEVENT_SHIFT   25

Definition at line 118 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD0_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)

Definition at line 169 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD0_DUPLICATEWAKEUPEVENT_SHIFT   0

Definition at line 168 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD10_DUPLICATEWAKEUPEVENT_MASK   (1 << 10)

Definition at line 149 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD10_DUPLICATEWAKEUPEVENT_SHIFT   10

Definition at line 148 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD11_DUPLICATEWAKEUPEVENT_MASK   (1 << 11)

Definition at line 147 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD11_DUPLICATEWAKEUPEVENT_SHIFT   11

Definition at line 146 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD12_DUPLICATEWAKEUPEVENT_MASK   (1 << 12)

Definition at line 145 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD12_DUPLICATEWAKEUPEVENT_SHIFT   12

Definition at line 144 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD13_DUPLICATEWAKEUPEVENT_MASK   (1 << 13)

Definition at line 143 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD13_DUPLICATEWAKEUPEVENT_SHIFT   13

Definition at line 142 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD14_DUPLICATEWAKEUPEVENT_MASK   (1 << 14)

Definition at line 141 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD14_DUPLICATEWAKEUPEVENT_SHIFT   14

Definition at line 140 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD15_DUPLICATEWAKEUPEVENT_MASK   (1 << 15)

Definition at line 139 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD15_DUPLICATEWAKEUPEVENT_SHIFT   15

Definition at line 138 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD1_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)

Definition at line 167 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD1_DUPLICATEWAKEUPEVENT_SHIFT   1

Definition at line 166 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD2_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)

Definition at line 165 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD2_DUPLICATEWAKEUPEVENT_SHIFT   2

Definition at line 164 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD3_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)

Definition at line 163 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD3_DUPLICATEWAKEUPEVENT_SHIFT   3

Definition at line 162 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD4_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)

Definition at line 161 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD4_DUPLICATEWAKEUPEVENT_SHIFT   4

Definition at line 160 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD5_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)

Definition at line 159 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD5_DUPLICATEWAKEUPEVENT_SHIFT   5

Definition at line 158 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD6_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)

Definition at line 157 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD6_DUPLICATEWAKEUPEVENT_SHIFT   6

Definition at line 156 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD7_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)

Definition at line 155 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD7_DUPLICATEWAKEUPEVENT_SHIFT   7

Definition at line 154 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD8_DUPLICATEWAKEUPEVENT_MASK   (1 << 8)

Definition at line 153 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD8_DUPLICATEWAKEUPEVENT_SHIFT   8

Definition at line 152 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD9_DUPLICATEWAKEUPEVENT_MASK   (1 << 9)

Definition at line 151 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_AD9_DUPLICATEWAKEUPEVENT_SHIFT   9

Definition at line 150 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 31)

Definition at line 107 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_CLK_DUPLICATEWAKEUPEVENT_SHIFT   31

Definition at line 106 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR0_LB_MASK   (1 << 23)

Definition at line 631 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR0_LB_SHIFT   23

Definition at line 630 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR1_LB_MASK   (1 << 22)

Definition at line 633 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR1_LB_SHIFT   22

Definition at line 632 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR2_LB_MASK   (0x3 << 18)

Definition at line 593 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR2_LB_SHIFT   18

Definition at line 592 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR2_SC_MASK   (0x3 << 18)

Definition at line 559 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR2_SC_SHIFT   18

Definition at line 558 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR3_LB_MASK   (0x3 << 16)

Definition at line 595 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR3_LB_SHIFT   16

Definition at line 594 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR3_SC_MASK   (0x3 << 16)

Definition at line 561 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR3_SC_SHIFT   16

Definition at line 560 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR4_LB_MASK   (1 << 21)

Definition at line 635 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR4_LB_SHIFT   21

Definition at line 634 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR5_LB_MASK   (1 << 20)

Definition at line 637 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR5_LB_SHIFT   20

Definition at line 636 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR6_LB_MASK   (0x3 << 14)

Definition at line 597 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR6_LB_SHIFT   14

Definition at line 596 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR6_SC_MASK   (0x3 << 14)

Definition at line 563 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR6_SC_SHIFT   14

Definition at line 562 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR7_LB_MASK   (1 << 19)

Definition at line 639 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_DR7_LB_SHIFT   19

Definition at line 638 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NADV_ALE_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)

Definition at line 235 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NADV_ALE_DUPLICATEWAKEUPEVENT_SHIFT   0

Definition at line 234 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NBE0_CLE_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)

Definition at line 229 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NBE0_CLE_DUPLICATEWAKEUPEVENT_SHIFT   3

Definition at line 228 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NBE1_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)

Definition at line 227 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NBE1_DUPLICATEWAKEUPEVENT_SHIFT   4

Definition at line 226 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NCS0_DUPLICATEWAKEUPEVENT_MASK   (1 << 26)

Definition at line 117 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NCS0_DUPLICATEWAKEUPEVENT_SHIFT   26

Definition at line 116 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NCS1_DUPLICATEWAKEUPEVENT_MASK   (1 << 27)

Definition at line 115 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NCS1_DUPLICATEWAKEUPEVENT_SHIFT   27

Definition at line 114 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NCS2_DUPLICATEWAKEUPEVENT_MASK   (1 << 28)

Definition at line 113 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NCS2_DUPLICATEWAKEUPEVENT_SHIFT   28

Definition at line 112 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NCS3_DUPLICATEWAKEUPEVENT_MASK   (1 << 29)

Definition at line 111 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NCS3_DUPLICATEWAKEUPEVENT_SHIFT   29

Definition at line 110 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NOE_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)

Definition at line 233 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NOE_DUPLICATEWAKEUPEVENT_SHIFT   1

Definition at line 232 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NWE_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)

Definition at line 231 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NWE_DUPLICATEWAKEUPEVENT_SHIFT   2

Definition at line 230 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NWP_DUPLICATEWAKEUPEVENT_MASK   (1 << 30)

Definition at line 109 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_NWP_DUPLICATEWAKEUPEVENT_SHIFT   30

Definition at line 108 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_WAIT0_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)

Definition at line 225 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_WAIT0_DUPLICATEWAKEUPEVENT_SHIFT   5

Definition at line 224 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_WAIT1_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)

Definition at line 223 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_GPMC_WAIT1_DUPLICATEWAKEUPEVENT_SHIFT   6

Definition at line 222 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_CEC_DUPLICATEWAKEUPEVENT_MASK   (1 << 13)

Definition at line 209 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_CEC_DUPLICATEWAKEUPEVENT_SHIFT   13

Definition at line 208 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SCL_DUPLICATEWAKEUPEVENT_MASK   (1 << 14)

Definition at line 207 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SCL_DUPLICATEWAKEUPEVENT_SHIFT   14

Definition at line 206 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SCL_GLFENB_MASK   (1 << 27)

Definition at line 1017 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SCL_GLFENB_SHIFT   27

Definition at line 1016 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SCL_HSMODE_MASK   (1 << 21)

Definition at line 1027 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SCL_HSMODE_SHIFT   21

Definition at line 1026 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SCL_LOAD_BITS_MASK   (0x3 << 25)

Definition at line 1019 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SCL_LOAD_BITS_SHIFT   25

Definition at line 1018 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SCL_NMODE_MASK   (1 << 20)

Definition at line 1029 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SCL_NMODE_SHIFT   20

Definition at line 1028 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_MASK   (1 << 24)

Definition at line 1021 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SCL_PULLUPRESX_SHIFT   24

Definition at line 1020 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SDA_DUPLICATEWAKEUPEVENT_MASK   (1 << 15)

Definition at line 205 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SDA_DUPLICATEWAKEUPEVENT_SHIFT   15

Definition at line 204 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SDA_GLFENB_MASK   (1 << 31)

Definition at line 1011 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SDA_GLFENB_SHIFT   31

Definition at line 1010 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SDA_HSMODE_MASK   (1 << 23)

Definition at line 1023 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SDA_HSMODE_SHIFT   23

Definition at line 1022 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SDA_LOAD_BITS_MASK   (0x3 << 29)

Definition at line 1013 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SDA_LOAD_BITS_SHIFT   29

Definition at line 1012 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SDA_NMODE_MASK   (1 << 22)

Definition at line 1025 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SDA_NMODE_SHIFT   22

Definition at line 1024 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_MASK   (1 << 28)

Definition at line 1015 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DDC_SDA_PULLUPRESX_SHIFT   28

Definition at line 1014 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DR0_LB_MASK   (0x3 << 12)

Definition at line 599 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DR0_LB_SHIFT   12

Definition at line 598 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DR0_SC_MASK   (0x3 << 12)

Definition at line 565 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_DR0_SC_SHIFT   12

Definition at line 564 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_HPD_DUPLICATEWAKEUPEVENT_MASK   (1 << 12)

Definition at line 211 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMI_HPD_DUPLICATEWAKEUPEVENT_SHIFT   12

Definition at line 210 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMITXPHY_ENBYPASSCLK_MASK   (1 << 29)

Definition at line 931 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMITXPHY_ENBYPASSCLK_SHIFT   29

Definition at line 930 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMITXPHY_PADORDER_MASK   (1 << 31)

Definition at line 927 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMITXPHY_PADORDER_SHIFT   31

Definition at line 926 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMITXPHY_PD_PULLUPDET_MASK   (1 << 28)

Definition at line 933 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMITXPHY_PD_PULLUPDET_SHIFT   28

Definition at line 932 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMITXPHY_TXVALID_MASK   (1 << 30)

Definition at line 929 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDMITXPHY_TXVALID_SHIFT   30

Definition at line 928 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDQ_SIO_DUPLICATEWAKEUPEVENT_MASK   (1 << 16)

Definition at line 335 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDQ_SIO_DUPLICATEWAKEUPEVENT_SHIFT   16

Definition at line 334 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDQ_SIO_PWRDNZ_MASK   (1 << 31)

Definition at line 1073 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HDQ_SIO_PWRDNZ_SHIFT   31

Definition at line 1072 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI1_CALLOOP_SEL_MASK   (1 << 31)

Definition at line 1057 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI1_CALLOOP_SEL_SHIFT   31

Definition at line 1056 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI1_CALMUX_SEL_MASK   (1 << 30)

Definition at line 1059 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI1_CALMUX_SEL_SHIFT   30

Definition at line 1058 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI2_CALLOOP_SEL_MASK   (1 << 29)

Definition at line 1061 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI2_CALLOOP_SEL_SHIFT   29

Definition at line 1060 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI2_CALMUX_SEL_MASK   (1 << 28)

Definition at line 1063 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI2_CALMUX_SEL_SHIFT   28

Definition at line 1062 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI2_DR0_LB_MASK   (1 << 18)

Definition at line 641 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI2_DR0_LB_SHIFT   18

Definition at line 640 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI2_DR1_LB_MASK   (1 << 17)

Definition at line 643 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI2_DR1_LB_SHIFT   17

Definition at line 642 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI2_DR2_LB_MASK   (1 << 16)

Definition at line 645 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI2_DR2_LB_SHIFT   16

Definition at line 644 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR0_LB_MASK   (1 << 10)

Definition at line 765 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR0_LB_SHIFT   10

Definition at line 764 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR0_MB_MASK   (0x3 << 20)

Definition at line 725 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR0_MB_SHIFT   20

Definition at line 724 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR1_LB_MASK   (1 << 26)

Definition at line 739 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR1_LB_SHIFT   26

Definition at line 738 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR1_MB_MASK   (0x3 << 20)

Definition at line 697 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR1_MB_SHIFT   20

Definition at line 696 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR2_LB_MASK   (1 << 25)

Definition at line 741 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR2_LB_SHIFT   25

Definition at line 740 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR2_MB_MASK   (0x3 << 18)

Definition at line 699 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR2_MB_SHIFT   18

Definition at line 698 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR3_LB_MASK   (1 << 24)

Definition at line 743 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR3_LB_SHIFT   24

Definition at line 742 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR3_MB_MASK   (0x3 << 16)

Definition at line 701 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_HSI_DR3_MB_SHIFT   16

Definition at line 700 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SCL_DUPLICATEWAKEUPEVENT_MASK   (1 << 17)

Definition at line 333 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SCL_DUPLICATEWAKEUPEVENT_SHIFT   17

Definition at line 332 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SCL_GLFENB_MASK   (1 << 3)

Definition at line 889 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SCL_GLFENB_SHIFT   3

Definition at line 888 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SCL_LOAD_BITS_MASK   (0x3 << 1)

Definition at line 891 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SCL_LOAD_BITS_SHIFT   1

Definition at line 890 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SCL_PULLUPRESX_MASK   (1 << 0)

Definition at line 893 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SCL_PULLUPRESX_SHIFT   0

Definition at line 892 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SDA_DUPLICATEWAKEUPEVENT_MASK   (1 << 18)

Definition at line 331 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SDA_DUPLICATEWAKEUPEVENT_SHIFT   18

Definition at line 330 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SDA_GLFENB_MASK   (1 << 19)

Definition at line 865 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SDA_GLFENB_SHIFT   19

Definition at line 864 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SDA_LOAD_BITS_MASK   (0x3 << 17)

Definition at line 867 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SDA_LOAD_BITS_SHIFT   17

Definition at line 866 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SDA_PULLUPRESX_MASK   (1 << 16)

Definition at line 869 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C1_SDA_PULLUPRESX_SHIFT   16

Definition at line 868 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SCL_DUPLICATEWAKEUPEVENT_MASK   (1 << 19)

Definition at line 329 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SCL_DUPLICATEWAKEUPEVENT_SHIFT   19

Definition at line 328 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SCL_GLFENB_MASK   (1 << 7)

Definition at line 883 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SCL_GLFENB_SHIFT   7

Definition at line 882 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SCL_LOAD_BITS_MASK   (0x3 << 5)

Definition at line 885 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SCL_LOAD_BITS_SHIFT   5

Definition at line 884 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SCL_PULLUPRESX_MASK   (1 << 4)

Definition at line 887 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SCL_PULLUPRESX_SHIFT   4

Definition at line 886 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SDA_DUPLICATEWAKEUPEVENT_MASK   (1 << 20)

Definition at line 327 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SDA_DUPLICATEWAKEUPEVENT_SHIFT   20

Definition at line 326 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SDA_GLFENB_MASK   (1 << 23)

Definition at line 859 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SDA_GLFENB_SHIFT   23

Definition at line 858 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SDA_LOAD_BITS_MASK   (0x3 << 21)

Definition at line 861 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SDA_LOAD_BITS_SHIFT   21

Definition at line 860 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SDA_PULLUPRESX_MASK   (1 << 20)

Definition at line 863 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C2_SDA_PULLUPRESX_SHIFT   20

Definition at line 862 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SCL_DUPLICATEWAKEUPEVENT_MASK   (1 << 21)

Definition at line 325 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SCL_DUPLICATEWAKEUPEVENT_SHIFT   21

Definition at line 324 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SCL_GLFENB_MASK   (1 << 11)

Definition at line 877 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SCL_GLFENB_SHIFT   11

Definition at line 876 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SCL_LOAD_BITS_MASK   (0x3 << 9)

Definition at line 879 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SCL_LOAD_BITS_SHIFT   9

Definition at line 878 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SCL_PULLUPRESX_MASK   (1 << 8)

Definition at line 881 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SCL_PULLUPRESX_SHIFT   8

Definition at line 880 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SDA_DUPLICATEWAKEUPEVENT_MASK   (1 << 22)

Definition at line 323 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SDA_DUPLICATEWAKEUPEVENT_SHIFT   22

Definition at line 322 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SDA_GLFENB_MASK   (1 << 27)

Definition at line 853 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SDA_GLFENB_SHIFT   27

Definition at line 852 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SDA_LOAD_BITS_MASK   (0x3 << 25)

Definition at line 855 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SDA_LOAD_BITS_SHIFT   25

Definition at line 854 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SDA_PULLUPRESX_MASK   (1 << 24)

Definition at line 857 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C3_SDA_PULLUPRESX_SHIFT   24

Definition at line 856 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SCL_DUPLICATEWAKEUPEVENT_MASK   (1 << 23)

Definition at line 321 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SCL_DUPLICATEWAKEUPEVENT_SHIFT   23

Definition at line 320 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SCL_GLFENB_MASK   (1 << 15)

Definition at line 871 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SCL_GLFENB_SHIFT   15

Definition at line 870 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SCL_LOAD_BITS_MASK   (0x3 << 13)

Definition at line 873 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SCL_LOAD_BITS_SHIFT   13

Definition at line 872 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SCL_PULLUPRESX_MASK   (1 << 12)

Definition at line 875 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SCL_PULLUPRESX_SHIFT   12

Definition at line 874 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SDA_DUPLICATEWAKEUPEVENT_MASK   (1 << 24)

Definition at line 319 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SDA_DUPLICATEWAKEUPEVENT_SHIFT   24

Definition at line 318 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SDA_GLFENB_MASK   (1 << 31)

Definition at line 847 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SDA_GLFENB_SHIFT   31

Definition at line 846 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SDA_LOAD_BITS_MASK   (0x3 << 29)

Definition at line 849 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SDA_LOAD_BITS_SHIFT   29

Definition at line 848 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SDA_PULLUPRESX_MASK   (1 << 28)

Definition at line 851 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_I2C4_SDA_PULLUPRESX_SHIFT   28

Definition at line 850 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_HWINFO_MASK   (0xffffffff << 0)

Definition at line 99 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_HWINFO_SHIFT   0

Definition at line 98 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_REV_CUSTOM_MASK   (0x3 << 6)

Definition at line 93 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_REV_CUSTOM_SHIFT   6

Definition at line 92 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_REV_FUNC_MASK   (0xfff << 16)

Definition at line 87 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_REV_FUNC_SHIFT   16

Definition at line 86 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_REV_MAJOR_MASK   (0x7 << 8)

Definition at line 91 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_REV_MAJOR_SHIFT   8

Definition at line 90 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_REV_MINOR_MASK   (0x3f << 0)

Definition at line 95 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_REV_MINOR_SHIFT   0

Definition at line 94 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_REV_RTL_MASK   (0x1f << 11)

Definition at line 89 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_REV_RTL_SHIFT   11

Definition at line 88 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_REV_SCHEME_MASK   (0x3 << 30)

Definition at line 85 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_REV_SCHEME_SHIFT   30

Definition at line 84 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_SYSCONFIG_IDLEMODE_MASK   (0x3 << 2)

Definition at line 103 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_IP_SYSCONFIG_IDLEMODE_SHIFT   2

Definition at line 102 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_KPD_DR0_LB_MASK   (1 << 15)

Definition at line 647 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_KPD_DR0_LB_SHIFT   15

Definition at line 646 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_KPD_DR1_LB_MASK   (1 << 14)

Definition at line 649 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_KPD_DR1_LB_SHIFT   14

Definition at line 648 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_CCAP0_MASK   (1 << 31)

Definition at line 1149 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_CCAP0_SHIFT   31

Definition at line 1148 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_CCAP1_MASK   (1 << 30)

Definition at line 1151 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_CCAP1_SHIFT   30

Definition at line 1150 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_INT_CCAP0_MASK   (1 << 29)

Definition at line 1153 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_INT_CCAP0_SHIFT   29

Definition at line 1152 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_INT_CCAP1_MASK   (1 << 28)

Definition at line 1155 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_INT_CCAP1_SHIFT   28

Definition at line 1154 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_INT_TAP0_MASK   (1 << 27)

Definition at line 1157 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_INT_TAP0_SHIFT   27

Definition at line 1156 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_INT_TAP1_MASK   (1 << 26)

Definition at line 1159 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_INT_TAP1_SHIFT   26

Definition at line 1158 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_TAP0_MASK   (1 << 25)

Definition at line 1161 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_TAP0_SHIFT   25

Definition at line 1160 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_TAP1_MASK   (1 << 24)

Definition at line 1163 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_CA_TAP1_SHIFT   24

Definition at line 1162 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP0_MASK   (1 << 23)

Definition at line 1165 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP0_SHIFT   23

Definition at line 1164 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP1_MASK   (1 << 22)

Definition at line 1167 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ0_INT_CCAP1_SHIFT   22

Definition at line 1166 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP0_MASK   (1 << 21)

Definition at line 1169 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP0_SHIFT   21

Definition at line 1168 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP1_MASK   (1 << 20)

Definition at line 1171 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ0_INT_TAP1_SHIFT   20

Definition at line 1170 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP0_MASK   (1 << 19)

Definition at line 1173 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP0_SHIFT   19

Definition at line 1172 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP1_MASK   (1 << 18)

Definition at line 1175 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ1_INT_CCAP1_SHIFT   18

Definition at line 1174 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP0_MASK   (1 << 17)

Definition at line 1177 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP0_SHIFT   17

Definition at line 1176 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP1_MASK   (1 << 16)

Definition at line 1179 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ1_INT_TAP1_SHIFT   16

Definition at line 1178 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ_CCAP0_MASK   (1 << 15)

Definition at line 1181 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ_CCAP0_SHIFT   15

Definition at line 1180 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ_CCAP1_MASK   (1 << 14)

Definition at line 1183 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ_CCAP1_SHIFT   14

Definition at line 1182 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ_TAP0_MASK   (1 << 13)

Definition at line 1185 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ_TAP0_SHIFT   13

Definition at line 1184 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ_TAP1_MASK   (1 << 12)

Definition at line 1187 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR21_VREF_DQ_TAP1_SHIFT   12

Definition at line 1186 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_CCAP0_MASK   (1 << 31)

Definition at line 1263 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_CCAP0_SHIFT   31

Definition at line 1262 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_CCAP1_MASK   (1 << 30)

Definition at line 1265 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_CCAP1_SHIFT   30

Definition at line 1264 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_INT_CCAP0_MASK   (1 << 29)

Definition at line 1267 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_INT_CCAP0_SHIFT   29

Definition at line 1266 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_INT_CCAP1_MASK   (1 << 28)

Definition at line 1269 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_INT_CCAP1_SHIFT   28

Definition at line 1268 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_INT_TAP0_MASK   (1 << 27)

Definition at line 1271 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_INT_TAP0_SHIFT   27

Definition at line 1270 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_INT_TAP1_MASK   (1 << 26)

Definition at line 1273 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_INT_TAP1_SHIFT   26

Definition at line 1272 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_TAP0_MASK   (1 << 25)

Definition at line 1275 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_TAP0_SHIFT   25

Definition at line 1274 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_TAP1_MASK   (1 << 24)

Definition at line 1277 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_CA_TAP1_SHIFT   24

Definition at line 1276 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP0_MASK   (1 << 23)

Definition at line 1279 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP0_SHIFT   23

Definition at line 1278 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP1_MASK   (1 << 22)

Definition at line 1281 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ0_INT_CCAP1_SHIFT   22

Definition at line 1280 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP0_MASK   (1 << 21)

Definition at line 1283 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP0_SHIFT   21

Definition at line 1282 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP1_MASK   (1 << 20)

Definition at line 1285 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ0_INT_TAP1_SHIFT   20

Definition at line 1284 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP0_MASK   (1 << 19)

Definition at line 1287 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP0_SHIFT   19

Definition at line 1286 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP1_MASK   (1 << 18)

Definition at line 1289 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ1_INT_CCAP1_SHIFT   18

Definition at line 1288 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP0_MASK   (1 << 17)

Definition at line 1291 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP0_SHIFT   17

Definition at line 1290 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP1_MASK   (1 << 16)

Definition at line 1293 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ1_INT_TAP1_SHIFT   16

Definition at line 1292 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ_CCAP0_MASK   (1 << 15)

Definition at line 1295 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ_CCAP0_SHIFT   15

Definition at line 1294 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ_CCAP1_MASK   (1 << 14)

Definition at line 1297 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ_CCAP1_SHIFT   14

Definition at line 1296 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ_TAP0_MASK   (1 << 13)

Definition at line 1299 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ_TAP0_SHIFT   13

Definition at line 1298 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ_TAP1_MASK   (1 << 12)

Definition at line 1301 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR22_VREF_DQ_TAP1_SHIFT   12

Definition at line 1300 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_N1_MASK   (1 << 23)

Definition at line 1369 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_N1_SHIFT   23

Definition at line 1368 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_N2_MASK   (1 << 22)

Definition at line 1371 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_N2_SHIFT   22

Definition at line 1370 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_N3_MASK   (1 << 21)

Definition at line 1373 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_N3_SHIFT   21

Definition at line 1372 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_N4_MASK   (1 << 20)

Definition at line 1375 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_N4_SHIFT   20

Definition at line 1374 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_N5_MASK   (1 << 19)

Definition at line 1377 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_N5_SHIFT   19

Definition at line 1376 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_P1_MASK   (1 << 18)

Definition at line 1379 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_P1_SHIFT   18

Definition at line 1378 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_P2_MASK   (1 << 17)

Definition at line 1381 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_P2_SHIFT   17

Definition at line 1380 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_P3_MASK   (1 << 16)

Definition at line 1383 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_P3_SHIFT   16

Definition at line 1382 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_P4_MASK   (1 << 15)

Definition at line 1385 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_P4_SHIFT   15

Definition at line 1384 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_P5_MASK   (1 << 14)

Definition at line 1387 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2_PTV_P5_SHIFT   14

Definition at line 1386 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR10_I_MASK   (0x7 << 19)

Definition at line 1137 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR10_I_SHIFT   19

Definition at line 1136 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR10_SR_MASK   (0x3 << 22)

Definition at line 1135 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR10_SR_SHIFT   22

Definition at line 1134 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR10_WD_MASK   (0x3 << 17)

Definition at line 1139 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR10_WD_SHIFT   17

Definition at line 1138 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR11_I_MASK   (0x7 << 27)

Definition at line 1131 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR11_I_SHIFT   27

Definition at line 1130 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR11_SR_MASK   (0x3 << 30)

Definition at line 1129 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR11_SR_SHIFT   30

Definition at line 1128 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR11_WD_MASK   (0x3 << 25)

Definition at line 1133 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR11_WD_SHIFT   25

Definition at line 1132 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR1_I_MASK   (0x7 << 3)

Definition at line 1097 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR1_I_SHIFT   3

Definition at line 1096 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR1_SR_MASK   (0x3 << 6)

Definition at line 1095 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR1_SR_SHIFT   6

Definition at line 1094 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR1_WD_MASK   (0x3 << 1)

Definition at line 1099 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR1_WD_SHIFT   1

Definition at line 1098 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR2_I_MASK   (0x7 << 11)

Definition at line 1091 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR2_I_SHIFT   11

Definition at line 1090 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR2_SR_MASK   (0x3 << 14)

Definition at line 1089 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR2_SR_SHIFT   14

Definition at line 1088 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR2_WD_MASK   (0x3 << 9)

Definition at line 1093 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR2_WD_SHIFT   9

Definition at line 1092 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR3_I_MASK   (0x7 << 19)

Definition at line 1085 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR3_I_SHIFT   19

Definition at line 1084 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR3_SR_MASK   (0x3 << 22)

Definition at line 1083 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR3_SR_SHIFT   22

Definition at line 1082 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR3_WD_MASK   (0x3 << 17)

Definition at line 1087 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR3_WD_SHIFT   17

Definition at line 1086 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR4_I_MASK   (0x7 << 27)

Definition at line 1079 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR4_I_SHIFT   27

Definition at line 1078 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR4_SR_MASK   (0x3 << 30)

Definition at line 1077 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR4_SR_SHIFT   30

Definition at line 1076 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR4_WD_MASK   (0x3 << 25)

Definition at line 1081 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR4_WD_SHIFT   25

Definition at line 1080 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR5_I_MASK   (0x7 << 3)

Definition at line 1123 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR5_I_SHIFT   3

Definition at line 1122 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR5_SR_MASK   (0x3 << 6)

Definition at line 1121 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR5_SR_SHIFT   6

Definition at line 1120 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR5_WD_MASK   (0x3 << 1)

Definition at line 1125 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR5_WD_SHIFT   1

Definition at line 1124 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR6_I_MASK   (0x7 << 11)

Definition at line 1117 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR6_I_SHIFT   11

Definition at line 1116 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR6_SR_MASK   (0x3 << 14)

Definition at line 1115 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR6_SR_SHIFT   14

Definition at line 1114 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR6_WD_MASK   (0x3 << 9)

Definition at line 1119 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR6_WD_SHIFT   9

Definition at line 1118 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR7_I_MASK   (0x7 << 19)

Definition at line 1111 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR7_I_SHIFT   19

Definition at line 1110 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR7_SR_MASK   (0x3 << 22)

Definition at line 1109 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR7_SR_SHIFT   22

Definition at line 1108 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR7_WD_MASK   (0x3 << 17)

Definition at line 1113 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR7_WD_SHIFT   17

Definition at line 1112 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR8_I_MASK   (0x7 << 27)

Definition at line 1105 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR8_I_SHIFT   27

Definition at line 1104 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR8_SR_MASK   (0x3 << 30)

Definition at line 1103 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR8_SR_SHIFT   30

Definition at line 1102 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR8_WD_MASK   (0x3 << 25)

Definition at line 1107 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR8_WD_SHIFT   25

Definition at line 1106 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR9_I_MASK   (0x7 << 11)

Definition at line 1143 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR9_I_SHIFT   11

Definition at line 1142 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR9_SR_MASK   (0x3 << 14)

Definition at line 1141 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR9_SR_SHIFT   14

Definition at line 1140 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR9_WD_MASK   (0x3 << 9)

Definition at line 1145 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO1_GR9_WD_SHIFT   9

Definition at line 1144 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR10_I_MASK   (0x7 << 19)

Definition at line 1251 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR10_I_SHIFT   19

Definition at line 1250 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR10_SR_MASK   (0x3 << 22)

Definition at line 1249 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR10_SR_SHIFT   22

Definition at line 1248 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR10_WD_MASK   (0x3 << 17)

Definition at line 1253 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR10_WD_SHIFT   17

Definition at line 1252 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR11_I_MASK   (0x7 << 27)

Definition at line 1245 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR11_I_SHIFT   27

Definition at line 1244 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR11_SR_MASK   (0x3 << 30)

Definition at line 1243 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR11_SR_SHIFT   30

Definition at line 1242 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR11_WD_MASK   (0x3 << 25)

Definition at line 1247 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR11_WD_SHIFT   25

Definition at line 1246 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR1_I_MASK   (0x7 << 3)

Definition at line 1211 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR1_I_SHIFT   3

Definition at line 1210 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR1_SR_MASK   (0x3 << 6)

Definition at line 1209 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR1_SR_SHIFT   6

Definition at line 1208 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR1_WD_MASK   (0x3 << 1)

Definition at line 1213 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR1_WD_SHIFT   1

Definition at line 1212 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR2_I_MASK   (0x7 << 11)

Definition at line 1205 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR2_I_SHIFT   11

Definition at line 1204 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR2_SR_MASK   (0x3 << 14)

Definition at line 1203 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR2_SR_SHIFT   14

Definition at line 1202 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR2_WD_MASK   (0x3 << 9)

Definition at line 1207 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR2_WD_SHIFT   9

Definition at line 1206 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR3_I_MASK   (0x7 << 19)

Definition at line 1199 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR3_I_SHIFT   19

Definition at line 1198 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR3_SR_MASK   (0x3 << 22)

Definition at line 1197 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR3_SR_SHIFT   22

Definition at line 1196 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR3_WD_MASK   (0x3 << 17)

Definition at line 1201 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR3_WD_SHIFT   17

Definition at line 1200 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR4_I_MASK   (0x7 << 27)

Definition at line 1193 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR4_I_SHIFT   27

Definition at line 1192 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR4_SR_MASK   (0x3 << 30)

Definition at line 1191 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR4_SR_SHIFT   30

Definition at line 1190 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR4_WD_MASK   (0x3 << 25)

Definition at line 1195 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR4_WD_SHIFT   25

Definition at line 1194 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR5_I_MASK   (0x7 << 3)

Definition at line 1237 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR5_I_SHIFT   3

Definition at line 1236 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR5_SR_MASK   (0x3 << 6)

Definition at line 1235 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR5_SR_SHIFT   6

Definition at line 1234 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR5_WD_MASK   (0x3 << 1)

Definition at line 1239 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR5_WD_SHIFT   1

Definition at line 1238 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR6_I_MASK   (0x7 << 11)

Definition at line 1231 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR6_I_SHIFT   11

Definition at line 1230 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR6_SR_MASK   (0x3 << 14)

Definition at line 1229 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR6_SR_SHIFT   14

Definition at line 1228 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR6_WD_MASK   (0x3 << 9)

Definition at line 1233 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR6_WD_SHIFT   9

Definition at line 1232 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR7_I_MASK   (0x7 << 19)

Definition at line 1225 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR7_I_SHIFT   19

Definition at line 1224 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR7_SR_MASK   (0x3 << 22)

Definition at line 1223 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR7_SR_SHIFT   22

Definition at line 1222 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR7_WD_MASK   (0x3 << 17)

Definition at line 1227 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR7_WD_SHIFT   17

Definition at line 1226 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR8_I_MASK   (0x7 << 27)

Definition at line 1219 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR8_I_SHIFT   27

Definition at line 1218 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR8_SR_MASK   (0x3 << 30)

Definition at line 1217 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR8_SR_SHIFT   30

Definition at line 1216 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR8_WD_MASK   (0x3 << 25)

Definition at line 1221 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR8_WD_SHIFT   25

Definition at line 1220 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR9_I_MASK   (0x7 << 11)

Definition at line 1257 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR9_I_SHIFT   11

Definition at line 1256 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR9_SR_MASK   (0x3 << 14)

Definition at line 1255 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR9_SR_SHIFT   14

Definition at line 1254 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR9_WD_MASK   (0x3 << 9)

Definition at line 1259 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_LPDDR2IO2_GR9_WD_SHIFT   9

Definition at line 1258 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCBSP2_DR0_LB_MASK   (1 << 23)

Definition at line 745 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCBSP2_DR0_LB_SHIFT   23

Definition at line 744 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCBSP2_DR0_MB_MASK   (0x3 << 14)

Definition at line 703 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCBSP2_DR0_MB_SHIFT   14

Definition at line 702 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 25)

Definition at line 317 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_CLK_DUPLICATEWAKEUPEVENT_SHIFT   25

Definition at line 316 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_CS0_DUPLICATEWAKEUPEVENT_MASK   (1 << 28)

Definition at line 311 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_CS0_DUPLICATEWAKEUPEVENT_SHIFT   28

Definition at line 310 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_CS1_DUPLICATEWAKEUPEVENT_MASK   (1 << 29)

Definition at line 309 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_CS1_DUPLICATEWAKEUPEVENT_SHIFT   29

Definition at line 308 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_CS2_DUPLICATEWAKEUPEVENT_MASK   (1 << 30)

Definition at line 307 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_CS2_DUPLICATEWAKEUPEVENT_SHIFT   30

Definition at line 306 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_CS3_DUPLICATEWAKEUPEVENT_MASK   (1 << 31)

Definition at line 305 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_CS3_DUPLICATEWAKEUPEVENT_SHIFT   31

Definition at line 304 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_CS3_EN_MASK   (1 << 30)

Definition at line 1307 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_CS3_EN_SHIFT   30

Definition at line 1306 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_DR0_LB_MASK   (0x3 << 10)

Definition at line 601 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_DR0_LB_SHIFT   10

Definition at line 600 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_DR0_SC_MASK   (0x3 << 10)

Definition at line 567 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_DR0_SC_SHIFT   10

Definition at line 566 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_SIMO_DUPLICATEWAKEUPEVENT_MASK   (1 << 27)

Definition at line 313 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_SIMO_DUPLICATEWAKEUPEVENT_SHIFT   27

Definition at line 312 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_SOMI_DUPLICATEWAKEUPEVENT_MASK   (1 << 26)

Definition at line 315 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI1_SOMI_DUPLICATEWAKEUPEVENT_SHIFT   26

Definition at line 314 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 10)

Definition at line 413 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_CLK_DUPLICATEWAKEUPEVENT_SHIFT   10

Definition at line 412 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_CS0_DUPLICATEWAKEUPEVENT_MASK   (1 << 13)

Definition at line 407 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_CS0_DUPLICATEWAKEUPEVENT_SHIFT   13

Definition at line 406 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_DR0_LB_MASK   (1 << 22)

Definition at line 747 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_DR0_LB_SHIFT   22

Definition at line 746 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_DR0_MB_MASK   (0x3 << 12)

Definition at line 705 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_DR0_MB_SHIFT   12

Definition at line 704 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_DR1_LB_MASK   (1 << 21)

Definition at line 749 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_DR1_LB_SHIFT   21

Definition at line 748 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_DR1_MB_MASK   (0x3 << 10)

Definition at line 707 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_DR1_MB_SHIFT   10

Definition at line 706 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_SIMO_DUPLICATEWAKEUPEVENT_MASK   (1 << 11)

Definition at line 411 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_SIMO_DUPLICATEWAKEUPEVENT_SHIFT   11

Definition at line 410 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_SOMI_DUPLICATEWAKEUPEVENT_MASK   (1 << 12)

Definition at line 409 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MCSPI4_SOMI_DUPLICATEWAKEUPEVENT_SHIFT   12

Definition at line 408 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MIRROR_MODE_EN_MASK   (1 << 31)

Definition at line 1311 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MIRROR_MODE_EN_SHIFT   31

Definition at line 1310 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC1_PBIASLITE_HIZ_MODE_MASK   (1 << 25)

Definition at line 833 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC1_PBIASLITE_HIZ_MODE_SHIFT   25

Definition at line 832 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK   (1 << 22)

Definition at line 839 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC1_PBIASLITE_PWRDNZ_SHIFT   22

Definition at line 838 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT_MASK   (1 << 24)

Definition at line 835 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC1_PBIASLITE_SUPPLY_HI_OUT_SHIFT   24

Definition at line 834 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK   (1 << 23)

Definition at line 837 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC1_PBIASLITE_VMODE_ERROR_SHIFT   23

Definition at line 836 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC1_PBIASLITE_VMODE_MASK   (1 << 21)

Definition at line 841 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC1_PBIASLITE_VMODE_SHIFT   21

Definition at line 840 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC1_PWRDNZ_MASK   (1 << 26)

Definition at line 831 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC1_PWRDNZ_SHIFT   26

Definition at line 830 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC2_FEEDBACK_CLK_SEL_MASK   (1 << 31)

Definition at line 937 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_MMC2_FEEDBACK_CLK_SEL_SHIFT   31

Definition at line 936 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_PDM_DR0_LB_MASK   (1 << 13)

Definition at line 651 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_PDM_DR0_LB_SHIFT   13

Definition at line 650 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 17)

Definition at line 267 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_CLK_DUPLICATEWAKEUPEVENT_SHIFT   17

Definition at line 266 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_CMD_DUPLICATEWAKEUPEVENT_MASK   (1 << 18)

Definition at line 265 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_CMD_DUPLICATEWAKEUPEVENT_SHIFT   18

Definition at line 264 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT0_DUPLICATEWAKEUPEVENT_MASK   (1 << 19)

Definition at line 263 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT0_DUPLICATEWAKEUPEVENT_SHIFT   19

Definition at line 262 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT1_DUPLICATEWAKEUPEVENT_MASK   (1 << 20)

Definition at line 261 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT1_DUPLICATEWAKEUPEVENT_SHIFT   20

Definition at line 260 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT2_DUPLICATEWAKEUPEVENT_MASK   (1 << 21)

Definition at line 259 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT2_DUPLICATEWAKEUPEVENT_SHIFT   21

Definition at line 258 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT3_DUPLICATEWAKEUPEVENT_MASK   (1 << 22)

Definition at line 257 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT3_DUPLICATEWAKEUPEVENT_SHIFT   22

Definition at line 256 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT4_DUPLICATEWAKEUPEVENT_MASK   (1 << 23)

Definition at line 255 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT4_DUPLICATEWAKEUPEVENT_SHIFT   23

Definition at line 254 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT5_DUPLICATEWAKEUPEVENT_MASK   (1 << 24)

Definition at line 253 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT5_DUPLICATEWAKEUPEVENT_SHIFT   24

Definition at line 252 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT6_DUPLICATEWAKEUPEVENT_MASK   (1 << 25)

Definition at line 251 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT6_DUPLICATEWAKEUPEVENT_SHIFT   25

Definition at line 250 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT7_DUPLICATEWAKEUPEVENT_MASK   (1 << 26)

Definition at line 249 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DAT7_DUPLICATEWAKEUPEVENT_SHIFT   26

Definition at line 248 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK   (1 << 27)

Definition at line 1041 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DR0_SPEEDCTRL_SHIFT   27

Definition at line 1040 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK   (1 << 26)

Definition at line 1043 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DR1_SPEEDCTRL_SHIFT   26

Definition at line 1042 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK   (1 << 25)

Definition at line 1045 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_DR2_SPEEDCTRL_SHIFT   25

Definition at line 1044 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_MASK   (1 << 31)

Definition at line 1033 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_PUSTRENGTH_GRP0_SHIFT   31

Definition at line 1032 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK   (1 << 30)

Definition at line 1035 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_PUSTRENGTH_GRP1_SHIFT   30

Definition at line 1034 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK   (1 << 29)

Definition at line 1037 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_PUSTRENGTH_GRP2_SHIFT   29

Definition at line 1036 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK   (1 << 28)

Definition at line 1039 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC1_PUSTRENGTH_GRP3_SHIFT   28

Definition at line 1038 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC2_DR0_LB_MASK   (1 << 12)

Definition at line 653 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC2_DR0_LB_SHIFT   12

Definition at line 652 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC3_DR0_LB_MASK   (1 << 11)

Definition at line 655 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC3_DR0_LB_SHIFT   11

Definition at line 654 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC3_DR0_MB_MASK   (0x3 << 8)

Definition at line 709 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC3_DR0_MB_SHIFT   8

Definition at line 708 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC4_DR0_LB_MASK   (1 << 10)

Definition at line 657 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC4_DR0_LB_SHIFT   10

Definition at line 656 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC4_DR1_LB_MASK   (1 << 9)

Definition at line 659 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC4_DR1_LB_SHIFT   9

Definition at line 658 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC5_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)

Definition at line 425 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC5_CLK_DUPLICATEWAKEUPEVENT_SHIFT   4

Definition at line 424 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC5_CMD_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)

Definition at line 423 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC5_CMD_DUPLICATEWAKEUPEVENT_SHIFT   5

Definition at line 422 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC5_DAT0_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)

Definition at line 421 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC5_DAT0_DUPLICATEWAKEUPEVENT_SHIFT   6

Definition at line 420 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC5_DAT1_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)

Definition at line 419 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC5_DAT1_DUPLICATEWAKEUPEVENT_SHIFT   7

Definition at line 418 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC5_DAT2_DUPLICATEWAKEUPEVENT_MASK   (1 << 8)

Definition at line 417 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC5_DAT2_DUPLICATEWAKEUPEVENT_SHIFT   8

Definition at line 416 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC5_DAT3_DUPLICATEWAKEUPEVENT_MASK   (1 << 9)

Definition at line 415 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SDMMC5_DAT3_DUPLICATEWAKEUPEVENT_SHIFT   9

Definition at line 414 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS1_DR0_LB_MASK   (1 << 19)

Definition at line 815 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS1_DR0_LB_SHIFT   19

Definition at line 814 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS1_DR0_MB_MASK   (0x3 << 30)

Definition at line 803 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS1_DR0_MB_SHIFT   30

Definition at line 802 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS1_DR1_MB_MASK   (0x3 << 28)

Definition at line 805 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS1_DR1_MB_SHIFT   28

Definition at line 804 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS2_DR0_LB_MASK   (1 << 18)

Definition at line 751 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS2_DR0_LB_SHIFT   18

Definition at line 750 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS2_DR0_MB_MASK   (0x3 << 26)

Definition at line 807 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS2_DR0_MB_SHIFT   26

Definition at line 806 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS2_DR1_LB_MASK   (1 << 18)

Definition at line 817 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS2_DR1_LB_SHIFT   18

Definition at line 816 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS2_DR1_MB_MASK   (0x3 << 24)

Definition at line 809 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS2_DR1_MB_SHIFT   24

Definition at line 808 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS2_DR2_MB_MASK   (0x3 << 22)

Definition at line 811 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS2_DR2_MB_SHIFT   22

Definition at line 810 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS2_DR3_MB_MASK   (0x3 << 20)

Definition at line 813 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SLIMBUS2_DR3_MB_SHIFT   20

Definition at line 812 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI2_DR0_LB_MASK   (1 << 16)

Definition at line 753 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI2_DR0_LB_SHIFT   16

Definition at line 752 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI2_DR0_MB_MASK   (0x3 << 0)

Definition at line 711 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI2_DR0_MB_SHIFT   0

Definition at line 710 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI2_DR1_LB_MASK   (1 << 15)

Definition at line 755 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI2_DR1_LB_SHIFT   15

Definition at line 754 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI2_DR1_MB_MASK   (0x3 << 30)

Definition at line 715 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI2_DR1_MB_SHIFT   30

Definition at line 714 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI2_DR2_LB_MASK   (1 << 14)

Definition at line 757 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI2_DR2_LB_SHIFT   14

Definition at line 756 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI2_DR2_MB_MASK   (0x3 << 28)

Definition at line 717 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI2_DR2_MB_SHIFT   28

Definition at line 716 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI3_DR0_LB_MASK   (1 << 8)

Definition at line 661 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI3_DR0_LB_SHIFT   8

Definition at line 660 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI3_DR1_LB_MASK   (1 << 7)

Definition at line 663 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SPI3_DR1_LB_SHIFT   7

Definition at line 662 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_1_MASK   (0xff << 24)

Definition at line 1391 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_1_SHIFT   24

Definition at line 1390 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_2_MASK   (0xff << 16)

Definition at line 1393 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_2_SHIFT   16

Definition at line 1392 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_3_MASK   (0xff << 8)

Definition at line 1395 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_3_SHIFT   8

Definition at line 1394 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_4_MASK   (0xff << 0)

Definition at line 1397 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_4_SHIFT   0

Definition at line 1396 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_5_MASK   (0xff << 24)

Definition at line 1401 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_5_SHIFT   24

Definition at line 1400 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_6_MASK   (0xff << 16)

Definition at line 1403 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_6_SHIFT   16

Definition at line 1402 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_7_MASK   (0xff << 8)

Definition at line 1405 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_7_SHIFT   8

Definition at line 1404 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_8_MASK   (0xff << 0)

Definition at line 1407 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_STD_FUSE_SPARE_8_SHIFT   0

Definition at line 1406 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_BOOT0_DUPLICATEWAKEUPEVENT_MASK   (1 << 14)

Definition at line 471 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_BOOT0_DUPLICATEWAKEUPEVENT_SHIFT   14

Definition at line 470 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_BOOT1_DUPLICATEWAKEUPEVENT_MASK   (1 << 15)

Definition at line 469 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_BOOT1_DUPLICATEWAKEUPEVENT_SHIFT   15

Definition at line 468 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_BOOT2_DUPLICATEWAKEUPEVENT_MASK   (1 << 16)

Definition at line 467 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_BOOT2_DUPLICATEWAKEUPEVENT_SHIFT   16

Definition at line 466 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_BOOT3_DUPLICATEWAKEUPEVENT_MASK   (1 << 17)

Definition at line 465 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_BOOT3_DUPLICATEWAKEUPEVENT_SHIFT   17

Definition at line 464 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_BOOT4_DUPLICATEWAKEUPEVENT_MASK   (1 << 18)

Definition at line 463 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_BOOT4_DUPLICATEWAKEUPEVENT_SHIFT   18

Definition at line 462 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_BOOT5_DUPLICATEWAKEUPEVENT_MASK   (1 << 19)

Definition at line 461 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_BOOT5_DUPLICATEWAKEUPEVENT_SHIFT   19

Definition at line 460 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_NIRQ1_DUPLICATEWAKEUPEVENT_MASK   (1 << 12)

Definition at line 475 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_NIRQ1_DUPLICATEWAKEUPEVENT_SHIFT   12

Definition at line 474 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_NIRQ2_DUPLICATEWAKEUPEVENT_MASK   (1 << 13)

Definition at line 473 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_SYS_NIRQ2_DUPLICATEWAKEUPEVENT_SHIFT   13

Definition at line 472 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART1_DR0_LB_MASK   (0x3 << 8)

Definition at line 603 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART1_DR0_LB_SHIFT   8

Definition at line 602 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART1_DR0_SC_MASK   (0x3 << 8)

Definition at line 569 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART1_DR0_SC_SHIFT   8

Definition at line 568 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_CTS_DUPLICATEWAKEUPEVENT_MASK   (1 << 12)

Definition at line 343 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_CTS_DUPLICATEWAKEUPEVENT_SHIFT   12

Definition at line 342 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_DR0_LB_MASK   (1 << 13)

Definition at line 759 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_DR0_LB_SHIFT   13

Definition at line 758 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_DR0_MB_MASK   (0x3 << 26)

Definition at line 719 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_DR0_MB_SHIFT   26

Definition at line 718 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_DR1_LB_MASK   (1 << 12)

Definition at line 761 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_DR1_LB_SHIFT   12

Definition at line 760 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_DR1_MB_MASK   (0x3 << 24)

Definition at line 721 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_DR1_MB_SHIFT   24

Definition at line 720 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_RTS_DUPLICATEWAKEUPEVENT_MASK   (1 << 13)

Definition at line 341 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_RTS_DUPLICATEWAKEUPEVENT_SHIFT   13

Definition at line 340 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_RX_DUPLICATEWAKEUPEVENT_MASK   (1 << 14)

Definition at line 339 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_RX_DUPLICATEWAKEUPEVENT_SHIFT   14

Definition at line 338 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_TX_DUPLICATEWAKEUPEVENT_MASK   (1 << 15)

Definition at line 337 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART2_TX_DUPLICATEWAKEUPEVENT_SHIFT   15

Definition at line 336 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_CTS_RCTX_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)

Definition at line 433 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_CTS_RCTX_DUPLICATEWAKEUPEVENT_SHIFT   0

Definition at line 432 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR0_LB_MASK   (0x3 << 6)

Definition at line 605 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR0_LB_SHIFT   6

Definition at line 604 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR0_SC_MASK   (0x3 << 6)

Definition at line 571 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR0_SC_SHIFT   6

Definition at line 570 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR1_LB_MASK   (0x3 << 4)

Definition at line 607 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR1_LB_SHIFT   4

Definition at line 606 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR1_SC_MASK   (0x3 << 4)

Definition at line 573 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR1_SC_SHIFT   4

Definition at line 572 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR2_LB_MASK   (1 << 6)

Definition at line 665 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR2_LB_SHIFT   6

Definition at line 664 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR3_LB_MASK   (1 << 5)

Definition at line 667 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR3_LB_SHIFT   5

Definition at line 666 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR4_LB_MASK   (1 << 4)

Definition at line 669 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR4_LB_SHIFT   4

Definition at line 668 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR5_LB_MASK   (1 << 3)

Definition at line 671 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_DR5_LB_SHIFT   3

Definition at line 670 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_RTS_SD_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)

Definition at line 431 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_RTS_SD_DUPLICATEWAKEUPEVENT_SHIFT   1

Definition at line 430 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_RX_IRRX_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)

Definition at line 429 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_RX_IRRX_DUPLICATEWAKEUPEVENT_SHIFT   2

Definition at line 428 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_TX_IRTX_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)

Definition at line 427 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART3_TX_IRTX_DUPLICATEWAKEUPEVENT_SHIFT   3

Definition at line 426 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART4_DR0_LB_MASK   (1 << 11)

Definition at line 763 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART4_DR0_LB_SHIFT   11

Definition at line 762 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART4_DR0_MB_MASK   (0x3 << 22)

Definition at line 723 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART4_DR0_MB_SHIFT   22

Definition at line 722 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART4_RX_DUPLICATEWAKEUPEVENT_MASK   (1 << 14)

Definition at line 405 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART4_RX_DUPLICATEWAKEUPEVENT_SHIFT   14

Definition at line 404 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART4_TX_DUPLICATEWAKEUPEVENT_MASK   (1 << 15)

Definition at line 403 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UART4_TX_DUPLICATEWAKEUPEVENT_SHIFT   15

Definition at line 402 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_DR0_LB_MASK   (0x3 << 2)

Definition at line 609 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_DR0_LB_SHIFT   2

Definition at line 608 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_DR0_SC_MASK   (0x3 << 2)

Definition at line 575 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_DR0_SC_SHIFT   2

Definition at line 574 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_DR1_LB_MASK   (0x3 << 0)

Definition at line 611 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_DR1_LB_SHIFT   0

Definition at line 610 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_DR1_SC_MASK   (0x3 << 0)

Definition at line 577 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_DR1_SC_SHIFT   0

Definition at line 576 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_RX0_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)

Definition at line 491 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_RX0_DUPLICATEWAKEUPEVENT_SHIFT   4

Definition at line 490 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_RX1_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)

Definition at line 487 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_RX1_DUPLICATEWAKEUPEVENT_SHIFT   6

Definition at line 486 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_RX2_DUPLICATEWAKEUPEVENT_MASK   (1 << 8)

Definition at line 483 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_RX2_DUPLICATEWAKEUPEVENT_SHIFT   8

Definition at line 482 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_RY0_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)

Definition at line 489 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_RY0_DUPLICATEWAKEUPEVENT_SHIFT   5

Definition at line 488 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_RY1_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)

Definition at line 485 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_RY1_DUPLICATEWAKEUPEVENT_SHIFT   7

Definition at line 484 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_RY2_DUPLICATEWAKEUPEVENT_MASK   (1 << 9)

Definition at line 481 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_RY2_DUPLICATEWAKEUPEVENT_SHIFT   9

Definition at line 480 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_TX0_DUPLICATEWAKEUPEVENT_MASK   (1 << 30)

Definition at line 373 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_TX0_DUPLICATEWAKEUPEVENT_SHIFT   30

Definition at line 372 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_TX1_DUPLICATEWAKEUPEVENT_MASK   (1 << 0)

Definition at line 499 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_TX1_DUPLICATEWAKEUPEVENT_SHIFT   0

Definition at line 498 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_TX2_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)

Definition at line 495 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_TX2_DUPLICATEWAKEUPEVENT_SHIFT   2

Definition at line 494 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_TY0_DUPLICATEWAKEUPEVENT_MASK   (1 << 31)

Definition at line 371 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_TY0_DUPLICATEWAKEUPEVENT_SHIFT   31

Definition at line 370 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_TY1_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)

Definition at line 497 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_TY1_DUPLICATEWAKEUPEVENT_SHIFT   1

Definition at line 496 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_TY2_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)

Definition at line 493 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_UNIPRO_TY2_DUPLICATEWAKEUPEVENT_SHIFT   3

Definition at line 492 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_AUTORESUME_EN_MASK   (1 << 31)

Definition at line 959 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_AUTORESUME_EN_SHIFT   31

Definition at line 958 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHG_DET_DM_COMP_MASK   (1 << 20)

Definition at line 977 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHG_DET_DM_COMP_SHIFT   20

Definition at line 976 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHG_DET_DP_COMP_MASK   (1 << 19)

Definition at line 979 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHG_DET_DP_COMP_SHIFT   19

Definition at line 978 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_MASK   (1 << 28)

Definition at line 965 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHG_DET_EXT_CTL_SHIFT   28

Definition at line 964 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHG_DET_STATUS_MASK   (0x7 << 21)

Definition at line 975 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHG_DET_STATUS_SHIFT   21

Definition at line 974 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHG_ISINK_EN_MASK   (1 << 24)

Definition at line 973 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHG_ISINK_EN_SHIFT   24

Definition at line 972 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHG_VSRC_EN_MASK   (1 << 25)

Definition at line 971 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHG_VSRC_EN_SHIFT   25

Definition at line 970 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHGDETDONE_MASK   (1 << 14)

Definition at line 989 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHGDETDONE_SHIFT   14

Definition at line 988 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHGDETECTED_MASK   (1 << 13)

Definition at line 991 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_CHGDETECTED_SHIFT   13

Definition at line 990 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_DATADET_MASK   (1 << 18)

Definition at line 981 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_DATADET_SHIFT   18

Definition at line 980 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_DATAPOLARITYN_MASK   (1 << 7)

Definition at line 1003 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_DATAPOLARITYN_SHIFT   7

Definition at line 1002 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_DISCHGDET_MASK   (1 << 30)

Definition at line 961 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_DISCHGDET_SHIFT   30

Definition at line 960 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_GPIOMODE_MASK   (1 << 29)

Definition at line 963 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_GPIOMODE_SHIFT   29

Definition at line 962 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_MCPCMODEEN_MASK   (1 << 11)

Definition at line 995 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_MCPCMODEEN_SHIFT   11

Definition at line 994 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_MCPCPUEN_MASK   (1 << 12)

Definition at line 993 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_MCPCPUEN_SHIFT   12

Definition at line 992 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_MASK   (1 << 27)

Definition at line 967 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_RDM_PD_CHGDET_EN_SHIFT   27

Definition at line 966 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_MASK   (1 << 26)

Definition at line 969 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_RDP_PU_CHGDET_EN_SHIFT   26

Definition at line 968 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_RESETDONEMCLK_MASK   (1 << 10)

Definition at line 997 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_RESETDONEMCLK_SHIFT   10

Definition at line 996 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_RESETDONETCLK_MASK   (1 << 5)

Definition at line 1007 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_RESETDONETCLK_SHIFT   5

Definition at line 1006 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_RESTARTCHGDET_MASK   (1 << 15)

Definition at line 987 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_RESTARTCHGDET_SHIFT   15

Definition at line 986 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_SINKONDP_MASK   (1 << 17)

Definition at line 983 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_SINKONDP_SHIFT   17

Definition at line 982 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_SRCONDM_MASK   (1 << 16)

Definition at line 985 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_SRCONDM_SHIFT   16

Definition at line 984 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_TXBITSTUFFENABLE_MASK   (1 << 8)

Definition at line 1001 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_TXBITSTUFFENABLE_SHIFT   8

Definition at line 1000 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_UTMIRESETDONE_MASK   (1 << 9)

Definition at line 999 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB2PHY_UTMIRESETDONE_SHIFT   9

Definition at line 998 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB_FD_CDEN_MASK   (1 << 23)

Definition at line 1049 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USB_FD_CDEN_SHIFT   23

Definition at line 1048 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBA0_DR0_LB_MASK   (1 << 29)

Definition at line 683 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBA0_DR0_LB_SHIFT   29

Definition at line 682 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBA0_DR1_LB_MASK   (1 << 2)

Definition at line 673 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBA0_DR1_LB_SHIFT   2

Definition at line 672 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBA_DR2_LB_MASK   (1 << 1)

Definition at line 675 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBA_DR2_LB_SHIFT   1

Definition at line 674 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_DR0_LB_MASK   (1 << 31)

Definition at line 679 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_DR0_LB_SHIFT   31

Definition at line 678 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_DR1_I_MASK   (0x7 << 22)

Definition at line 775 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_DR1_I_SHIFT   22

Definition at line 774 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_DR1_SR_MASK   (0x3 << 25)

Definition at line 773 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_DR1_SR_SHIFT   25

Definition at line 772 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_DATA_DUPLICATEWAKEUPEVENT_MASK   (1 << 13)

Definition at line 275 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_DATA_DUPLICATEWAKEUPEVENT_SHIFT   13

Definition at line 274 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_ENABLE_MASK   (1 << 13)

Definition at line 785 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_ENABLE_SHIFT   13

Definition at line 784 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_MASK   (0x3 << 11)

Definition at line 787 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_DATA_OFFMODE_WD_SHIFT   11

Definition at line 786 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_DATA_WD_MASK   (0x3 << 20)

Definition at line 777 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_DATA_WD_SHIFT   20

Definition at line 776 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_STROBE_DUPLICATEWAKEUPEVENT_MASK   (1 << 14)

Definition at line 273 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_STROBE_DUPLICATEWAKEUPEVENT_SHIFT   14

Definition at line 272 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_ENABLE_MASK   (1 << 10)

Definition at line 789 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_ENABLE_SHIFT   10

Definition at line 788 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_MASK   (0x3 << 8)

Definition at line 791 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_STROBE_OFFMODE_WD_SHIFT   8

Definition at line 790 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_STROBE_WD_MASK   (0x3 << 18)

Definition at line 779 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_HSIC_STROBE_WD_SHIFT   18

Definition at line 778 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 1)

Definition at line 299 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_SHIFT   1

Definition at line 298 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_MASK   (1 << 5)

Definition at line 291 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_SHIFT   5

Definition at line 290 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_MASK   (1 << 6)

Definition at line 289 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_SHIFT   6

Definition at line 288 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_MASK   (1 << 7)

Definition at line 287 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_SHIFT   7

Definition at line 286 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_MASK   (1 << 8)

Definition at line 285 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_SHIFT   8

Definition at line 284 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_MASK   (1 << 9)

Definition at line 283 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_SHIFT   9

Definition at line 282 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_MASK   (1 << 10)

Definition at line 281 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_SHIFT   10

Definition at line 280 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_MASK   (1 << 11)

Definition at line 279 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_SHIFT   11

Definition at line 278 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_MASK   (1 << 12)

Definition at line 277 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_SHIFT   12

Definition at line 276 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_MASK   (1 << 3)

Definition at line 295 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_SHIFT   3

Definition at line 294 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_MASK   (1 << 4)

Definition at line 293 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_SHIFT   4

Definition at line 292 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_STP_DUPLICATEWAKEUPEVENT_MASK   (1 << 2)

Definition at line 297 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB1_ULPITLL_STP_DUPLICATEWAKEUPEVENT_SHIFT   2

Definition at line 296 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_DR0_LB_MASK   (1 << 30)

Definition at line 681 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_DR0_LB_SHIFT   30

Definition at line 680 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_DR1_I_MASK   (0x7 << 27)

Definition at line 771 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_DR1_I_SHIFT   27

Definition at line 770 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_DR1_SR_MASK   (0x3 << 30)

Definition at line 769 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_DR1_SR_SHIFT   30

Definition at line 768 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_DATA_DUPLICATEWAKEUPEVENT_MASK   (1 << 28)

Definition at line 377 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_DATA_DUPLICATEWAKEUPEVENT_SHIFT   28

Definition at line 376 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_ENABLE_MASK   (1 << 7)

Definition at line 793 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_ENABLE_SHIFT   7

Definition at line 792 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_MASK   (0x3 << 5)

Definition at line 795 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_DATA_OFFMODE_WD_SHIFT   5

Definition at line 794 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_DATA_WD_MASK   (0x3 << 16)

Definition at line 781 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_DATA_WD_SHIFT   16

Definition at line 780 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_STROBE_DUPLICATEWAKEUPEVENT_MASK   (1 << 29)

Definition at line 375 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_STROBE_DUPLICATEWAKEUPEVENT_SHIFT   29

Definition at line 374 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_ENABLE_MASK   (1 << 4)

Definition at line 797 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_ENABLE_SHIFT   4

Definition at line 796 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_MASK   (0x3 << 2)

Definition at line 799 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_STROBE_OFFMODE_WD_SHIFT   2

Definition at line 798 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_STROBE_WD_MASK   (0x3 << 14)

Definition at line 783 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_HSIC_STROBE_WD_SHIFT   14

Definition at line 782 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_MASK   (1 << 16)

Definition at line 401 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_CLK_DUPLICATEWAKEUPEVENT_SHIFT   16

Definition at line 400 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_MASK   (1 << 20)

Definition at line 393 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT0_DUPLICATEWAKEUPEVENT_SHIFT   20

Definition at line 392 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_MASK   (1 << 21)

Definition at line 391 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT1_DUPLICATEWAKEUPEVENT_SHIFT   21

Definition at line 390 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_MASK   (1 << 22)

Definition at line 389 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT2_DUPLICATEWAKEUPEVENT_SHIFT   22

Definition at line 388 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_MASK   (1 << 23)

Definition at line 387 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT3_DUPLICATEWAKEUPEVENT_SHIFT   23

Definition at line 386 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_MASK   (1 << 24)

Definition at line 385 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT4_DUPLICATEWAKEUPEVENT_SHIFT   24

Definition at line 384 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_MASK   (1 << 25)

Definition at line 383 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT5_DUPLICATEWAKEUPEVENT_SHIFT   25

Definition at line 382 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_MASK   (1 << 26)

Definition at line 381 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT6_DUPLICATEWAKEUPEVENT_SHIFT   26

Definition at line 380 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_MASK   (1 << 27)

Definition at line 379 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DAT7_DUPLICATEWAKEUPEVENT_SHIFT   27

Definition at line 378 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_MASK   (1 << 18)

Definition at line 397 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_DIR_DUPLICATEWAKEUPEVENT_SHIFT   18

Definition at line 396 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_MASK   (1 << 19)

Definition at line 395 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_NXT_DUPLICATEWAKEUPEVENT_SHIFT   19

Definition at line 394 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_STP_DUPLICATEWAKEUPEVENT_MASK   (1 << 17)

Definition at line 399 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBB2_ULPITLL_STP_DUPLICATEWAKEUPEVENT_SHIFT   17

Definition at line 398 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBC1_DR0_SPEEDCTRL_MASK   (1 << 24)

Definition at line 1047 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBC1_DR0_SPEEDCTRL_SHIFT   24

Definition at line 1046 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBC1_ICUSB_DM_DUPLICATEWAKEUPEVENT_MASK   (1 << 16)

Definition at line 269 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBC1_ICUSB_DM_DUPLICATEWAKEUPEVENT_SHIFT   16

Definition at line 268 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBC1_ICUSB_DM_PDDIS_MASK   (1 << 21)

Definition at line 1053 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBC1_ICUSB_DM_PDDIS_SHIFT   21

Definition at line 1052 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBC1_ICUSB_DP_DUPLICATEWAKEUPEVENT_MASK   (1 << 15)

Definition at line 271 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBC1_ICUSB_DP_DUPLICATEWAKEUPEVENT_SHIFT   15

Definition at line 270 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBC1_ICUSB_DP_PDDIS_MASK   (1 << 22)

Definition at line 1051 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBC1_ICUSB_DP_PDDIS_SHIFT   22

Definition at line 1050 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBC1_ICUSB_PWRDNZ_MASK   (1 << 20)

Definition at line 843 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBC1_ICUSB_PWRDNZ_SHIFT   20

Definition at line 842 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBDPLL_FREQLOCK_MASK   (1 << 6)

Definition at line 1005 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USBDPLL_FREQLOCK_SHIFT   6

Definition at line 1004 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USIM_PBIASLITE_HIZ_MODE_MASK   (1 << 31)

Definition at line 821 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USIM_PBIASLITE_HIZ_MODE_SHIFT   31

Definition at line 820 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USIM_PBIASLITE_PWRDNZ_MASK   (1 << 28)

Definition at line 827 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USIM_PBIASLITE_PWRDNZ_SHIFT   28

Definition at line 826 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USIM_PBIASLITE_SUPPLY_HI_OUT_MASK   (1 << 30)

Definition at line 823 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USIM_PBIASLITE_SUPPLY_HI_OUT_SHIFT   30

Definition at line 822 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USIM_PBIASLITE_VMODE_ERROR_MASK   (1 << 29)

Definition at line 825 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USIM_PBIASLITE_VMODE_ERROR_SHIFT   29

Definition at line 824 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USIM_PBIASLITE_VMODE_MASK   (1 << 27)

Definition at line 829 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_USIM_PBIASLITE_VMODE_SHIFT   27

Definition at line 828 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_BANK0_MASK   (1 << 31)

Definition at line 525 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_BANK0_SHIFT   31

Definition at line 524 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_BANK1_MASK   (1 << 30)

Definition at line 527 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_BANK1_SHIFT   30

Definition at line 526 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_BANK3_MASK   (1 << 29)

Definition at line 529 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_BANK3_SHIFT   29

Definition at line 528 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_BANK4_MASK   (1 << 28)

Definition at line 531 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_BANK4_SHIFT   28

Definition at line 530 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_BANK5_MASK   (1 << 27)

Definition at line 533 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_BANK5_SHIFT   27

Definition at line 532 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_BANK6_MASK   (1 << 26)

Definition at line 535 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_BANK6_SHIFT   26

Definition at line 534 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_C2C_MASK   (1 << 25)

Definition at line 537 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_C2C_SHIFT   25

Definition at line 536 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_CAM_MASK   (1 << 24)

Definition at line 539 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_CAM_SHIFT   24

Definition at line 538 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_GPMC_MASK   (1 << 23)

Definition at line 541 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_GPMC_SHIFT   23

Definition at line 540 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_SDMMC2_MASK   (1 << 22)

Definition at line 543 of file ctrl_module_pad_core_44xx.h.

#define OMAP4_VDDS_DV_SDMMC2_SHIFT   22

Definition at line 542 of file ctrl_module_pad_core_44xx.h.

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