#include <linux/kernel.h>
#include <linux/spinlock.h>
#include <linux/device.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/err.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
#include "davinci_cpdma.h"
Go to the source code of this file.
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#define | CPDMA_TXIDVER 0x00 |
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#define | CPDMA_TXCONTROL 0x04 |
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#define | CPDMA_TXTEARDOWN 0x08 |
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#define | CPDMA_RXIDVER 0x10 |
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#define | CPDMA_RXCONTROL 0x14 |
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#define | CPDMA_SOFTRESET 0x1c |
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#define | CPDMA_RXTEARDOWN 0x18 |
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#define | CPDMA_TXINTSTATRAW 0x80 |
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#define | CPDMA_TXINTSTATMASKED 0x84 |
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#define | CPDMA_TXINTMASKSET 0x88 |
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#define | CPDMA_TXINTMASKCLEAR 0x8c |
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#define | CPDMA_MACINVECTOR 0x90 |
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#define | CPDMA_MACEOIVECTOR 0x94 |
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#define | CPDMA_RXINTSTATRAW 0xa0 |
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#define | CPDMA_RXINTSTATMASKED 0xa4 |
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#define | CPDMA_RXINTMASKSET 0xa8 |
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#define | CPDMA_RXINTMASKCLEAR 0xac |
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#define | CPDMA_DMAINTSTATRAW 0xb0 |
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#define | CPDMA_DMAINTSTATMASKED 0xb4 |
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#define | CPDMA_DMAINTMASKSET 0xb8 |
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#define | CPDMA_DMAINTMASKCLEAR 0xbc |
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#define | CPDMA_DMAINT_HOSTERR BIT(1) |
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#define | CPDMA_DMACONTROL 0x20 |
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#define | CPDMA_DMASTATUS 0x24 |
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#define | CPDMA_RXBUFFOFS 0x28 |
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#define | CPDMA_EM_CONTROL 0x2c |
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#define | CPDMA_DESC_SOP BIT(31) |
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#define | CPDMA_DESC_EOP BIT(30) |
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#define | CPDMA_DESC_OWNER BIT(29) |
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#define | CPDMA_DESC_EOQ BIT(28) |
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#define | CPDMA_DESC_TD_COMPLETE BIT(27) |
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#define | CPDMA_DESC_PASS_CRC BIT(26) |
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#define | CPDMA_TEARDOWN_VALUE 0xfffffffc |
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#define | dmaregs params.dmaregs |
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#define | num_chan params.num_chan |
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#define | dma_reg_read(ctlr, ofs) __raw_readl((ctlr)->dmaregs + (ofs)) |
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#define | chan_read(chan, fld) __raw_readl((chan)->fld) |
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#define | desc_read(desc, fld) __raw_readl(&(desc)->fld) |
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#define | dma_reg_write(ctlr, ofs, v) __raw_writel(v, (ctlr)->dmaregs + (ofs)) |
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#define | chan_write(chan, fld, v) __raw_writel(v, (chan)->fld) |
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#define | desc_write(desc, fld, v) __raw_writel((u32)(v), &(desc)->fld) |
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#define | ACCESS_RO BIT(0) |
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#define | ACCESS_WO BIT(1) |
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#define | ACCESS_RW (ACCESS_RO | ACCESS_WO) |
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struct cpdma_ctlr * | cpdma_ctlr_create (struct cpdma_params *params) |
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| EXPORT_SYMBOL_GPL (cpdma_ctlr_create) |
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int | cpdma_ctlr_start (struct cpdma_ctlr *ctlr) |
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| EXPORT_SYMBOL_GPL (cpdma_ctlr_start) |
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int | cpdma_ctlr_stop (struct cpdma_ctlr *ctlr) |
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| EXPORT_SYMBOL_GPL (cpdma_ctlr_stop) |
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int | cpdma_ctlr_dump (struct cpdma_ctlr *ctlr) |
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| EXPORT_SYMBOL_GPL (cpdma_ctlr_dump) |
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int | cpdma_ctlr_destroy (struct cpdma_ctlr *ctlr) |
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| EXPORT_SYMBOL_GPL (cpdma_ctlr_destroy) |
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int | cpdma_ctlr_int_ctrl (struct cpdma_ctlr *ctlr, bool enable) |
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void | cpdma_ctlr_eoi (struct cpdma_ctlr *ctlr) |
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struct cpdma_chan * | cpdma_chan_create (struct cpdma_ctlr *ctlr, int chan_num, cpdma_handler_fn handler) |
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| EXPORT_SYMBOL_GPL (cpdma_chan_create) |
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int | cpdma_chan_destroy (struct cpdma_chan *chan) |
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| EXPORT_SYMBOL_GPL (cpdma_chan_destroy) |
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int | cpdma_chan_get_stats (struct cpdma_chan *chan, struct cpdma_chan_stats *stats) |
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int | cpdma_chan_dump (struct cpdma_chan *chan) |
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int | cpdma_chan_submit (struct cpdma_chan *chan, void *token, void *data, int len, gfp_t gfp_mask) |
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| EXPORT_SYMBOL_GPL (cpdma_chan_submit) |
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int | cpdma_chan_process (struct cpdma_chan *chan, int quota) |
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| EXPORT_SYMBOL_GPL (cpdma_chan_process) |
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int | cpdma_chan_start (struct cpdma_chan *chan) |
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| EXPORT_SYMBOL_GPL (cpdma_chan_start) |
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int | cpdma_chan_stop (struct cpdma_chan *chan) |
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| EXPORT_SYMBOL_GPL (cpdma_chan_stop) |
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int | cpdma_chan_int_ctrl (struct cpdma_chan *chan, bool enable) |
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int | cpdma_control_get (struct cpdma_ctlr *ctlr, int control) |
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int | cpdma_control_set (struct cpdma_ctlr *ctlr, int control, int value) |
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#define CPDMA_DESC_EOP BIT(30) |
#define CPDMA_DESC_EOQ BIT(28) |
#define CPDMA_DESC_OWNER BIT(29) |
#define CPDMA_DESC_PASS_CRC BIT(26) |
#define CPDMA_DESC_SOP BIT(31) |
#define CPDMA_DESC_TD_COMPLETE BIT(27) |
#define CPDMA_DMACONTROL 0x20 |
#define CPDMA_DMAINT_HOSTERR BIT(1) |
#define CPDMA_DMAINTMASKCLEAR 0xbc |
#define CPDMA_DMAINTMASKSET 0xb8 |
#define CPDMA_DMAINTSTATMASKED 0xb4 |
#define CPDMA_DMAINTSTATRAW 0xb0 |
#define CPDMA_DMASTATUS 0x24 |
#define CPDMA_EM_CONTROL 0x2c |
#define CPDMA_MACEOIVECTOR 0x94 |
#define CPDMA_MACINVECTOR 0x90 |
#define CPDMA_RXBUFFOFS 0x28 |
#define CPDMA_RXCONTROL 0x14 |
#define CPDMA_RXIDVER 0x10 |
#define CPDMA_RXINTMASKCLEAR 0xac |
#define CPDMA_RXINTMASKSET 0xa8 |
#define CPDMA_RXINTSTATMASKED 0xa4 |
#define CPDMA_RXINTSTATRAW 0xa0 |
#define CPDMA_RXTEARDOWN 0x18 |
#define CPDMA_SOFTRESET 0x1c |
#define CPDMA_TEARDOWN_VALUE 0xfffffffc |
#define CPDMA_TXCONTROL 0x04 |
#define CPDMA_TXIDVER 0x00 |
#define CPDMA_TXINTMASKCLEAR 0x8c |
#define CPDMA_TXINTMASKSET 0x88 |
#define CPDMA_TXINTSTATMASKED 0x84 |
#define CPDMA_TXINTSTATRAW 0x80 |
#define CPDMA_TXTEARDOWN 0x08 |
#define dmaregs params.dmaregs |
#define num_chan params.num_chan |
- Enumerator:
CPDMA_STATE_IDLE |
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CPDMA_STATE_ACTIVE |
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CPDMA_STATE_TEARDOWN |
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Definition at line 90 of file davinci_cpdma.c.