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arch
arm
mach-ux500
devices-db8500.c
Go to the documentation of this file.
1
/*
2
* Copyright (C) ST-Ericsson SA 2010
3
*
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* Author: Rabin Vincent <
[email protected]
> for ST-Ericsson
5
* License terms: GNU General Public License (GPL) version 2
6
*/
7
8
#include <linux/kernel.h>
9
#include <
linux/platform_device.h
>
10
#include <
linux/interrupt.h
>
11
#include <
linux/io.h
>
12
#include <
linux/gpio.h
>
13
#include <
linux/amba/bus.h
>
14
#include <
linux/amba/pl022.h
>
15
16
#include <
plat/ste_dma40.h
>
17
18
#include <mach/hardware.h>
19
#include <
mach/setup.h
>
20
21
#include "
ste-dma40-db8500.h
"
22
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static
struct
resource
dma40_resources[] = {
24
[0] = {
25
.start =
U8500_DMA_BASE
,
26
.end =
U8500_DMA_BASE
+
SZ_4K
- 1,
27
.flags =
IORESOURCE_MEM
,
28
.name =
"base"
,
29
},
30
[1] = {
31
.start =
U8500_DMA_LCPA_BASE
,
32
.end =
U8500_DMA_LCPA_BASE
+ 2 *
SZ_1K
- 1,
33
.flags =
IORESOURCE_MEM
,
34
.name =
"lcpa"
,
35
},
36
[2] = {
37
.start =
IRQ_DB8500_DMA
,
38
.end =
IRQ_DB8500_DMA
,
39
.flags =
IORESOURCE_IRQ
,
40
}
41
};
42
43
/* Default configuration for physcial memcpy */
44
struct
stedma40_chan_cfg
dma40_memcpy_conf_phy
= {
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.mode =
STEDMA40_MODE_PHYSICAL
,
46
.dir =
STEDMA40_MEM_TO_MEM
,
47
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.src_info.data_width =
STEDMA40_BYTE_WIDTH
,
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.src_info.psize =
STEDMA40_PSIZE_PHY_1
,
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.src_info.flow_ctrl =
STEDMA40_NO_FLOW_CTRL
,
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.dst_info.data_width =
STEDMA40_BYTE_WIDTH
,
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.dst_info.psize =
STEDMA40_PSIZE_PHY_1
,
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.dst_info.flow_ctrl =
STEDMA40_NO_FLOW_CTRL
,
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};
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/* Default configuration for logical memcpy */
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struct
stedma40_chan_cfg
dma40_memcpy_conf_log
= {
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.dir =
STEDMA40_MEM_TO_MEM
,
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.src_info.data_width =
STEDMA40_BYTE_WIDTH
,
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.src_info.psize =
STEDMA40_PSIZE_LOG_1
,
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.src_info.flow_ctrl =
STEDMA40_NO_FLOW_CTRL
,
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.dst_info.data_width =
STEDMA40_BYTE_WIDTH
,
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.dst_info.psize =
STEDMA40_PSIZE_LOG_1
,
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.dst_info.flow_ctrl =
STEDMA40_NO_FLOW_CTRL
,
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};
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/*
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* Mapping between destination event lines and physical device address.
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* The event line is tied to a device and therefore the address is constant.
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* When the address comes from a primecell it will be configured in runtime
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* and we set the address to -1 as a placeholder.
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*/
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static
const
dma_addr_t
dma40_tx_map[
DB8500_DMA_NR_DEV
] = {
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/* MUSB - these will be runtime-reconfigured */
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[
DB8500_DMA_DEV39_USB_OTG_OEP_8
] = -1,
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[
DB8500_DMA_DEV16_USB_OTG_OEP_7_15
] = -1,
79
[
DB8500_DMA_DEV17_USB_OTG_OEP_6_14
] = -1,
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[
DB8500_DMA_DEV18_USB_OTG_OEP_5_13
] = -1,
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[
DB8500_DMA_DEV19_USB_OTG_OEP_4_12
] = -1,
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[
DB8500_DMA_DEV36_USB_OTG_OEP_3_11
] = -1,
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[
DB8500_DMA_DEV37_USB_OTG_OEP_2_10
] = -1,
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[
DB8500_DMA_DEV38_USB_OTG_OEP_1_9
] = -1,
85
/* PrimeCells - run-time configured */
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[
DB8500_DMA_DEV0_SPI0_TX
] = -1,
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[
DB8500_DMA_DEV1_SD_MMC0_TX
] = -1,
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[
DB8500_DMA_DEV2_SD_MMC1_TX
] = -1,
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[
DB8500_DMA_DEV3_SD_MMC2_TX
] = -1,
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[
DB8500_DMA_DEV8_SSP0_TX
] = -1,
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[
DB8500_DMA_DEV9_SSP1_TX
] = -1,
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[
DB8500_DMA_DEV11_UART2_TX
] = -1,
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[
DB8500_DMA_DEV12_UART1_TX
] = -1,
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[
DB8500_DMA_DEV13_UART0_TX
] = -1,
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[
DB8500_DMA_DEV28_SD_MM2_TX
] = -1,
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[
DB8500_DMA_DEV29_SD_MM0_TX
] = -1,
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[
DB8500_DMA_DEV32_SD_MM1_TX
] = -1,
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[
DB8500_DMA_DEV33_SPI2_TX
] = -1,
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[
DB8500_DMA_DEV35_SPI1_TX
] = -1,
100
[
DB8500_DMA_DEV40_SPI3_TX
] = -1,
101
[
DB8500_DMA_DEV41_SD_MM3_TX
] = -1,
102
[
DB8500_DMA_DEV42_SD_MM4_TX
] = -1,
103
[
DB8500_DMA_DEV43_SD_MM5_TX
] = -1,
104
[
DB8500_DMA_DEV14_MSP2_TX
] =
U8500_MSP2_BASE
+
MSP_TX_RX_REG_OFFSET
,
105
[
DB8500_DMA_DEV30_MSP1_TX
] =
U8500_MSP1_BASE
+
MSP_TX_RX_REG_OFFSET
,
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[
DB8500_DMA_DEV31_MSP0_TX_SLIM0_CH0_TX
] =
U8500_MSP0_BASE
+
MSP_TX_RX_REG_OFFSET
,
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[
DB8500_DMA_DEV48_CAC1_TX
] =
U8500_CRYP1_BASE
+
CRYP1_TX_REG_OFFSET
,
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[
DB8500_DMA_DEV50_HAC1_TX
] =
U8500_HASH1_BASE
+
HASH1_TX_REG_OFFSET
,
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};
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111
/* Mapping between source event lines and physical device address */
112
static
const
dma_addr_t
dma40_rx_map[
DB8500_DMA_NR_DEV
] = {
113
/* MUSB - these will be runtime-reconfigured */
114
[
DB8500_DMA_DEV39_USB_OTG_IEP_8
] = -1,
115
[
DB8500_DMA_DEV16_USB_OTG_IEP_7_15
] = -1,
116
[
DB8500_DMA_DEV17_USB_OTG_IEP_6_14
] = -1,
117
[
DB8500_DMA_DEV18_USB_OTG_IEP_5_13
] = -1,
118
[
DB8500_DMA_DEV19_USB_OTG_IEP_4_12
] = -1,
119
[
DB8500_DMA_DEV36_USB_OTG_IEP_3_11
] = -1,
120
[
DB8500_DMA_DEV37_USB_OTG_IEP_2_10
] = -1,
121
[
DB8500_DMA_DEV38_USB_OTG_IEP_1_9
] = -1,
122
/* PrimeCells */
123
[
DB8500_DMA_DEV0_SPI0_RX
] = -1,
124
[
DB8500_DMA_DEV1_SD_MMC0_RX
] = -1,
125
[
DB8500_DMA_DEV2_SD_MMC1_RX
] = -1,
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[
DB8500_DMA_DEV3_SD_MMC2_RX
] = -1,
127
[
DB8500_DMA_DEV8_SSP0_RX
] = -1,
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[
DB8500_DMA_DEV9_SSP1_RX
] = -1,
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[
DB8500_DMA_DEV11_UART2_RX
] = -1,
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[
DB8500_DMA_DEV12_UART1_RX
] = -1,
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[
DB8500_DMA_DEV13_UART0_RX
] = -1,
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[
DB8500_DMA_DEV28_SD_MM2_RX
] = -1,
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[
DB8500_DMA_DEV29_SD_MM0_RX
] = -1,
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[
DB8500_DMA_DEV32_SD_MM1_RX
] = -1,
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[
DB8500_DMA_DEV33_SPI2_RX
] = -1,
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[
DB8500_DMA_DEV35_SPI1_RX
] = -1,
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[
DB8500_DMA_DEV40_SPI3_RX
] = -1,
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[
DB8500_DMA_DEV41_SD_MM3_RX
] = -1,
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[
DB8500_DMA_DEV42_SD_MM4_RX
] = -1,
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[
DB8500_DMA_DEV43_SD_MM5_RX
] = -1,
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[
DB8500_DMA_DEV14_MSP2_RX
] =
U8500_MSP2_BASE
+
MSP_TX_RX_REG_OFFSET
,
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[
DB8500_DMA_DEV30_MSP3_RX
] =
U8500_MSP3_BASE
+
MSP_TX_RX_REG_OFFSET
,
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[
DB8500_DMA_DEV31_MSP0_RX_SLIM0_CH0_RX
] =
U8500_MSP0_BASE
+
MSP_TX_RX_REG_OFFSET
,
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[
DB8500_DMA_DEV48_CAC1_RX
] =
U8500_CRYP1_BASE
+
CRYP1_RX_REG_OFFSET
,
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};
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/* Reserved event lines for memcpy only */
148
static
int
dma40_memcpy_event[] = {
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DB8500_DMA_MEMCPY_TX_0
,
150
DB8500_DMA_MEMCPY_TX_1
,
151
DB8500_DMA_MEMCPY_TX_2
,
152
DB8500_DMA_MEMCPY_TX_3
,
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DB8500_DMA_MEMCPY_TX_4
,
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DB8500_DMA_MEMCPY_TX_5
,
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};
156
157
static
struct
stedma40_platform_data
dma40_plat_data = {
158
.dev_len =
DB8500_DMA_NR_DEV
,
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.dev_rx = dma40_rx_map,
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.dev_tx = dma40_tx_map,
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.memcpy = dma40_memcpy_event,
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.memcpy_len =
ARRAY_SIZE
(dma40_memcpy_event),
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.memcpy_conf_phy = &
dma40_memcpy_conf_phy
,
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.memcpy_conf_log = &
dma40_memcpy_conf_log
,
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.disabled_channels = {-1},
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};
167
168
struct
platform_device
u8500_dma40_device
= {
169
.dev = {
170
.platform_data = &dma40_plat_data,
171
},
172
.name =
"dma40"
,
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.id = 0,
174
.num_resources =
ARRAY_SIZE
(dma40_resources),
175
.resource = dma40_resources
176
};
177
178
struct
resource
keypad_resources
[] = {
179
[0] = {
180
.start =
U8500_SKE_BASE
,
181
.end =
U8500_SKE_BASE
+
SZ_4K
- 1,
182
.flags =
IORESOURCE_MEM
,
183
},
184
[1] = {
185
.start =
IRQ_DB8500_KB
,
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.end =
IRQ_DB8500_KB
,
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.flags =
IORESOURCE_IRQ
,
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},
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};
190
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struct
platform_device
u8500_ske_keypad_device
= {
192
.name =
"nmk-ske-keypad"
,
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.id = -1,
194
.num_resources =
ARRAY_SIZE
(keypad_resources),
195
.resource =
keypad_resources
,
196
};
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