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Data Structures | Macros | Functions
dpmc.h File Reference
#include <mach/pll.h>

Go to the source code of this file.

Data Structures

struct  bfin_dpmc_platform_data
 

Macros

#define DF   0x0001 /* 0: PLL = CLKIN, 1: PLL = CLKIN/2 */
 
#define PLL_OFF   0x0002 /* PLL Not Powered */
 
#define STOPCK   0x0008 /* Core Clock Off */
 
#define PDWN   0x0020 /* Enter Deep Sleep Mode */
 
#define IN_DELAY   0x0040 /* Add 200ps Delay To EBIU Input Latches */
 
#define OUT_DELAY   0x0080 /* Add 200ps Delay To EBIU Output Signals */
 
#define BYPASS   0x0100 /* Bypass the PLL */
 
#define MSEL   0x7E00 /* Multiplier Select For CCLK/VCO Factors */
 
#define SPORT_HYST   0x8000 /* Enable Additional Hysteresis on SPORT Input Pins */
 
#define SET_MSEL(x)   (((x)&0x3F) << 0x9) /* Set MSEL = 0-63 --> VCO = CLKIN*MSEL */
 
#define SSEL   0x000F /* System Select */
 
#define CSEL   0x0030 /* Core Select */
 
#define CSEL_DIV1   0x0000 /* CCLK = VCO / 1 */
 
#define CSEL_DIV2   0x0010 /* CCLK = VCO / 2 */
 
#define CSEL_DIV4   0x0020 /* CCLK = VCO / 4 */
 
#define CSEL_DIV8   0x0030 /* CCLK = VCO / 8 */
 
#define CCLK_DIV1   CSEL_DIV1
 
#define CCLK_DIV2   CSEL_DIV2
 
#define CCLK_DIV4   CSEL_DIV4
 
#define CCLK_DIV8   CSEL_DIV8
 
#define SET_SSEL(x)   ((x) & 0xF) /* Set SSEL = 0-15 --> SCLK = VCO/SSEL */
 
#define SCLK_DIV(x)   (x) /* SCLK = VCO / x */
 
#define ACTIVE_PLLENABLED   0x0001 /* Processor In Active Mode With PLL Enabled */
 
#define FULL_ON   0x0002 /* Processor In Full On Mode */
 
#define ACTIVE_PLLDISABLED   0x0004 /* Processor In Active Mode With PLL Disabled */
 
#define PLL_LOCKED   0x0020 /* PLL_LOCKCNT Has Been Reached */
 
#define RTCWS   0x0400 /* RTC/Reset Wake-Up Status */
 
#define CANWS   0x0800 /* CAN Wake-Up Status */
 
#define USBWS   0x2000 /* USB Wake-Up Status */
 
#define KPADWS   0x4000 /* Keypad Wake-Up Status */
 
#define ROTWS   0x8000 /* Rotary Wake-Up Status */
 
#define GPWS   0x1000 /* General-Purpose Wake-Up Status */
 
#define FREQ   0x0003 /* Switching Oscillator Frequency For Regulator */
 
#define FREQ_333   0x0001 /* Switching Frequency Is 333 kHz */
 
#define FREQ_667   0x0002 /* Switching Frequency Is 667 kHz */
 
#define FREQ_1000   0x0003 /* Switching Frequency Is 1 MHz */
 
#define HIBERNATE   0x0000 /* Powerdown/Bypass On-Board Regulation */
 
#define GAIN   0x000C /* Voltage Level Gain */
 
#define GAIN_5   0x0000 /* GAIN = 5 */
 
#define GAIN_10   0x0004 /* GAIN = 1 */
 
#define GAIN_20   0x0008 /* GAIN = 2 */
 
#define GAIN_50   0x000C /* GAIN = 5 */
 
#define VLEV   0x00F0 /* Internal Voltage Level */
 
#define VLEV_085   0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */
 
#define VLEV_090   0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */
 
#define VLEV_095   0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */
 
#define VLEV_100   0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */
 
#define VLEV_105   0x00A0 /* VLEV = 1.05 V (-5% - +10% Accuracy) */
 
#define VLEV_110   0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */
 
#define VLEV_115   0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */
 
#define VLEV_120   0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */
 
#define VLEV_125   0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */
 
#define VLEV_130   0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */
 
#define WAKE   0x0100 /* Enable RTC/Reset Wakeup From Hibernate */
 
#define CANWE   0x0200 /* Enable CAN Wakeup From Hibernate */
 
#define PHYWE   0x0400 /* Enable PHY Wakeup From Hibernate */
 
#define GPWE   0x0400 /* General-Purpose Wake-Up Enable */
 
#define MXVRWE   0x0400 /* Enable MXVR Wakeup From Hibernate */
 
#define KPADWE   0x1000 /* Keypad Wake-Up Enable */
 
#define ROTWE   0x2000 /* Rotary Wake-Up Enable */
 
#define CLKBUFOE   0x4000 /* CLKIN Buffer Output Enable */
 
#define SCKELOW   0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */
 
#define USBWE   0x0800 /* Enable USB Wakeup From Hibernate */
 
#define VRPAIR(vlev, freq)   (((vlev) << 16) | ((freq) >> 16))
 

Functions

void sleep_mode (u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2)
 
void sleep_deeper (u32 sic_iwr0, u32 sic_iwr1, u32 sic_iwr2)
 
void do_hibernate (int wakeup)
 
void set_dram_srfs (void)
 
void unset_dram_srfs (void)
 

Macro Definition Documentation

#define ACTIVE_PLLDISABLED   0x0004 /* Processor In Active Mode With PLL Disabled */

Definition at line 695 of file dpmc.h.

#define ACTIVE_PLLENABLED   0x0001 /* Processor In Active Mode With PLL Enabled */

Definition at line 693 of file dpmc.h.

#define BYPASS   0x0100 /* Bypass the PLL */

Definition at line 671 of file dpmc.h.

#define CANWE   0x0200 /* Enable CAN Wakeup From Hibernate */

Definition at line 757 of file dpmc.h.

#define CANWS   0x0800 /* CAN Wake-Up Status */

Definition at line 699 of file dpmc.h.

#define CCLK_DIV1   CSEL_DIV1

Definition at line 684 of file dpmc.h.

#define CCLK_DIV2   CSEL_DIV2

Definition at line 685 of file dpmc.h.

#define CCLK_DIV4   CSEL_DIV4

Definition at line 686 of file dpmc.h.

#define CCLK_DIV8   CSEL_DIV8

Definition at line 687 of file dpmc.h.

#define CLKBUFOE   0x4000 /* CLKIN Buffer Output Enable */

Definition at line 763 of file dpmc.h.

#define CSEL   0x0030 /* Core Select */

Definition at line 678 of file dpmc.h.

#define CSEL_DIV1   0x0000 /* CCLK = VCO / 1 */

Definition at line 679 of file dpmc.h.

#define CSEL_DIV2   0x0010 /* CCLK = VCO / 2 */

Definition at line 680 of file dpmc.h.

#define CSEL_DIV4   0x0020 /* CCLK = VCO / 4 */

Definition at line 681 of file dpmc.h.

#define CSEL_DIV8   0x0030 /* CCLK = VCO / 8 */

Definition at line 682 of file dpmc.h.

#define DF   0x0001 /* 0: PLL = CLKIN, 1: PLL = CLKIN/2 */

Definition at line 660 of file dpmc.h.

#define FREQ   0x0003 /* Switching Oscillator Frequency For Regulator */

Definition at line 710 of file dpmc.h.

#define FREQ_1000   0x0003 /* Switching Frequency Is 1 MHz */

Definition at line 713 of file dpmc.h.

#define FREQ_333   0x0001 /* Switching Frequency Is 333 kHz */

Definition at line 711 of file dpmc.h.

#define FREQ_667   0x0002 /* Switching Frequency Is 667 kHz */

Definition at line 712 of file dpmc.h.

#define FULL_ON   0x0002 /* Processor In Full On Mode */

Definition at line 694 of file dpmc.h.

#define GAIN   0x000C /* Voltage Level Gain */

Definition at line 717 of file dpmc.h.

#define GAIN_10   0x0004 /* GAIN = 1 */

Definition at line 719 of file dpmc.h.

#define GAIN_20   0x0008 /* GAIN = 2 */

Definition at line 720 of file dpmc.h.

#define GAIN_5   0x0000 /* GAIN = 5 */

Definition at line 718 of file dpmc.h.

#define GAIN_50   0x000C /* GAIN = 5 */

Definition at line 721 of file dpmc.h.

#define GPWE   0x0400 /* General-Purpose Wake-Up Enable */

Definition at line 759 of file dpmc.h.

#define GPWS   0x1000 /* General-Purpose Wake-Up Status */

Definition at line 703 of file dpmc.h.

#define HIBERNATE   0x0000 /* Powerdown/Bypass On-Board Regulation */

Definition at line 715 of file dpmc.h.

#define IN_DELAY   0x0040 /* Add 200ps Delay To EBIU Input Latches */

Definition at line 668 of file dpmc.h.

#define KPADWE   0x1000 /* Keypad Wake-Up Enable */

Definition at line 761 of file dpmc.h.

#define KPADWS   0x4000 /* Keypad Wake-Up Status */

Definition at line 701 of file dpmc.h.

#define MSEL   0x7E00 /* Multiplier Select For CCLK/VCO Factors */

Definition at line 672 of file dpmc.h.

#define MXVRWE   0x0400 /* Enable MXVR Wakeup From Hibernate */

Definition at line 760 of file dpmc.h.

#define OUT_DELAY   0x0080 /* Add 200ps Delay To EBIU Output Signals */

Definition at line 669 of file dpmc.h.

#define PDWN   0x0020 /* Enter Deep Sleep Mode */

Definition at line 663 of file dpmc.h.

#define PHYWE   0x0400 /* Enable PHY Wakeup From Hibernate */

Definition at line 758 of file dpmc.h.

#define PLL_LOCKED   0x0020 /* PLL_LOCKCNT Has Been Reached */

Definition at line 696 of file dpmc.h.

#define PLL_OFF   0x0002 /* PLL Not Powered */

Definition at line 661 of file dpmc.h.

#define ROTWE   0x2000 /* Rotary Wake-Up Enable */

Definition at line 762 of file dpmc.h.

#define ROTWS   0x8000 /* Rotary Wake-Up Status */

Definition at line 702 of file dpmc.h.

#define RTCWS   0x0400 /* RTC/Reset Wake-Up Status */

Definition at line 698 of file dpmc.h.

#define SCKELOW   0x8000 /* Do Not Drive SCKE High During Reset After Hibernate */

Definition at line 764 of file dpmc.h.

#define SCLK_DIV (   x)    (x) /* SCLK = VCO / x */

Definition at line 690 of file dpmc.h.

#define SET_MSEL (   x)    (((x)&0x3F) << 0x9) /* Set MSEL = 0-63 --> VCO = CLKIN*MSEL */

Definition at line 674 of file dpmc.h.

#define SET_SSEL (   x)    ((x) & 0xF) /* Set SSEL = 0-15 --> SCLK = VCO/SSEL */

Definition at line 689 of file dpmc.h.

#define SPORT_HYST   0x8000 /* Enable Additional Hysteresis on SPORT Input Pins */

Definition at line 673 of file dpmc.h.

#define SSEL   0x000F /* System Select */

Definition at line 677 of file dpmc.h.

#define STOPCK   0x0008 /* Core Clock Off */

Definition at line 662 of file dpmc.h.

#define USBWE   0x0800 /* Enable USB Wakeup From Hibernate */

Definition at line 769 of file dpmc.h.

#define USBWS   0x2000 /* USB Wake-Up Status */

Definition at line 700 of file dpmc.h.

#define VLEV   0x00F0 /* Internal Voltage Level */

Definition at line 723 of file dpmc.h.

#define VLEV_085   0x0060 /* VLEV = 0.85 V (-5% - +10% Accuracy) */

Definition at line 734 of file dpmc.h.

#define VLEV_090   0x0070 /* VLEV = 0.90 V (-5% - +10% Accuracy) */

Definition at line 735 of file dpmc.h.

#define VLEV_095   0x0080 /* VLEV = 0.95 V (-5% - +10% Accuracy) */

Definition at line 736 of file dpmc.h.

#define VLEV_100   0x0090 /* VLEV = 1.00 V (-5% - +10% Accuracy) */

Definition at line 737 of file dpmc.h.

#define VLEV_105   0x00A0 /* VLEV = 1.05 V (-5% - +10% Accuracy) */

Definition at line 738 of file dpmc.h.

#define VLEV_110   0x00B0 /* VLEV = 1.10 V (-5% - +10% Accuracy) */

Definition at line 739 of file dpmc.h.

#define VLEV_115   0x00C0 /* VLEV = 1.15 V (-5% - +10% Accuracy) */

Definition at line 740 of file dpmc.h.

#define VLEV_120   0x00D0 /* VLEV = 1.20 V (-5% - +10% Accuracy) */

Definition at line 741 of file dpmc.h.

#define VLEV_125   0x00E0 /* VLEV = 1.25 V (-5% - +10% Accuracy) */

Definition at line 742 of file dpmc.h.

#define VLEV_130   0x00F0 /* VLEV = 1.30 V (-5% - +10% Accuracy) */

Definition at line 743 of file dpmc.h.

#define VRPAIR (   vlev,
  freq 
)    (((vlev) << 16) | ((freq) >> 16))

Definition at line 781 of file dpmc.h.

#define WAKE   0x0100 /* Enable RTC/Reset Wakeup From Hibernate */

Definition at line 756 of file dpmc.h.

Function Documentation

void do_hibernate ( int  wakeup)
void set_dram_srfs ( void  )
void sleep_deeper ( u32  sic_iwr0,
u32  sic_iwr1,
u32  sic_iwr2 
)
void sleep_mode ( u32  sic_iwr0,
u32  sic_iwr1,
u32  sic_iwr2 
)
void unset_dram_srfs ( void  )