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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Data Structures | |
| struct | jr_outentry |
| struct | sec_vid |
| struct | caam_perfmon |
| struct | masterid |
| struct | partid |
| struct | rngtst |
| struct | rng4tst |
| struct | caam_ctrl |
| struct | caam_job_ring |
| struct | rtic_element |
| struct | rtic_block |
| struct | rtic_memhash |
| struct | caam_assurance |
| struct | caam_queue_if |
| struct | deco_sg_table |
| struct | caam_deco |
| struct | caam_full |
Macros | |
| #define | CHA_NUM_DECONUM_SHIFT 56 |
| #define | CHA_NUM_DECONUM_MASK (0xfull << CHA_NUM_DECONUM_SHIFT) |
| #define | CTPR_QI_SHIFT 57 |
| #define | CTPR_QI_MASK (0x1ull << CTPR_QI_SHIFT) |
| #define | MSTRID_LOCK_LIODN 0x80000000 |
| #define | MSTRID_LOCK_MAKETRUSTED 0x00010000 /* only for JR masterid */ |
| #define | MSTRID_LIODN_MASK 0x0fff |
| #define | RTMCTL_PRGM 0x00010000 /* 1 -> program mode, 0 -> run mode */ |
| #define | RTSDCTL_ENT_DLY_SHIFT 16 |
| #define | RTSDCTL_ENT_DLY_MASK (0xffff << RTSDCTL_ENT_DLY_SHIFT) |
| #define | KEK_KEY_SIZE 8 |
| #define | TKEK_KEY_SIZE 8 |
| #define | TDSK_KEY_SIZE 8 |
| #define | DECO_RESET 1 /* Use with DECO reset/availability regs */ |
| #define | DECO_RESET_0 (DECO_RESET << 0) |
| #define | DECO_RESET_1 (DECO_RESET << 1) |
| #define | DECO_RESET_2 (DECO_RESET << 2) |
| #define | DECO_RESET_3 (DECO_RESET << 3) |
| #define | DECO_RESET_4 (DECO_RESET << 4) |
| #define | MCFGR_SWRESET 0x80000000 /* software reset */ |
| #define | MCFGR_WDENABLE 0x40000000 /* DECO watchdog enable */ |
| #define | MCFGR_WDFAIL 0x20000000 /* DECO watchdog force-fail */ |
| #define | MCFGR_DMA_RESET 0x10000000 |
| #define | MCFGR_LONG_PTR 0x00010000 /* Use >32-bit desc addressing */ |
| #define | MCFGR_ARCACHE_SHIFT 12 |
| #define | MCFGR_ARCACHE_MASK (0xf << MCFGR_ARCACHE_SHIFT) |
| #define | MCFGR_AWCACHE_SHIFT 8 |
| #define | MCFGR_AWCACHE_MASK (0xf << MCFGR_AWCACHE_SHIFT) |
| #define | MCFGR_AXIPIPE_SHIFT 4 |
| #define | MCFGR_AXIPIPE_MASK (0xf << MCFGR_AXIPIPE_SHIFT) |
| #define | MCFGR_AXIPRI 0x00000008 /* Assert AXI priority sideband */ |
| #define | MCFGR_BURST_64 0x00000001 /* Max burst size */ |
| #define | JR_RINGSIZE_MASK 0x03ff |
| #define | JRSTA_SSRC_SHIFT 28 |
| #define | JRSTA_SSRC_MASK 0xf0000000 |
| #define | JRSTA_SSRC_NONE 0x00000000 |
| #define | JRSTA_SSRC_CCB_ERROR 0x20000000 |
| #define | JRSTA_SSRC_JUMP_HALT_USER 0x30000000 |
| #define | JRSTA_SSRC_DECO 0x40000000 |
| #define | JRSTA_SSRC_JRERROR 0x60000000 |
| #define | JRSTA_SSRC_JUMP_HALT_CC 0x70000000 |
| #define | JRSTA_DECOERR_JUMP 0x08000000 |
| #define | JRSTA_DECOERR_INDEX_SHIFT 8 |
| #define | JRSTA_DECOERR_INDEX_MASK 0xff00 |
| #define | JRSTA_DECOERR_ERROR_MASK 0x00ff |
| #define | JRSTA_DECOERR_NONE 0x00 |
| #define | JRSTA_DECOERR_LINKLEN 0x01 |
| #define | JRSTA_DECOERR_LINKPTR 0x02 |
| #define | JRSTA_DECOERR_JRCTRL 0x03 |
| #define | JRSTA_DECOERR_DESCCMD 0x04 |
| #define | JRSTA_DECOERR_ORDER 0x05 |
| #define | JRSTA_DECOERR_KEYCMD 0x06 |
| #define | JRSTA_DECOERR_LOADCMD 0x07 |
| #define | JRSTA_DECOERR_STORECMD 0x08 |
| #define | JRSTA_DECOERR_OPCMD 0x09 |
| #define | JRSTA_DECOERR_FIFOLDCMD 0x0a |
| #define | JRSTA_DECOERR_FIFOSTCMD 0x0b |
| #define | JRSTA_DECOERR_MOVECMD 0x0c |
| #define | JRSTA_DECOERR_JUMPCMD 0x0d |
| #define | JRSTA_DECOERR_MATHCMD 0x0e |
| #define | JRSTA_DECOERR_SHASHCMD 0x0f |
| #define | JRSTA_DECOERR_SEQCMD 0x10 |
| #define | JRSTA_DECOERR_DECOINTERNAL 0x11 |
| #define | JRSTA_DECOERR_SHDESCHDR 0x12 |
| #define | JRSTA_DECOERR_HDRLEN 0x13 |
| #define | JRSTA_DECOERR_BURSTER 0x14 |
| #define | JRSTA_DECOERR_DESCSIGNATURE 0x15 |
| #define | JRSTA_DECOERR_DMA 0x16 |
| #define | JRSTA_DECOERR_BURSTFIFO 0x17 |
| #define | JRSTA_DECOERR_JRRESET 0x1a |
| #define | JRSTA_DECOERR_JOBFAIL 0x1b |
| #define | JRSTA_DECOERR_DNRERR 0x80 |
| #define | JRSTA_DECOERR_UNDEFPCL 0x81 |
| #define | JRSTA_DECOERR_PDBERR 0x82 |
| #define | JRSTA_DECOERR_ANRPLY_LATE 0x83 |
| #define | JRSTA_DECOERR_ANRPLY_REPLAY 0x84 |
| #define | JRSTA_DECOERR_SEQOVF 0x85 |
| #define | JRSTA_DECOERR_INVSIGN 0x86 |
| #define | JRSTA_DECOERR_DSASIGN 0x87 |
| #define | JRSTA_CCBERR_JUMP 0x08000000 |
| #define | JRSTA_CCBERR_INDEX_MASK 0xff00 |
| #define | JRSTA_CCBERR_INDEX_SHIFT 8 |
| #define | JRSTA_CCBERR_CHAID_MASK 0x00f0 |
| #define | JRSTA_CCBERR_CHAID_SHIFT 4 |
| #define | JRSTA_CCBERR_ERRID_MASK 0x000f |
| #define | JRSTA_CCBERR_CHAID_AES (0x01 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define | JRSTA_CCBERR_CHAID_DES (0x02 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define | JRSTA_CCBERR_CHAID_ARC4 (0x03 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define | JRSTA_CCBERR_CHAID_MD (0x04 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define | JRSTA_CCBERR_CHAID_RNG (0x05 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define | JRSTA_CCBERR_CHAID_SNOW (0x06 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define | JRSTA_CCBERR_CHAID_KASUMI (0x07 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define | JRSTA_CCBERR_CHAID_PK (0x08 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define | JRSTA_CCBERR_CHAID_CRC (0x09 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define | JRSTA_CCBERR_ERRID_NONE 0x00 |
| #define | JRSTA_CCBERR_ERRID_MODE 0x01 |
| #define | JRSTA_CCBERR_ERRID_DATASIZ 0x02 |
| #define | JRSTA_CCBERR_ERRID_KEYSIZ 0x03 |
| #define | JRSTA_CCBERR_ERRID_PKAMEMSZ 0x04 |
| #define | JRSTA_CCBERR_ERRID_PKBMEMSZ 0x05 |
| #define | JRSTA_CCBERR_ERRID_SEQUENCE 0x06 |
| #define | JRSTA_CCBERR_ERRID_PKDIVZRO 0x07 |
| #define | JRSTA_CCBERR_ERRID_PKMODEVN 0x08 |
| #define | JRSTA_CCBERR_ERRID_KEYPARIT 0x09 |
| #define | JRSTA_CCBERR_ERRID_ICVCHK 0x0a |
| #define | JRSTA_CCBERR_ERRID_HARDWARE 0x0b |
| #define | JRSTA_CCBERR_ERRID_CCMAAD 0x0c |
| #define | JRSTA_CCBERR_ERRID_INVCHA 0x0f |
| #define | JRINT_ERR_INDEX_MASK 0x3fff0000 |
| #define | JRINT_ERR_INDEX_SHIFT 16 |
| #define | JRINT_ERR_TYPE_MASK 0xf00 |
| #define | JRINT_ERR_TYPE_SHIFT 8 |
| #define | JRINT_ERR_HALT_MASK 0xc |
| #define | JRINT_ERR_HALT_SHIFT 2 |
| #define | JRINT_ERR_HALT_INPROGRESS 0x4 |
| #define | JRINT_ERR_HALT_COMPLETE 0x8 |
| #define | JRINT_JR_ERROR 0x02 |
| #define | JRINT_JR_INT 0x01 |
| #define | JRINT_ERR_TYPE_WRITE 1 |
| #define | JRINT_ERR_TYPE_BAD_INPADDR 3 |
| #define | JRINT_ERR_TYPE_BAD_OUTADDR 4 |
| #define | JRINT_ERR_TYPE_INV_INPWRT 5 |
| #define | JRINT_ERR_TYPE_INV_OUTWRT 6 |
| #define | JRINT_ERR_TYPE_RESET 7 |
| #define | JRINT_ERR_TYPE_REMOVE_OFL 8 |
| #define | JRINT_ERR_TYPE_ADD_OFL 9 |
| #define | JRCFG_SOE 0x04 |
| #define | JRCFG_ICEN 0x02 |
| #define | JRCFG_IMSK 0x01 |
| #define | JRCFG_ICDCT_SHIFT 8 |
| #define | JRCFG_ICTT_SHIFT 16 |
| #define | JRCR_RESET 0x01 |
| #define | QICTL_DQEN 0x01 /* Enable frame pop */ |
| #define | QICTL_STOP 0x02 /* Stop dequeue/enqueue */ |
| #define | QICTL_SOE 0x04 /* Stop on error */ |
| #define | QICTL_MBSI 0x01 |
| #define | QICTL_MHWSI 0x02 |
| #define | QICTL_MWSI 0x04 |
| #define | QICTL_MDWSI 0x08 |
| #define | QICTL_CBSI 0x10 /* CtrlDataByteSwapInput */ |
| #define | QICTL_CHWSI 0x20 /* CtrlDataHalfSwapInput */ |
| #define | QICTL_CWSI 0x40 /* CtrlDataWordSwapInput */ |
| #define | QICTL_CDWSI 0x80 /* CtrlDataDWordSwapInput */ |
| #define | QICTL_MBSO 0x0100 |
| #define | QICTL_MHWSO 0x0200 |
| #define | QICTL_MWSO 0x0400 |
| #define | QICTL_MDWSO 0x0800 |
| #define | QICTL_CBSO 0x1000 /* CtrlDataByteSwapOutput */ |
| #define | QICTL_CHWSO 0x2000 /* CtrlDataHalfSwapOutput */ |
| #define | QICTL_CWSO 0x4000 /* CtrlDataWordSwapOutput */ |
| #define | QICTL_CDWSO 0x8000 /* CtrlDataDWordSwapOutput */ |
| #define | QICTL_DMBS 0x010000 |
| #define | QICTL_EPO 0x020000 |
| #define | QISTA_PHRDERR 0x01 /* PreHeader Read Error */ |
| #define | QISTA_CFRDERR 0x02 /* Compound Frame Read Error */ |
| #define | QISTA_OFWRERR 0x04 /* Output Frame Read Error */ |
| #define | QISTA_BPDERR 0x08 /* Buffer Pool Depleted */ |
| #define | QISTA_BTSERR 0x10 /* Buffer Undersize */ |
| #define | QISTA_CFWRERR 0x20 /* Compound Frame Write Err */ |
| #define | QISTA_STOPD 0x80000000 /* QI Stopped (see QICTL) */ |
Variables | |
| struct jr_outentry | __packed |
| #define CHA_NUM_DECONUM_MASK (0xfull << CHA_NUM_DECONUM_SHIFT) |
| #define DECO_RESET_0 (DECO_RESET << 0) |
| #define DECO_RESET_1 (DECO_RESET << 1) |
| #define DECO_RESET_2 (DECO_RESET << 2) |
| #define DECO_RESET_3 (DECO_RESET << 3) |
| #define DECO_RESET_4 (DECO_RESET << 4) |
| #define JRSTA_CCBERR_CHAID_AES (0x01 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define JRSTA_CCBERR_CHAID_ARC4 (0x03 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define JRSTA_CCBERR_CHAID_CRC (0x09 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define JRSTA_CCBERR_CHAID_DES (0x02 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define JRSTA_CCBERR_CHAID_KASUMI (0x07 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define JRSTA_CCBERR_CHAID_MD (0x04 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define JRSTA_CCBERR_CHAID_PK (0x08 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define JRSTA_CCBERR_CHAID_RNG (0x05 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define JRSTA_CCBERR_CHAID_SNOW (0x06 << JRSTA_CCBERR_CHAID_SHIFT) |
| #define MCFGR_AXIPRI 0x00000008 /* Assert AXI priority sideband */ |
| #define MCFGR_LONG_PTR 0x00010000 /* Use >32-bit desc addressing */ |
| #define MCFGR_WDFAIL 0x20000000 /* DECO watchdog force-fail */ |
| #define MSTRID_LOCK_MAKETRUSTED 0x00010000 /* only for JR masterid */ |
| #define RTMCTL_PRGM 0x00010000 /* 1 -> program mode, 0 -> run mode */ |
| #define RTSDCTL_ENT_DLY_MASK (0xffff << RTSDCTL_ENT_DLY_SHIFT) |
1.8.2