Linux Kernel  3.7.1
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Macros
hardware.h File Reference
#include <asm/param.h>

Go to the source code of this file.

Macros

#define MAX_CARDS
 
#define SIGNATURE   0x87654321 /* Board reset signature */
 
#define SIG_OFFSET   0x1004 /* Where to find signature in shared RAM */
 
#define TRACE_OFFSET   0x1008 /* Trace enable word offset in shared RAM */
 
#define BUFFER_OFFSET   0x1800 /* Beginning of buffers */
 
#define IOBASE_MIN   0x180 /* Lowest I/O port address */
 
#define IOBASE_MAX   0x3C0 /* Highest I/O port address */
 
#define IOBASE_OFFSET
 
#define FIFORD_OFFSET   0x0
 
#define FIFOWR_OFFSET   0x400
 
#define FIFOSTAT_OFFSET   0x1000
 
#define RESET_OFFSET   0x2800
 
#define PG0_OFFSET   0x3000 /* Offset from I/O Base for Page 0 register */
 
#define PG1_OFFSET   0x3400 /* Offset from I/O Base for Page 1 register */
 
#define PG2_OFFSET   0x3800 /* Offset from I/O Base for Page 2 register */
 
#define PG3_OFFSET   0x3C00 /* Offset from I/O Base for Page 3 register */
 
#define FIFO_READ   0 /* FIFO Read register */
 
#define FIFO_WRITE   1 /* FIFO Write rgister */
 
#define LO_ADDR_PTR   2 /* Extended RAM Low Addr Pointer */
 
#define HI_ADDR_PTR   3 /* Extended RAM High Addr Pointer */
 
#define NOT_USED_1   4
 
#define FIFO_STATUS   5 /* FIFO Status Register */
 
#define NOT_USED_2   6
 
#define MEM_OFFSET   7
 
#define SFT_RESET   10 /* Reset Register */
 
#define EXP_BASE   11 /* Shared RAM Base address */
 
#define EXP_PAGE0   12 /* Shared RAM Page0 register */
 
#define EXP_PAGE1   13 /* Shared RAM Page1 register */
 
#define EXP_PAGE2   14 /* Shared RAM Page2 register */
 
#define EXP_PAGE3   15 /* Shared RAM Page3 register */
 
#define IRQ_SELECT   16 /* IRQ selection register */
 
#define MAX_IO_REGS   17 /* Total number of I/O ports */
 
#define RF_HAS_DATA   0x01 /* fifo has data */
 
#define RF_QUART_FULL   0x02 /* fifo quarter full */
 
#define RF_HALF_FULL   0x04 /* fifo half full */
 
#define RF_NOT_FULL   0x08 /* fifo not full */
 
#define WF_HAS_DATA   0x10 /* fifo has data */
 
#define WF_QUART_FULL   0x20 /* fifo quarter full */
 
#define WF_HALF_FULL   0x40 /* fifo half full */
 
#define WF_NOT_FULL   0x80 /* fifo not full */
 
#define SRAM_MIN   0xC0000 /* Lowest host shared RAM address */
 
#define SRAM_MAX   0xEFFFF /* Highest host shared RAM address */
 
#define SRAM_PAGESIZE   0x4000 /* Size of one RAM page (16K) */
 
#define BUFFER_SIZE   0x800 /* The size of a buffer in bytes */
 
#define BUFFER_BASE
 
#define BUFFERS_MAX
 
#define HDLC_PROTO   0x01 /* Frame Format for Layer 2 */
 
#define BRI_BOARD   0
 
#define POTS_BOARD   1
 
#define PRI_BOARD   2
 
#define BRI_CHANNELS   2 /* Number of B channels */
 
#define BRI_BASEPG_VAL   0x98
 
#define BRI_MAGIC   0x60000 /* Magic Number */
 
#define BRI_MEMSIZE   0x10000 /* Amount of RAM (64K) */
 
#define BRI_PARTNO   "72-029"
 
#define BRI_FEATURES   ISDN_FEATURE_L2_HDLC | ISDN_FEATURE_L3_TRANS;
 
#define PRI_CHANNELS   23 /* Number of B channels */
 
#define PRI_BASEPG_VAL   0x88
 
#define PRI_MAGIC   0x20000 /* Magic Number */
 
#define PRI_MEMSIZE   0x100000 /* Amount of RAM (1M) */
 
#define PRI_PARTNO   "72-030"
 
#define PRI_FEATURES   ISDN_FEATURE_L2_HDLC | ISDN_FEATURE_L3_TRANS;
 
#define IS_VALID_CHANNEL(y, x)   ((x > 0) && (x <= sc_adapter[y]->channels))
 

Macro Definition Documentation

#define BRI_BASEPG_VAL   0x98

Definition at line 84 of file hardware.h.

#define BRI_BOARD   0

Definition at line 76 of file hardware.h.

#define BRI_CHANNELS   2 /* Number of B channels */

Definition at line 83 of file hardware.h.

#define BRI_FEATURES   ISDN_FEATURE_L2_HDLC | ISDN_FEATURE_L3_TRANS;

Definition at line 88 of file hardware.h.

#define BRI_MAGIC   0x60000 /* Magic Number */

Definition at line 85 of file hardware.h.

#define BRI_MEMSIZE   0x10000 /* Amount of RAM (64K) */

Definition at line 86 of file hardware.h.

#define BRI_PARTNO   "72-029"

Definition at line 87 of file hardware.h.

#define BUFFER_BASE
Value:
BUFFER_OFFSET /* Offset from start of shared RAM
where buffer start */

Definition at line 72 of file hardware.h.

#define BUFFER_OFFSET   0x1800 /* Beginning of buffers */

Definition at line 23 of file hardware.h.

#define BUFFER_SIZE   0x800 /* The size of a buffer in bytes */

Definition at line 71 of file hardware.h.

#define BUFFERS_MAX
Value:
16 /* Maximum number of send/receive
buffers per channel */

Definition at line 73 of file hardware.h.

#define EXP_BASE   11 /* Shared RAM Base address */

Definition at line 47 of file hardware.h.

#define EXP_PAGE0   12 /* Shared RAM Page0 register */

Definition at line 48 of file hardware.h.

#define EXP_PAGE1   13 /* Shared RAM Page1 register */

Definition at line 49 of file hardware.h.

#define EXP_PAGE2   14 /* Shared RAM Page2 register */

Definition at line 50 of file hardware.h.

#define EXP_PAGE3   15 /* Shared RAM Page3 register */

Definition at line 51 of file hardware.h.

#define FIFO_READ   0 /* FIFO Read register */

Definition at line 38 of file hardware.h.

#define FIFO_STATUS   5 /* FIFO Status Register */

Definition at line 43 of file hardware.h.

#define FIFO_WRITE   1 /* FIFO Write rgister */

Definition at line 39 of file hardware.h.

#define FIFORD_OFFSET   0x0

Definition at line 29 of file hardware.h.

#define FIFOSTAT_OFFSET   0x1000

Definition at line 31 of file hardware.h.

#define FIFOWR_OFFSET   0x400

Definition at line 30 of file hardware.h.

#define HDLC_PROTO   0x01 /* Frame Format for Layer 2 */

Definition at line 74 of file hardware.h.

#define HI_ADDR_PTR   3 /* Extended RAM High Addr Pointer */

Definition at line 41 of file hardware.h.

#define IOBASE_MAX   0x3C0 /* Highest I/O port address */

Definition at line 27 of file hardware.h.

#define IOBASE_MIN   0x180 /* Lowest I/O port address */

Definition at line 26 of file hardware.h.

#define IOBASE_OFFSET
Value:
0x20 /* Inter-board I/O port gap used during
probing */

Definition at line 28 of file hardware.h.

#define IRQ_SELECT   16 /* IRQ selection register */

Definition at line 52 of file hardware.h.

#define IS_VALID_CHANNEL (   y,
  x 
)    ((x > 0) && (x <= sc_adapter[y]->channels))

Definition at line 104 of file hardware.h.

#define LO_ADDR_PTR   2 /* Extended RAM Low Addr Pointer */

Definition at line 40 of file hardware.h.

#define MAX_CARDS
Value:
4 /* The maximum number of cards to
control or probe for. */

Definition at line 18 of file hardware.h.

#define MAX_IO_REGS   17 /* Total number of I/O ports */

Definition at line 53 of file hardware.h.

#define MEM_OFFSET   7

Definition at line 45 of file hardware.h.

#define NOT_USED_1   4

Definition at line 42 of file hardware.h.

#define NOT_USED_2   6

Definition at line 44 of file hardware.h.

#define PG0_OFFSET   0x3000 /* Offset from I/O Base for Page 0 register */

Definition at line 33 of file hardware.h.

#define PG1_OFFSET   0x3400 /* Offset from I/O Base for Page 1 register */

Definition at line 34 of file hardware.h.

#define PG2_OFFSET   0x3800 /* Offset from I/O Base for Page 2 register */

Definition at line 35 of file hardware.h.

#define PG3_OFFSET   0x3C00 /* Offset from I/O Base for Page 3 register */

Definition at line 36 of file hardware.h.

#define POTS_BOARD   1

Definition at line 77 of file hardware.h.

#define PRI_BASEPG_VAL   0x88

Definition at line 93 of file hardware.h.

#define PRI_BOARD   2

Definition at line 78 of file hardware.h.

#define PRI_CHANNELS   23 /* Number of B channels */

Definition at line 92 of file hardware.h.

#define PRI_FEATURES   ISDN_FEATURE_L2_HDLC | ISDN_FEATURE_L3_TRANS;

Definition at line 97 of file hardware.h.

#define PRI_MAGIC   0x20000 /* Magic Number */

Definition at line 94 of file hardware.h.

#define PRI_MEMSIZE   0x100000 /* Amount of RAM (1M) */

Definition at line 95 of file hardware.h.

#define PRI_PARTNO   "72-030"

Definition at line 96 of file hardware.h.

#define RESET_OFFSET   0x2800

Definition at line 32 of file hardware.h.

#define RF_HALF_FULL   0x04 /* fifo half full */

Definition at line 58 of file hardware.h.

#define RF_HAS_DATA   0x01 /* fifo has data */

Definition at line 56 of file hardware.h.

#define RF_NOT_FULL   0x08 /* fifo not full */

Definition at line 59 of file hardware.h.

#define RF_QUART_FULL   0x02 /* fifo quarter full */

Definition at line 57 of file hardware.h.

#define SFT_RESET   10 /* Reset Register */

Definition at line 46 of file hardware.h.

#define SIG_OFFSET   0x1004 /* Where to find signature in shared RAM */

Definition at line 21 of file hardware.h.

#define SIGNATURE   0x87654321 /* Board reset signature */

Definition at line 20 of file hardware.h.

#define SRAM_MAX   0xEFFFF /* Highest host shared RAM address */

Definition at line 67 of file hardware.h.

#define SRAM_MIN   0xC0000 /* Lowest host shared RAM address */

Definition at line 66 of file hardware.h.

#define SRAM_PAGESIZE   0x4000 /* Size of one RAM page (16K) */

Definition at line 68 of file hardware.h.

#define TRACE_OFFSET   0x1008 /* Trace enable word offset in shared RAM */

Definition at line 22 of file hardware.h.

#define WF_HALF_FULL   0x40 /* fifo half full */

Definition at line 62 of file hardware.h.

#define WF_HAS_DATA   0x10 /* fifo has data */

Definition at line 60 of file hardware.h.

#define WF_NOT_FULL   0x80 /* fifo not full */

Definition at line 63 of file hardware.h.

#define WF_QUART_FULL   0x20 /* fifo quarter full */

Definition at line 61 of file hardware.h.