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Macros
regs.h File Reference

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Macros

#define A_SG_CONTROL   0x0
 
#define S_CMDQ0_ENABLE   0
 
#define V_CMDQ0_ENABLE(x)   ((x) << S_CMDQ0_ENABLE)
 
#define F_CMDQ0_ENABLE   V_CMDQ0_ENABLE(1U)
 
#define S_CMDQ1_ENABLE   1
 
#define V_CMDQ1_ENABLE(x)   ((x) << S_CMDQ1_ENABLE)
 
#define F_CMDQ1_ENABLE   V_CMDQ1_ENABLE(1U)
 
#define S_FL0_ENABLE   2
 
#define V_FL0_ENABLE(x)   ((x) << S_FL0_ENABLE)
 
#define F_FL0_ENABLE   V_FL0_ENABLE(1U)
 
#define S_FL1_ENABLE   3
 
#define V_FL1_ENABLE(x)   ((x) << S_FL1_ENABLE)
 
#define F_FL1_ENABLE   V_FL1_ENABLE(1U)
 
#define S_CPL_ENABLE   4
 
#define V_CPL_ENABLE(x)   ((x) << S_CPL_ENABLE)
 
#define F_CPL_ENABLE   V_CPL_ENABLE(1U)
 
#define S_RESPONSE_QUEUE_ENABLE   5
 
#define V_RESPONSE_QUEUE_ENABLE(x)   ((x) << S_RESPONSE_QUEUE_ENABLE)
 
#define F_RESPONSE_QUEUE_ENABLE   V_RESPONSE_QUEUE_ENABLE(1U)
 
#define S_CMDQ_PRIORITY   6
 
#define M_CMDQ_PRIORITY   0x3
 
#define V_CMDQ_PRIORITY(x)   ((x) << S_CMDQ_PRIORITY)
 
#define G_CMDQ_PRIORITY(x)   (((x) >> S_CMDQ_PRIORITY) & M_CMDQ_PRIORITY)
 
#define S_DISABLE_CMDQ0_GTS   8
 
#define V_DISABLE_CMDQ0_GTS(x)   ((x) << S_DISABLE_CMDQ0_GTS)
 
#define F_DISABLE_CMDQ0_GTS   V_DISABLE_CMDQ0_GTS(1U)
 
#define S_DISABLE_CMDQ1_GTS   9
 
#define V_DISABLE_CMDQ1_GTS(x)   ((x) << S_DISABLE_CMDQ1_GTS)
 
#define F_DISABLE_CMDQ1_GTS   V_DISABLE_CMDQ1_GTS(1U)
 
#define S_DISABLE_FL0_GTS   10
 
#define V_DISABLE_FL0_GTS(x)   ((x) << S_DISABLE_FL0_GTS)
 
#define F_DISABLE_FL0_GTS   V_DISABLE_FL0_GTS(1U)
 
#define S_DISABLE_FL1_GTS   11
 
#define V_DISABLE_FL1_GTS(x)   ((x) << S_DISABLE_FL1_GTS)
 
#define F_DISABLE_FL1_GTS   V_DISABLE_FL1_GTS(1U)
 
#define S_ENABLE_BIG_ENDIAN   12
 
#define V_ENABLE_BIG_ENDIAN(x)   ((x) << S_ENABLE_BIG_ENDIAN)
 
#define F_ENABLE_BIG_ENDIAN   V_ENABLE_BIG_ENDIAN(1U)
 
#define S_FL_SELECTION_CRITERIA   13
 
#define V_FL_SELECTION_CRITERIA(x)   ((x) << S_FL_SELECTION_CRITERIA)
 
#define F_FL_SELECTION_CRITERIA   V_FL_SELECTION_CRITERIA(1U)
 
#define S_ISCSI_COALESCE   14
 
#define V_ISCSI_COALESCE(x)   ((x) << S_ISCSI_COALESCE)
 
#define F_ISCSI_COALESCE   V_ISCSI_COALESCE(1U)
 
#define S_RX_PKT_OFFSET   15
 
#define M_RX_PKT_OFFSET   0x7
 
#define V_RX_PKT_OFFSET(x)   ((x) << S_RX_PKT_OFFSET)
 
#define G_RX_PKT_OFFSET(x)   (((x) >> S_RX_PKT_OFFSET) & M_RX_PKT_OFFSET)
 
#define S_VLAN_XTRACT   18
 
#define V_VLAN_XTRACT(x)   ((x) << S_VLAN_XTRACT)
 
#define F_VLAN_XTRACT   V_VLAN_XTRACT(1U)
 
#define A_SG_DOORBELL   0x4
 
#define A_SG_CMD0BASELWR   0x8
 
#define A_SG_CMD0BASEUPR   0xc
 
#define A_SG_CMD1BASELWR   0x10
 
#define A_SG_CMD1BASEUPR   0x14
 
#define A_SG_FL0BASELWR   0x18
 
#define A_SG_FL0BASEUPR   0x1c
 
#define A_SG_FL1BASELWR   0x20
 
#define A_SG_FL1BASEUPR   0x24
 
#define A_SG_CMD0SIZE   0x28
 
#define S_CMDQ0_SIZE   0
 
#define M_CMDQ0_SIZE   0x1ffff
 
#define V_CMDQ0_SIZE(x)   ((x) << S_CMDQ0_SIZE)
 
#define G_CMDQ0_SIZE(x)   (((x) >> S_CMDQ0_SIZE) & M_CMDQ0_SIZE)
 
#define A_SG_FL0SIZE   0x2c
 
#define S_FL0_SIZE   0
 
#define M_FL0_SIZE   0x1ffff
 
#define V_FL0_SIZE(x)   ((x) << S_FL0_SIZE)
 
#define G_FL0_SIZE(x)   (((x) >> S_FL0_SIZE) & M_FL0_SIZE)
 
#define A_SG_RSPSIZE   0x30
 
#define S_RESPQ_SIZE   0
 
#define M_RESPQ_SIZE   0x1ffff
 
#define V_RESPQ_SIZE(x)   ((x) << S_RESPQ_SIZE)
 
#define G_RESPQ_SIZE(x)   (((x) >> S_RESPQ_SIZE) & M_RESPQ_SIZE)
 
#define A_SG_RSPBASELWR   0x34
 
#define A_SG_RSPBASEUPR   0x38
 
#define A_SG_FLTHRESHOLD   0x3c
 
#define S_FL_THRESHOLD   0
 
#define M_FL_THRESHOLD   0xffff
 
#define V_FL_THRESHOLD(x)   ((x) << S_FL_THRESHOLD)
 
#define G_FL_THRESHOLD(x)   (((x) >> S_FL_THRESHOLD) & M_FL_THRESHOLD)
 
#define A_SG_RSPQUEUECREDIT   0x40
 
#define S_RESPQ_CREDIT   0
 
#define M_RESPQ_CREDIT   0x1ffff
 
#define V_RESPQ_CREDIT(x)   ((x) << S_RESPQ_CREDIT)
 
#define G_RESPQ_CREDIT(x)   (((x) >> S_RESPQ_CREDIT) & M_RESPQ_CREDIT)
 
#define A_SG_SLEEPING   0x48
 
#define S_SLEEPING   0
 
#define M_SLEEPING   0xffff
 
#define V_SLEEPING(x)   ((x) << S_SLEEPING)
 
#define G_SLEEPING(x)   (((x) >> S_SLEEPING) & M_SLEEPING)
 
#define A_SG_INTRTIMER   0x4c
 
#define S_INTERRUPT_TIMER_COUNT   0
 
#define M_INTERRUPT_TIMER_COUNT   0xffffff
 
#define V_INTERRUPT_TIMER_COUNT(x)   ((x) << S_INTERRUPT_TIMER_COUNT)
 
#define G_INTERRUPT_TIMER_COUNT(x)   (((x) >> S_INTERRUPT_TIMER_COUNT) & M_INTERRUPT_TIMER_COUNT)
 
#define A_SG_CMD0PTR   0x50
 
#define S_CMDQ0_POINTER   0
 
#define M_CMDQ0_POINTER   0xffff
 
#define V_CMDQ0_POINTER(x)   ((x) << S_CMDQ0_POINTER)
 
#define G_CMDQ0_POINTER(x)   (((x) >> S_CMDQ0_POINTER) & M_CMDQ0_POINTER)
 
#define S_CURRENT_GENERATION_BIT   16
 
#define V_CURRENT_GENERATION_BIT(x)   ((x) << S_CURRENT_GENERATION_BIT)
 
#define F_CURRENT_GENERATION_BIT   V_CURRENT_GENERATION_BIT(1U)
 
#define A_SG_CMD1PTR   0x54
 
#define S_CMDQ1_POINTER   0
 
#define M_CMDQ1_POINTER   0xffff
 
#define V_CMDQ1_POINTER(x)   ((x) << S_CMDQ1_POINTER)
 
#define G_CMDQ1_POINTER(x)   (((x) >> S_CMDQ1_POINTER) & M_CMDQ1_POINTER)
 
#define A_SG_FL0PTR   0x58
 
#define S_FL0_POINTER   0
 
#define M_FL0_POINTER   0xffff
 
#define V_FL0_POINTER(x)   ((x) << S_FL0_POINTER)
 
#define G_FL0_POINTER(x)   (((x) >> S_FL0_POINTER) & M_FL0_POINTER)
 
#define A_SG_FL1PTR   0x5c
 
#define S_FL1_POINTER   0
 
#define M_FL1_POINTER   0xffff
 
#define V_FL1_POINTER(x)   ((x) << S_FL1_POINTER)
 
#define G_FL1_POINTER(x)   (((x) >> S_FL1_POINTER) & M_FL1_POINTER)
 
#define A_SG_VERSION   0x6c
 
#define S_DAY   0
 
#define M_DAY   0x1f
 
#define V_DAY(x)   ((x) << S_DAY)
 
#define G_DAY(x)   (((x) >> S_DAY) & M_DAY)
 
#define S_MONTH   5
 
#define M_MONTH   0xf
 
#define V_MONTH(x)   ((x) << S_MONTH)
 
#define G_MONTH(x)   (((x) >> S_MONTH) & M_MONTH)
 
#define A_SG_CMD1SIZE   0xb0
 
#define S_CMDQ1_SIZE   0
 
#define M_CMDQ1_SIZE   0x1ffff
 
#define V_CMDQ1_SIZE(x)   ((x) << S_CMDQ1_SIZE)
 
#define G_CMDQ1_SIZE(x)   (((x) >> S_CMDQ1_SIZE) & M_CMDQ1_SIZE)
 
#define A_SG_FL1SIZE   0xb4
 
#define S_FL1_SIZE   0
 
#define M_FL1_SIZE   0x1ffff
 
#define V_FL1_SIZE(x)   ((x) << S_FL1_SIZE)
 
#define G_FL1_SIZE(x)   (((x) >> S_FL1_SIZE) & M_FL1_SIZE)
 
#define A_SG_INT_ENABLE   0xb8
 
#define S_RESPQ_EXHAUSTED   0
 
#define V_RESPQ_EXHAUSTED(x)   ((x) << S_RESPQ_EXHAUSTED)
 
#define F_RESPQ_EXHAUSTED   V_RESPQ_EXHAUSTED(1U)
 
#define S_RESPQ_OVERFLOW   1
 
#define V_RESPQ_OVERFLOW(x)   ((x) << S_RESPQ_OVERFLOW)
 
#define F_RESPQ_OVERFLOW   V_RESPQ_OVERFLOW(1U)
 
#define S_FL_EXHAUSTED   2
 
#define V_FL_EXHAUSTED(x)   ((x) << S_FL_EXHAUSTED)
 
#define F_FL_EXHAUSTED   V_FL_EXHAUSTED(1U)
 
#define S_PACKET_TOO_BIG   3
 
#define V_PACKET_TOO_BIG(x)   ((x) << S_PACKET_TOO_BIG)
 
#define F_PACKET_TOO_BIG   V_PACKET_TOO_BIG(1U)
 
#define S_PACKET_MISMATCH   4
 
#define V_PACKET_MISMATCH(x)   ((x) << S_PACKET_MISMATCH)
 
#define F_PACKET_MISMATCH   V_PACKET_MISMATCH(1U)
 
#define A_SG_INT_CAUSE   0xbc
 
#define A_SG_RESPACCUTIMER   0xc0
 
#define A_MC3_CFG   0x100
 
#define S_CLK_ENABLE   0
 
#define V_CLK_ENABLE(x)   ((x) << S_CLK_ENABLE)
 
#define F_CLK_ENABLE   V_CLK_ENABLE(1U)
 
#define S_READY   1
 
#define V_READY(x)   ((x) << S_READY)
 
#define F_READY   V_READY(1U)
 
#define S_READ_TO_WRITE_DELAY   2
 
#define M_READ_TO_WRITE_DELAY   0x7
 
#define V_READ_TO_WRITE_DELAY(x)   ((x) << S_READ_TO_WRITE_DELAY)
 
#define G_READ_TO_WRITE_DELAY(x)   (((x) >> S_READ_TO_WRITE_DELAY) & M_READ_TO_WRITE_DELAY)
 
#define S_WRITE_TO_READ_DELAY   5
 
#define M_WRITE_TO_READ_DELAY   0x7
 
#define V_WRITE_TO_READ_DELAY(x)   ((x) << S_WRITE_TO_READ_DELAY)
 
#define G_WRITE_TO_READ_DELAY(x)   (((x) >> S_WRITE_TO_READ_DELAY) & M_WRITE_TO_READ_DELAY)
 
#define S_MC3_BANK_CYCLE   8
 
#define M_MC3_BANK_CYCLE   0xf
 
#define V_MC3_BANK_CYCLE(x)   ((x) << S_MC3_BANK_CYCLE)
 
#define G_MC3_BANK_CYCLE(x)   (((x) >> S_MC3_BANK_CYCLE) & M_MC3_BANK_CYCLE)
 
#define S_REFRESH_CYCLE   12
 
#define M_REFRESH_CYCLE   0xf
 
#define V_REFRESH_CYCLE(x)   ((x) << S_REFRESH_CYCLE)
 
#define G_REFRESH_CYCLE(x)   (((x) >> S_REFRESH_CYCLE) & M_REFRESH_CYCLE)
 
#define S_PRECHARGE_CYCLE   16
 
#define M_PRECHARGE_CYCLE   0x3
 
#define V_PRECHARGE_CYCLE(x)   ((x) << S_PRECHARGE_CYCLE)
 
#define G_PRECHARGE_CYCLE(x)   (((x) >> S_PRECHARGE_CYCLE) & M_PRECHARGE_CYCLE)
 
#define S_ACTIVE_TO_READ_WRITE_DELAY   18
 
#define V_ACTIVE_TO_READ_WRITE_DELAY(x)   ((x) << S_ACTIVE_TO_READ_WRITE_DELAY)
 
#define F_ACTIVE_TO_READ_WRITE_DELAY   V_ACTIVE_TO_READ_WRITE_DELAY(1U)
 
#define S_ACTIVE_TO_PRECHARGE_DELAY   19
 
#define M_ACTIVE_TO_PRECHARGE_DELAY   0x7
 
#define V_ACTIVE_TO_PRECHARGE_DELAY(x)   ((x) << S_ACTIVE_TO_PRECHARGE_DELAY)
 
#define G_ACTIVE_TO_PRECHARGE_DELAY(x)   (((x) >> S_ACTIVE_TO_PRECHARGE_DELAY) & M_ACTIVE_TO_PRECHARGE_DELAY)
 
#define S_WRITE_RECOVERY_DELAY   22
 
#define M_WRITE_RECOVERY_DELAY   0x3
 
#define V_WRITE_RECOVERY_DELAY(x)   ((x) << S_WRITE_RECOVERY_DELAY)
 
#define G_WRITE_RECOVERY_DELAY(x)   (((x) >> S_WRITE_RECOVERY_DELAY) & M_WRITE_RECOVERY_DELAY)
 
#define S_DENSITY   24
 
#define M_DENSITY   0x3
 
#define V_DENSITY(x)   ((x) << S_DENSITY)
 
#define G_DENSITY(x)   (((x) >> S_DENSITY) & M_DENSITY)
 
#define S_ORGANIZATION   26
 
#define V_ORGANIZATION(x)   ((x) << S_ORGANIZATION)
 
#define F_ORGANIZATION   V_ORGANIZATION(1U)
 
#define S_BANKS   27
 
#define V_BANKS(x)   ((x) << S_BANKS)
 
#define F_BANKS   V_BANKS(1U)
 
#define S_UNREGISTERED   28
 
#define V_UNREGISTERED(x)   ((x) << S_UNREGISTERED)
 
#define F_UNREGISTERED   V_UNREGISTERED(1U)
 
#define S_MC3_WIDTH   29
 
#define M_MC3_WIDTH   0x3
 
#define V_MC3_WIDTH(x)   ((x) << S_MC3_WIDTH)
 
#define G_MC3_WIDTH(x)   (((x) >> S_MC3_WIDTH) & M_MC3_WIDTH)
 
#define S_MC3_SLOW   31
 
#define V_MC3_SLOW(x)   ((x) << S_MC3_SLOW)
 
#define F_MC3_SLOW   V_MC3_SLOW(1U)
 
#define A_MC3_MODE   0x104
 
#define S_MC3_MODE   0
 
#define M_MC3_MODE   0x3fff
 
#define V_MC3_MODE(x)   ((x) << S_MC3_MODE)
 
#define G_MC3_MODE(x)   (((x) >> S_MC3_MODE) & M_MC3_MODE)
 
#define S_BUSY   31
 
#define V_BUSY(x)   ((x) << S_BUSY)
 
#define F_BUSY   V_BUSY(1U)
 
#define A_MC3_EXT_MODE   0x108
 
#define S_MC3_EXTENDED_MODE   0
 
#define M_MC3_EXTENDED_MODE   0x3fff
 
#define V_MC3_EXTENDED_MODE(x)   ((x) << S_MC3_EXTENDED_MODE)
 
#define G_MC3_EXTENDED_MODE(x)   (((x) >> S_MC3_EXTENDED_MODE) & M_MC3_EXTENDED_MODE)
 
#define A_MC3_PRECHARG   0x10c
 
#define A_MC3_REFRESH   0x110
 
#define S_REFRESH_ENABLE   0
 
#define V_REFRESH_ENABLE(x)   ((x) << S_REFRESH_ENABLE)
 
#define F_REFRESH_ENABLE   V_REFRESH_ENABLE(1U)
 
#define S_REFRESH_DIVISOR   1
 
#define M_REFRESH_DIVISOR   0x3fff
 
#define V_REFRESH_DIVISOR(x)   ((x) << S_REFRESH_DIVISOR)
 
#define G_REFRESH_DIVISOR(x)   (((x) >> S_REFRESH_DIVISOR) & M_REFRESH_DIVISOR)
 
#define A_MC3_STROBE   0x114
 
#define S_MASTER_DLL_RESET   0
 
#define V_MASTER_DLL_RESET(x)   ((x) << S_MASTER_DLL_RESET)
 
#define F_MASTER_DLL_RESET   V_MASTER_DLL_RESET(1U)
 
#define S_MASTER_DLL_TAP_COUNT   1
 
#define M_MASTER_DLL_TAP_COUNT   0xff
 
#define V_MASTER_DLL_TAP_COUNT(x)   ((x) << S_MASTER_DLL_TAP_COUNT)
 
#define G_MASTER_DLL_TAP_COUNT(x)   (((x) >> S_MASTER_DLL_TAP_COUNT) & M_MASTER_DLL_TAP_COUNT)
 
#define S_MASTER_DLL_LOCKED   9
 
#define V_MASTER_DLL_LOCKED(x)   ((x) << S_MASTER_DLL_LOCKED)
 
#define F_MASTER_DLL_LOCKED   V_MASTER_DLL_LOCKED(1U)
 
#define S_MASTER_DLL_MAX_TAP_COUNT   10
 
#define V_MASTER_DLL_MAX_TAP_COUNT(x)   ((x) << S_MASTER_DLL_MAX_TAP_COUNT)
 
#define F_MASTER_DLL_MAX_TAP_COUNT   V_MASTER_DLL_MAX_TAP_COUNT(1U)
 
#define S_MASTER_DLL_TAP_COUNT_OFFSET   11
 
#define M_MASTER_DLL_TAP_COUNT_OFFSET   0x3f
 
#define V_MASTER_DLL_TAP_COUNT_OFFSET(x)   ((x) << S_MASTER_DLL_TAP_COUNT_OFFSET)
 
#define G_MASTER_DLL_TAP_COUNT_OFFSET(x)   (((x) >> S_MASTER_DLL_TAP_COUNT_OFFSET) & M_MASTER_DLL_TAP_COUNT_OFFSET)
 
#define S_SLAVE_DLL_RESET   11
 
#define V_SLAVE_DLL_RESET(x)   ((x) << S_SLAVE_DLL_RESET)
 
#define F_SLAVE_DLL_RESET   V_SLAVE_DLL_RESET(1U)
 
#define S_SLAVE_DLL_DELTA   12
 
#define M_SLAVE_DLL_DELTA   0xf
 
#define V_SLAVE_DLL_DELTA(x)   ((x) << S_SLAVE_DLL_DELTA)
 
#define G_SLAVE_DLL_DELTA(x)   (((x) >> S_SLAVE_DLL_DELTA) & M_SLAVE_DLL_DELTA)
 
#define S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT   17
 
#define M_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT   0x3f
 
#define V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT(x)   ((x) << S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT)
 
#define G_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT(x)   (((x) >> S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT) & M_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT)
 
#define S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE   23
 
#define V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE(x)   ((x) << S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE)
 
#define F_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE   V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE(1U)
 
#define S_SLAVE_DELAY_LINE_TAP_COUNT   24
 
#define M_SLAVE_DELAY_LINE_TAP_COUNT   0x3f
 
#define V_SLAVE_DELAY_LINE_TAP_COUNT(x)   ((x) << S_SLAVE_DELAY_LINE_TAP_COUNT)
 
#define G_SLAVE_DELAY_LINE_TAP_COUNT(x)   (((x) >> S_SLAVE_DELAY_LINE_TAP_COUNT) & M_SLAVE_DELAY_LINE_TAP_COUNT)
 
#define A_MC3_ECC_CNTL   0x118
 
#define S_ECC_GENERATION_ENABLE   0
 
#define V_ECC_GENERATION_ENABLE(x)   ((x) << S_ECC_GENERATION_ENABLE)
 
#define F_ECC_GENERATION_ENABLE   V_ECC_GENERATION_ENABLE(1U)
 
#define S_ECC_CHECK_ENABLE   1
 
#define V_ECC_CHECK_ENABLE(x)   ((x) << S_ECC_CHECK_ENABLE)
 
#define F_ECC_CHECK_ENABLE   V_ECC_CHECK_ENABLE(1U)
 
#define S_CORRECTABLE_ERROR_COUNT   2
 
#define M_CORRECTABLE_ERROR_COUNT   0xff
 
#define V_CORRECTABLE_ERROR_COUNT(x)   ((x) << S_CORRECTABLE_ERROR_COUNT)
 
#define G_CORRECTABLE_ERROR_COUNT(x)   (((x) >> S_CORRECTABLE_ERROR_COUNT) & M_CORRECTABLE_ERROR_COUNT)
 
#define S_UNCORRECTABLE_ERROR_COUNT   10
 
#define M_UNCORRECTABLE_ERROR_COUNT   0xff
 
#define V_UNCORRECTABLE_ERROR_COUNT(x)   ((x) << S_UNCORRECTABLE_ERROR_COUNT)
 
#define G_UNCORRECTABLE_ERROR_COUNT(x)   (((x) >> S_UNCORRECTABLE_ERROR_COUNT) & M_UNCORRECTABLE_ERROR_COUNT)
 
#define A_MC3_CE_ADDR   0x11c
 
#define S_MC3_CE_ADDR   4
 
#define M_MC3_CE_ADDR   0xfffffff
 
#define V_MC3_CE_ADDR(x)   ((x) << S_MC3_CE_ADDR)
 
#define G_MC3_CE_ADDR(x)   (((x) >> S_MC3_CE_ADDR) & M_MC3_CE_ADDR)
 
#define A_MC3_CE_DATA0   0x120
 
#define A_MC3_CE_DATA1   0x124
 
#define A_MC3_CE_DATA2   0x128
 
#define A_MC3_CE_DATA3   0x12c
 
#define A_MC3_CE_DATA4   0x130
 
#define A_MC3_UE_ADDR   0x134
 
#define S_MC3_UE_ADDR   4
 
#define M_MC3_UE_ADDR   0xfffffff
 
#define V_MC3_UE_ADDR(x)   ((x) << S_MC3_UE_ADDR)
 
#define G_MC3_UE_ADDR(x)   (((x) >> S_MC3_UE_ADDR) & M_MC3_UE_ADDR)
 
#define A_MC3_UE_DATA0   0x138
 
#define A_MC3_UE_DATA1   0x13c
 
#define A_MC3_UE_DATA2   0x140
 
#define A_MC3_UE_DATA3   0x144
 
#define A_MC3_UE_DATA4   0x148
 
#define A_MC3_BD_ADDR   0x14c
 
#define A_MC3_BD_DATA0   0x150
 
#define A_MC3_BD_DATA1   0x154
 
#define A_MC3_BD_DATA2   0x158
 
#define A_MC3_BD_DATA3   0x15c
 
#define A_MC3_BD_DATA4   0x160
 
#define A_MC3_BD_OP   0x164
 
#define S_BACK_DOOR_OPERATION   0
 
#define V_BACK_DOOR_OPERATION(x)   ((x) << S_BACK_DOOR_OPERATION)
 
#define F_BACK_DOOR_OPERATION   V_BACK_DOOR_OPERATION(1U)
 
#define A_MC3_BIST_ADDR_BEG   0x168
 
#define A_MC3_BIST_ADDR_END   0x16c
 
#define A_MC3_BIST_DATA   0x170
 
#define A_MC3_BIST_OP   0x174
 
#define S_OP   0
 
#define V_OP(x)   ((x) << S_OP)
 
#define F_OP   V_OP(1U)
 
#define S_DATA_PATTERN   1
 
#define M_DATA_PATTERN   0x3
 
#define V_DATA_PATTERN(x)   ((x) << S_DATA_PATTERN)
 
#define G_DATA_PATTERN(x)   (((x) >> S_DATA_PATTERN) & M_DATA_PATTERN)
 
#define S_CONTINUOUS   3
 
#define V_CONTINUOUS(x)   ((x) << S_CONTINUOUS)
 
#define F_CONTINUOUS   V_CONTINUOUS(1U)
 
#define A_MC3_INT_ENABLE   0x178
 
#define S_MC3_CORR_ERR   0
 
#define V_MC3_CORR_ERR(x)   ((x) << S_MC3_CORR_ERR)
 
#define F_MC3_CORR_ERR   V_MC3_CORR_ERR(1U)
 
#define S_MC3_UNCORR_ERR   1
 
#define V_MC3_UNCORR_ERR(x)   ((x) << S_MC3_UNCORR_ERR)
 
#define F_MC3_UNCORR_ERR   V_MC3_UNCORR_ERR(1U)
 
#define S_MC3_PARITY_ERR   2
 
#define M_MC3_PARITY_ERR   0xff
 
#define V_MC3_PARITY_ERR(x)   ((x) << S_MC3_PARITY_ERR)
 
#define G_MC3_PARITY_ERR(x)   (((x) >> S_MC3_PARITY_ERR) & M_MC3_PARITY_ERR)
 
#define S_MC3_ADDR_ERR   10
 
#define V_MC3_ADDR_ERR(x)   ((x) << S_MC3_ADDR_ERR)
 
#define F_MC3_ADDR_ERR   V_MC3_ADDR_ERR(1U)
 
#define A_MC3_INT_CAUSE   0x17c
 
#define A_MC4_CFG   0x180
 
#define S_POWER_UP   0
 
#define V_POWER_UP(x)   ((x) << S_POWER_UP)
 
#define F_POWER_UP   V_POWER_UP(1U)
 
#define S_MC4_BANK_CYCLE   8
 
#define M_MC4_BANK_CYCLE   0x7
 
#define V_MC4_BANK_CYCLE(x)   ((x) << S_MC4_BANK_CYCLE)
 
#define G_MC4_BANK_CYCLE(x)   (((x) >> S_MC4_BANK_CYCLE) & M_MC4_BANK_CYCLE)
 
#define S_MC4_NARROW   24
 
#define V_MC4_NARROW(x)   ((x) << S_MC4_NARROW)
 
#define F_MC4_NARROW   V_MC4_NARROW(1U)
 
#define S_MC4_SLOW   25
 
#define V_MC4_SLOW(x)   ((x) << S_MC4_SLOW)
 
#define F_MC4_SLOW   V_MC4_SLOW(1U)
 
#define S_MC4A_WIDTH   24
 
#define M_MC4A_WIDTH   0x3
 
#define V_MC4A_WIDTH(x)   ((x) << S_MC4A_WIDTH)
 
#define G_MC4A_WIDTH(x)   (((x) >> S_MC4A_WIDTH) & M_MC4A_WIDTH)
 
#define S_MC4A_SLOW   26
 
#define V_MC4A_SLOW(x)   ((x) << S_MC4A_SLOW)
 
#define F_MC4A_SLOW   V_MC4A_SLOW(1U)
 
#define A_MC4_MODE   0x184
 
#define S_MC4_MODE   0
 
#define M_MC4_MODE   0x7fff
 
#define V_MC4_MODE(x)   ((x) << S_MC4_MODE)
 
#define G_MC4_MODE(x)   (((x) >> S_MC4_MODE) & M_MC4_MODE)
 
#define A_MC4_EXT_MODE   0x188
 
#define S_MC4_EXTENDED_MODE   0
 
#define M_MC4_EXTENDED_MODE   0x7fff
 
#define V_MC4_EXTENDED_MODE(x)   ((x) << S_MC4_EXTENDED_MODE)
 
#define G_MC4_EXTENDED_MODE(x)   (((x) >> S_MC4_EXTENDED_MODE) & M_MC4_EXTENDED_MODE)
 
#define A_MC4_REFRESH   0x190
 
#define A_MC4_STROBE   0x194
 
#define A_MC4_ECC_CNTL   0x198
 
#define A_MC4_CE_ADDR   0x19c
 
#define S_MC4_CE_ADDR   4
 
#define M_MC4_CE_ADDR   0xffffff
 
#define V_MC4_CE_ADDR(x)   ((x) << S_MC4_CE_ADDR)
 
#define G_MC4_CE_ADDR(x)   (((x) >> S_MC4_CE_ADDR) & M_MC4_CE_ADDR)
 
#define A_MC4_CE_DATA0   0x1a0
 
#define A_MC4_CE_DATA1   0x1a4
 
#define A_MC4_CE_DATA2   0x1a8
 
#define A_MC4_CE_DATA3   0x1ac
 
#define A_MC4_CE_DATA4   0x1b0
 
#define A_MC4_UE_ADDR   0x1b4
 
#define S_MC4_UE_ADDR   4
 
#define M_MC4_UE_ADDR   0xffffff
 
#define V_MC4_UE_ADDR(x)   ((x) << S_MC4_UE_ADDR)
 
#define G_MC4_UE_ADDR(x)   (((x) >> S_MC4_UE_ADDR) & M_MC4_UE_ADDR)
 
#define A_MC4_UE_DATA0   0x1b8
 
#define A_MC4_UE_DATA1   0x1bc
 
#define A_MC4_UE_DATA2   0x1c0
 
#define A_MC4_UE_DATA3   0x1c4
 
#define A_MC4_UE_DATA4   0x1c8
 
#define A_MC4_BD_ADDR   0x1cc
 
#define S_MC4_BACK_DOOR_ADDR   0
 
#define M_MC4_BACK_DOOR_ADDR   0xfffffff
 
#define V_MC4_BACK_DOOR_ADDR(x)   ((x) << S_MC4_BACK_DOOR_ADDR)
 
#define G_MC4_BACK_DOOR_ADDR(x)   (((x) >> S_MC4_BACK_DOOR_ADDR) & M_MC4_BACK_DOOR_ADDR)
 
#define A_MC4_BD_DATA0   0x1d0
 
#define A_MC4_BD_DATA1   0x1d4
 
#define A_MC4_BD_DATA2   0x1d8
 
#define A_MC4_BD_DATA3   0x1dc
 
#define A_MC4_BD_DATA4   0x1e0
 
#define A_MC4_BD_OP   0x1e4
 
#define S_OPERATION   0
 
#define V_OPERATION(x)   ((x) << S_OPERATION)
 
#define F_OPERATION   V_OPERATION(1U)
 
#define A_MC4_BIST_ADDR_BEG   0x1e8
 
#define A_MC4_BIST_ADDR_END   0x1ec
 
#define A_MC4_BIST_DATA   0x1f0
 
#define A_MC4_BIST_OP   0x1f4
 
#define A_MC4_INT_ENABLE   0x1f8
 
#define S_MC4_CORR_ERR   0
 
#define V_MC4_CORR_ERR(x)   ((x) << S_MC4_CORR_ERR)
 
#define F_MC4_CORR_ERR   V_MC4_CORR_ERR(1U)
 
#define S_MC4_UNCORR_ERR   1
 
#define V_MC4_UNCORR_ERR(x)   ((x) << S_MC4_UNCORR_ERR)
 
#define F_MC4_UNCORR_ERR   V_MC4_UNCORR_ERR(1U)
 
#define S_MC4_ADDR_ERR   2
 
#define V_MC4_ADDR_ERR(x)   ((x) << S_MC4_ADDR_ERR)
 
#define F_MC4_ADDR_ERR   V_MC4_ADDR_ERR(1U)
 
#define A_MC4_INT_CAUSE   0x1fc
 
#define A_TPI_ADDR   0x280
 
#define S_TPI_ADDRESS   0
 
#define M_TPI_ADDRESS   0xffffff
 
#define V_TPI_ADDRESS(x)   ((x) << S_TPI_ADDRESS)
 
#define G_TPI_ADDRESS(x)   (((x) >> S_TPI_ADDRESS) & M_TPI_ADDRESS)
 
#define A_TPI_WR_DATA   0x284
 
#define A_TPI_RD_DATA   0x288
 
#define A_TPI_CSR   0x28c
 
#define S_TPIWR   0
 
#define V_TPIWR(x)   ((x) << S_TPIWR)
 
#define F_TPIWR   V_TPIWR(1U)
 
#define S_TPIRDY   1
 
#define V_TPIRDY(x)   ((x) << S_TPIRDY)
 
#define F_TPIRDY   V_TPIRDY(1U)
 
#define S_INT_DIR   31
 
#define V_INT_DIR(x)   ((x) << S_INT_DIR)
 
#define F_INT_DIR   V_INT_DIR(1U)
 
#define A_TPI_PAR   0x29c
 
#define S_TPIPAR   0
 
#define M_TPIPAR   0x7f
 
#define V_TPIPAR(x)   ((x) << S_TPIPAR)
 
#define G_TPIPAR(x)   (((x) >> S_TPIPAR) & M_TPIPAR)
 
#define A_TP_IN_CONFIG   0x300
 
#define S_TP_IN_CSPI_TUNNEL   0
 
#define V_TP_IN_CSPI_TUNNEL(x)   ((x) << S_TP_IN_CSPI_TUNNEL)
 
#define F_TP_IN_CSPI_TUNNEL   V_TP_IN_CSPI_TUNNEL(1U)
 
#define S_TP_IN_CSPI_ETHERNET   1
 
#define V_TP_IN_CSPI_ETHERNET(x)   ((x) << S_TP_IN_CSPI_ETHERNET)
 
#define F_TP_IN_CSPI_ETHERNET   V_TP_IN_CSPI_ETHERNET(1U)
 
#define S_TP_IN_CSPI_CPL   3
 
#define V_TP_IN_CSPI_CPL(x)   ((x) << S_TP_IN_CSPI_CPL)
 
#define F_TP_IN_CSPI_CPL   V_TP_IN_CSPI_CPL(1U)
 
#define S_TP_IN_CSPI_POS   4
 
#define V_TP_IN_CSPI_POS(x)   ((x) << S_TP_IN_CSPI_POS)
 
#define F_TP_IN_CSPI_POS   V_TP_IN_CSPI_POS(1U)
 
#define S_TP_IN_CSPI_CHECK_IP_CSUM   5
 
#define V_TP_IN_CSPI_CHECK_IP_CSUM(x)   ((x) << S_TP_IN_CSPI_CHECK_IP_CSUM)
 
#define F_TP_IN_CSPI_CHECK_IP_CSUM   V_TP_IN_CSPI_CHECK_IP_CSUM(1U)
 
#define S_TP_IN_CSPI_CHECK_TCP_CSUM   6
 
#define V_TP_IN_CSPI_CHECK_TCP_CSUM(x)   ((x) << S_TP_IN_CSPI_CHECK_TCP_CSUM)
 
#define F_TP_IN_CSPI_CHECK_TCP_CSUM   V_TP_IN_CSPI_CHECK_TCP_CSUM(1U)
 
#define S_TP_IN_ESPI_TUNNEL   7
 
#define V_TP_IN_ESPI_TUNNEL(x)   ((x) << S_TP_IN_ESPI_TUNNEL)
 
#define F_TP_IN_ESPI_TUNNEL   V_TP_IN_ESPI_TUNNEL(1U)
 
#define S_TP_IN_ESPI_ETHERNET   8
 
#define V_TP_IN_ESPI_ETHERNET(x)   ((x) << S_TP_IN_ESPI_ETHERNET)
 
#define F_TP_IN_ESPI_ETHERNET   V_TP_IN_ESPI_ETHERNET(1U)
 
#define S_TP_IN_ESPI_CPL   10
 
#define V_TP_IN_ESPI_CPL(x)   ((x) << S_TP_IN_ESPI_CPL)
 
#define F_TP_IN_ESPI_CPL   V_TP_IN_ESPI_CPL(1U)
 
#define S_TP_IN_ESPI_POS   11
 
#define V_TP_IN_ESPI_POS(x)   ((x) << S_TP_IN_ESPI_POS)
 
#define F_TP_IN_ESPI_POS   V_TP_IN_ESPI_POS(1U)
 
#define S_TP_IN_ESPI_CHECK_IP_CSUM   12
 
#define V_TP_IN_ESPI_CHECK_IP_CSUM(x)   ((x) << S_TP_IN_ESPI_CHECK_IP_CSUM)
 
#define F_TP_IN_ESPI_CHECK_IP_CSUM   V_TP_IN_ESPI_CHECK_IP_CSUM(1U)
 
#define S_TP_IN_ESPI_CHECK_TCP_CSUM   13
 
#define V_TP_IN_ESPI_CHECK_TCP_CSUM(x)   ((x) << S_TP_IN_ESPI_CHECK_TCP_CSUM)
 
#define F_TP_IN_ESPI_CHECK_TCP_CSUM   V_TP_IN_ESPI_CHECK_TCP_CSUM(1U)
 
#define S_OFFLOAD_DISABLE   14
 
#define V_OFFLOAD_DISABLE(x)   ((x) << S_OFFLOAD_DISABLE)
 
#define F_OFFLOAD_DISABLE   V_OFFLOAD_DISABLE(1U)
 
#define A_TP_OUT_CONFIG   0x304
 
#define S_TP_OUT_C_ETH   0
 
#define V_TP_OUT_C_ETH(x)   ((x) << S_TP_OUT_C_ETH)
 
#define F_TP_OUT_C_ETH   V_TP_OUT_C_ETH(1U)
 
#define S_TP_OUT_CSPI_CPL   2
 
#define V_TP_OUT_CSPI_CPL(x)   ((x) << S_TP_OUT_CSPI_CPL)
 
#define F_TP_OUT_CSPI_CPL   V_TP_OUT_CSPI_CPL(1U)
 
#define S_TP_OUT_CSPI_POS   3
 
#define V_TP_OUT_CSPI_POS(x)   ((x) << S_TP_OUT_CSPI_POS)
 
#define F_TP_OUT_CSPI_POS   V_TP_OUT_CSPI_POS(1U)
 
#define S_TP_OUT_CSPI_GENERATE_IP_CSUM   4
 
#define V_TP_OUT_CSPI_GENERATE_IP_CSUM(x)   ((x) << S_TP_OUT_CSPI_GENERATE_IP_CSUM)
 
#define F_TP_OUT_CSPI_GENERATE_IP_CSUM   V_TP_OUT_CSPI_GENERATE_IP_CSUM(1U)
 
#define S_TP_OUT_CSPI_GENERATE_TCP_CSUM   5
 
#define V_TP_OUT_CSPI_GENERATE_TCP_CSUM(x)   ((x) << S_TP_OUT_CSPI_GENERATE_TCP_CSUM)
 
#define F_TP_OUT_CSPI_GENERATE_TCP_CSUM   V_TP_OUT_CSPI_GENERATE_TCP_CSUM(1U)
 
#define S_TP_OUT_ESPI_ETHERNET   6
 
#define V_TP_OUT_ESPI_ETHERNET(x)   ((x) << S_TP_OUT_ESPI_ETHERNET)
 
#define F_TP_OUT_ESPI_ETHERNET   V_TP_OUT_ESPI_ETHERNET(1U)
 
#define S_TP_OUT_ESPI_TAG_ETHERNET   7
 
#define V_TP_OUT_ESPI_TAG_ETHERNET(x)   ((x) << S_TP_OUT_ESPI_TAG_ETHERNET)
 
#define F_TP_OUT_ESPI_TAG_ETHERNET   V_TP_OUT_ESPI_TAG_ETHERNET(1U)
 
#define S_TP_OUT_ESPI_CPL   8
 
#define V_TP_OUT_ESPI_CPL(x)   ((x) << S_TP_OUT_ESPI_CPL)
 
#define F_TP_OUT_ESPI_CPL   V_TP_OUT_ESPI_CPL(1U)
 
#define S_TP_OUT_ESPI_POS   9
 
#define V_TP_OUT_ESPI_POS(x)   ((x) << S_TP_OUT_ESPI_POS)
 
#define F_TP_OUT_ESPI_POS   V_TP_OUT_ESPI_POS(1U)
 
#define S_TP_OUT_ESPI_GENERATE_IP_CSUM   10
 
#define V_TP_OUT_ESPI_GENERATE_IP_CSUM(x)   ((x) << S_TP_OUT_ESPI_GENERATE_IP_CSUM)
 
#define F_TP_OUT_ESPI_GENERATE_IP_CSUM   V_TP_OUT_ESPI_GENERATE_IP_CSUM(1U)
 
#define S_TP_OUT_ESPI_GENERATE_TCP_CSUM   11
 
#define V_TP_OUT_ESPI_GENERATE_TCP_CSUM(x)   ((x) << S_TP_OUT_ESPI_GENERATE_TCP_CSUM)
 
#define F_TP_OUT_ESPI_GENERATE_TCP_CSUM   V_TP_OUT_ESPI_GENERATE_TCP_CSUM(1U)
 
#define A_TP_GLOBAL_CONFIG   0x308
 
#define S_IP_TTL   0
 
#define M_IP_TTL   0xff
 
#define V_IP_TTL(x)   ((x) << S_IP_TTL)
 
#define G_IP_TTL(x)   (((x) >> S_IP_TTL) & M_IP_TTL)
 
#define S_TCAM_SERVER_REGION_USAGE   8
 
#define M_TCAM_SERVER_REGION_USAGE   0x3
 
#define V_TCAM_SERVER_REGION_USAGE(x)   ((x) << S_TCAM_SERVER_REGION_USAGE)
 
#define G_TCAM_SERVER_REGION_USAGE(x)   (((x) >> S_TCAM_SERVER_REGION_USAGE) & M_TCAM_SERVER_REGION_USAGE)
 
#define S_QOS_MAPPING   10
 
#define V_QOS_MAPPING(x)   ((x) << S_QOS_MAPPING)
 
#define F_QOS_MAPPING   V_QOS_MAPPING(1U)
 
#define S_TCP_CSUM   11
 
#define V_TCP_CSUM(x)   ((x) << S_TCP_CSUM)
 
#define F_TCP_CSUM   V_TCP_CSUM(1U)
 
#define S_UDP_CSUM   12
 
#define V_UDP_CSUM(x)   ((x) << S_UDP_CSUM)
 
#define F_UDP_CSUM   V_UDP_CSUM(1U)
 
#define S_IP_CSUM   13
 
#define V_IP_CSUM(x)   ((x) << S_IP_CSUM)
 
#define F_IP_CSUM   V_IP_CSUM(1U)
 
#define S_IP_ID_SPLIT   14
 
#define V_IP_ID_SPLIT(x)   ((x) << S_IP_ID_SPLIT)
 
#define F_IP_ID_SPLIT   V_IP_ID_SPLIT(1U)
 
#define S_PATH_MTU   15
 
#define V_PATH_MTU(x)   ((x) << S_PATH_MTU)
 
#define F_PATH_MTU   V_PATH_MTU(1U)
 
#define S_5TUPLE_LOOKUP   17
 
#define M_5TUPLE_LOOKUP   0x3
 
#define V_5TUPLE_LOOKUP(x)   ((x) << S_5TUPLE_LOOKUP)
 
#define G_5TUPLE_LOOKUP(x)   (((x) >> S_5TUPLE_LOOKUP) & M_5TUPLE_LOOKUP)
 
#define S_IP_FRAGMENT_DROP   19
 
#define V_IP_FRAGMENT_DROP(x)   ((x) << S_IP_FRAGMENT_DROP)
 
#define F_IP_FRAGMENT_DROP   V_IP_FRAGMENT_DROP(1U)
 
#define S_PING_DROP   20
 
#define V_PING_DROP(x)   ((x) << S_PING_DROP)
 
#define F_PING_DROP   V_PING_DROP(1U)
 
#define S_PROTECT_MODE   21
 
#define V_PROTECT_MODE(x)   ((x) << S_PROTECT_MODE)
 
#define F_PROTECT_MODE   V_PROTECT_MODE(1U)
 
#define S_SYN_COOKIE_ALGORITHM   22
 
#define V_SYN_COOKIE_ALGORITHM(x)   ((x) << S_SYN_COOKIE_ALGORITHM)
 
#define F_SYN_COOKIE_ALGORITHM   V_SYN_COOKIE_ALGORITHM(1U)
 
#define S_ATTACK_FILTER   23
 
#define V_ATTACK_FILTER(x)   ((x) << S_ATTACK_FILTER)
 
#define F_ATTACK_FILTER   V_ATTACK_FILTER(1U)
 
#define S_INTERFACE_TYPE   24
 
#define V_INTERFACE_TYPE(x)   ((x) << S_INTERFACE_TYPE)
 
#define F_INTERFACE_TYPE   V_INTERFACE_TYPE(1U)
 
#define S_DISABLE_RX_FLOW_CONTROL   25
 
#define V_DISABLE_RX_FLOW_CONTROL(x)   ((x) << S_DISABLE_RX_FLOW_CONTROL)
 
#define F_DISABLE_RX_FLOW_CONTROL   V_DISABLE_RX_FLOW_CONTROL(1U)
 
#define S_SYN_COOKIE_PARAMETER   26
 
#define M_SYN_COOKIE_PARAMETER   0x3f
 
#define V_SYN_COOKIE_PARAMETER(x)   ((x) << S_SYN_COOKIE_PARAMETER)
 
#define G_SYN_COOKIE_PARAMETER(x)   (((x) >> S_SYN_COOKIE_PARAMETER) & M_SYN_COOKIE_PARAMETER)
 
#define A_TP_GLOBAL_RX_CREDITS   0x30c
 
#define A_TP_CM_SIZE   0x310
 
#define A_TP_CM_MM_BASE   0x314
 
#define S_CM_MEMMGR_BASE   0
 
#define M_CM_MEMMGR_BASE   0xfffffff
 
#define V_CM_MEMMGR_BASE(x)   ((x) << S_CM_MEMMGR_BASE)
 
#define G_CM_MEMMGR_BASE(x)   (((x) >> S_CM_MEMMGR_BASE) & M_CM_MEMMGR_BASE)
 
#define A_TP_CM_TIMER_BASE   0x318
 
#define S_CM_TIMER_BASE   0
 
#define M_CM_TIMER_BASE   0xfffffff
 
#define V_CM_TIMER_BASE(x)   ((x) << S_CM_TIMER_BASE)
 
#define G_CM_TIMER_BASE(x)   (((x) >> S_CM_TIMER_BASE) & M_CM_TIMER_BASE)
 
#define A_TP_PM_SIZE   0x31c
 
#define A_TP_PM_TX_BASE   0x320
 
#define A_TP_PM_DEFRAG_BASE   0x324
 
#define A_TP_PM_RX_BASE   0x328
 
#define A_TP_PM_RX_PG_SIZE   0x32c
 
#define A_TP_PM_RX_MAX_PGS   0x330
 
#define A_TP_PM_TX_PG_SIZE   0x334
 
#define A_TP_PM_TX_MAX_PGS   0x338
 
#define A_TP_TCP_OPTIONS   0x340
 
#define S_TIMESTAMP   0
 
#define M_TIMESTAMP   0x3
 
#define V_TIMESTAMP(x)   ((x) << S_TIMESTAMP)
 
#define G_TIMESTAMP(x)   (((x) >> S_TIMESTAMP) & M_TIMESTAMP)
 
#define S_WINDOW_SCALE   2
 
#define M_WINDOW_SCALE   0x3
 
#define V_WINDOW_SCALE(x)   ((x) << S_WINDOW_SCALE)
 
#define G_WINDOW_SCALE(x)   (((x) >> S_WINDOW_SCALE) & M_WINDOW_SCALE)
 
#define S_SACK   4
 
#define M_SACK   0x3
 
#define V_SACK(x)   ((x) << S_SACK)
 
#define G_SACK(x)   (((x) >> S_SACK) & M_SACK)
 
#define S_ECN   6
 
#define M_ECN   0x3
 
#define V_ECN(x)   ((x) << S_ECN)
 
#define G_ECN(x)   (((x) >> S_ECN) & M_ECN)
 
#define S_SACK_ALGORITHM   8
 
#define M_SACK_ALGORITHM   0x3
 
#define V_SACK_ALGORITHM(x)   ((x) << S_SACK_ALGORITHM)
 
#define G_SACK_ALGORITHM(x)   (((x) >> S_SACK_ALGORITHM) & M_SACK_ALGORITHM)
 
#define S_MSS   10
 
#define V_MSS(x)   ((x) << S_MSS)
 
#define F_MSS   V_MSS(1U)
 
#define S_DEFAULT_PEER_MSS   16
 
#define M_DEFAULT_PEER_MSS   0xffff
 
#define V_DEFAULT_PEER_MSS(x)   ((x) << S_DEFAULT_PEER_MSS)
 
#define G_DEFAULT_PEER_MSS(x)   (((x) >> S_DEFAULT_PEER_MSS) & M_DEFAULT_PEER_MSS)
 
#define A_TP_DACK_CONFIG   0x344
 
#define S_DACK_MODE   0
 
#define V_DACK_MODE(x)   ((x) << S_DACK_MODE)
 
#define F_DACK_MODE   V_DACK_MODE(1U)
 
#define S_DACK_AUTO_MGMT   1
 
#define V_DACK_AUTO_MGMT(x)   ((x) << S_DACK_AUTO_MGMT)
 
#define F_DACK_AUTO_MGMT   V_DACK_AUTO_MGMT(1U)
 
#define S_DACK_AUTO_CAREFUL   2
 
#define V_DACK_AUTO_CAREFUL(x)   ((x) << S_DACK_AUTO_CAREFUL)
 
#define F_DACK_AUTO_CAREFUL   V_DACK_AUTO_CAREFUL(1U)
 
#define S_DACK_MSS_SELECTOR   3
 
#define M_DACK_MSS_SELECTOR   0x3
 
#define V_DACK_MSS_SELECTOR(x)   ((x) << S_DACK_MSS_SELECTOR)
 
#define G_DACK_MSS_SELECTOR(x)   (((x) >> S_DACK_MSS_SELECTOR) & M_DACK_MSS_SELECTOR)
 
#define S_DACK_BYTE_THRESHOLD   5
 
#define M_DACK_BYTE_THRESHOLD   0xfffff
 
#define V_DACK_BYTE_THRESHOLD(x)   ((x) << S_DACK_BYTE_THRESHOLD)
 
#define G_DACK_BYTE_THRESHOLD(x)   (((x) >> S_DACK_BYTE_THRESHOLD) & M_DACK_BYTE_THRESHOLD)
 
#define A_TP_PC_CONFIG   0x348
 
#define S_TP_ACCESS_LATENCY   0
 
#define M_TP_ACCESS_LATENCY   0xf
 
#define V_TP_ACCESS_LATENCY(x)   ((x) << S_TP_ACCESS_LATENCY)
 
#define G_TP_ACCESS_LATENCY(x)   (((x) >> S_TP_ACCESS_LATENCY) & M_TP_ACCESS_LATENCY)
 
#define S_HELD_FIN_DISABLE   4
 
#define V_HELD_FIN_DISABLE(x)   ((x) << S_HELD_FIN_DISABLE)
 
#define F_HELD_FIN_DISABLE   V_HELD_FIN_DISABLE(1U)
 
#define S_DDP_FC_ENABLE   5
 
#define V_DDP_FC_ENABLE(x)   ((x) << S_DDP_FC_ENABLE)
 
#define F_DDP_FC_ENABLE   V_DDP_FC_ENABLE(1U)
 
#define S_RDMA_ERR_ENABLE   6
 
#define V_RDMA_ERR_ENABLE(x)   ((x) << S_RDMA_ERR_ENABLE)
 
#define F_RDMA_ERR_ENABLE   V_RDMA_ERR_ENABLE(1U)
 
#define S_FAST_PDU_DELIVERY   7
 
#define V_FAST_PDU_DELIVERY(x)   ((x) << S_FAST_PDU_DELIVERY)
 
#define F_FAST_PDU_DELIVERY   V_FAST_PDU_DELIVERY(1U)
 
#define S_CLEAR_FIN   8
 
#define V_CLEAR_FIN(x)   ((x) << S_CLEAR_FIN)
 
#define F_CLEAR_FIN   V_CLEAR_FIN(1U)
 
#define S_DIS_TX_FILL_WIN_PUSH   12
 
#define V_DIS_TX_FILL_WIN_PUSH(x)   ((x) << S_DIS_TX_FILL_WIN_PUSH)
 
#define F_DIS_TX_FILL_WIN_PUSH   V_DIS_TX_FILL_WIN_PUSH(1U)
 
#define S_TP_PC_REV   30
 
#define M_TP_PC_REV   0x3
 
#define V_TP_PC_REV(x)   ((x) << S_TP_PC_REV)
 
#define G_TP_PC_REV(x)   (((x) >> S_TP_PC_REV) & M_TP_PC_REV)
 
#define A_TP_BACKOFF0   0x350
 
#define S_ELEMENT0   0
 
#define M_ELEMENT0   0xff
 
#define V_ELEMENT0(x)   ((x) << S_ELEMENT0)
 
#define G_ELEMENT0(x)   (((x) >> S_ELEMENT0) & M_ELEMENT0)
 
#define S_ELEMENT1   8
 
#define M_ELEMENT1   0xff
 
#define V_ELEMENT1(x)   ((x) << S_ELEMENT1)
 
#define G_ELEMENT1(x)   (((x) >> S_ELEMENT1) & M_ELEMENT1)
 
#define S_ELEMENT2   16
 
#define M_ELEMENT2   0xff
 
#define V_ELEMENT2(x)   ((x) << S_ELEMENT2)
 
#define G_ELEMENT2(x)   (((x) >> S_ELEMENT2) & M_ELEMENT2)
 
#define S_ELEMENT3   24
 
#define M_ELEMENT3   0xff
 
#define V_ELEMENT3(x)   ((x) << S_ELEMENT3)
 
#define G_ELEMENT3(x)   (((x) >> S_ELEMENT3) & M_ELEMENT3)
 
#define A_TP_BACKOFF1   0x354
 
#define A_TP_BACKOFF2   0x358
 
#define A_TP_BACKOFF3   0x35c
 
#define A_TP_PARA_REG0   0x360
 
#define S_VAR_MULT   0
 
#define M_VAR_MULT   0xf
 
#define V_VAR_MULT(x)   ((x) << S_VAR_MULT)
 
#define G_VAR_MULT(x)   (((x) >> S_VAR_MULT) & M_VAR_MULT)
 
#define S_VAR_GAIN   4
 
#define M_VAR_GAIN   0xf
 
#define V_VAR_GAIN(x)   ((x) << S_VAR_GAIN)
 
#define G_VAR_GAIN(x)   (((x) >> S_VAR_GAIN) & M_VAR_GAIN)
 
#define S_SRTT_GAIN   8
 
#define M_SRTT_GAIN   0xf
 
#define V_SRTT_GAIN(x)   ((x) << S_SRTT_GAIN)
 
#define G_SRTT_GAIN(x)   (((x) >> S_SRTT_GAIN) & M_SRTT_GAIN)
 
#define S_RTTVAR_INIT   12
 
#define M_RTTVAR_INIT   0xf
 
#define V_RTTVAR_INIT(x)   ((x) << S_RTTVAR_INIT)
 
#define G_RTTVAR_INIT(x)   (((x) >> S_RTTVAR_INIT) & M_RTTVAR_INIT)
 
#define S_DUP_THRESH   20
 
#define M_DUP_THRESH   0xf
 
#define V_DUP_THRESH(x)   ((x) << S_DUP_THRESH)
 
#define G_DUP_THRESH(x)   (((x) >> S_DUP_THRESH) & M_DUP_THRESH)
 
#define S_INIT_CONG_WIN   24
 
#define M_INIT_CONG_WIN   0x7
 
#define V_INIT_CONG_WIN(x)   ((x) << S_INIT_CONG_WIN)
 
#define G_INIT_CONG_WIN(x)   (((x) >> S_INIT_CONG_WIN) & M_INIT_CONG_WIN)
 
#define A_TP_PARA_REG1   0x364
 
#define S_INITIAL_SLOW_START_THRESHOLD   0
 
#define M_INITIAL_SLOW_START_THRESHOLD   0xffff
 
#define V_INITIAL_SLOW_START_THRESHOLD(x)   ((x) << S_INITIAL_SLOW_START_THRESHOLD)
 
#define G_INITIAL_SLOW_START_THRESHOLD(x)   (((x) >> S_INITIAL_SLOW_START_THRESHOLD) & M_INITIAL_SLOW_START_THRESHOLD)
 
#define S_RECEIVE_BUFFER_SIZE   16
 
#define M_RECEIVE_BUFFER_SIZE   0xffff
 
#define V_RECEIVE_BUFFER_SIZE(x)   ((x) << S_RECEIVE_BUFFER_SIZE)
 
#define G_RECEIVE_BUFFER_SIZE(x)   (((x) >> S_RECEIVE_BUFFER_SIZE) & M_RECEIVE_BUFFER_SIZE)
 
#define A_TP_PARA_REG2   0x368
 
#define S_RX_COALESCE_SIZE   0
 
#define M_RX_COALESCE_SIZE   0xffff
 
#define V_RX_COALESCE_SIZE(x)   ((x) << S_RX_COALESCE_SIZE)
 
#define G_RX_COALESCE_SIZE(x)   (((x) >> S_RX_COALESCE_SIZE) & M_RX_COALESCE_SIZE)
 
#define S_MAX_RX_SIZE   16
 
#define M_MAX_RX_SIZE   0xffff
 
#define V_MAX_RX_SIZE(x)   ((x) << S_MAX_RX_SIZE)
 
#define G_MAX_RX_SIZE(x)   (((x) >> S_MAX_RX_SIZE) & M_MAX_RX_SIZE)
 
#define A_TP_PARA_REG3   0x36c
 
#define S_RX_COALESCING_PSH_DELIVER   0
 
#define V_RX_COALESCING_PSH_DELIVER(x)   ((x) << S_RX_COALESCING_PSH_DELIVER)
 
#define F_RX_COALESCING_PSH_DELIVER   V_RX_COALESCING_PSH_DELIVER(1U)
 
#define S_RX_COALESCING_ENABLE   1
 
#define V_RX_COALESCING_ENABLE(x)   ((x) << S_RX_COALESCING_ENABLE)
 
#define F_RX_COALESCING_ENABLE   V_RX_COALESCING_ENABLE(1U)
 
#define S_TAHOE_ENABLE   2
 
#define V_TAHOE_ENABLE(x)   ((x) << S_TAHOE_ENABLE)
 
#define F_TAHOE_ENABLE   V_TAHOE_ENABLE(1U)
 
#define S_MAX_REORDER_FRAGMENTS   12
 
#define M_MAX_REORDER_FRAGMENTS   0x7
 
#define V_MAX_REORDER_FRAGMENTS(x)   ((x) << S_MAX_REORDER_FRAGMENTS)
 
#define G_MAX_REORDER_FRAGMENTS(x)   (((x) >> S_MAX_REORDER_FRAGMENTS) & M_MAX_REORDER_FRAGMENTS)
 
#define A_TP_TIMER_RESOLUTION   0x390
 
#define S_DELAYED_ACK_TIMER_RESOLUTION   0
 
#define M_DELAYED_ACK_TIMER_RESOLUTION   0x3f
 
#define V_DELAYED_ACK_TIMER_RESOLUTION(x)   ((x) << S_DELAYED_ACK_TIMER_RESOLUTION)
 
#define G_DELAYED_ACK_TIMER_RESOLUTION(x)   (((x) >> S_DELAYED_ACK_TIMER_RESOLUTION) & M_DELAYED_ACK_TIMER_RESOLUTION)
 
#define S_GENERIC_TIMER_RESOLUTION   16
 
#define M_GENERIC_TIMER_RESOLUTION   0x3f
 
#define V_GENERIC_TIMER_RESOLUTION(x)   ((x) << S_GENERIC_TIMER_RESOLUTION)
 
#define G_GENERIC_TIMER_RESOLUTION(x)   (((x) >> S_GENERIC_TIMER_RESOLUTION) & M_GENERIC_TIMER_RESOLUTION)
 
#define A_TP_2MSL   0x394
 
#define S_2MSL   0
 
#define M_2MSL   0x3fffffff
 
#define V_2MSL(x)   ((x) << S_2MSL)
 
#define G_2MSL(x)   (((x) >> S_2MSL) & M_2MSL)
 
#define A_TP_RXT_MIN   0x398
 
#define S_RETRANSMIT_TIMER_MIN   0
 
#define M_RETRANSMIT_TIMER_MIN   0xffff
 
#define V_RETRANSMIT_TIMER_MIN(x)   ((x) << S_RETRANSMIT_TIMER_MIN)
 
#define G_RETRANSMIT_TIMER_MIN(x)   (((x) >> S_RETRANSMIT_TIMER_MIN) & M_RETRANSMIT_TIMER_MIN)
 
#define A_TP_RXT_MAX   0x39c
 
#define S_RETRANSMIT_TIMER_MAX   0
 
#define M_RETRANSMIT_TIMER_MAX   0x3fffffff
 
#define V_RETRANSMIT_TIMER_MAX(x)   ((x) << S_RETRANSMIT_TIMER_MAX)
 
#define G_RETRANSMIT_TIMER_MAX(x)   (((x) >> S_RETRANSMIT_TIMER_MAX) & M_RETRANSMIT_TIMER_MAX)
 
#define A_TP_PERS_MIN   0x3a0
 
#define S_PERSIST_TIMER_MIN   0
 
#define M_PERSIST_TIMER_MIN   0xffff
 
#define V_PERSIST_TIMER_MIN(x)   ((x) << S_PERSIST_TIMER_MIN)
 
#define G_PERSIST_TIMER_MIN(x)   (((x) >> S_PERSIST_TIMER_MIN) & M_PERSIST_TIMER_MIN)
 
#define A_TP_PERS_MAX   0x3a4
 
#define S_PERSIST_TIMER_MAX   0
 
#define M_PERSIST_TIMER_MAX   0x3fffffff
 
#define V_PERSIST_TIMER_MAX(x)   ((x) << S_PERSIST_TIMER_MAX)
 
#define G_PERSIST_TIMER_MAX(x)   (((x) >> S_PERSIST_TIMER_MAX) & M_PERSIST_TIMER_MAX)
 
#define A_TP_KEEP_IDLE   0x3ac
 
#define S_KEEP_ALIVE_IDLE_TIME   0
 
#define M_KEEP_ALIVE_IDLE_TIME   0x3fffffff
 
#define V_KEEP_ALIVE_IDLE_TIME(x)   ((x) << S_KEEP_ALIVE_IDLE_TIME)
 
#define G_KEEP_ALIVE_IDLE_TIME(x)   (((x) >> S_KEEP_ALIVE_IDLE_TIME) & M_KEEP_ALIVE_IDLE_TIME)
 
#define A_TP_KEEP_INTVL   0x3b0
 
#define S_KEEP_ALIVE_INTERVAL_TIME   0
 
#define M_KEEP_ALIVE_INTERVAL_TIME   0x3fffffff
 
#define V_KEEP_ALIVE_INTERVAL_TIME(x)   ((x) << S_KEEP_ALIVE_INTERVAL_TIME)
 
#define G_KEEP_ALIVE_INTERVAL_TIME(x)   (((x) >> S_KEEP_ALIVE_INTERVAL_TIME) & M_KEEP_ALIVE_INTERVAL_TIME)
 
#define A_TP_INIT_SRTT   0x3b4
 
#define S_INITIAL_SRTT   0
 
#define M_INITIAL_SRTT   0xffff
 
#define V_INITIAL_SRTT(x)   ((x) << S_INITIAL_SRTT)
 
#define G_INITIAL_SRTT(x)   (((x) >> S_INITIAL_SRTT) & M_INITIAL_SRTT)
 
#define A_TP_DACK_TIME   0x3b8
 
#define S_DELAYED_ACK_TIME   0
 
#define M_DELAYED_ACK_TIME   0x7ff
 
#define V_DELAYED_ACK_TIME(x)   ((x) << S_DELAYED_ACK_TIME)
 
#define G_DELAYED_ACK_TIME(x)   (((x) >> S_DELAYED_ACK_TIME) & M_DELAYED_ACK_TIME)
 
#define A_TP_FINWAIT2_TIME   0x3bc
 
#define S_FINWAIT2_TIME   0
 
#define M_FINWAIT2_TIME   0x3fffffff
 
#define V_FINWAIT2_TIME(x)   ((x) << S_FINWAIT2_TIME)
 
#define G_FINWAIT2_TIME(x)   (((x) >> S_FINWAIT2_TIME) & M_FINWAIT2_TIME)
 
#define A_TP_FAST_FINWAIT2_TIME   0x3c0
 
#define S_FAST_FINWAIT2_TIME   0
 
#define M_FAST_FINWAIT2_TIME   0x3fffffff
 
#define V_FAST_FINWAIT2_TIME(x)   ((x) << S_FAST_FINWAIT2_TIME)
 
#define G_FAST_FINWAIT2_TIME(x)   (((x) >> S_FAST_FINWAIT2_TIME) & M_FAST_FINWAIT2_TIME)
 
#define A_TP_SHIFT_CNT   0x3c4
 
#define S_KEEPALIVE_MAX   0
 
#define M_KEEPALIVE_MAX   0xff
 
#define V_KEEPALIVE_MAX(x)   ((x) << S_KEEPALIVE_MAX)
 
#define G_KEEPALIVE_MAX(x)   (((x) >> S_KEEPALIVE_MAX) & M_KEEPALIVE_MAX)
 
#define S_WINDOWPROBE_MAX   8
 
#define M_WINDOWPROBE_MAX   0xff
 
#define V_WINDOWPROBE_MAX(x)   ((x) << S_WINDOWPROBE_MAX)
 
#define G_WINDOWPROBE_MAX(x)   (((x) >> S_WINDOWPROBE_MAX) & M_WINDOWPROBE_MAX)
 
#define S_RETRANSMISSION_MAX   16
 
#define M_RETRANSMISSION_MAX   0xff
 
#define V_RETRANSMISSION_MAX(x)   ((x) << S_RETRANSMISSION_MAX)
 
#define G_RETRANSMISSION_MAX(x)   (((x) >> S_RETRANSMISSION_MAX) & M_RETRANSMISSION_MAX)
 
#define S_SYN_MAX   24
 
#define M_SYN_MAX   0xff
 
#define V_SYN_MAX(x)   ((x) << S_SYN_MAX)
 
#define G_SYN_MAX(x)   (((x) >> S_SYN_MAX) & M_SYN_MAX)
 
#define A_TP_QOS_REG0   0x3e0
 
#define S_L3_VALUE   0
 
#define M_L3_VALUE   0x3f
 
#define V_L3_VALUE(x)   ((x) << S_L3_VALUE)
 
#define G_L3_VALUE(x)   (((x) >> S_L3_VALUE) & M_L3_VALUE)
 
#define A_TP_QOS_REG1   0x3e4
 
#define A_TP_QOS_REG2   0x3e8
 
#define A_TP_QOS_REG3   0x3ec
 
#define A_TP_QOS_REG4   0x3f0
 
#define A_TP_QOS_REG5   0x3f4
 
#define A_TP_QOS_REG6   0x3f8
 
#define A_TP_QOS_REG7   0x3fc
 
#define A_TP_MTU_REG0   0x404
 
#define A_TP_MTU_REG1   0x408
 
#define A_TP_MTU_REG2   0x40c
 
#define A_TP_MTU_REG3   0x410
 
#define A_TP_MTU_REG4   0x414
 
#define A_TP_MTU_REG5   0x418
 
#define A_TP_MTU_REG6   0x41c
 
#define A_TP_MTU_REG7   0x420
 
#define A_TP_RESET   0x44c
 
#define S_TP_RESET   0
 
#define V_TP_RESET(x)   ((x) << S_TP_RESET)
 
#define F_TP_RESET   V_TP_RESET(1U)
 
#define S_CM_MEMMGR_INIT   1
 
#define V_CM_MEMMGR_INIT(x)   ((x) << S_CM_MEMMGR_INIT)
 
#define F_CM_MEMMGR_INIT   V_CM_MEMMGR_INIT(1U)
 
#define A_TP_MIB_INDEX   0x450
 
#define A_TP_MIB_DATA   0x454
 
#define A_TP_SYNC_TIME_HI   0x458
 
#define A_TP_SYNC_TIME_LO   0x45c
 
#define A_TP_CM_MM_RX_FLST_BASE   0x460
 
#define S_CM_MEMMGR_RX_FREE_LIST_BASE   0
 
#define M_CM_MEMMGR_RX_FREE_LIST_BASE   0xfffffff
 
#define V_CM_MEMMGR_RX_FREE_LIST_BASE(x)   ((x) << S_CM_MEMMGR_RX_FREE_LIST_BASE)
 
#define G_CM_MEMMGR_RX_FREE_LIST_BASE(x)   (((x) >> S_CM_MEMMGR_RX_FREE_LIST_BASE) & M_CM_MEMMGR_RX_FREE_LIST_BASE)
 
#define A_TP_CM_MM_TX_FLST_BASE   0x464
 
#define S_CM_MEMMGR_TX_FREE_LIST_BASE   0
 
#define M_CM_MEMMGR_TX_FREE_LIST_BASE   0xfffffff
 
#define V_CM_MEMMGR_TX_FREE_LIST_BASE(x)   ((x) << S_CM_MEMMGR_TX_FREE_LIST_BASE)
 
#define G_CM_MEMMGR_TX_FREE_LIST_BASE(x)   (((x) >> S_CM_MEMMGR_TX_FREE_LIST_BASE) & M_CM_MEMMGR_TX_FREE_LIST_BASE)
 
#define A_TP_CM_MM_P_FLST_BASE   0x468
 
#define S_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE   0
 
#define M_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE   0xfffffff
 
#define V_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE(x)   ((x) << S_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE)
 
#define G_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE(x)   (((x) >> S_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE) & M_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE)
 
#define A_TP_CM_MM_MAX_P   0x46c
 
#define S_CM_MEMMGR_MAX_PSTRUCT   0
 
#define M_CM_MEMMGR_MAX_PSTRUCT   0xfffffff
 
#define V_CM_MEMMGR_MAX_PSTRUCT(x)   ((x) << S_CM_MEMMGR_MAX_PSTRUCT)
 
#define G_CM_MEMMGR_MAX_PSTRUCT(x)   (((x) >> S_CM_MEMMGR_MAX_PSTRUCT) & M_CM_MEMMGR_MAX_PSTRUCT)
 
#define A_TP_INT_ENABLE   0x470
 
#define S_TX_FREE_LIST_EMPTY   0
 
#define V_TX_FREE_LIST_EMPTY(x)   ((x) << S_TX_FREE_LIST_EMPTY)
 
#define F_TX_FREE_LIST_EMPTY   V_TX_FREE_LIST_EMPTY(1U)
 
#define S_RX_FREE_LIST_EMPTY   1
 
#define V_RX_FREE_LIST_EMPTY(x)   ((x) << S_RX_FREE_LIST_EMPTY)
 
#define F_RX_FREE_LIST_EMPTY   V_RX_FREE_LIST_EMPTY(1U)
 
#define A_TP_INT_CAUSE   0x474
 
#define A_TP_TIMER_SEPARATOR   0x4a4
 
#define S_DISABLE_PAST_TIMER_INSERTION   0
 
#define V_DISABLE_PAST_TIMER_INSERTION(x)   ((x) << S_DISABLE_PAST_TIMER_INSERTION)
 
#define F_DISABLE_PAST_TIMER_INSERTION   V_DISABLE_PAST_TIMER_INSERTION(1U)
 
#define S_MODULATION_TIMER_SEPARATOR   1
 
#define M_MODULATION_TIMER_SEPARATOR   0x7fff
 
#define V_MODULATION_TIMER_SEPARATOR(x)   ((x) << S_MODULATION_TIMER_SEPARATOR)
 
#define G_MODULATION_TIMER_SEPARATOR(x)   (((x) >> S_MODULATION_TIMER_SEPARATOR) & M_MODULATION_TIMER_SEPARATOR)
 
#define S_GLOBAL_TIMER_SEPARATOR   16
 
#define M_GLOBAL_TIMER_SEPARATOR   0xffff
 
#define V_GLOBAL_TIMER_SEPARATOR(x)   ((x) << S_GLOBAL_TIMER_SEPARATOR)
 
#define G_GLOBAL_TIMER_SEPARATOR(x)   (((x) >> S_GLOBAL_TIMER_SEPARATOR) & M_GLOBAL_TIMER_SEPARATOR)
 
#define A_TP_CM_FC_MODE   0x4b0
 
#define A_TP_PC_CONGESTION_CNTL   0x4b4
 
#define A_TP_TX_DROP_CONFIG   0x4b8
 
#define S_ENABLE_TX_DROP   31
 
#define V_ENABLE_TX_DROP(x)   ((x) << S_ENABLE_TX_DROP)
 
#define F_ENABLE_TX_DROP   V_ENABLE_TX_DROP(1U)
 
#define S_ENABLE_TX_ERROR   30
 
#define V_ENABLE_TX_ERROR(x)   ((x) << S_ENABLE_TX_ERROR)
 
#define F_ENABLE_TX_ERROR   V_ENABLE_TX_ERROR(1U)
 
#define S_DROP_TICKS_CNT   4
 
#define M_DROP_TICKS_CNT   0x3ffffff
 
#define V_DROP_TICKS_CNT(x)   ((x) << S_DROP_TICKS_CNT)
 
#define G_DROP_TICKS_CNT(x)   (((x) >> S_DROP_TICKS_CNT) & M_DROP_TICKS_CNT)
 
#define S_NUM_PKTS_DROPPED   0
 
#define M_NUM_PKTS_DROPPED   0xf
 
#define V_NUM_PKTS_DROPPED(x)   ((x) << S_NUM_PKTS_DROPPED)
 
#define G_NUM_PKTS_DROPPED(x)   (((x) >> S_NUM_PKTS_DROPPED) & M_NUM_PKTS_DROPPED)
 
#define A_TP_TX_DROP_COUNT   0x4bc
 
#define A_RAT_ROUTE_CONTROL   0x580
 
#define S_USE_ROUTE_TABLE   0
 
#define V_USE_ROUTE_TABLE(x)   ((x) << S_USE_ROUTE_TABLE)
 
#define F_USE_ROUTE_TABLE   V_USE_ROUTE_TABLE(1U)
 
#define S_ENABLE_CSPI   1
 
#define V_ENABLE_CSPI(x)   ((x) << S_ENABLE_CSPI)
 
#define F_ENABLE_CSPI   V_ENABLE_CSPI(1U)
 
#define S_ENABLE_PCIX   2
 
#define V_ENABLE_PCIX(x)   ((x) << S_ENABLE_PCIX)
 
#define F_ENABLE_PCIX   V_ENABLE_PCIX(1U)
 
#define A_RAT_ROUTE_TABLE_INDEX   0x584
 
#define S_ROUTE_TABLE_INDEX   0
 
#define M_ROUTE_TABLE_INDEX   0xf
 
#define V_ROUTE_TABLE_INDEX(x)   ((x) << S_ROUTE_TABLE_INDEX)
 
#define G_ROUTE_TABLE_INDEX(x)   (((x) >> S_ROUTE_TABLE_INDEX) & M_ROUTE_TABLE_INDEX)
 
#define A_RAT_ROUTE_TABLE_DATA   0x588
 
#define A_RAT_NO_ROUTE   0x58c
 
#define S_CPL_OPCODE   0
 
#define M_CPL_OPCODE   0xff
 
#define V_CPL_OPCODE(x)   ((x) << S_CPL_OPCODE)
 
#define G_CPL_OPCODE(x)   (((x) >> S_CPL_OPCODE) & M_CPL_OPCODE)
 
#define A_RAT_INTR_ENABLE   0x590
 
#define S_ZEROROUTEERROR   0
 
#define V_ZEROROUTEERROR(x)   ((x) << S_ZEROROUTEERROR)
 
#define F_ZEROROUTEERROR   V_ZEROROUTEERROR(1U)
 
#define S_CSPIFRAMINGERROR   1
 
#define V_CSPIFRAMINGERROR(x)   ((x) << S_CSPIFRAMINGERROR)
 
#define F_CSPIFRAMINGERROR   V_CSPIFRAMINGERROR(1U)
 
#define S_SGEFRAMINGERROR   2
 
#define V_SGEFRAMINGERROR(x)   ((x) << S_SGEFRAMINGERROR)
 
#define F_SGEFRAMINGERROR   V_SGEFRAMINGERROR(1U)
 
#define S_TPFRAMINGERROR   3
 
#define V_TPFRAMINGERROR(x)   ((x) << S_TPFRAMINGERROR)
 
#define F_TPFRAMINGERROR   V_TPFRAMINGERROR(1U)
 
#define A_RAT_INTR_CAUSE   0x594
 
#define A_CSPI_RX_AE_WM   0x810
 
#define A_CSPI_RX_AF_WM   0x814
 
#define A_CSPI_CALENDAR_LEN   0x818
 
#define S_CALENDARLENGTH   0
 
#define M_CALENDARLENGTH   0xffff
 
#define V_CALENDARLENGTH(x)   ((x) << S_CALENDARLENGTH)
 
#define G_CALENDARLENGTH(x)   (((x) >> S_CALENDARLENGTH) & M_CALENDARLENGTH)
 
#define A_CSPI_FIFO_STATUS_ENABLE   0x820
 
#define S_FIFOSTATUSENABLE   0
 
#define V_FIFOSTATUSENABLE(x)   ((x) << S_FIFOSTATUSENABLE)
 
#define F_FIFOSTATUSENABLE   V_FIFOSTATUSENABLE(1U)
 
#define A_CSPI_MAXBURST1_MAXBURST2   0x828
 
#define S_MAXBURST1   0
 
#define M_MAXBURST1   0xffff
 
#define V_MAXBURST1(x)   ((x) << S_MAXBURST1)
 
#define G_MAXBURST1(x)   (((x) >> S_MAXBURST1) & M_MAXBURST1)
 
#define S_MAXBURST2   16
 
#define M_MAXBURST2   0xffff
 
#define V_MAXBURST2(x)   ((x) << S_MAXBURST2)
 
#define G_MAXBURST2(x)   (((x) >> S_MAXBURST2) & M_MAXBURST2)
 
#define A_CSPI_TRAIN   0x82c
 
#define S_CSPI_TRAIN_ALPHA   0
 
#define M_CSPI_TRAIN_ALPHA   0xffff
 
#define V_CSPI_TRAIN_ALPHA(x)   ((x) << S_CSPI_TRAIN_ALPHA)
 
#define G_CSPI_TRAIN_ALPHA(x)   (((x) >> S_CSPI_TRAIN_ALPHA) & M_CSPI_TRAIN_ALPHA)
 
#define S_CSPI_TRAIN_DATA_MAXT   16
 
#define M_CSPI_TRAIN_DATA_MAXT   0xffff
 
#define V_CSPI_TRAIN_DATA_MAXT(x)   ((x) << S_CSPI_TRAIN_DATA_MAXT)
 
#define G_CSPI_TRAIN_DATA_MAXT(x)   (((x) >> S_CSPI_TRAIN_DATA_MAXT) & M_CSPI_TRAIN_DATA_MAXT)
 
#define A_CSPI_INTR_STATUS   0x848
 
#define S_DIP4ERR   0
 
#define V_DIP4ERR(x)   ((x) << S_DIP4ERR)
 
#define F_DIP4ERR   V_DIP4ERR(1U)
 
#define S_RXDROP   1
 
#define V_RXDROP(x)   ((x) << S_RXDROP)
 
#define F_RXDROP   V_RXDROP(1U)
 
#define S_TXDROP   2
 
#define V_TXDROP(x)   ((x) << S_TXDROP)
 
#define F_TXDROP   V_TXDROP(1U)
 
#define S_RXOVERFLOW   3
 
#define V_RXOVERFLOW(x)   ((x) << S_RXOVERFLOW)
 
#define F_RXOVERFLOW   V_RXOVERFLOW(1U)
 
#define S_RAMPARITYERR   4
 
#define V_RAMPARITYERR(x)   ((x) << S_RAMPARITYERR)
 
#define F_RAMPARITYERR   V_RAMPARITYERR(1U)
 
#define A_CSPI_INTR_ENABLE   0x84c
 
#define A_ESPI_SCH_TOKEN0   0x880
 
#define S_SCHTOKEN0   0
 
#define M_SCHTOKEN0   0xffff
 
#define V_SCHTOKEN0(x)   ((x) << S_SCHTOKEN0)
 
#define G_SCHTOKEN0(x)   (((x) >> S_SCHTOKEN0) & M_SCHTOKEN0)
 
#define A_ESPI_SCH_TOKEN1   0x884
 
#define S_SCHTOKEN1   0
 
#define M_SCHTOKEN1   0xffff
 
#define V_SCHTOKEN1(x)   ((x) << S_SCHTOKEN1)
 
#define G_SCHTOKEN1(x)   (((x) >> S_SCHTOKEN1) & M_SCHTOKEN1)
 
#define A_ESPI_SCH_TOKEN2   0x888
 
#define S_SCHTOKEN2   0
 
#define M_SCHTOKEN2   0xffff
 
#define V_SCHTOKEN2(x)   ((x) << S_SCHTOKEN2)
 
#define G_SCHTOKEN2(x)   (((x) >> S_SCHTOKEN2) & M_SCHTOKEN2)
 
#define A_ESPI_SCH_TOKEN3   0x88c
 
#define S_SCHTOKEN3   0
 
#define M_SCHTOKEN3   0xffff
 
#define V_SCHTOKEN3(x)   ((x) << S_SCHTOKEN3)
 
#define G_SCHTOKEN3(x)   (((x) >> S_SCHTOKEN3) & M_SCHTOKEN3)
 
#define A_ESPI_RX_FIFO_ALMOST_EMPTY_WATERMARK   0x890
 
#define S_ALMOSTEMPTY   0
 
#define M_ALMOSTEMPTY   0xffff
 
#define V_ALMOSTEMPTY(x)   ((x) << S_ALMOSTEMPTY)
 
#define G_ALMOSTEMPTY(x)   (((x) >> S_ALMOSTEMPTY) & M_ALMOSTEMPTY)
 
#define A_ESPI_RX_FIFO_ALMOST_FULL_WATERMARK   0x894
 
#define S_ALMOSTFULL   0
 
#define M_ALMOSTFULL   0xffff
 
#define V_ALMOSTFULL(x)   ((x) << S_ALMOSTFULL)
 
#define G_ALMOSTFULL(x)   (((x) >> S_ALMOSTFULL) & M_ALMOSTFULL)
 
#define A_ESPI_CALENDAR_LENGTH   0x898
 
#define A_PORT_CONFIG   0x89c
 
#define S_RX_NPORTS   0
 
#define M_RX_NPORTS   0xff
 
#define V_RX_NPORTS(x)   ((x) << S_RX_NPORTS)
 
#define G_RX_NPORTS(x)   (((x) >> S_RX_NPORTS) & M_RX_NPORTS)
 
#define S_TX_NPORTS   8
 
#define M_TX_NPORTS   0xff
 
#define V_TX_NPORTS(x)   ((x) << S_TX_NPORTS)
 
#define G_TX_NPORTS(x)   (((x) >> S_TX_NPORTS) & M_TX_NPORTS)
 
#define A_ESPI_FIFO_STATUS_ENABLE   0x8a0
 
#define S_RXSTATUSENABLE   0
 
#define V_RXSTATUSENABLE(x)   ((x) << S_RXSTATUSENABLE)
 
#define F_RXSTATUSENABLE   V_RXSTATUSENABLE(1U)
 
#define S_TXDROPENABLE   1
 
#define V_TXDROPENABLE(x)   ((x) << S_TXDROPENABLE)
 
#define F_TXDROPENABLE   V_TXDROPENABLE(1U)
 
#define S_RXENDIANMODE   2
 
#define V_RXENDIANMODE(x)   ((x) << S_RXENDIANMODE)
 
#define F_RXENDIANMODE   V_RXENDIANMODE(1U)
 
#define S_TXENDIANMODE   3
 
#define V_TXENDIANMODE(x)   ((x) << S_TXENDIANMODE)
 
#define F_TXENDIANMODE   V_TXENDIANMODE(1U)
 
#define S_INTEL1010MODE   4
 
#define V_INTEL1010MODE(x)   ((x) << S_INTEL1010MODE)
 
#define F_INTEL1010MODE   V_INTEL1010MODE(1U)
 
#define A_ESPI_MAXBURST1_MAXBURST2   0x8a8
 
#define A_ESPI_TRAIN   0x8ac
 
#define S_MAXTRAINALPHA   0
 
#define M_MAXTRAINALPHA   0xffff
 
#define V_MAXTRAINALPHA(x)   ((x) << S_MAXTRAINALPHA)
 
#define G_MAXTRAINALPHA(x)   (((x) >> S_MAXTRAINALPHA) & M_MAXTRAINALPHA)
 
#define S_MAXTRAINDATA   16
 
#define M_MAXTRAINDATA   0xffff
 
#define V_MAXTRAINDATA(x)   ((x) << S_MAXTRAINDATA)
 
#define G_MAXTRAINDATA(x)   (((x) >> S_MAXTRAINDATA) & M_MAXTRAINDATA)
 
#define A_RAM_STATUS   0x8b0
 
#define S_RXFIFOPARITYERROR   0
 
#define M_RXFIFOPARITYERROR   0x3ff
 
#define V_RXFIFOPARITYERROR(x)   ((x) << S_RXFIFOPARITYERROR)
 
#define G_RXFIFOPARITYERROR(x)   (((x) >> S_RXFIFOPARITYERROR) & M_RXFIFOPARITYERROR)
 
#define S_TXFIFOPARITYERROR   10
 
#define M_TXFIFOPARITYERROR   0x3ff
 
#define V_TXFIFOPARITYERROR(x)   ((x) << S_TXFIFOPARITYERROR)
 
#define G_TXFIFOPARITYERROR(x)   (((x) >> S_TXFIFOPARITYERROR) & M_TXFIFOPARITYERROR)
 
#define S_RXFIFOOVERFLOW   20
 
#define M_RXFIFOOVERFLOW   0x3ff
 
#define V_RXFIFOOVERFLOW(x)   ((x) << S_RXFIFOOVERFLOW)
 
#define G_RXFIFOOVERFLOW(x)   (((x) >> S_RXFIFOOVERFLOW) & M_RXFIFOOVERFLOW)
 
#define A_TX_DROP_COUNT0   0x8b4
 
#define S_TXPORT0DROPCNT   0
 
#define M_TXPORT0DROPCNT   0xffff
 
#define V_TXPORT0DROPCNT(x)   ((x) << S_TXPORT0DROPCNT)
 
#define G_TXPORT0DROPCNT(x)   (((x) >> S_TXPORT0DROPCNT) & M_TXPORT0DROPCNT)
 
#define S_TXPORT1DROPCNT   16
 
#define M_TXPORT1DROPCNT   0xffff
 
#define V_TXPORT1DROPCNT(x)   ((x) << S_TXPORT1DROPCNT)
 
#define G_TXPORT1DROPCNT(x)   (((x) >> S_TXPORT1DROPCNT) & M_TXPORT1DROPCNT)
 
#define A_TX_DROP_COUNT1   0x8b8
 
#define S_TXPORT2DROPCNT   0
 
#define M_TXPORT2DROPCNT   0xffff
 
#define V_TXPORT2DROPCNT(x)   ((x) << S_TXPORT2DROPCNT)
 
#define G_TXPORT2DROPCNT(x)   (((x) >> S_TXPORT2DROPCNT) & M_TXPORT2DROPCNT)
 
#define S_TXPORT3DROPCNT   16
 
#define M_TXPORT3DROPCNT   0xffff
 
#define V_TXPORT3DROPCNT(x)   ((x) << S_TXPORT3DROPCNT)
 
#define G_TXPORT3DROPCNT(x)   (((x) >> S_TXPORT3DROPCNT) & M_TXPORT3DROPCNT)
 
#define A_RX_DROP_COUNT0   0x8bc
 
#define S_RXPORT0DROPCNT   0
 
#define M_RXPORT0DROPCNT   0xffff
 
#define V_RXPORT0DROPCNT(x)   ((x) << S_RXPORT0DROPCNT)
 
#define G_RXPORT0DROPCNT(x)   (((x) >> S_RXPORT0DROPCNT) & M_RXPORT0DROPCNT)
 
#define S_RXPORT1DROPCNT   16
 
#define M_RXPORT1DROPCNT   0xffff
 
#define V_RXPORT1DROPCNT(x)   ((x) << S_RXPORT1DROPCNT)
 
#define G_RXPORT1DROPCNT(x)   (((x) >> S_RXPORT1DROPCNT) & M_RXPORT1DROPCNT)
 
#define A_RX_DROP_COUNT1   0x8c0
 
#define S_RXPORT2DROPCNT   0
 
#define M_RXPORT2DROPCNT   0xffff
 
#define V_RXPORT2DROPCNT(x)   ((x) << S_RXPORT2DROPCNT)
 
#define G_RXPORT2DROPCNT(x)   (((x) >> S_RXPORT2DROPCNT) & M_RXPORT2DROPCNT)
 
#define S_RXPORT3DROPCNT   16
 
#define M_RXPORT3DROPCNT   0xffff
 
#define V_RXPORT3DROPCNT(x)   ((x) << S_RXPORT3DROPCNT)
 
#define G_RXPORT3DROPCNT(x)   (((x) >> S_RXPORT3DROPCNT) & M_RXPORT3DROPCNT)
 
#define A_DIP4_ERROR_COUNT   0x8c4
 
#define S_DIP4ERRORCNT   0
 
#define M_DIP4ERRORCNT   0xfff
 
#define V_DIP4ERRORCNT(x)   ((x) << S_DIP4ERRORCNT)
 
#define G_DIP4ERRORCNT(x)   (((x) >> S_DIP4ERRORCNT) & M_DIP4ERRORCNT)
 
#define S_DIP4ERRORCNTSHADOW   12
 
#define M_DIP4ERRORCNTSHADOW   0xfff
 
#define V_DIP4ERRORCNTSHADOW(x)   ((x) << S_DIP4ERRORCNTSHADOW)
 
#define G_DIP4ERRORCNTSHADOW(x)   (((x) >> S_DIP4ERRORCNTSHADOW) & M_DIP4ERRORCNTSHADOW)
 
#define S_TRICN_RX_TRAIN_ERR   24
 
#define V_TRICN_RX_TRAIN_ERR(x)   ((x) << S_TRICN_RX_TRAIN_ERR)
 
#define F_TRICN_RX_TRAIN_ERR   V_TRICN_RX_TRAIN_ERR(1U)
 
#define S_TRICN_RX_TRAINING   25
 
#define V_TRICN_RX_TRAINING(x)   ((x) << S_TRICN_RX_TRAINING)
 
#define F_TRICN_RX_TRAINING   V_TRICN_RX_TRAINING(1U)
 
#define S_TRICN_RX_TRAIN_OK   26
 
#define V_TRICN_RX_TRAIN_OK(x)   ((x) << S_TRICN_RX_TRAIN_OK)
 
#define F_TRICN_RX_TRAIN_OK   V_TRICN_RX_TRAIN_OK(1U)
 
#define A_ESPI_INTR_STATUS   0x8c8
 
#define S_DIP2PARITYERR   5
 
#define V_DIP2PARITYERR(x)   ((x) << S_DIP2PARITYERR)
 
#define F_DIP2PARITYERR   V_DIP2PARITYERR(1U)
 
#define A_ESPI_INTR_ENABLE   0x8cc
 
#define A_RX_DROP_THRESHOLD   0x8d0
 
#define A_ESPI_RX_RESET   0x8ec
 
#define S_ESPI_RX_LNK_RST   0
 
#define V_ESPI_RX_LNK_RST(x)   ((x) << S_ESPI_RX_LNK_RST)
 
#define F_ESPI_RX_LNK_RST   V_ESPI_RX_LNK_RST(1U)
 
#define S_ESPI_RX_CORE_RST   1
 
#define V_ESPI_RX_CORE_RST(x)   ((x) << S_ESPI_RX_CORE_RST)
 
#define F_ESPI_RX_CORE_RST   V_ESPI_RX_CORE_RST(1U)
 
#define S_RX_CLK_STATUS   2
 
#define V_RX_CLK_STATUS(x)   ((x) << S_RX_CLK_STATUS)
 
#define F_RX_CLK_STATUS   V_RX_CLK_STATUS(1U)
 
#define A_ESPI_MISC_CONTROL   0x8f0
 
#define S_OUT_OF_SYNC_COUNT   0
 
#define M_OUT_OF_SYNC_COUNT   0xf
 
#define V_OUT_OF_SYNC_COUNT(x)   ((x) << S_OUT_OF_SYNC_COUNT)
 
#define G_OUT_OF_SYNC_COUNT(x)   (((x) >> S_OUT_OF_SYNC_COUNT) & M_OUT_OF_SYNC_COUNT)
 
#define S_DIP2_COUNT_MODE_ENABLE   4
 
#define V_DIP2_COUNT_MODE_ENABLE(x)   ((x) << S_DIP2_COUNT_MODE_ENABLE)
 
#define F_DIP2_COUNT_MODE_ENABLE   V_DIP2_COUNT_MODE_ENABLE(1U)
 
#define S_DIP2_PARITY_ERR_THRES   5
 
#define M_DIP2_PARITY_ERR_THRES   0xf
 
#define V_DIP2_PARITY_ERR_THRES(x)   ((x) << S_DIP2_PARITY_ERR_THRES)
 
#define G_DIP2_PARITY_ERR_THRES(x)   (((x) >> S_DIP2_PARITY_ERR_THRES) & M_DIP2_PARITY_ERR_THRES)
 
#define S_DIP4_THRES   9
 
#define M_DIP4_THRES   0xfff
 
#define V_DIP4_THRES(x)   ((x) << S_DIP4_THRES)
 
#define G_DIP4_THRES(x)   (((x) >> S_DIP4_THRES) & M_DIP4_THRES)
 
#define S_DIP4_THRES_ENABLE   21
 
#define V_DIP4_THRES_ENABLE(x)   ((x) << S_DIP4_THRES_ENABLE)
 
#define F_DIP4_THRES_ENABLE   V_DIP4_THRES_ENABLE(1U)
 
#define S_FORCE_DISABLE_STATUS   22
 
#define V_FORCE_DISABLE_STATUS(x)   ((x) << S_FORCE_DISABLE_STATUS)
 
#define F_FORCE_DISABLE_STATUS   V_FORCE_DISABLE_STATUS(1U)
 
#define S_DYNAMIC_DESKEW   23
 
#define V_DYNAMIC_DESKEW(x)   ((x) << S_DYNAMIC_DESKEW)
 
#define F_DYNAMIC_DESKEW   V_DYNAMIC_DESKEW(1U)
 
#define S_MONITORED_PORT_NUM   25
 
#define M_MONITORED_PORT_NUM   0x3
 
#define V_MONITORED_PORT_NUM(x)   ((x) << S_MONITORED_PORT_NUM)
 
#define G_MONITORED_PORT_NUM(x)   (((x) >> S_MONITORED_PORT_NUM) & M_MONITORED_PORT_NUM)
 
#define S_MONITORED_DIRECTION   27
 
#define V_MONITORED_DIRECTION(x)   ((x) << S_MONITORED_DIRECTION)
 
#define F_MONITORED_DIRECTION   V_MONITORED_DIRECTION(1U)
 
#define S_MONITORED_INTERFACE   28
 
#define V_MONITORED_INTERFACE(x)   ((x) << S_MONITORED_INTERFACE)
 
#define F_MONITORED_INTERFACE   V_MONITORED_INTERFACE(1U)
 
#define A_ESPI_DIP2_ERR_COUNT   0x8f4
 
#define S_DIP2_ERR_CNT   0
 
#define M_DIP2_ERR_CNT   0xf
 
#define V_DIP2_ERR_CNT(x)   ((x) << S_DIP2_ERR_CNT)
 
#define G_DIP2_ERR_CNT(x)   (((x) >> S_DIP2_ERR_CNT) & M_DIP2_ERR_CNT)
 
#define A_ESPI_CMD_ADDR   0x8f8
 
#define S_WRITE_DATA   0
 
#define M_WRITE_DATA   0xff
 
#define V_WRITE_DATA(x)   ((x) << S_WRITE_DATA)
 
#define G_WRITE_DATA(x)   (((x) >> S_WRITE_DATA) & M_WRITE_DATA)
 
#define S_REGISTER_OFFSET   8
 
#define M_REGISTER_OFFSET   0xf
 
#define V_REGISTER_OFFSET(x)   ((x) << S_REGISTER_OFFSET)
 
#define G_REGISTER_OFFSET(x)   (((x) >> S_REGISTER_OFFSET) & M_REGISTER_OFFSET)
 
#define S_CHANNEL_ADDR   12
 
#define M_CHANNEL_ADDR   0xf
 
#define V_CHANNEL_ADDR(x)   ((x) << S_CHANNEL_ADDR)
 
#define G_CHANNEL_ADDR(x)   (((x) >> S_CHANNEL_ADDR) & M_CHANNEL_ADDR)
 
#define S_MODULE_ADDR   16
 
#define M_MODULE_ADDR   0x3
 
#define V_MODULE_ADDR(x)   ((x) << S_MODULE_ADDR)
 
#define G_MODULE_ADDR(x)   (((x) >> S_MODULE_ADDR) & M_MODULE_ADDR)
 
#define S_BUNDLE_ADDR   20
 
#define M_BUNDLE_ADDR   0x3
 
#define V_BUNDLE_ADDR(x)   ((x) << S_BUNDLE_ADDR)
 
#define G_BUNDLE_ADDR(x)   (((x) >> S_BUNDLE_ADDR) & M_BUNDLE_ADDR)
 
#define S_SPI4_COMMAND   24
 
#define M_SPI4_COMMAND   0xff
 
#define V_SPI4_COMMAND(x)   ((x) << S_SPI4_COMMAND)
 
#define G_SPI4_COMMAND(x)   (((x) >> S_SPI4_COMMAND) & M_SPI4_COMMAND)
 
#define A_ESPI_GOSTAT   0x8fc
 
#define S_READ_DATA   0
 
#define M_READ_DATA   0xff
 
#define V_READ_DATA(x)   ((x) << S_READ_DATA)
 
#define G_READ_DATA(x)   (((x) >> S_READ_DATA) & M_READ_DATA)
 
#define S_ESPI_CMD_BUSY   8
 
#define V_ESPI_CMD_BUSY(x)   ((x) << S_ESPI_CMD_BUSY)
 
#define F_ESPI_CMD_BUSY   V_ESPI_CMD_BUSY(1U)
 
#define S_ERROR_ACK   9
 
#define V_ERROR_ACK(x)   ((x) << S_ERROR_ACK)
 
#define F_ERROR_ACK   V_ERROR_ACK(1U)
 
#define S_UNMAPPED_ERR   10
 
#define V_UNMAPPED_ERR(x)   ((x) << S_UNMAPPED_ERR)
 
#define F_UNMAPPED_ERR   V_UNMAPPED_ERR(1U)
 
#define S_TRANSACTION_TIMER   16
 
#define M_TRANSACTION_TIMER   0xff
 
#define V_TRANSACTION_TIMER(x)   ((x) << S_TRANSACTION_TIMER)
 
#define G_TRANSACTION_TIMER(x)   (((x) >> S_TRANSACTION_TIMER) & M_TRANSACTION_TIMER)
 
#define A_ULP_ULIMIT   0x980
 
#define A_ULP_TAGMASK   0x984
 
#define A_ULP_HREG_INDEX   0x988
 
#define A_ULP_HREG_DATA   0x98c
 
#define A_ULP_INT_ENABLE   0x990
 
#define A_ULP_INT_CAUSE   0x994
 
#define S_HREG_PAR_ERR   0
 
#define V_HREG_PAR_ERR(x)   ((x) << S_HREG_PAR_ERR)
 
#define F_HREG_PAR_ERR   V_HREG_PAR_ERR(1U)
 
#define S_EGRS_DATA_PAR_ERR   1
 
#define V_EGRS_DATA_PAR_ERR(x)   ((x) << S_EGRS_DATA_PAR_ERR)
 
#define F_EGRS_DATA_PAR_ERR   V_EGRS_DATA_PAR_ERR(1U)
 
#define S_INGRS_DATA_PAR_ERR   2
 
#define V_INGRS_DATA_PAR_ERR(x)   ((x) << S_INGRS_DATA_PAR_ERR)
 
#define F_INGRS_DATA_PAR_ERR   V_INGRS_DATA_PAR_ERR(1U)
 
#define S_PM_INTR   3
 
#define V_PM_INTR(x)   ((x) << S_PM_INTR)
 
#define F_PM_INTR   V_PM_INTR(1U)
 
#define S_PM_E2C_SYNC_ERR   4
 
#define V_PM_E2C_SYNC_ERR(x)   ((x) << S_PM_E2C_SYNC_ERR)
 
#define F_PM_E2C_SYNC_ERR   V_PM_E2C_SYNC_ERR(1U)
 
#define S_PM_C2E_SYNC_ERR   5
 
#define V_PM_C2E_SYNC_ERR(x)   ((x) << S_PM_C2E_SYNC_ERR)
 
#define F_PM_C2E_SYNC_ERR   V_PM_C2E_SYNC_ERR(1U)
 
#define S_PM_E2C_EMPTY_ERR   6
 
#define V_PM_E2C_EMPTY_ERR(x)   ((x) << S_PM_E2C_EMPTY_ERR)
 
#define F_PM_E2C_EMPTY_ERR   V_PM_E2C_EMPTY_ERR(1U)
 
#define S_PM_C2E_EMPTY_ERR   7
 
#define V_PM_C2E_EMPTY_ERR(x)   ((x) << S_PM_C2E_EMPTY_ERR)
 
#define F_PM_C2E_EMPTY_ERR   V_PM_C2E_EMPTY_ERR(1U)
 
#define S_PM_PAR_ERR   8
 
#define M_PM_PAR_ERR   0xffff
 
#define V_PM_PAR_ERR(x)   ((x) << S_PM_PAR_ERR)
 
#define G_PM_PAR_ERR(x)   (((x) >> S_PM_PAR_ERR) & M_PM_PAR_ERR)
 
#define S_PM_E2C_WRT_FULL   24
 
#define V_PM_E2C_WRT_FULL(x)   ((x) << S_PM_E2C_WRT_FULL)
 
#define F_PM_E2C_WRT_FULL   V_PM_E2C_WRT_FULL(1U)
 
#define S_PM_C2E_WRT_FULL   25
 
#define V_PM_C2E_WRT_FULL(x)   ((x) << S_PM_C2E_WRT_FULL)
 
#define F_PM_C2E_WRT_FULL   V_PM_C2E_WRT_FULL(1U)
 
#define A_ULP_PIO_CTRL   0x998
 
#define A_PL_ENABLE   0xa00
 
#define S_PL_INTR_SGE_ERR   0
 
#define V_PL_INTR_SGE_ERR(x)   ((x) << S_PL_INTR_SGE_ERR)
 
#define F_PL_INTR_SGE_ERR   V_PL_INTR_SGE_ERR(1U)
 
#define S_PL_INTR_SGE_DATA   1
 
#define V_PL_INTR_SGE_DATA(x)   ((x) << S_PL_INTR_SGE_DATA)
 
#define F_PL_INTR_SGE_DATA   V_PL_INTR_SGE_DATA(1U)
 
#define S_PL_INTR_MC3   2
 
#define V_PL_INTR_MC3(x)   ((x) << S_PL_INTR_MC3)
 
#define F_PL_INTR_MC3   V_PL_INTR_MC3(1U)
 
#define S_PL_INTR_MC4   3
 
#define V_PL_INTR_MC4(x)   ((x) << S_PL_INTR_MC4)
 
#define F_PL_INTR_MC4   V_PL_INTR_MC4(1U)
 
#define S_PL_INTR_MC5   4
 
#define V_PL_INTR_MC5(x)   ((x) << S_PL_INTR_MC5)
 
#define F_PL_INTR_MC5   V_PL_INTR_MC5(1U)
 
#define S_PL_INTR_RAT   5
 
#define V_PL_INTR_RAT(x)   ((x) << S_PL_INTR_RAT)
 
#define F_PL_INTR_RAT   V_PL_INTR_RAT(1U)
 
#define S_PL_INTR_TP   6
 
#define V_PL_INTR_TP(x)   ((x) << S_PL_INTR_TP)
 
#define F_PL_INTR_TP   V_PL_INTR_TP(1U)
 
#define S_PL_INTR_ULP   7
 
#define V_PL_INTR_ULP(x)   ((x) << S_PL_INTR_ULP)
 
#define F_PL_INTR_ULP   V_PL_INTR_ULP(1U)
 
#define S_PL_INTR_ESPI   8
 
#define V_PL_INTR_ESPI(x)   ((x) << S_PL_INTR_ESPI)
 
#define F_PL_INTR_ESPI   V_PL_INTR_ESPI(1U)
 
#define S_PL_INTR_CSPI   9
 
#define V_PL_INTR_CSPI(x)   ((x) << S_PL_INTR_CSPI)
 
#define F_PL_INTR_CSPI   V_PL_INTR_CSPI(1U)
 
#define S_PL_INTR_PCIX   10
 
#define V_PL_INTR_PCIX(x)   ((x) << S_PL_INTR_PCIX)
 
#define F_PL_INTR_PCIX   V_PL_INTR_PCIX(1U)
 
#define S_PL_INTR_EXT   11
 
#define V_PL_INTR_EXT(x)   ((x) << S_PL_INTR_EXT)
 
#define F_PL_INTR_EXT   V_PL_INTR_EXT(1U)
 
#define A_PL_CAUSE   0xa04
 
#define A_MC5_CONFIG   0xc04
 
#define S_MODE   0
 
#define V_MODE(x)   ((x) << S_MODE)
 
#define F_MODE   V_MODE(1U)
 
#define S_TCAM_RESET   1
 
#define V_TCAM_RESET(x)   ((x) << S_TCAM_RESET)
 
#define F_TCAM_RESET   V_TCAM_RESET(1U)
 
#define S_TCAM_READY   2
 
#define V_TCAM_READY(x)   ((x) << S_TCAM_READY)
 
#define F_TCAM_READY   V_TCAM_READY(1U)
 
#define S_DBGI_ENABLE   4
 
#define V_DBGI_ENABLE(x)   ((x) << S_DBGI_ENABLE)
 
#define F_DBGI_ENABLE   V_DBGI_ENABLE(1U)
 
#define S_M_BUS_ENABLE   5
 
#define V_M_BUS_ENABLE(x)   ((x) << S_M_BUS_ENABLE)
 
#define F_M_BUS_ENABLE   V_M_BUS_ENABLE(1U)
 
#define S_PARITY_ENABLE   6
 
#define V_PARITY_ENABLE(x)   ((x) << S_PARITY_ENABLE)
 
#define F_PARITY_ENABLE   V_PARITY_ENABLE(1U)
 
#define S_SYN_ISSUE_MODE   7
 
#define M_SYN_ISSUE_MODE   0x3
 
#define V_SYN_ISSUE_MODE(x)   ((x) << S_SYN_ISSUE_MODE)
 
#define G_SYN_ISSUE_MODE(x)   (((x) >> S_SYN_ISSUE_MODE) & M_SYN_ISSUE_MODE)
 
#define S_BUILD   16
 
#define V_BUILD(x)   ((x) << S_BUILD)
 
#define F_BUILD   V_BUILD(1U)
 
#define S_COMPRESSION_ENABLE   17
 
#define V_COMPRESSION_ENABLE(x)   ((x) << S_COMPRESSION_ENABLE)
 
#define F_COMPRESSION_ENABLE   V_COMPRESSION_ENABLE(1U)
 
#define S_NUM_LIP   18
 
#define M_NUM_LIP   0x3f
 
#define V_NUM_LIP(x)   ((x) << S_NUM_LIP)
 
#define G_NUM_LIP(x)   (((x) >> S_NUM_LIP) & M_NUM_LIP)
 
#define S_TCAM_PART_CNT   24
 
#define M_TCAM_PART_CNT   0x3
 
#define V_TCAM_PART_CNT(x)   ((x) << S_TCAM_PART_CNT)
 
#define G_TCAM_PART_CNT(x)   (((x) >> S_TCAM_PART_CNT) & M_TCAM_PART_CNT)
 
#define S_TCAM_PART_TYPE   26
 
#define M_TCAM_PART_TYPE   0x3
 
#define V_TCAM_PART_TYPE(x)   ((x) << S_TCAM_PART_TYPE)
 
#define G_TCAM_PART_TYPE(x)   (((x) >> S_TCAM_PART_TYPE) & M_TCAM_PART_TYPE)
 
#define S_TCAM_PART_SIZE   28
 
#define M_TCAM_PART_SIZE   0x3
 
#define V_TCAM_PART_SIZE(x)   ((x) << S_TCAM_PART_SIZE)
 
#define G_TCAM_PART_SIZE(x)   (((x) >> S_TCAM_PART_SIZE) & M_TCAM_PART_SIZE)
 
#define S_TCAM_PART_TYPE_HI   30
 
#define V_TCAM_PART_TYPE_HI(x)   ((x) << S_TCAM_PART_TYPE_HI)
 
#define F_TCAM_PART_TYPE_HI   V_TCAM_PART_TYPE_HI(1U)
 
#define A_MC5_SIZE   0xc08
 
#define S_SIZE   0
 
#define M_SIZE   0x3fffff
 
#define V_SIZE(x)   ((x) << S_SIZE)
 
#define G_SIZE(x)   (((x) >> S_SIZE) & M_SIZE)
 
#define A_MC5_ROUTING_TABLE_INDEX   0xc0c
 
#define S_START_OF_ROUTING_TABLE   0
 
#define M_START_OF_ROUTING_TABLE   0x3fffff
 
#define V_START_OF_ROUTING_TABLE(x)   ((x) << S_START_OF_ROUTING_TABLE)
 
#define G_START_OF_ROUTING_TABLE(x)   (((x) >> S_START_OF_ROUTING_TABLE) & M_START_OF_ROUTING_TABLE)
 
#define A_MC5_SERVER_INDEX   0xc14
 
#define S_START_OF_SERVER_INDEX   0
 
#define M_START_OF_SERVER_INDEX   0x3fffff
 
#define V_START_OF_SERVER_INDEX(x)   ((x) << S_START_OF_SERVER_INDEX)
 
#define G_START_OF_SERVER_INDEX(x)   (((x) >> S_START_OF_SERVER_INDEX) & M_START_OF_SERVER_INDEX)
 
#define A_MC5_LIP_RAM_ADDR   0xc18
 
#define S_LOCAL_IP_RAM_ADDR   0
 
#define M_LOCAL_IP_RAM_ADDR   0x3f
 
#define V_LOCAL_IP_RAM_ADDR(x)   ((x) << S_LOCAL_IP_RAM_ADDR)
 
#define G_LOCAL_IP_RAM_ADDR(x)   (((x) >> S_LOCAL_IP_RAM_ADDR) & M_LOCAL_IP_RAM_ADDR)
 
#define S_RAM_WRITE_ENABLE   8
 
#define V_RAM_WRITE_ENABLE(x)   ((x) << S_RAM_WRITE_ENABLE)
 
#define F_RAM_WRITE_ENABLE   V_RAM_WRITE_ENABLE(1U)
 
#define A_MC5_LIP_RAM_DATA   0xc1c
 
#define A_MC5_RSP_LATENCY   0xc20
 
#define S_SEARCH_RESPONSE_LATENCY   0
 
#define M_SEARCH_RESPONSE_LATENCY   0x1f
 
#define V_SEARCH_RESPONSE_LATENCY(x)   ((x) << S_SEARCH_RESPONSE_LATENCY)
 
#define G_SEARCH_RESPONSE_LATENCY(x)   (((x) >> S_SEARCH_RESPONSE_LATENCY) & M_SEARCH_RESPONSE_LATENCY)
 
#define S_LEARN_RESPONSE_LATENCY   8
 
#define M_LEARN_RESPONSE_LATENCY   0x1f
 
#define V_LEARN_RESPONSE_LATENCY(x)   ((x) << S_LEARN_RESPONSE_LATENCY)
 
#define G_LEARN_RESPONSE_LATENCY(x)   (((x) >> S_LEARN_RESPONSE_LATENCY) & M_LEARN_RESPONSE_LATENCY)
 
#define A_MC5_PARITY_LATENCY   0xc24
 
#define S_SRCHLAT   0
 
#define M_SRCHLAT   0x1f
 
#define V_SRCHLAT(x)   ((x) << S_SRCHLAT)
 
#define G_SRCHLAT(x)   (((x) >> S_SRCHLAT) & M_SRCHLAT)
 
#define S_PARLAT   8
 
#define M_PARLAT   0x1f
 
#define V_PARLAT(x)   ((x) << S_PARLAT)
 
#define G_PARLAT(x)   (((x) >> S_PARLAT) & M_PARLAT)
 
#define A_MC5_WR_LRN_VERIFY   0xc28
 
#define S_POVEREN   0
 
#define V_POVEREN(x)   ((x) << S_POVEREN)
 
#define F_POVEREN   V_POVEREN(1U)
 
#define S_LRNVEREN   1
 
#define V_LRNVEREN(x)   ((x) << S_LRNVEREN)
 
#define F_LRNVEREN   V_LRNVEREN(1U)
 
#define S_VWVEREN   2
 
#define V_VWVEREN(x)   ((x) << S_VWVEREN)
 
#define F_VWVEREN   V_VWVEREN(1U)
 
#define A_MC5_PART_ID_INDEX   0xc2c
 
#define S_IDINDEX   0
 
#define M_IDINDEX   0xf
 
#define V_IDINDEX(x)   ((x) << S_IDINDEX)
 
#define G_IDINDEX(x)   (((x) >> S_IDINDEX) & M_IDINDEX)
 
#define A_MC5_RESET_MAX   0xc30
 
#define S_RSTMAX   0
 
#define M_RSTMAX   0x1ff
 
#define V_RSTMAX(x)   ((x) << S_RSTMAX)
 
#define G_RSTMAX(x)   (((x) >> S_RSTMAX) & M_RSTMAX)
 
#define A_MC5_INT_ENABLE   0xc40
 
#define S_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR   0
 
#define V_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR(x)   ((x) << S_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR)
 
#define F_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR   V_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR(1U)
 
#define S_MC5_INT_HIT_IN_ACTIVE_REGION_ERR   1
 
#define V_MC5_INT_HIT_IN_ACTIVE_REGION_ERR(x)   ((x) << S_MC5_INT_HIT_IN_ACTIVE_REGION_ERR)
 
#define F_MC5_INT_HIT_IN_ACTIVE_REGION_ERR   V_MC5_INT_HIT_IN_ACTIVE_REGION_ERR(1U)
 
#define S_MC5_INT_HIT_IN_RT_REGION_ERR   2
 
#define V_MC5_INT_HIT_IN_RT_REGION_ERR(x)   ((x) << S_MC5_INT_HIT_IN_RT_REGION_ERR)
 
#define F_MC5_INT_HIT_IN_RT_REGION_ERR   V_MC5_INT_HIT_IN_RT_REGION_ERR(1U)
 
#define S_MC5_INT_MISS_ERR   3
 
#define V_MC5_INT_MISS_ERR(x)   ((x) << S_MC5_INT_MISS_ERR)
 
#define F_MC5_INT_MISS_ERR   V_MC5_INT_MISS_ERR(1U)
 
#define S_MC5_INT_LIP0_ERR   4
 
#define V_MC5_INT_LIP0_ERR(x)   ((x) << S_MC5_INT_LIP0_ERR)
 
#define F_MC5_INT_LIP0_ERR   V_MC5_INT_LIP0_ERR(1U)
 
#define S_MC5_INT_LIP_MISS_ERR   5
 
#define V_MC5_INT_LIP_MISS_ERR(x)   ((x) << S_MC5_INT_LIP_MISS_ERR)
 
#define F_MC5_INT_LIP_MISS_ERR   V_MC5_INT_LIP_MISS_ERR(1U)
 
#define S_MC5_INT_PARITY_ERR   6
 
#define V_MC5_INT_PARITY_ERR(x)   ((x) << S_MC5_INT_PARITY_ERR)
 
#define F_MC5_INT_PARITY_ERR   V_MC5_INT_PARITY_ERR(1U)
 
#define S_MC5_INT_ACTIVE_REGION_FULL   7
 
#define V_MC5_INT_ACTIVE_REGION_FULL(x)   ((x) << S_MC5_INT_ACTIVE_REGION_FULL)
 
#define F_MC5_INT_ACTIVE_REGION_FULL   V_MC5_INT_ACTIVE_REGION_FULL(1U)
 
#define S_MC5_INT_NFA_SRCH_ERR   8
 
#define V_MC5_INT_NFA_SRCH_ERR(x)   ((x) << S_MC5_INT_NFA_SRCH_ERR)
 
#define F_MC5_INT_NFA_SRCH_ERR   V_MC5_INT_NFA_SRCH_ERR(1U)
 
#define S_MC5_INT_SYN_COOKIE   9
 
#define V_MC5_INT_SYN_COOKIE(x)   ((x) << S_MC5_INT_SYN_COOKIE)
 
#define F_MC5_INT_SYN_COOKIE   V_MC5_INT_SYN_COOKIE(1U)
 
#define S_MC5_INT_SYN_COOKIE_BAD   10
 
#define V_MC5_INT_SYN_COOKIE_BAD(x)   ((x) << S_MC5_INT_SYN_COOKIE_BAD)
 
#define F_MC5_INT_SYN_COOKIE_BAD   V_MC5_INT_SYN_COOKIE_BAD(1U)
 
#define S_MC5_INT_SYN_COOKIE_OFF   11
 
#define V_MC5_INT_SYN_COOKIE_OFF(x)   ((x) << S_MC5_INT_SYN_COOKIE_OFF)
 
#define F_MC5_INT_SYN_COOKIE_OFF   V_MC5_INT_SYN_COOKIE_OFF(1U)
 
#define S_MC5_INT_UNKNOWN_CMD   15
 
#define V_MC5_INT_UNKNOWN_CMD(x)   ((x) << S_MC5_INT_UNKNOWN_CMD)
 
#define F_MC5_INT_UNKNOWN_CMD   V_MC5_INT_UNKNOWN_CMD(1U)
 
#define S_MC5_INT_REQUESTQ_PARITY_ERR   16
 
#define V_MC5_INT_REQUESTQ_PARITY_ERR(x)   ((x) << S_MC5_INT_REQUESTQ_PARITY_ERR)
 
#define F_MC5_INT_REQUESTQ_PARITY_ERR   V_MC5_INT_REQUESTQ_PARITY_ERR(1U)
 
#define S_MC5_INT_DISPATCHQ_PARITY_ERR   17
 
#define V_MC5_INT_DISPATCHQ_PARITY_ERR(x)   ((x) << S_MC5_INT_DISPATCHQ_PARITY_ERR)
 
#define F_MC5_INT_DISPATCHQ_PARITY_ERR   V_MC5_INT_DISPATCHQ_PARITY_ERR(1U)
 
#define S_MC5_INT_DEL_ACT_EMPTY   18
 
#define V_MC5_INT_DEL_ACT_EMPTY(x)   ((x) << S_MC5_INT_DEL_ACT_EMPTY)
 
#define F_MC5_INT_DEL_ACT_EMPTY   V_MC5_INT_DEL_ACT_EMPTY(1U)
 
#define A_MC5_INT_CAUSE   0xc44
 
#define A_MC5_INT_TID   0xc48
 
#define A_MC5_INT_PTID   0xc4c
 
#define A_MC5_DBGI_CONFIG   0xc74
 
#define A_MC5_DBGI_REQ_CMD   0xc78
 
#define S_CMDMODE   0
 
#define M_CMDMODE   0x7
 
#define V_CMDMODE(x)   ((x) << S_CMDMODE)
 
#define G_CMDMODE(x)   (((x) >> S_CMDMODE) & M_CMDMODE)
 
#define S_SADRSEL   4
 
#define V_SADRSEL(x)   ((x) << S_SADRSEL)
 
#define F_SADRSEL   V_SADRSEL(1U)
 
#define S_WRITE_BURST_SIZE   22
 
#define M_WRITE_BURST_SIZE   0x3ff
 
#define V_WRITE_BURST_SIZE(x)   ((x) << S_WRITE_BURST_SIZE)
 
#define G_WRITE_BURST_SIZE(x)   (((x) >> S_WRITE_BURST_SIZE) & M_WRITE_BURST_SIZE)
 
#define A_MC5_DBGI_REQ_ADDR0   0xc7c
 
#define A_MC5_DBGI_REQ_ADDR1   0xc80
 
#define A_MC5_DBGI_REQ_ADDR2   0xc84
 
#define A_MC5_DBGI_REQ_DATA0   0xc88
 
#define A_MC5_DBGI_REQ_DATA1   0xc8c
 
#define A_MC5_DBGI_REQ_DATA2   0xc90
 
#define A_MC5_DBGI_REQ_DATA3   0xc94
 
#define A_MC5_DBGI_REQ_DATA4   0xc98
 
#define A_MC5_DBGI_REQ_MASK0   0xc9c
 
#define A_MC5_DBGI_REQ_MASK1   0xca0
 
#define A_MC5_DBGI_REQ_MASK2   0xca4
 
#define A_MC5_DBGI_REQ_MASK3   0xca8
 
#define A_MC5_DBGI_REQ_MASK4   0xcac
 
#define A_MC5_DBGI_RSP_STATUS   0xcb0
 
#define S_DBGI_RSP_VALID   0
 
#define V_DBGI_RSP_VALID(x)   ((x) << S_DBGI_RSP_VALID)
 
#define F_DBGI_RSP_VALID   V_DBGI_RSP_VALID(1U)
 
#define S_DBGI_RSP_HIT   1
 
#define V_DBGI_RSP_HIT(x)   ((x) << S_DBGI_RSP_HIT)
 
#define F_DBGI_RSP_HIT   V_DBGI_RSP_HIT(1U)
 
#define S_DBGI_RSP_ERR   2
 
#define V_DBGI_RSP_ERR(x)   ((x) << S_DBGI_RSP_ERR)
 
#define F_DBGI_RSP_ERR   V_DBGI_RSP_ERR(1U)
 
#define S_DBGI_RSP_ERR_REASON   8
 
#define M_DBGI_RSP_ERR_REASON   0x7
 
#define V_DBGI_RSP_ERR_REASON(x)   ((x) << S_DBGI_RSP_ERR_REASON)
 
#define G_DBGI_RSP_ERR_REASON(x)   (((x) >> S_DBGI_RSP_ERR_REASON) & M_DBGI_RSP_ERR_REASON)
 
#define A_MC5_DBGI_RSP_DATA0   0xcb4
 
#define A_MC5_DBGI_RSP_DATA1   0xcb8
 
#define A_MC5_DBGI_RSP_DATA2   0xcbc
 
#define A_MC5_DBGI_RSP_DATA3   0xcc0
 
#define A_MC5_DBGI_RSP_DATA4   0xcc4
 
#define A_MC5_DBGI_RSP_LAST_CMD   0xcc8
 
#define A_MC5_POPEN_DATA_WR_CMD   0xccc
 
#define A_MC5_POPEN_MASK_WR_CMD   0xcd0
 
#define A_MC5_AOPEN_SRCH_CMD   0xcd4
 
#define A_MC5_AOPEN_LRN_CMD   0xcd8
 
#define A_MC5_SYN_SRCH_CMD   0xcdc
 
#define A_MC5_SYN_LRN_CMD   0xce0
 
#define A_MC5_ACK_SRCH_CMD   0xce4
 
#define A_MC5_ACK_LRN_CMD   0xce8
 
#define A_MC5_ILOOKUP_CMD   0xcec
 
#define A_MC5_ELOOKUP_CMD   0xcf0
 
#define A_MC5_DATA_WRITE_CMD   0xcf4
 
#define A_MC5_DATA_READ_CMD   0xcf8
 
#define A_MC5_MASK_WRITE_CMD   0xcfc
 
#define A_PCICFG_PM_CSR   0x44
 
#define A_PCICFG_VPD_ADDR   0x4a
 
#define S_VPD_ADDR   0
 
#define M_VPD_ADDR   0x7fff
 
#define V_VPD_ADDR(x)   ((x) << S_VPD_ADDR)
 
#define G_VPD_ADDR(x)   (((x) >> S_VPD_ADDR) & M_VPD_ADDR)
 
#define S_VPD_OP_FLAG   15
 
#define V_VPD_OP_FLAG(x)   ((x) << S_VPD_OP_FLAG)
 
#define F_VPD_OP_FLAG   V_VPD_OP_FLAG(1U)
 
#define A_PCICFG_VPD_DATA   0x4c
 
#define A_PCICFG_PCIX_CMD   0x60
 
#define A_PCICFG_INTR_ENABLE   0xf4
 
#define S_MASTER_PARITY_ERR   0
 
#define V_MASTER_PARITY_ERR(x)   ((x) << S_MASTER_PARITY_ERR)
 
#define F_MASTER_PARITY_ERR   V_MASTER_PARITY_ERR(1U)
 
#define S_SIG_TARGET_ABORT   1
 
#define V_SIG_TARGET_ABORT(x)   ((x) << S_SIG_TARGET_ABORT)
 
#define F_SIG_TARGET_ABORT   V_SIG_TARGET_ABORT(1U)
 
#define S_RCV_TARGET_ABORT   2
 
#define V_RCV_TARGET_ABORT(x)   ((x) << S_RCV_TARGET_ABORT)
 
#define F_RCV_TARGET_ABORT   V_RCV_TARGET_ABORT(1U)
 
#define S_RCV_MASTER_ABORT   3
 
#define V_RCV_MASTER_ABORT(x)   ((x) << S_RCV_MASTER_ABORT)
 
#define F_RCV_MASTER_ABORT   V_RCV_MASTER_ABORT(1U)
 
#define S_SIG_SYS_ERR   4
 
#define V_SIG_SYS_ERR(x)   ((x) << S_SIG_SYS_ERR)
 
#define F_SIG_SYS_ERR   V_SIG_SYS_ERR(1U)
 
#define S_DET_PARITY_ERR   5
 
#define V_DET_PARITY_ERR(x)   ((x) << S_DET_PARITY_ERR)
 
#define F_DET_PARITY_ERR   V_DET_PARITY_ERR(1U)
 
#define S_PIO_PARITY_ERR   6
 
#define V_PIO_PARITY_ERR(x)   ((x) << S_PIO_PARITY_ERR)
 
#define F_PIO_PARITY_ERR   V_PIO_PARITY_ERR(1U)
 
#define S_WF_PARITY_ERR   7
 
#define V_WF_PARITY_ERR(x)   ((x) << S_WF_PARITY_ERR)
 
#define F_WF_PARITY_ERR   V_WF_PARITY_ERR(1U)
 
#define S_RF_PARITY_ERR   8
 
#define M_RF_PARITY_ERR   0x3
 
#define V_RF_PARITY_ERR(x)   ((x) << S_RF_PARITY_ERR)
 
#define G_RF_PARITY_ERR(x)   (((x) >> S_RF_PARITY_ERR) & M_RF_PARITY_ERR)
 
#define S_CF_PARITY_ERR   10
 
#define M_CF_PARITY_ERR   0x3
 
#define V_CF_PARITY_ERR(x)   ((x) << S_CF_PARITY_ERR)
 
#define G_CF_PARITY_ERR(x)   (((x) >> S_CF_PARITY_ERR) & M_CF_PARITY_ERR)
 
#define A_PCICFG_INTR_CAUSE   0xf8
 
#define A_PCICFG_MODE   0xfc
 
#define S_PCI_MODE_64BIT   0
 
#define V_PCI_MODE_64BIT(x)   ((x) << S_PCI_MODE_64BIT)
 
#define F_PCI_MODE_64BIT   V_PCI_MODE_64BIT(1U)
 
#define S_PCI_MODE_66MHZ   1
 
#define V_PCI_MODE_66MHZ(x)   ((x) << S_PCI_MODE_66MHZ)
 
#define F_PCI_MODE_66MHZ   V_PCI_MODE_66MHZ(1U)
 
#define S_PCI_MODE_PCIX_INITPAT   2
 
#define M_PCI_MODE_PCIX_INITPAT   0x7
 
#define V_PCI_MODE_PCIX_INITPAT(x)   ((x) << S_PCI_MODE_PCIX_INITPAT)
 
#define G_PCI_MODE_PCIX_INITPAT(x)   (((x) >> S_PCI_MODE_PCIX_INITPAT) & M_PCI_MODE_PCIX_INITPAT)
 
#define S_PCI_MODE_PCIX   5
 
#define V_PCI_MODE_PCIX(x)   ((x) << S_PCI_MODE_PCIX)
 
#define F_PCI_MODE_PCIX   V_PCI_MODE_PCIX(1U)
 
#define S_PCI_MODE_CLK   6
 
#define M_PCI_MODE_CLK   0x3
 
#define V_PCI_MODE_CLK(x)   ((x) << S_PCI_MODE_CLK)
 
#define G_PCI_MODE_CLK(x)   (((x) >> S_PCI_MODE_CLK) & M_PCI_MODE_CLK)
 

Macro Definition Documentation

#define A_CSPI_CALENDAR_LEN   0x818

Definition at line 1316 of file regs.h.

#define A_CSPI_FIFO_STATUS_ENABLE   0x820

Definition at line 1323 of file regs.h.

#define A_CSPI_INTR_ENABLE   0x84c

Definition at line 1375 of file regs.h.

#define A_CSPI_INTR_STATUS   0x848

Definition at line 1353 of file regs.h.

#define A_CSPI_MAXBURST1_MAXBURST2   0x828

Definition at line 1329 of file regs.h.

#define A_CSPI_RX_AE_WM   0x810

Definition at line 1314 of file regs.h.

#define A_CSPI_RX_AF_WM   0x814

Definition at line 1315 of file regs.h.

#define A_CSPI_TRAIN   0x82c

Definition at line 1341 of file regs.h.

#define A_DIP4_ERROR_COUNT   0x8c4

Definition at line 1533 of file regs.h.

#define A_ESPI_CALENDAR_LENGTH   0x898

Definition at line 1420 of file regs.h.

#define A_ESPI_CMD_ADDR   0x8f8

Definition at line 1632 of file regs.h.

#define A_ESPI_DIP2_ERR_COUNT   0x8f4

Definition at line 1625 of file regs.h.

#define A_ESPI_FIFO_STATUS_ENABLE   0x8a0

Definition at line 1433 of file regs.h.

#define A_ESPI_GOSTAT   0x8fc

Definition at line 1664 of file regs.h.

#define A_ESPI_INTR_ENABLE   0x8cc

Definition at line 1563 of file regs.h.

#define A_ESPI_INTR_STATUS   0x8c8

Definition at line 1557 of file regs.h.

#define A_ESPI_MAXBURST1_MAXBURST2   0x8a8

Definition at line 1455 of file regs.h.

#define A_ESPI_MISC_CONTROL   0x8f0

Definition at line 1579 of file regs.h.

#define A_ESPI_RX_FIFO_ALMOST_EMPTY_WATERMARK   0x890

Definition at line 1406 of file regs.h.

#define A_ESPI_RX_FIFO_ALMOST_FULL_WATERMARK   0x894

Definition at line 1413 of file regs.h.

#define A_ESPI_RX_RESET   0x8ec

Definition at line 1565 of file regs.h.

#define A_ESPI_SCH_TOKEN0   0x880

Definition at line 1378 of file regs.h.

#define A_ESPI_SCH_TOKEN1   0x884

Definition at line 1385 of file regs.h.

#define A_ESPI_SCH_TOKEN2   0x888

Definition at line 1392 of file regs.h.

#define A_ESPI_SCH_TOKEN3   0x88c

Definition at line 1399 of file regs.h.

#define A_ESPI_TRAIN   0x8ac

Definition at line 1456 of file regs.h.

#define A_MC3_BD_ADDR   0x14c

Definition at line 451 of file regs.h.

#define A_MC3_BD_DATA0   0x150

Definition at line 452 of file regs.h.

#define A_MC3_BD_DATA1   0x154

Definition at line 453 of file regs.h.

#define A_MC3_BD_DATA2   0x158

Definition at line 454 of file regs.h.

#define A_MC3_BD_DATA3   0x15c

Definition at line 455 of file regs.h.

#define A_MC3_BD_DATA4   0x160

Definition at line 456 of file regs.h.

#define A_MC3_BD_OP   0x164

Definition at line 457 of file regs.h.

#define A_MC3_BIST_ADDR_BEG   0x168

Definition at line 463 of file regs.h.

#define A_MC3_BIST_ADDR_END   0x16c

Definition at line 464 of file regs.h.

#define A_MC3_BIST_DATA   0x170

Definition at line 465 of file regs.h.

#define A_MC3_BIST_OP   0x174

Definition at line 466 of file regs.h.

#define A_MC3_CE_ADDR   0x11c

Definition at line 427 of file regs.h.

#define A_MC3_CE_DATA0   0x120

Definition at line 434 of file regs.h.

#define A_MC3_CE_DATA1   0x124

Definition at line 435 of file regs.h.

#define A_MC3_CE_DATA2   0x128

Definition at line 436 of file regs.h.

#define A_MC3_CE_DATA3   0x12c

Definition at line 437 of file regs.h.

#define A_MC3_CE_DATA4   0x130

Definition at line 438 of file regs.h.

#define A_MC3_CFG   0x100

Definition at line 255 of file regs.h.

#define A_MC3_ECC_CNTL   0x118

Definition at line 407 of file regs.h.

#define A_MC3_EXT_MODE   0x108

Definition at line 341 of file regs.h.

#define A_MC3_INT_CAUSE   0x17c

Definition at line 500 of file regs.h.

#define A_MC3_INT_ENABLE   0x178

Definition at line 481 of file regs.h.

#define A_MC3_MODE   0x104

Definition at line 330 of file regs.h.

#define A_MC3_PRECHARG   0x10c

Definition at line 348 of file regs.h.

#define A_MC3_REFRESH   0x110

Definition at line 349 of file regs.h.

#define A_MC3_STROBE   0x114

Definition at line 360 of file regs.h.

#define A_MC3_UE_ADDR   0x134

Definition at line 439 of file regs.h.

#define A_MC3_UE_DATA0   0x138

Definition at line 446 of file regs.h.

#define A_MC3_UE_DATA1   0x13c

Definition at line 447 of file regs.h.

#define A_MC3_UE_DATA2   0x140

Definition at line 448 of file regs.h.

#define A_MC3_UE_DATA3   0x144

Definition at line 449 of file regs.h.

#define A_MC3_UE_DATA4   0x148

Definition at line 450 of file regs.h.

#define A_MC4_BD_ADDR   0x1cc

Definition at line 572 of file regs.h.

#define A_MC4_BD_DATA0   0x1d0

Definition at line 579 of file regs.h.

#define A_MC4_BD_DATA1   0x1d4

Definition at line 580 of file regs.h.

#define A_MC4_BD_DATA2   0x1d8

Definition at line 581 of file regs.h.

#define A_MC4_BD_DATA3   0x1dc

Definition at line 582 of file regs.h.

#define A_MC4_BD_DATA4   0x1e0

Definition at line 583 of file regs.h.

#define A_MC4_BD_OP   0x1e4

Definition at line 584 of file regs.h.

#define A_MC4_BIST_ADDR_BEG   0x1e8

Definition at line 590 of file regs.h.

#define A_MC4_BIST_ADDR_END   0x1ec

Definition at line 591 of file regs.h.

#define A_MC4_BIST_DATA   0x1f0

Definition at line 592 of file regs.h.

#define A_MC4_BIST_OP   0x1f4

Definition at line 593 of file regs.h.

#define A_MC4_CE_ADDR   0x19c

Definition at line 548 of file regs.h.

#define A_MC4_CE_DATA0   0x1a0

Definition at line 555 of file regs.h.

#define A_MC4_CE_DATA1   0x1a4

Definition at line 556 of file regs.h.

#define A_MC4_CE_DATA2   0x1a8

Definition at line 557 of file regs.h.

#define A_MC4_CE_DATA3   0x1ac

Definition at line 558 of file regs.h.

#define A_MC4_CE_DATA4   0x1b0

Definition at line 559 of file regs.h.

#define A_MC4_CFG   0x180

Definition at line 503 of file regs.h.

#define A_MC4_ECC_CNTL   0x198

Definition at line 547 of file regs.h.

#define A_MC4_EXT_MODE   0x188

Definition at line 538 of file regs.h.

#define A_MC4_INT_CAUSE   0x1fc

Definition at line 608 of file regs.h.

#define A_MC4_INT_ENABLE   0x1f8

Definition at line 594 of file regs.h.

#define A_MC4_MODE   0x184

Definition at line 531 of file regs.h.

#define A_MC4_REFRESH   0x190

Definition at line 545 of file regs.h.

#define A_MC4_STROBE   0x194

Definition at line 546 of file regs.h.

#define A_MC4_UE_ADDR   0x1b4

Definition at line 560 of file regs.h.

#define A_MC4_UE_DATA0   0x1b8

Definition at line 567 of file regs.h.

#define A_MC4_UE_DATA1   0x1bc

Definition at line 568 of file regs.h.

#define A_MC4_UE_DATA2   0x1c0

Definition at line 569 of file regs.h.

#define A_MC4_UE_DATA3   0x1c4

Definition at line 570 of file regs.h.

#define A_MC4_UE_DATA4   0x1c8

Definition at line 571 of file regs.h.

#define A_MC5_ACK_LRN_CMD   0xce8

Definition at line 2077 of file regs.h.

#define A_MC5_ACK_SRCH_CMD   0xce4

Definition at line 2076 of file regs.h.

#define A_MC5_AOPEN_LRN_CMD   0xcd8

Definition at line 2073 of file regs.h.

#define A_MC5_AOPEN_SRCH_CMD   0xcd4

Definition at line 2072 of file regs.h.

#define A_MC5_CONFIG   0xc04

Definition at line 1798 of file regs.h.

#define A_MC5_DATA_READ_CMD   0xcf8

Definition at line 2081 of file regs.h.

#define A_MC5_DATA_WRITE_CMD   0xcf4

Definition at line 2080 of file regs.h.

#define A_MC5_DBGI_CONFIG   0xc74

Definition at line 2015 of file regs.h.

#define A_MC5_DBGI_REQ_ADDR0   0xc7c

Definition at line 2032 of file regs.h.

#define A_MC5_DBGI_REQ_ADDR1   0xc80

Definition at line 2033 of file regs.h.

#define A_MC5_DBGI_REQ_ADDR2   0xc84

Definition at line 2034 of file regs.h.

#define A_MC5_DBGI_REQ_CMD   0xc78

Definition at line 2016 of file regs.h.

#define A_MC5_DBGI_REQ_DATA0   0xc88

Definition at line 2035 of file regs.h.

#define A_MC5_DBGI_REQ_DATA1   0xc8c

Definition at line 2036 of file regs.h.

#define A_MC5_DBGI_REQ_DATA2   0xc90

Definition at line 2037 of file regs.h.

#define A_MC5_DBGI_REQ_DATA3   0xc94

Definition at line 2038 of file regs.h.

#define A_MC5_DBGI_REQ_DATA4   0xc98

Definition at line 2039 of file regs.h.

#define A_MC5_DBGI_REQ_MASK0   0xc9c

Definition at line 2040 of file regs.h.

#define A_MC5_DBGI_REQ_MASK1   0xca0

Definition at line 2041 of file regs.h.

#define A_MC5_DBGI_REQ_MASK2   0xca4

Definition at line 2042 of file regs.h.

#define A_MC5_DBGI_REQ_MASK3   0xca8

Definition at line 2043 of file regs.h.

#define A_MC5_DBGI_REQ_MASK4   0xcac

Definition at line 2044 of file regs.h.

#define A_MC5_DBGI_RSP_DATA0   0xcb4

Definition at line 2064 of file regs.h.

#define A_MC5_DBGI_RSP_DATA1   0xcb8

Definition at line 2065 of file regs.h.

#define A_MC5_DBGI_RSP_DATA2   0xcbc

Definition at line 2066 of file regs.h.

#define A_MC5_DBGI_RSP_DATA3   0xcc0

Definition at line 2067 of file regs.h.

#define A_MC5_DBGI_RSP_DATA4   0xcc4

Definition at line 2068 of file regs.h.

#define A_MC5_DBGI_RSP_LAST_CMD   0xcc8

Definition at line 2069 of file regs.h.

#define A_MC5_DBGI_RSP_STATUS   0xcb0

Definition at line 2045 of file regs.h.

#define A_MC5_ELOOKUP_CMD   0xcf0

Definition at line 2079 of file regs.h.

#define A_MC5_ILOOKUP_CMD   0xcec

Definition at line 2078 of file regs.h.

#define A_MC5_INT_CAUSE   0xc44

Definition at line 2012 of file regs.h.

#define A_MC5_INT_ENABLE   0xc40

Definition at line 1946 of file regs.h.

#define A_MC5_INT_PTID   0xc4c

Definition at line 2014 of file regs.h.

#define A_MC5_INT_TID   0xc48

Definition at line 2013 of file regs.h.

#define A_MC5_LIP_RAM_ADDR   0xc18

Definition at line 1882 of file regs.h.

#define A_MC5_LIP_RAM_DATA   0xc1c

Definition at line 1893 of file regs.h.

#define A_MC5_MASK_WRITE_CMD   0xcfc

Definition at line 2082 of file regs.h.

#define A_MC5_PARITY_LATENCY   0xc24

Definition at line 1906 of file regs.h.

#define A_MC5_PART_ID_INDEX   0xc2c

Definition at line 1932 of file regs.h.

#define A_MC5_POPEN_DATA_WR_CMD   0xccc

Definition at line 2070 of file regs.h.

#define A_MC5_POPEN_MASK_WR_CMD   0xcd0

Definition at line 2071 of file regs.h.

#define A_MC5_RESET_MAX   0xc30

Definition at line 1939 of file regs.h.

#define A_MC5_ROUTING_TABLE_INDEX   0xc0c

Definition at line 1868 of file regs.h.

#define A_MC5_RSP_LATENCY   0xc20

Definition at line 1894 of file regs.h.

#define A_MC5_SERVER_INDEX   0xc14

Definition at line 1875 of file regs.h.

#define A_MC5_SIZE   0xc08

Definition at line 1861 of file regs.h.

#define A_MC5_SYN_LRN_CMD   0xce0

Definition at line 2075 of file regs.h.

#define A_MC5_SYN_SRCH_CMD   0xcdc

Definition at line 2074 of file regs.h.

#define A_MC5_WR_LRN_VERIFY   0xc28

Definition at line 1918 of file regs.h.

#define A_PCICFG_INTR_CAUSE   0xf8

Definition at line 2143 of file regs.h.

#define A_PCICFG_INTR_ENABLE   0xf4

Definition at line 2099 of file regs.h.

#define A_PCICFG_MODE   0xfc

Definition at line 2144 of file regs.h.

#define A_PCICFG_PCIX_CMD   0x60

Definition at line 2098 of file regs.h.

#define A_PCICFG_PM_CSR   0x44

Definition at line 2085 of file regs.h.

#define A_PCICFG_VPD_ADDR   0x4a

Definition at line 2086 of file regs.h.

#define A_PCICFG_VPD_DATA   0x4c

Definition at line 2097 of file regs.h.

#define A_PL_CAUSE   0xa04

Definition at line 1795 of file regs.h.

#define A_PL_ENABLE   0xa00

Definition at line 1745 of file regs.h.

#define A_PORT_CONFIG   0x89c

Definition at line 1421 of file regs.h.

#define A_RAM_STATUS   0x8b0

Definition at line 1468 of file regs.h.

#define A_RAT_INTR_CAUSE   0x594

Definition at line 1311 of file regs.h.

#define A_RAT_INTR_ENABLE   0x590

Definition at line 1293 of file regs.h.

#define A_RAT_NO_ROUTE   0x58c

Definition at line 1286 of file regs.h.

#define A_RAT_ROUTE_CONTROL   0x580

Definition at line 1264 of file regs.h.

#define A_RAT_ROUTE_TABLE_DATA   0x588

Definition at line 1285 of file regs.h.

#define A_RAT_ROUTE_TABLE_INDEX   0x584

Definition at line 1278 of file regs.h.

#define A_RX_DROP_COUNT0   0x8bc

Definition at line 1509 of file regs.h.

#define A_RX_DROP_COUNT1   0x8c0

Definition at line 1521 of file regs.h.

#define A_RX_DROP_THRESHOLD   0x8d0

Definition at line 1564 of file regs.h.

#define A_SG_CMD0BASELWR   0x8

Definition at line 112 of file regs.h.

#define A_SG_CMD0BASEUPR   0xc

Definition at line 113 of file regs.h.

#define A_SG_CMD0PTR   0x50

Definition at line 171 of file regs.h.

#define A_SG_CMD0SIZE   0x28

Definition at line 120 of file regs.h.

#define A_SG_CMD1BASELWR   0x10

Definition at line 114 of file regs.h.

#define A_SG_CMD1BASEUPR   0x14

Definition at line 115 of file regs.h.

#define A_SG_CMD1PTR   0x54

Definition at line 182 of file regs.h.

#define A_SG_CMD1SIZE   0xb0

Definition at line 215 of file regs.h.

#define A_SG_CONTROL   0x0

Definition at line 43 of file regs.h.

#define A_SG_DOORBELL   0x4

Definition at line 111 of file regs.h.

#define A_SG_FL0BASELWR   0x18

Definition at line 116 of file regs.h.

#define A_SG_FL0BASEUPR   0x1c

Definition at line 117 of file regs.h.

#define A_SG_FL0PTR   0x58

Definition at line 189 of file regs.h.

#define A_SG_FL0SIZE   0x2c

Definition at line 127 of file regs.h.

#define A_SG_FL1BASELWR   0x20

Definition at line 118 of file regs.h.

#define A_SG_FL1BASEUPR   0x24

Definition at line 119 of file regs.h.

#define A_SG_FL1PTR   0x5c

Definition at line 196 of file regs.h.

#define A_SG_FL1SIZE   0xb4

Definition at line 222 of file regs.h.

#define A_SG_FLTHRESHOLD   0x3c

Definition at line 143 of file regs.h.

#define A_SG_INT_CAUSE   0xbc

Definition at line 251 of file regs.h.

#define A_SG_INT_ENABLE   0xb8

Definition at line 229 of file regs.h.

#define A_SG_INTRTIMER   0x4c

Definition at line 164 of file regs.h.

#define A_SG_RESPACCUTIMER   0xc0

Definition at line 252 of file regs.h.

#define A_SG_RSPBASELWR   0x34

Definition at line 141 of file regs.h.

#define A_SG_RSPBASEUPR   0x38

Definition at line 142 of file regs.h.

#define A_SG_RSPQUEUECREDIT   0x40

Definition at line 150 of file regs.h.

#define A_SG_RSPSIZE   0x30

Definition at line 134 of file regs.h.

#define A_SG_SLEEPING   0x48

Definition at line 157 of file regs.h.

#define A_SG_VERSION   0x6c

Definition at line 203 of file regs.h.

#define A_TP_2MSL   0x394

Definition at line 1049 of file regs.h.

#define A_TP_BACKOFF0   0x350

Definition at line 937 of file regs.h.

#define A_TP_BACKOFF1   0x354

Definition at line 959 of file regs.h.

#define A_TP_BACKOFF2   0x358

Definition at line 960 of file regs.h.

#define A_TP_BACKOFF3   0x35c

Definition at line 961 of file regs.h.

#define A_TP_CM_FC_MODE   0x4b0

Definition at line 1239 of file regs.h.

#define A_TP_CM_MM_BASE   0x314

Definition at line 819 of file regs.h.

#define A_TP_CM_MM_MAX_P   0x46c

Definition at line 1205 of file regs.h.

#define A_TP_CM_MM_P_FLST_BASE   0x468

Definition at line 1198 of file regs.h.

#define A_TP_CM_MM_RX_FLST_BASE   0x460

Definition at line 1184 of file regs.h.

#define A_TP_CM_MM_TX_FLST_BASE   0x464

Definition at line 1191 of file regs.h.

#define A_TP_CM_SIZE   0x310

Definition at line 818 of file regs.h.

#define A_TP_CM_TIMER_BASE   0x318

Definition at line 826 of file regs.h.

#define A_TP_DACK_CONFIG   0x344

Definition at line 877 of file regs.h.

#define A_TP_DACK_TIME   0x3b8

Definition at line 1105 of file regs.h.

#define A_TP_FAST_FINWAIT2_TIME   0x3c0

Definition at line 1119 of file regs.h.

#define A_TP_FINWAIT2_TIME   0x3bc

Definition at line 1112 of file regs.h.

#define A_TP_GLOBAL_CONFIG   0x308

Definition at line 743 of file regs.h.

#define A_TP_GLOBAL_RX_CREDITS   0x30c

Definition at line 817 of file regs.h.

#define A_TP_IN_CONFIG   0x300

Definition at line 643 of file regs.h.

#define A_TP_INIT_SRTT   0x3b4

Definition at line 1098 of file regs.h.

#define A_TP_INT_CAUSE   0x474

Definition at line 1222 of file regs.h.

#define A_TP_INT_ENABLE   0x470

Definition at line 1212 of file regs.h.

#define A_TP_KEEP_IDLE   0x3ac

Definition at line 1084 of file regs.h.

#define A_TP_KEEP_INTVL   0x3b0

Definition at line 1091 of file regs.h.

#define A_TP_MIB_DATA   0x454

Definition at line 1181 of file regs.h.

#define A_TP_MIB_INDEX   0x450

Definition at line 1180 of file regs.h.

#define A_TP_MTU_REG0   0x404

Definition at line 1162 of file regs.h.

#define A_TP_MTU_REG1   0x408

Definition at line 1163 of file regs.h.

#define A_TP_MTU_REG2   0x40c

Definition at line 1164 of file regs.h.

#define A_TP_MTU_REG3   0x410

Definition at line 1165 of file regs.h.

#define A_TP_MTU_REG4   0x414

Definition at line 1166 of file regs.h.

#define A_TP_MTU_REG5   0x418

Definition at line 1167 of file regs.h.

#define A_TP_MTU_REG6   0x41c

Definition at line 1168 of file regs.h.

#define A_TP_MTU_REG7   0x420

Definition at line 1169 of file regs.h.

#define A_TP_OUT_CONFIG   0x304

Definition at line 697 of file regs.h.

#define A_TP_PARA_REG0   0x360

Definition at line 962 of file regs.h.

#define A_TP_PARA_REG1   0x364

Definition at line 994 of file regs.h.

#define A_TP_PARA_REG2   0x368

Definition at line 1006 of file regs.h.

#define A_TP_PARA_REG3   0x36c

Definition at line 1018 of file regs.h.

#define A_TP_PC_CONFIG   0x348

Definition at line 901 of file regs.h.

#define A_TP_PC_CONGESTION_CNTL   0x4b4

Definition at line 1240 of file regs.h.

#define A_TP_PERS_MAX   0x3a4

Definition at line 1077 of file regs.h.

#define A_TP_PERS_MIN   0x3a0

Definition at line 1070 of file regs.h.

#define A_TP_PM_DEFRAG_BASE   0x324

Definition at line 835 of file regs.h.

#define A_TP_PM_RX_BASE   0x328

Definition at line 836 of file regs.h.

#define A_TP_PM_RX_MAX_PGS   0x330

Definition at line 838 of file regs.h.

#define A_TP_PM_RX_PG_SIZE   0x32c

Definition at line 837 of file regs.h.

#define A_TP_PM_SIZE   0x31c

Definition at line 833 of file regs.h.

#define A_TP_PM_TX_BASE   0x320

Definition at line 834 of file regs.h.

#define A_TP_PM_TX_MAX_PGS   0x338

Definition at line 840 of file regs.h.

#define A_TP_PM_TX_PG_SIZE   0x334

Definition at line 839 of file regs.h.

#define A_TP_QOS_REG0   0x3e0

Definition at line 1148 of file regs.h.

#define A_TP_QOS_REG1   0x3e4

Definition at line 1155 of file regs.h.

#define A_TP_QOS_REG2   0x3e8

Definition at line 1156 of file regs.h.

#define A_TP_QOS_REG3   0x3ec

Definition at line 1157 of file regs.h.

#define A_TP_QOS_REG4   0x3f0

Definition at line 1158 of file regs.h.

#define A_TP_QOS_REG5   0x3f4

Definition at line 1159 of file regs.h.

#define A_TP_QOS_REG6   0x3f8

Definition at line 1160 of file regs.h.

#define A_TP_QOS_REG7   0x3fc

Definition at line 1161 of file regs.h.

#define A_TP_RESET   0x44c

Definition at line 1170 of file regs.h.

#define A_TP_RXT_MAX   0x39c

Definition at line 1063 of file regs.h.

#define A_TP_RXT_MIN   0x398

Definition at line 1056 of file regs.h.

#define A_TP_SHIFT_CNT   0x3c4

Definition at line 1126 of file regs.h.

#define A_TP_SYNC_TIME_HI   0x458

Definition at line 1182 of file regs.h.

#define A_TP_SYNC_TIME_LO   0x45c

Definition at line 1183 of file regs.h.

#define A_TP_TCP_OPTIONS   0x340

Definition at line 841 of file regs.h.

#define A_TP_TIMER_RESOLUTION   0x390

Definition at line 1037 of file regs.h.

#define A_TP_TIMER_SEPARATOR   0x4a4

Definition at line 1223 of file regs.h.

#define A_TP_TX_DROP_CONFIG   0x4b8

Definition at line 1241 of file regs.h.

#define A_TP_TX_DROP_COUNT   0x4bc

Definition at line 1261 of file regs.h.

#define A_TPI_ADDR   0x280

Definition at line 611 of file regs.h.

#define A_TPI_CSR   0x28c

Definition at line 620 of file regs.h.

#define A_TPI_PAR   0x29c

Definition at line 634 of file regs.h.

#define A_TPI_RD_DATA   0x288

Definition at line 619 of file regs.h.

#define A_TPI_WR_DATA   0x284

Definition at line 618 of file regs.h.

#define A_TX_DROP_COUNT0   0x8b4

Definition at line 1485 of file regs.h.

#define A_TX_DROP_COUNT1   0x8b8

Definition at line 1497 of file regs.h.

#define A_ULP_HREG_DATA   0x98c

Definition at line 1693 of file regs.h.

#define A_ULP_HREG_INDEX   0x988

Definition at line 1692 of file regs.h.

#define A_ULP_INT_CAUSE   0x994

Definition at line 1695 of file regs.h.

#define A_ULP_INT_ENABLE   0x990

Definition at line 1694 of file regs.h.

#define A_ULP_PIO_CTRL   0x998

Definition at line 1742 of file regs.h.

#define A_ULP_TAGMASK   0x984

Definition at line 1691 of file regs.h.

#define A_ULP_ULIMIT   0x980

Definition at line 1690 of file regs.h.

#define F_ACTIVE_TO_READ_WRITE_DELAY   V_ACTIVE_TO_READ_WRITE_DELAY(1U)

Definition at line 292 of file regs.h.

#define F_ATTACK_FILTER   V_ATTACK_FILTER(1U)

Definition at line 802 of file regs.h.

#define F_BACK_DOOR_OPERATION   V_BACK_DOOR_OPERATION(1U)

Definition at line 461 of file regs.h.

#define F_BANKS   V_BANKS(1U)

Definition at line 315 of file regs.h.

#define F_BUILD   V_BUILD(1U)

Definition at line 1831 of file regs.h.

#define F_BUSY   V_BUSY(1U)

Definition at line 339 of file regs.h.

#define F_CLEAR_FIN   V_CLEAR_FIN(1U)

Definition at line 926 of file regs.h.

#define F_CLK_ENABLE   V_CLK_ENABLE(1U)

Definition at line 259 of file regs.h.

#define F_CM_MEMMGR_INIT   V_CM_MEMMGR_INIT(1U)

Definition at line 1178 of file regs.h.

#define F_CMDQ0_ENABLE   V_CMDQ0_ENABLE(1U)

Definition at line 47 of file regs.h.

#define F_CMDQ1_ENABLE   V_CMDQ1_ENABLE(1U)

Definition at line 51 of file regs.h.

#define F_COMPRESSION_ENABLE   V_COMPRESSION_ENABLE(1U)

Definition at line 1835 of file regs.h.

#define F_CONTINUOUS   V_CONTINUOUS(1U)

Definition at line 479 of file regs.h.

#define F_CPL_ENABLE   V_CPL_ENABLE(1U)

Definition at line 63 of file regs.h.

#define F_CSPIFRAMINGERROR   V_CSPIFRAMINGERROR(1U)

Definition at line 1301 of file regs.h.

#define F_CURRENT_GENERATION_BIT   V_CURRENT_GENERATION_BIT(1U)

Definition at line 180 of file regs.h.

#define F_DACK_AUTO_CAREFUL   V_DACK_AUTO_CAREFUL(1U)

Definition at line 889 of file regs.h.

#define F_DACK_AUTO_MGMT   V_DACK_AUTO_MGMT(1U)

Definition at line 885 of file regs.h.

#define F_DACK_MODE   V_DACK_MODE(1U)

Definition at line 881 of file regs.h.

#define F_DBGI_ENABLE   V_DBGI_ENABLE(1U)

Definition at line 1814 of file regs.h.

#define F_DBGI_RSP_ERR   V_DBGI_RSP_ERR(1U)

Definition at line 2057 of file regs.h.

#define F_DBGI_RSP_HIT   V_DBGI_RSP_HIT(1U)

Definition at line 2053 of file regs.h.

#define F_DBGI_RSP_VALID   V_DBGI_RSP_VALID(1U)

Definition at line 2049 of file regs.h.

#define F_DDP_FC_ENABLE   V_DDP_FC_ENABLE(1U)

Definition at line 914 of file regs.h.

#define F_DET_PARITY_ERR   V_DET_PARITY_ERR(1U)

Definition at line 2123 of file regs.h.

#define F_DIP2_COUNT_MODE_ENABLE   V_DIP2_COUNT_MODE_ENABLE(1U)

Definition at line 1588 of file regs.h.

#define F_DIP2PARITYERR   V_DIP2PARITYERR(1U)

Definition at line 1561 of file regs.h.

#define F_DIP4_THRES_ENABLE   V_DIP4_THRES_ENABLE(1U)

Definition at line 1602 of file regs.h.

#define F_DIP4ERR   V_DIP4ERR(1U)

Definition at line 1357 of file regs.h.

#define F_DIS_TX_FILL_WIN_PUSH   V_DIS_TX_FILL_WIN_PUSH(1U)

Definition at line 930 of file regs.h.

#define F_DISABLE_CMDQ0_GTS   V_DISABLE_CMDQ0_GTS(1U)

Definition at line 76 of file regs.h.

#define F_DISABLE_CMDQ1_GTS   V_DISABLE_CMDQ1_GTS(1U)

Definition at line 80 of file regs.h.

#define F_DISABLE_FL0_GTS   V_DISABLE_FL0_GTS(1U)

Definition at line 84 of file regs.h.

#define F_DISABLE_FL1_GTS   V_DISABLE_FL1_GTS(1U)

Definition at line 88 of file regs.h.

#define F_DISABLE_PAST_TIMER_INSERTION   V_DISABLE_PAST_TIMER_INSERTION(1U)

Definition at line 1227 of file regs.h.

#define F_DISABLE_RX_FLOW_CONTROL   V_DISABLE_RX_FLOW_CONTROL(1U)

Definition at line 810 of file regs.h.

#define F_DYNAMIC_DESKEW   V_DYNAMIC_DESKEW(1U)

Definition at line 1610 of file regs.h.

#define F_ECC_CHECK_ENABLE   V_ECC_CHECK_ENABLE(1U)

Definition at line 415 of file regs.h.

#define F_ECC_GENERATION_ENABLE   V_ECC_GENERATION_ENABLE(1U)

Definition at line 411 of file regs.h.

#define F_EGRS_DATA_PAR_ERR   V_EGRS_DATA_PAR_ERR(1U)

Definition at line 1703 of file regs.h.

#define F_ENABLE_BIG_ENDIAN   V_ENABLE_BIG_ENDIAN(1U)

Definition at line 92 of file regs.h.

#define F_ENABLE_CSPI   V_ENABLE_CSPI(1U)

Definition at line 1272 of file regs.h.

#define F_ENABLE_PCIX   V_ENABLE_PCIX(1U)

Definition at line 1276 of file regs.h.

#define F_ENABLE_TX_DROP   V_ENABLE_TX_DROP(1U)

Definition at line 1245 of file regs.h.

#define F_ENABLE_TX_ERROR   V_ENABLE_TX_ERROR(1U)

Definition at line 1249 of file regs.h.

#define F_ERROR_ACK   V_ERROR_ACK(1U)

Definition at line 1677 of file regs.h.

#define F_ESPI_CMD_BUSY   V_ESPI_CMD_BUSY(1U)

Definition at line 1673 of file regs.h.

#define F_ESPI_RX_CORE_RST   V_ESPI_RX_CORE_RST(1U)

Definition at line 1573 of file regs.h.

#define F_ESPI_RX_LNK_RST   V_ESPI_RX_LNK_RST(1U)

Definition at line 1569 of file regs.h.

#define F_FAST_PDU_DELIVERY   V_FAST_PDU_DELIVERY(1U)

Definition at line 922 of file regs.h.

#define F_FIFOSTATUSENABLE   V_FIFOSTATUSENABLE(1U)

Definition at line 1327 of file regs.h.

#define F_FL0_ENABLE   V_FL0_ENABLE(1U)

Definition at line 55 of file regs.h.

#define F_FL1_ENABLE   V_FL1_ENABLE(1U)

Definition at line 59 of file regs.h.

#define F_FL_EXHAUSTED   V_FL_EXHAUSTED(1U)

Definition at line 241 of file regs.h.

#define F_FL_SELECTION_CRITERIA   V_FL_SELECTION_CRITERIA(1U)

Definition at line 96 of file regs.h.

#define F_FORCE_DISABLE_STATUS   V_FORCE_DISABLE_STATUS(1U)

Definition at line 1606 of file regs.h.

#define F_HELD_FIN_DISABLE   V_HELD_FIN_DISABLE(1U)

Definition at line 910 of file regs.h.

#define F_HREG_PAR_ERR   V_HREG_PAR_ERR(1U)

Definition at line 1699 of file regs.h.

#define F_INGRS_DATA_PAR_ERR   V_INGRS_DATA_PAR_ERR(1U)

Definition at line 1707 of file regs.h.

#define F_INT_DIR   V_INT_DIR(1U)

Definition at line 632 of file regs.h.

#define F_INTEL1010MODE   V_INTEL1010MODE(1U)

Definition at line 1453 of file regs.h.

#define F_INTERFACE_TYPE   V_INTERFACE_TYPE(1U)

Definition at line 806 of file regs.h.

#define F_IP_CSUM   V_IP_CSUM(1U)

Definition at line 769 of file regs.h.

#define F_IP_FRAGMENT_DROP   V_IP_FRAGMENT_DROP(1U)

Definition at line 786 of file regs.h.

#define F_IP_ID_SPLIT   V_IP_ID_SPLIT(1U)

Definition at line 773 of file regs.h.

#define F_ISCSI_COALESCE   V_ISCSI_COALESCE(1U)

Definition at line 100 of file regs.h.

#define F_LRNVEREN   V_LRNVEREN(1U)

Definition at line 1926 of file regs.h.

#define F_M_BUS_ENABLE   V_M_BUS_ENABLE(1U)

Definition at line 1818 of file regs.h.

#define F_MASTER_DLL_LOCKED   V_MASTER_DLL_LOCKED(1U)

Definition at line 373 of file regs.h.

#define F_MASTER_DLL_MAX_TAP_COUNT   V_MASTER_DLL_MAX_TAP_COUNT(1U)

Definition at line 377 of file regs.h.

#define F_MASTER_DLL_RESET   V_MASTER_DLL_RESET(1U)

Definition at line 364 of file regs.h.

#define F_MASTER_PARITY_ERR   V_MASTER_PARITY_ERR(1U)

Definition at line 2103 of file regs.h.

#define F_MC3_ADDR_ERR   V_MC3_ADDR_ERR(1U)

Definition at line 498 of file regs.h.

#define F_MC3_CORR_ERR   V_MC3_CORR_ERR(1U)

Definition at line 485 of file regs.h.

#define F_MC3_SLOW   V_MC3_SLOW(1U)

Definition at line 328 of file regs.h.

#define F_MC3_UNCORR_ERR   V_MC3_UNCORR_ERR(1U)

Definition at line 489 of file regs.h.

#define F_MC4_ADDR_ERR   V_MC4_ADDR_ERR(1U)

Definition at line 606 of file regs.h.

#define F_MC4_CORR_ERR   V_MC4_CORR_ERR(1U)

Definition at line 598 of file regs.h.

#define F_MC4_NARROW   V_MC4_NARROW(1U)

Definition at line 516 of file regs.h.

#define F_MC4_SLOW   V_MC4_SLOW(1U)

Definition at line 520 of file regs.h.

#define F_MC4_UNCORR_ERR   V_MC4_UNCORR_ERR(1U)

Definition at line 602 of file regs.h.

#define F_MC4A_SLOW   V_MC4A_SLOW(1U)

Definition at line 529 of file regs.h.

#define F_MC5_INT_ACTIVE_REGION_FULL   V_MC5_INT_ACTIVE_REGION_FULL(1U)

Definition at line 1978 of file regs.h.

#define F_MC5_INT_DEL_ACT_EMPTY   V_MC5_INT_DEL_ACT_EMPTY(1U)

Definition at line 2010 of file regs.h.

#define F_MC5_INT_DISPATCHQ_PARITY_ERR   V_MC5_INT_DISPATCHQ_PARITY_ERR(1U)

Definition at line 2006 of file regs.h.

#define F_MC5_INT_HIT_IN_ACTIVE_REGION_ERR   V_MC5_INT_HIT_IN_ACTIVE_REGION_ERR(1U)

Definition at line 1954 of file regs.h.

#define F_MC5_INT_HIT_IN_RT_REGION_ERR   V_MC5_INT_HIT_IN_RT_REGION_ERR(1U)

Definition at line 1958 of file regs.h.

#define F_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR   V_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR(1U)

Definition at line 1950 of file regs.h.

#define F_MC5_INT_LIP0_ERR   V_MC5_INT_LIP0_ERR(1U)

Definition at line 1966 of file regs.h.

#define F_MC5_INT_LIP_MISS_ERR   V_MC5_INT_LIP_MISS_ERR(1U)

Definition at line 1970 of file regs.h.

#define F_MC5_INT_MISS_ERR   V_MC5_INT_MISS_ERR(1U)

Definition at line 1962 of file regs.h.

#define F_MC5_INT_NFA_SRCH_ERR   V_MC5_INT_NFA_SRCH_ERR(1U)

Definition at line 1982 of file regs.h.

#define F_MC5_INT_PARITY_ERR   V_MC5_INT_PARITY_ERR(1U)

Definition at line 1974 of file regs.h.

#define F_MC5_INT_REQUESTQ_PARITY_ERR   V_MC5_INT_REQUESTQ_PARITY_ERR(1U)

Definition at line 2002 of file regs.h.

#define F_MC5_INT_SYN_COOKIE   V_MC5_INT_SYN_COOKIE(1U)

Definition at line 1986 of file regs.h.

#define F_MC5_INT_SYN_COOKIE_BAD   V_MC5_INT_SYN_COOKIE_BAD(1U)

Definition at line 1990 of file regs.h.

#define F_MC5_INT_SYN_COOKIE_OFF   V_MC5_INT_SYN_COOKIE_OFF(1U)

Definition at line 1994 of file regs.h.

#define F_MC5_INT_UNKNOWN_CMD   V_MC5_INT_UNKNOWN_CMD(1U)

Definition at line 1998 of file regs.h.

#define F_MODE   V_MODE(1U)

Definition at line 1802 of file regs.h.

#define F_MONITORED_DIRECTION   V_MONITORED_DIRECTION(1U)

Definition at line 1619 of file regs.h.

#define F_MONITORED_INTERFACE   V_MONITORED_INTERFACE(1U)

Definition at line 1623 of file regs.h.

#define F_MSS   V_MSS(1U)

Definition at line 870 of file regs.h.

#define F_OFFLOAD_DISABLE   V_OFFLOAD_DISABLE(1U)

Definition at line 695 of file regs.h.

#define F_OP   V_OP(1U)

Definition at line 470 of file regs.h.

#define F_OPERATION   V_OPERATION(1U)

Definition at line 588 of file regs.h.

#define F_ORGANIZATION   V_ORGANIZATION(1U)

Definition at line 311 of file regs.h.

#define F_PACKET_MISMATCH   V_PACKET_MISMATCH(1U)

Definition at line 249 of file regs.h.

#define F_PACKET_TOO_BIG   V_PACKET_TOO_BIG(1U)

Definition at line 245 of file regs.h.

#define F_PARITY_ENABLE   V_PARITY_ENABLE(1U)

Definition at line 1822 of file regs.h.

#define F_PATH_MTU   V_PATH_MTU(1U)

Definition at line 777 of file regs.h.

#define F_PCI_MODE_64BIT   V_PCI_MODE_64BIT(1U)

Definition at line 2148 of file regs.h.

#define F_PCI_MODE_66MHZ   V_PCI_MODE_66MHZ(1U)

Definition at line 2152 of file regs.h.

#define F_PCI_MODE_PCIX   V_PCI_MODE_PCIX(1U)

Definition at line 2161 of file regs.h.

#define F_PING_DROP   V_PING_DROP(1U)

Definition at line 790 of file regs.h.

#define F_PIO_PARITY_ERR   V_PIO_PARITY_ERR(1U)

Definition at line 2127 of file regs.h.

#define F_PL_INTR_CSPI   V_PL_INTR_CSPI(1U)

Definition at line 1785 of file regs.h.

#define F_PL_INTR_ESPI   V_PL_INTR_ESPI(1U)

Definition at line 1781 of file regs.h.

#define F_PL_INTR_EXT   V_PL_INTR_EXT(1U)

Definition at line 1793 of file regs.h.

#define F_PL_INTR_MC3   V_PL_INTR_MC3(1U)

Definition at line 1757 of file regs.h.

#define F_PL_INTR_MC4   V_PL_INTR_MC4(1U)

Definition at line 1761 of file regs.h.

#define F_PL_INTR_MC5   V_PL_INTR_MC5(1U)

Definition at line 1765 of file regs.h.

#define F_PL_INTR_PCIX   V_PL_INTR_PCIX(1U)

Definition at line 1789 of file regs.h.

#define F_PL_INTR_RAT   V_PL_INTR_RAT(1U)

Definition at line 1769 of file regs.h.

#define F_PL_INTR_SGE_DATA   V_PL_INTR_SGE_DATA(1U)

Definition at line 1753 of file regs.h.

#define F_PL_INTR_SGE_ERR   V_PL_INTR_SGE_ERR(1U)

Definition at line 1749 of file regs.h.

#define F_PL_INTR_TP   V_PL_INTR_TP(1U)

Definition at line 1773 of file regs.h.

#define F_PL_INTR_ULP   V_PL_INTR_ULP(1U)

Definition at line 1777 of file regs.h.

#define F_PM_C2E_EMPTY_ERR   V_PM_C2E_EMPTY_ERR(1U)

Definition at line 1727 of file regs.h.

#define F_PM_C2E_SYNC_ERR   V_PM_C2E_SYNC_ERR(1U)

Definition at line 1719 of file regs.h.

#define F_PM_C2E_WRT_FULL   V_PM_C2E_WRT_FULL(1U)

Definition at line 1740 of file regs.h.

#define F_PM_E2C_EMPTY_ERR   V_PM_E2C_EMPTY_ERR(1U)

Definition at line 1723 of file regs.h.

#define F_PM_E2C_SYNC_ERR   V_PM_E2C_SYNC_ERR(1U)

Definition at line 1715 of file regs.h.

#define F_PM_E2C_WRT_FULL   V_PM_E2C_WRT_FULL(1U)

Definition at line 1736 of file regs.h.

#define F_PM_INTR   V_PM_INTR(1U)

Definition at line 1711 of file regs.h.

#define F_POVEREN   V_POVEREN(1U)

Definition at line 1922 of file regs.h.

#define F_POWER_UP   V_POWER_UP(1U)

Definition at line 507 of file regs.h.

#define F_PROTECT_MODE   V_PROTECT_MODE(1U)

Definition at line 794 of file regs.h.

#define F_QOS_MAPPING   V_QOS_MAPPING(1U)

Definition at line 757 of file regs.h.

#define F_RAM_WRITE_ENABLE   V_RAM_WRITE_ENABLE(1U)

Definition at line 1891 of file regs.h.

#define F_RAMPARITYERR   V_RAMPARITYERR(1U)

Definition at line 1373 of file regs.h.

#define F_RCV_MASTER_ABORT   V_RCV_MASTER_ABORT(1U)

Definition at line 2115 of file regs.h.

#define F_RCV_TARGET_ABORT   V_RCV_TARGET_ABORT(1U)

Definition at line 2111 of file regs.h.

#define F_RDMA_ERR_ENABLE   V_RDMA_ERR_ENABLE(1U)

Definition at line 918 of file regs.h.

#define F_READY   V_READY(1U)

Definition at line 263 of file regs.h.

#define F_REFRESH_ENABLE   V_REFRESH_ENABLE(1U)

Definition at line 353 of file regs.h.

#define F_RESPONSE_QUEUE_ENABLE   V_RESPONSE_QUEUE_ENABLE(1U)

Definition at line 67 of file regs.h.

#define F_RESPQ_EXHAUSTED   V_RESPQ_EXHAUSTED(1U)

Definition at line 233 of file regs.h.

#define F_RESPQ_OVERFLOW   V_RESPQ_OVERFLOW(1U)

Definition at line 237 of file regs.h.

#define F_RX_CLK_STATUS   V_RX_CLK_STATUS(1U)

Definition at line 1577 of file regs.h.

#define F_RX_COALESCING_ENABLE   V_RX_COALESCING_ENABLE(1U)

Definition at line 1026 of file regs.h.

#define F_RX_COALESCING_PSH_DELIVER   V_RX_COALESCING_PSH_DELIVER(1U)

Definition at line 1022 of file regs.h.

#define F_RX_FREE_LIST_EMPTY   V_RX_FREE_LIST_EMPTY(1U)

Definition at line 1220 of file regs.h.

#define F_RXDROP   V_RXDROP(1U)

Definition at line 1361 of file regs.h.

#define F_RXENDIANMODE   V_RXENDIANMODE(1U)

Definition at line 1445 of file regs.h.

#define F_RXOVERFLOW   V_RXOVERFLOW(1U)

Definition at line 1369 of file regs.h.

#define F_RXSTATUSENABLE   V_RXSTATUSENABLE(1U)

Definition at line 1437 of file regs.h.

#define F_SADRSEL   V_SADRSEL(1U)

Definition at line 2025 of file regs.h.

#define F_SGEFRAMINGERROR   V_SGEFRAMINGERROR(1U)

Definition at line 1305 of file regs.h.

#define F_SIG_SYS_ERR   V_SIG_SYS_ERR(1U)

Definition at line 2119 of file regs.h.

#define F_SIG_TARGET_ABORT   V_SIG_TARGET_ABORT(1U)

Definition at line 2107 of file regs.h.

#define F_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE   V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE(1U)

Definition at line 400 of file regs.h.

#define F_SLAVE_DLL_RESET   V_SLAVE_DLL_RESET(1U)

Definition at line 386 of file regs.h.

#define F_SYN_COOKIE_ALGORITHM   V_SYN_COOKIE_ALGORITHM(1U)

Definition at line 798 of file regs.h.

#define F_TAHOE_ENABLE   V_TAHOE_ENABLE(1U)

Definition at line 1030 of file regs.h.

#define F_TCAM_PART_TYPE_HI   V_TCAM_PART_TYPE_HI(1U)

Definition at line 1859 of file regs.h.

#define F_TCAM_READY   V_TCAM_READY(1U)

Definition at line 1810 of file regs.h.

#define F_TCAM_RESET   V_TCAM_RESET(1U)

Definition at line 1806 of file regs.h.

#define F_TCP_CSUM   V_TCP_CSUM(1U)

Definition at line 761 of file regs.h.

#define F_TP_IN_CSPI_CHECK_IP_CSUM   V_TP_IN_CSPI_CHECK_IP_CSUM(1U)

Definition at line 663 of file regs.h.

#define F_TP_IN_CSPI_CHECK_TCP_CSUM   V_TP_IN_CSPI_CHECK_TCP_CSUM(1U)

Definition at line 667 of file regs.h.

#define F_TP_IN_CSPI_CPL   V_TP_IN_CSPI_CPL(1U)

Definition at line 655 of file regs.h.

#define F_TP_IN_CSPI_ETHERNET   V_TP_IN_CSPI_ETHERNET(1U)

Definition at line 651 of file regs.h.

#define F_TP_IN_CSPI_POS   V_TP_IN_CSPI_POS(1U)

Definition at line 659 of file regs.h.

#define F_TP_IN_CSPI_TUNNEL   V_TP_IN_CSPI_TUNNEL(1U)

Definition at line 647 of file regs.h.

#define F_TP_IN_ESPI_CHECK_IP_CSUM   V_TP_IN_ESPI_CHECK_IP_CSUM(1U)

Definition at line 687 of file regs.h.

#define F_TP_IN_ESPI_CHECK_TCP_CSUM   V_TP_IN_ESPI_CHECK_TCP_CSUM(1U)

Definition at line 691 of file regs.h.

#define F_TP_IN_ESPI_CPL   V_TP_IN_ESPI_CPL(1U)

Definition at line 679 of file regs.h.

#define F_TP_IN_ESPI_ETHERNET   V_TP_IN_ESPI_ETHERNET(1U)

Definition at line 675 of file regs.h.

#define F_TP_IN_ESPI_POS   V_TP_IN_ESPI_POS(1U)

Definition at line 683 of file regs.h.

#define F_TP_IN_ESPI_TUNNEL   V_TP_IN_ESPI_TUNNEL(1U)

Definition at line 671 of file regs.h.

#define F_TP_OUT_C_ETH   V_TP_OUT_C_ETH(1U)

Definition at line 701 of file regs.h.

#define F_TP_OUT_CSPI_CPL   V_TP_OUT_CSPI_CPL(1U)

Definition at line 705 of file regs.h.

#define F_TP_OUT_CSPI_GENERATE_IP_CSUM   V_TP_OUT_CSPI_GENERATE_IP_CSUM(1U)

Definition at line 713 of file regs.h.

#define F_TP_OUT_CSPI_GENERATE_TCP_CSUM   V_TP_OUT_CSPI_GENERATE_TCP_CSUM(1U)

Definition at line 717 of file regs.h.

#define F_TP_OUT_CSPI_POS   V_TP_OUT_CSPI_POS(1U)

Definition at line 709 of file regs.h.

#define F_TP_OUT_ESPI_CPL   V_TP_OUT_ESPI_CPL(1U)

Definition at line 729 of file regs.h.

#define F_TP_OUT_ESPI_ETHERNET   V_TP_OUT_ESPI_ETHERNET(1U)

Definition at line 721 of file regs.h.

#define F_TP_OUT_ESPI_GENERATE_IP_CSUM   V_TP_OUT_ESPI_GENERATE_IP_CSUM(1U)

Definition at line 737 of file regs.h.

#define F_TP_OUT_ESPI_GENERATE_TCP_CSUM   V_TP_OUT_ESPI_GENERATE_TCP_CSUM(1U)

Definition at line 741 of file regs.h.

#define F_TP_OUT_ESPI_POS   V_TP_OUT_ESPI_POS(1U)

Definition at line 733 of file regs.h.

#define F_TP_OUT_ESPI_TAG_ETHERNET   V_TP_OUT_ESPI_TAG_ETHERNET(1U)

Definition at line 725 of file regs.h.

#define F_TP_RESET   V_TP_RESET(1U)

Definition at line 1174 of file regs.h.

#define F_TPFRAMINGERROR   V_TPFRAMINGERROR(1U)

Definition at line 1309 of file regs.h.

#define F_TPIRDY   V_TPIRDY(1U)

Definition at line 628 of file regs.h.

#define F_TPIWR   V_TPIWR(1U)

Definition at line 624 of file regs.h.

#define F_TRICN_RX_TRAIN_ERR   V_TRICN_RX_TRAIN_ERR(1U)

Definition at line 1547 of file regs.h.

#define F_TRICN_RX_TRAIN_OK   V_TRICN_RX_TRAIN_OK(1U)

Definition at line 1555 of file regs.h.

#define F_TRICN_RX_TRAINING   V_TRICN_RX_TRAINING(1U)

Definition at line 1551 of file regs.h.

#define F_TX_FREE_LIST_EMPTY   V_TX_FREE_LIST_EMPTY(1U)

Definition at line 1216 of file regs.h.

#define F_TXDROP   V_TXDROP(1U)

Definition at line 1365 of file regs.h.

#define F_TXDROPENABLE   V_TXDROPENABLE(1U)

Definition at line 1441 of file regs.h.

#define F_TXENDIANMODE   V_TXENDIANMODE(1U)

Definition at line 1449 of file regs.h.

#define F_UDP_CSUM   V_UDP_CSUM(1U)

Definition at line 765 of file regs.h.

#define F_UNMAPPED_ERR   V_UNMAPPED_ERR(1U)

Definition at line 1681 of file regs.h.

#define F_UNREGISTERED   V_UNREGISTERED(1U)

Definition at line 319 of file regs.h.

#define F_USE_ROUTE_TABLE   V_USE_ROUTE_TABLE(1U)

Definition at line 1268 of file regs.h.

#define F_VLAN_XTRACT   V_VLAN_XTRACT(1U)

Definition at line 109 of file regs.h.

#define F_VPD_OP_FLAG   V_VPD_OP_FLAG(1U)

Definition at line 2095 of file regs.h.

#define F_VWVEREN   V_VWVEREN(1U)

Definition at line 1930 of file regs.h.

#define F_WF_PARITY_ERR   V_WF_PARITY_ERR(1U)

Definition at line 2131 of file regs.h.

#define F_ZEROROUTEERROR   V_ZEROROUTEERROR(1U)

Definition at line 1297 of file regs.h.

#define G_2MSL (   x)    (((x) >> S_2MSL) & M_2MSL)

Definition at line 1054 of file regs.h.

#define G_5TUPLE_LOOKUP (   x)    (((x) >> S_5TUPLE_LOOKUP) & M_5TUPLE_LOOKUP)

Definition at line 782 of file regs.h.

#define G_ACTIVE_TO_PRECHARGE_DELAY (   x)    (((x) >> S_ACTIVE_TO_PRECHARGE_DELAY) & M_ACTIVE_TO_PRECHARGE_DELAY)

Definition at line 297 of file regs.h.

#define G_ALMOSTEMPTY (   x)    (((x) >> S_ALMOSTEMPTY) & M_ALMOSTEMPTY)

Definition at line 1411 of file regs.h.

#define G_ALMOSTFULL (   x)    (((x) >> S_ALMOSTFULL) & M_ALMOSTFULL)

Definition at line 1418 of file regs.h.

#define G_BUNDLE_ADDR (   x)    (((x) >> S_BUNDLE_ADDR) & M_BUNDLE_ADDR)

Definition at line 1657 of file regs.h.

#define G_CALENDARLENGTH (   x)    (((x) >> S_CALENDARLENGTH) & M_CALENDARLENGTH)

Definition at line 1321 of file regs.h.

#define G_CF_PARITY_ERR (   x)    (((x) >> S_CF_PARITY_ERR) & M_CF_PARITY_ERR)

Definition at line 2141 of file regs.h.

#define G_CHANNEL_ADDR (   x)    (((x) >> S_CHANNEL_ADDR) & M_CHANNEL_ADDR)

Definition at line 1647 of file regs.h.

#define G_CM_MEMMGR_BASE (   x)    (((x) >> S_CM_MEMMGR_BASE) & M_CM_MEMMGR_BASE)

Definition at line 824 of file regs.h.

#define G_CM_MEMMGR_MAX_PSTRUCT (   x)    (((x) >> S_CM_MEMMGR_MAX_PSTRUCT) & M_CM_MEMMGR_MAX_PSTRUCT)

Definition at line 1210 of file regs.h.

#define G_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE (   x)    (((x) >> S_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE) & M_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE)

Definition at line 1203 of file regs.h.

#define G_CM_MEMMGR_RX_FREE_LIST_BASE (   x)    (((x) >> S_CM_MEMMGR_RX_FREE_LIST_BASE) & M_CM_MEMMGR_RX_FREE_LIST_BASE)

Definition at line 1189 of file regs.h.

#define G_CM_MEMMGR_TX_FREE_LIST_BASE (   x)    (((x) >> S_CM_MEMMGR_TX_FREE_LIST_BASE) & M_CM_MEMMGR_TX_FREE_LIST_BASE)

Definition at line 1196 of file regs.h.

#define G_CM_TIMER_BASE (   x)    (((x) >> S_CM_TIMER_BASE) & M_CM_TIMER_BASE)

Definition at line 831 of file regs.h.

#define G_CMDMODE (   x)    (((x) >> S_CMDMODE) & M_CMDMODE)

Definition at line 2021 of file regs.h.

#define G_CMDQ0_POINTER (   x)    (((x) >> S_CMDQ0_POINTER) & M_CMDQ0_POINTER)

Definition at line 176 of file regs.h.

#define G_CMDQ0_SIZE (   x)    (((x) >> S_CMDQ0_SIZE) & M_CMDQ0_SIZE)

Definition at line 125 of file regs.h.

#define G_CMDQ1_POINTER (   x)    (((x) >> S_CMDQ1_POINTER) & M_CMDQ1_POINTER)

Definition at line 187 of file regs.h.

#define G_CMDQ1_SIZE (   x)    (((x) >> S_CMDQ1_SIZE) & M_CMDQ1_SIZE)

Definition at line 220 of file regs.h.

#define G_CMDQ_PRIORITY (   x)    (((x) >> S_CMDQ_PRIORITY) & M_CMDQ_PRIORITY)

Definition at line 72 of file regs.h.

#define G_CORRECTABLE_ERROR_COUNT (   x)    (((x) >> S_CORRECTABLE_ERROR_COUNT) & M_CORRECTABLE_ERROR_COUNT)

Definition at line 420 of file regs.h.

#define G_CPL_OPCODE (   x)    (((x) >> S_CPL_OPCODE) & M_CPL_OPCODE)

Definition at line 1291 of file regs.h.

#define G_CSPI_TRAIN_ALPHA (   x)    (((x) >> S_CSPI_TRAIN_ALPHA) & M_CSPI_TRAIN_ALPHA)

Definition at line 1346 of file regs.h.

#define G_CSPI_TRAIN_DATA_MAXT (   x)    (((x) >> S_CSPI_TRAIN_DATA_MAXT) & M_CSPI_TRAIN_DATA_MAXT)

Definition at line 1351 of file regs.h.

#define G_DACK_BYTE_THRESHOLD (   x)    (((x) >> S_DACK_BYTE_THRESHOLD) & M_DACK_BYTE_THRESHOLD)

Definition at line 899 of file regs.h.

#define G_DACK_MSS_SELECTOR (   x)    (((x) >> S_DACK_MSS_SELECTOR) & M_DACK_MSS_SELECTOR)

Definition at line 894 of file regs.h.

#define G_DATA_PATTERN (   x)    (((x) >> S_DATA_PATTERN) & M_DATA_PATTERN)

Definition at line 475 of file regs.h.

#define G_DAY (   x)    (((x) >> S_DAY) & M_DAY)

Definition at line 208 of file regs.h.

#define G_DBGI_RSP_ERR_REASON (   x)    (((x) >> S_DBGI_RSP_ERR_REASON) & M_DBGI_RSP_ERR_REASON)

Definition at line 2062 of file regs.h.

#define G_DEFAULT_PEER_MSS (   x)    (((x) >> S_DEFAULT_PEER_MSS) & M_DEFAULT_PEER_MSS)

Definition at line 875 of file regs.h.

#define G_DELAYED_ACK_TIME (   x)    (((x) >> S_DELAYED_ACK_TIME) & M_DELAYED_ACK_TIME)

Definition at line 1110 of file regs.h.

#define G_DELAYED_ACK_TIMER_RESOLUTION (   x)    (((x) >> S_DELAYED_ACK_TIMER_RESOLUTION) & M_DELAYED_ACK_TIMER_RESOLUTION)

Definition at line 1042 of file regs.h.

#define G_DENSITY (   x)    (((x) >> S_DENSITY) & M_DENSITY)

Definition at line 307 of file regs.h.

#define G_DIP2_ERR_CNT (   x)    (((x) >> S_DIP2_ERR_CNT) & M_DIP2_ERR_CNT)

Definition at line 1630 of file regs.h.

#define G_DIP2_PARITY_ERR_THRES (   x)    (((x) >> S_DIP2_PARITY_ERR_THRES) & M_DIP2_PARITY_ERR_THRES)

Definition at line 1593 of file regs.h.

#define G_DIP4_THRES (   x)    (((x) >> S_DIP4_THRES) & M_DIP4_THRES)

Definition at line 1598 of file regs.h.

#define G_DIP4ERRORCNT (   x)    (((x) >> S_DIP4ERRORCNT) & M_DIP4ERRORCNT)

Definition at line 1538 of file regs.h.

#define G_DIP4ERRORCNTSHADOW (   x)    (((x) >> S_DIP4ERRORCNTSHADOW) & M_DIP4ERRORCNTSHADOW)

Definition at line 1543 of file regs.h.

#define G_DROP_TICKS_CNT (   x)    (((x) >> S_DROP_TICKS_CNT) & M_DROP_TICKS_CNT)

Definition at line 1254 of file regs.h.

#define G_DUP_THRESH (   x)    (((x) >> S_DUP_THRESH) & M_DUP_THRESH)

Definition at line 987 of file regs.h.

#define G_ECN (   x)    (((x) >> S_ECN) & M_ECN)

Definition at line 861 of file regs.h.

#define G_ELEMENT0 (   x)    (((x) >> S_ELEMENT0) & M_ELEMENT0)

Definition at line 942 of file regs.h.

#define G_ELEMENT1 (   x)    (((x) >> S_ELEMENT1) & M_ELEMENT1)

Definition at line 947 of file regs.h.

#define G_ELEMENT2 (   x)    (((x) >> S_ELEMENT2) & M_ELEMENT2)

Definition at line 952 of file regs.h.

#define G_ELEMENT3 (   x)    (((x) >> S_ELEMENT3) & M_ELEMENT3)

Definition at line 957 of file regs.h.

#define G_FAST_FINWAIT2_TIME (   x)    (((x) >> S_FAST_FINWAIT2_TIME) & M_FAST_FINWAIT2_TIME)

Definition at line 1124 of file regs.h.

#define G_FINWAIT2_TIME (   x)    (((x) >> S_FINWAIT2_TIME) & M_FINWAIT2_TIME)

Definition at line 1117 of file regs.h.

#define G_FL0_POINTER (   x)    (((x) >> S_FL0_POINTER) & M_FL0_POINTER)

Definition at line 194 of file regs.h.

#define G_FL0_SIZE (   x)    (((x) >> S_FL0_SIZE) & M_FL0_SIZE)

Definition at line 132 of file regs.h.

#define G_FL1_POINTER (   x)    (((x) >> S_FL1_POINTER) & M_FL1_POINTER)

Definition at line 201 of file regs.h.

#define G_FL1_SIZE (   x)    (((x) >> S_FL1_SIZE) & M_FL1_SIZE)

Definition at line 227 of file regs.h.

#define G_FL_THRESHOLD (   x)    (((x) >> S_FL_THRESHOLD) & M_FL_THRESHOLD)

Definition at line 148 of file regs.h.

#define G_GENERIC_TIMER_RESOLUTION (   x)    (((x) >> S_GENERIC_TIMER_RESOLUTION) & M_GENERIC_TIMER_RESOLUTION)

Definition at line 1047 of file regs.h.

#define G_GLOBAL_TIMER_SEPARATOR (   x)    (((x) >> S_GLOBAL_TIMER_SEPARATOR) & M_GLOBAL_TIMER_SEPARATOR)

Definition at line 1237 of file regs.h.

#define G_IDINDEX (   x)    (((x) >> S_IDINDEX) & M_IDINDEX)

Definition at line 1937 of file regs.h.

#define G_INIT_CONG_WIN (   x)    (((x) >> S_INIT_CONG_WIN) & M_INIT_CONG_WIN)

Definition at line 992 of file regs.h.

#define G_INITIAL_SLOW_START_THRESHOLD (   x)    (((x) >> S_INITIAL_SLOW_START_THRESHOLD) & M_INITIAL_SLOW_START_THRESHOLD)

Definition at line 999 of file regs.h.

#define G_INITIAL_SRTT (   x)    (((x) >> S_INITIAL_SRTT) & M_INITIAL_SRTT)

Definition at line 1103 of file regs.h.

#define G_INTERRUPT_TIMER_COUNT (   x)    (((x) >> S_INTERRUPT_TIMER_COUNT) & M_INTERRUPT_TIMER_COUNT)

Definition at line 169 of file regs.h.

#define G_IP_TTL (   x)    (((x) >> S_IP_TTL) & M_IP_TTL)

Definition at line 748 of file regs.h.

#define G_KEEP_ALIVE_IDLE_TIME (   x)    (((x) >> S_KEEP_ALIVE_IDLE_TIME) & M_KEEP_ALIVE_IDLE_TIME)

Definition at line 1089 of file regs.h.

#define G_KEEP_ALIVE_INTERVAL_TIME (   x)    (((x) >> S_KEEP_ALIVE_INTERVAL_TIME) & M_KEEP_ALIVE_INTERVAL_TIME)

Definition at line 1096 of file regs.h.

#define G_KEEPALIVE_MAX (   x)    (((x) >> S_KEEPALIVE_MAX) & M_KEEPALIVE_MAX)

Definition at line 1131 of file regs.h.

#define G_L3_VALUE (   x)    (((x) >> S_L3_VALUE) & M_L3_VALUE)

Definition at line 1153 of file regs.h.

#define G_LEARN_RESPONSE_LATENCY (   x)    (((x) >> S_LEARN_RESPONSE_LATENCY) & M_LEARN_RESPONSE_LATENCY)

Definition at line 1904 of file regs.h.

#define G_LOCAL_IP_RAM_ADDR (   x)    (((x) >> S_LOCAL_IP_RAM_ADDR) & M_LOCAL_IP_RAM_ADDR)

Definition at line 1887 of file regs.h.

#define G_MASTER_DLL_TAP_COUNT (   x)    (((x) >> S_MASTER_DLL_TAP_COUNT) & M_MASTER_DLL_TAP_COUNT)

Definition at line 369 of file regs.h.

#define G_MASTER_DLL_TAP_COUNT_OFFSET (   x)    (((x) >> S_MASTER_DLL_TAP_COUNT_OFFSET) & M_MASTER_DLL_TAP_COUNT_OFFSET)

Definition at line 382 of file regs.h.

#define G_MAX_REORDER_FRAGMENTS (   x)    (((x) >> S_MAX_REORDER_FRAGMENTS) & M_MAX_REORDER_FRAGMENTS)

Definition at line 1035 of file regs.h.

#define G_MAX_RX_SIZE (   x)    (((x) >> S_MAX_RX_SIZE) & M_MAX_RX_SIZE)

Definition at line 1016 of file regs.h.

#define G_MAXBURST1 (   x)    (((x) >> S_MAXBURST1) & M_MAXBURST1)

Definition at line 1334 of file regs.h.

#define G_MAXBURST2 (   x)    (((x) >> S_MAXBURST2) & M_MAXBURST2)

Definition at line 1339 of file regs.h.

#define G_MAXTRAINALPHA (   x)    (((x) >> S_MAXTRAINALPHA) & M_MAXTRAINALPHA)

Definition at line 1461 of file regs.h.

#define G_MAXTRAINDATA (   x)    (((x) >> S_MAXTRAINDATA) & M_MAXTRAINDATA)

Definition at line 1466 of file regs.h.

#define G_MC3_BANK_CYCLE (   x)    (((x) >> S_MC3_BANK_CYCLE) & M_MC3_BANK_CYCLE)

Definition at line 278 of file regs.h.

#define G_MC3_CE_ADDR (   x)    (((x) >> S_MC3_CE_ADDR) & M_MC3_CE_ADDR)

Definition at line 432 of file regs.h.

#define G_MC3_EXTENDED_MODE (   x)    (((x) >> S_MC3_EXTENDED_MODE) & M_MC3_EXTENDED_MODE)

Definition at line 346 of file regs.h.

#define G_MC3_MODE (   x)    (((x) >> S_MC3_MODE) & M_MC3_MODE)

Definition at line 335 of file regs.h.

#define G_MC3_PARITY_ERR (   x)    (((x) >> S_MC3_PARITY_ERR) & M_MC3_PARITY_ERR)

Definition at line 494 of file regs.h.

#define G_MC3_UE_ADDR (   x)    (((x) >> S_MC3_UE_ADDR) & M_MC3_UE_ADDR)

Definition at line 444 of file regs.h.

#define G_MC3_WIDTH (   x)    (((x) >> S_MC3_WIDTH) & M_MC3_WIDTH)

Definition at line 324 of file regs.h.

#define G_MC4_BACK_DOOR_ADDR (   x)    (((x) >> S_MC4_BACK_DOOR_ADDR) & M_MC4_BACK_DOOR_ADDR)

Definition at line 577 of file regs.h.

#define G_MC4_BANK_CYCLE (   x)    (((x) >> S_MC4_BANK_CYCLE) & M_MC4_BANK_CYCLE)

Definition at line 512 of file regs.h.

#define G_MC4_CE_ADDR (   x)    (((x) >> S_MC4_CE_ADDR) & M_MC4_CE_ADDR)

Definition at line 553 of file regs.h.

#define G_MC4_EXTENDED_MODE (   x)    (((x) >> S_MC4_EXTENDED_MODE) & M_MC4_EXTENDED_MODE)

Definition at line 543 of file regs.h.

#define G_MC4_MODE (   x)    (((x) >> S_MC4_MODE) & M_MC4_MODE)

Definition at line 536 of file regs.h.

#define G_MC4_UE_ADDR (   x)    (((x) >> S_MC4_UE_ADDR) & M_MC4_UE_ADDR)

Definition at line 565 of file regs.h.

#define G_MC4A_WIDTH (   x)    (((x) >> S_MC4A_WIDTH) & M_MC4A_WIDTH)

Definition at line 525 of file regs.h.

#define G_MODULATION_TIMER_SEPARATOR (   x)    (((x) >> S_MODULATION_TIMER_SEPARATOR) & M_MODULATION_TIMER_SEPARATOR)

Definition at line 1232 of file regs.h.

#define G_MODULE_ADDR (   x)    (((x) >> S_MODULE_ADDR) & M_MODULE_ADDR)

Definition at line 1652 of file regs.h.

#define G_MONITORED_PORT_NUM (   x)    (((x) >> S_MONITORED_PORT_NUM) & M_MONITORED_PORT_NUM)

Definition at line 1615 of file regs.h.

#define G_MONTH (   x)    (((x) >> S_MONTH) & M_MONTH)

Definition at line 213 of file regs.h.

#define G_NUM_LIP (   x)    (((x) >> S_NUM_LIP) & M_NUM_LIP)

Definition at line 1840 of file regs.h.

#define G_NUM_PKTS_DROPPED (   x)    (((x) >> S_NUM_PKTS_DROPPED) & M_NUM_PKTS_DROPPED)

Definition at line 1259 of file regs.h.

#define G_OUT_OF_SYNC_COUNT (   x)    (((x) >> S_OUT_OF_SYNC_COUNT) & M_OUT_OF_SYNC_COUNT)

Definition at line 1584 of file regs.h.

#define G_PARLAT (   x)    (((x) >> S_PARLAT) & M_PARLAT)

Definition at line 1916 of file regs.h.

#define G_PCI_MODE_CLK (   x)    (((x) >> S_PCI_MODE_CLK) & M_PCI_MODE_CLK)

Definition at line 2166 of file regs.h.

#define G_PCI_MODE_PCIX_INITPAT (   x)    (((x) >> S_PCI_MODE_PCIX_INITPAT) & M_PCI_MODE_PCIX_INITPAT)

Definition at line 2157 of file regs.h.

#define G_PERSIST_TIMER_MAX (   x)    (((x) >> S_PERSIST_TIMER_MAX) & M_PERSIST_TIMER_MAX)

Definition at line 1082 of file regs.h.

#define G_PERSIST_TIMER_MIN (   x)    (((x) >> S_PERSIST_TIMER_MIN) & M_PERSIST_TIMER_MIN)

Definition at line 1075 of file regs.h.

#define G_PM_PAR_ERR (   x)    (((x) >> S_PM_PAR_ERR) & M_PM_PAR_ERR)

Definition at line 1732 of file regs.h.

#define G_PRECHARGE_CYCLE (   x)    (((x) >> S_PRECHARGE_CYCLE) & M_PRECHARGE_CYCLE)

Definition at line 288 of file regs.h.

#define G_READ_DATA (   x)    (((x) >> S_READ_DATA) & M_READ_DATA)

Definition at line 1669 of file regs.h.

#define G_READ_TO_WRITE_DELAY (   x)    (((x) >> S_READ_TO_WRITE_DELAY) & M_READ_TO_WRITE_DELAY)

Definition at line 268 of file regs.h.

#define G_RECEIVE_BUFFER_SIZE (   x)    (((x) >> S_RECEIVE_BUFFER_SIZE) & M_RECEIVE_BUFFER_SIZE)

Definition at line 1004 of file regs.h.

#define G_REFRESH_CYCLE (   x)    (((x) >> S_REFRESH_CYCLE) & M_REFRESH_CYCLE)

Definition at line 283 of file regs.h.

#define G_REFRESH_DIVISOR (   x)    (((x) >> S_REFRESH_DIVISOR) & M_REFRESH_DIVISOR)

Definition at line 358 of file regs.h.

#define G_REGISTER_OFFSET (   x)    (((x) >> S_REGISTER_OFFSET) & M_REGISTER_OFFSET)

Definition at line 1642 of file regs.h.

#define G_RESPQ_CREDIT (   x)    (((x) >> S_RESPQ_CREDIT) & M_RESPQ_CREDIT)

Definition at line 155 of file regs.h.

#define G_RESPQ_SIZE (   x)    (((x) >> S_RESPQ_SIZE) & M_RESPQ_SIZE)

Definition at line 139 of file regs.h.

#define G_RETRANSMISSION_MAX (   x)    (((x) >> S_RETRANSMISSION_MAX) & M_RETRANSMISSION_MAX)

Definition at line 1141 of file regs.h.

#define G_RETRANSMIT_TIMER_MAX (   x)    (((x) >> S_RETRANSMIT_TIMER_MAX) & M_RETRANSMIT_TIMER_MAX)

Definition at line 1068 of file regs.h.

#define G_RETRANSMIT_TIMER_MIN (   x)    (((x) >> S_RETRANSMIT_TIMER_MIN) & M_RETRANSMIT_TIMER_MIN)

Definition at line 1061 of file regs.h.

#define G_RF_PARITY_ERR (   x)    (((x) >> S_RF_PARITY_ERR) & M_RF_PARITY_ERR)

Definition at line 2136 of file regs.h.

#define G_ROUTE_TABLE_INDEX (   x)    (((x) >> S_ROUTE_TABLE_INDEX) & M_ROUTE_TABLE_INDEX)

Definition at line 1283 of file regs.h.

#define G_RSTMAX (   x)    (((x) >> S_RSTMAX) & M_RSTMAX)

Definition at line 1944 of file regs.h.

#define G_RTTVAR_INIT (   x)    (((x) >> S_RTTVAR_INIT) & M_RTTVAR_INIT)

Definition at line 982 of file regs.h.

#define G_RX_COALESCE_SIZE (   x)    (((x) >> S_RX_COALESCE_SIZE) & M_RX_COALESCE_SIZE)

Definition at line 1011 of file regs.h.

#define G_RX_NPORTS (   x)    (((x) >> S_RX_NPORTS) & M_RX_NPORTS)

Definition at line 1426 of file regs.h.

#define G_RX_PKT_OFFSET (   x)    (((x) >> S_RX_PKT_OFFSET) & M_RX_PKT_OFFSET)

Definition at line 105 of file regs.h.

#define G_RXFIFOOVERFLOW (   x)    (((x) >> S_RXFIFOOVERFLOW) & M_RXFIFOOVERFLOW)

Definition at line 1483 of file regs.h.

#define G_RXFIFOPARITYERROR (   x)    (((x) >> S_RXFIFOPARITYERROR) & M_RXFIFOPARITYERROR)

Definition at line 1473 of file regs.h.

#define G_RXPORT0DROPCNT (   x)    (((x) >> S_RXPORT0DROPCNT) & M_RXPORT0DROPCNT)

Definition at line 1514 of file regs.h.

#define G_RXPORT1DROPCNT (   x)    (((x) >> S_RXPORT1DROPCNT) & M_RXPORT1DROPCNT)

Definition at line 1519 of file regs.h.

#define G_RXPORT2DROPCNT (   x)    (((x) >> S_RXPORT2DROPCNT) & M_RXPORT2DROPCNT)

Definition at line 1526 of file regs.h.

#define G_RXPORT3DROPCNT (   x)    (((x) >> S_RXPORT3DROPCNT) & M_RXPORT3DROPCNT)

Definition at line 1531 of file regs.h.

#define G_SACK (   x)    (((x) >> S_SACK) & M_SACK)

Definition at line 856 of file regs.h.

#define G_SACK_ALGORITHM (   x)    (((x) >> S_SACK_ALGORITHM) & M_SACK_ALGORITHM)

Definition at line 866 of file regs.h.

#define G_SCHTOKEN0 (   x)    (((x) >> S_SCHTOKEN0) & M_SCHTOKEN0)

Definition at line 1383 of file regs.h.

#define G_SCHTOKEN1 (   x)    (((x) >> S_SCHTOKEN1) & M_SCHTOKEN1)

Definition at line 1390 of file regs.h.

#define G_SCHTOKEN2 (   x)    (((x) >> S_SCHTOKEN2) & M_SCHTOKEN2)

Definition at line 1397 of file regs.h.

#define G_SCHTOKEN3 (   x)    (((x) >> S_SCHTOKEN3) & M_SCHTOKEN3)

Definition at line 1404 of file regs.h.

#define G_SEARCH_RESPONSE_LATENCY (   x)    (((x) >> S_SEARCH_RESPONSE_LATENCY) & M_SEARCH_RESPONSE_LATENCY)

Definition at line 1899 of file regs.h.

#define G_SIZE (   x)    (((x) >> S_SIZE) & M_SIZE)

Definition at line 1866 of file regs.h.

#define G_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT (   x)    (((x) >> S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT) & M_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT)

Definition at line 396 of file regs.h.

#define G_SLAVE_DELAY_LINE_TAP_COUNT (   x)    (((x) >> S_SLAVE_DELAY_LINE_TAP_COUNT) & M_SLAVE_DELAY_LINE_TAP_COUNT)

Definition at line 405 of file regs.h.

#define G_SLAVE_DLL_DELTA (   x)    (((x) >> S_SLAVE_DLL_DELTA) & M_SLAVE_DLL_DELTA)

Definition at line 391 of file regs.h.

#define G_SLEEPING (   x)    (((x) >> S_SLEEPING) & M_SLEEPING)

Definition at line 162 of file regs.h.

#define G_SPI4_COMMAND (   x)    (((x) >> S_SPI4_COMMAND) & M_SPI4_COMMAND)

Definition at line 1662 of file regs.h.

#define G_SRCHLAT (   x)    (((x) >> S_SRCHLAT) & M_SRCHLAT)

Definition at line 1911 of file regs.h.

#define G_SRTT_GAIN (   x)    (((x) >> S_SRTT_GAIN) & M_SRTT_GAIN)

Definition at line 977 of file regs.h.

#define G_START_OF_ROUTING_TABLE (   x)    (((x) >> S_START_OF_ROUTING_TABLE) & M_START_OF_ROUTING_TABLE)

Definition at line 1873 of file regs.h.

#define G_START_OF_SERVER_INDEX (   x)    (((x) >> S_START_OF_SERVER_INDEX) & M_START_OF_SERVER_INDEX)

Definition at line 1880 of file regs.h.

#define G_SYN_COOKIE_PARAMETER (   x)    (((x) >> S_SYN_COOKIE_PARAMETER) & M_SYN_COOKIE_PARAMETER)

Definition at line 815 of file regs.h.

#define G_SYN_ISSUE_MODE (   x)    (((x) >> S_SYN_ISSUE_MODE) & M_SYN_ISSUE_MODE)

Definition at line 1827 of file regs.h.

#define G_SYN_MAX (   x)    (((x) >> S_SYN_MAX) & M_SYN_MAX)

Definition at line 1146 of file regs.h.

#define G_TCAM_PART_CNT (   x)    (((x) >> S_TCAM_PART_CNT) & M_TCAM_PART_CNT)

Definition at line 1845 of file regs.h.

#define G_TCAM_PART_SIZE (   x)    (((x) >> S_TCAM_PART_SIZE) & M_TCAM_PART_SIZE)

Definition at line 1855 of file regs.h.

#define G_TCAM_PART_TYPE (   x)    (((x) >> S_TCAM_PART_TYPE) & M_TCAM_PART_TYPE)

Definition at line 1850 of file regs.h.

#define G_TCAM_SERVER_REGION_USAGE (   x)    (((x) >> S_TCAM_SERVER_REGION_USAGE) & M_TCAM_SERVER_REGION_USAGE)

Definition at line 753 of file regs.h.

#define G_TIMESTAMP (   x)    (((x) >> S_TIMESTAMP) & M_TIMESTAMP)

Definition at line 846 of file regs.h.

#define G_TP_ACCESS_LATENCY (   x)    (((x) >> S_TP_ACCESS_LATENCY) & M_TP_ACCESS_LATENCY)

Definition at line 906 of file regs.h.

#define G_TP_PC_REV (   x)    (((x) >> S_TP_PC_REV) & M_TP_PC_REV)

Definition at line 935 of file regs.h.

#define G_TPI_ADDRESS (   x)    (((x) >> S_TPI_ADDRESS) & M_TPI_ADDRESS)

Definition at line 616 of file regs.h.

#define G_TPIPAR (   x)    (((x) >> S_TPIPAR) & M_TPIPAR)

Definition at line 639 of file regs.h.

#define G_TRANSACTION_TIMER (   x)    (((x) >> S_TRANSACTION_TIMER) & M_TRANSACTION_TIMER)

Definition at line 1686 of file regs.h.

#define G_TX_NPORTS (   x)    (((x) >> S_TX_NPORTS) & M_TX_NPORTS)

Definition at line 1431 of file regs.h.

#define G_TXFIFOPARITYERROR (   x)    (((x) >> S_TXFIFOPARITYERROR) & M_TXFIFOPARITYERROR)

Definition at line 1478 of file regs.h.

#define G_TXPORT0DROPCNT (   x)    (((x) >> S_TXPORT0DROPCNT) & M_TXPORT0DROPCNT)

Definition at line 1490 of file regs.h.

#define G_TXPORT1DROPCNT (   x)    (((x) >> S_TXPORT1DROPCNT) & M_TXPORT1DROPCNT)

Definition at line 1495 of file regs.h.

#define G_TXPORT2DROPCNT (   x)    (((x) >> S_TXPORT2DROPCNT) & M_TXPORT2DROPCNT)

Definition at line 1502 of file regs.h.

#define G_TXPORT3DROPCNT (   x)    (((x) >> S_TXPORT3DROPCNT) & M_TXPORT3DROPCNT)

Definition at line 1507 of file regs.h.

#define G_UNCORRECTABLE_ERROR_COUNT (   x)    (((x) >> S_UNCORRECTABLE_ERROR_COUNT) & M_UNCORRECTABLE_ERROR_COUNT)

Definition at line 425 of file regs.h.

#define G_VAR_GAIN (   x)    (((x) >> S_VAR_GAIN) & M_VAR_GAIN)

Definition at line 972 of file regs.h.

#define G_VAR_MULT (   x)    (((x) >> S_VAR_MULT) & M_VAR_MULT)

Definition at line 967 of file regs.h.

#define G_VPD_ADDR (   x)    (((x) >> S_VPD_ADDR) & M_VPD_ADDR)

Definition at line 2091 of file regs.h.

#define G_WINDOW_SCALE (   x)    (((x) >> S_WINDOW_SCALE) & M_WINDOW_SCALE)

Definition at line 851 of file regs.h.

#define G_WINDOWPROBE_MAX (   x)    (((x) >> S_WINDOWPROBE_MAX) & M_WINDOWPROBE_MAX)

Definition at line 1136 of file regs.h.

#define G_WRITE_BURST_SIZE (   x)    (((x) >> S_WRITE_BURST_SIZE) & M_WRITE_BURST_SIZE)

Definition at line 2030 of file regs.h.

#define G_WRITE_DATA (   x)    (((x) >> S_WRITE_DATA) & M_WRITE_DATA)

Definition at line 1637 of file regs.h.

#define G_WRITE_RECOVERY_DELAY (   x)    (((x) >> S_WRITE_RECOVERY_DELAY) & M_WRITE_RECOVERY_DELAY)

Definition at line 302 of file regs.h.

#define G_WRITE_TO_READ_DELAY (   x)    (((x) >> S_WRITE_TO_READ_DELAY) & M_WRITE_TO_READ_DELAY)

Definition at line 273 of file regs.h.

#define M_2MSL   0x3fffffff

Definition at line 1052 of file regs.h.

#define M_5TUPLE_LOOKUP   0x3

Definition at line 780 of file regs.h.

#define M_ACTIVE_TO_PRECHARGE_DELAY   0x7

Definition at line 295 of file regs.h.

#define M_ALMOSTEMPTY   0xffff

Definition at line 1409 of file regs.h.

#define M_ALMOSTFULL   0xffff

Definition at line 1416 of file regs.h.

#define M_BUNDLE_ADDR   0x3

Definition at line 1655 of file regs.h.

#define M_CALENDARLENGTH   0xffff

Definition at line 1319 of file regs.h.

#define M_CF_PARITY_ERR   0x3

Definition at line 2139 of file regs.h.

#define M_CHANNEL_ADDR   0xf

Definition at line 1645 of file regs.h.

#define M_CM_MEMMGR_BASE   0xfffffff

Definition at line 822 of file regs.h.

#define M_CM_MEMMGR_MAX_PSTRUCT   0xfffffff

Definition at line 1208 of file regs.h.

#define M_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE   0xfffffff

Definition at line 1201 of file regs.h.

#define M_CM_MEMMGR_RX_FREE_LIST_BASE   0xfffffff

Definition at line 1187 of file regs.h.

#define M_CM_MEMMGR_TX_FREE_LIST_BASE   0xfffffff

Definition at line 1194 of file regs.h.

#define M_CM_TIMER_BASE   0xfffffff

Definition at line 829 of file regs.h.

#define M_CMDMODE   0x7

Definition at line 2019 of file regs.h.

#define M_CMDQ0_POINTER   0xffff

Definition at line 174 of file regs.h.

#define M_CMDQ0_SIZE   0x1ffff

Definition at line 123 of file regs.h.

#define M_CMDQ1_POINTER   0xffff

Definition at line 185 of file regs.h.

#define M_CMDQ1_SIZE   0x1ffff

Definition at line 218 of file regs.h.

#define M_CMDQ_PRIORITY   0x3

Definition at line 70 of file regs.h.

#define M_CORRECTABLE_ERROR_COUNT   0xff

Definition at line 418 of file regs.h.

#define M_CPL_OPCODE   0xff

Definition at line 1289 of file regs.h.

#define M_CSPI_TRAIN_ALPHA   0xffff

Definition at line 1344 of file regs.h.

#define M_CSPI_TRAIN_DATA_MAXT   0xffff

Definition at line 1349 of file regs.h.

#define M_DACK_BYTE_THRESHOLD   0xfffff

Definition at line 897 of file regs.h.

#define M_DACK_MSS_SELECTOR   0x3

Definition at line 892 of file regs.h.

#define M_DATA_PATTERN   0x3

Definition at line 473 of file regs.h.

#define M_DAY   0x1f

Definition at line 206 of file regs.h.

#define M_DBGI_RSP_ERR_REASON   0x7

Definition at line 2060 of file regs.h.

#define M_DEFAULT_PEER_MSS   0xffff

Definition at line 873 of file regs.h.

#define M_DELAYED_ACK_TIME   0x7ff

Definition at line 1108 of file regs.h.

#define M_DELAYED_ACK_TIMER_RESOLUTION   0x3f

Definition at line 1040 of file regs.h.

#define M_DENSITY   0x3

Definition at line 305 of file regs.h.

#define M_DIP2_ERR_CNT   0xf

Definition at line 1628 of file regs.h.

#define M_DIP2_PARITY_ERR_THRES   0xf

Definition at line 1591 of file regs.h.

#define M_DIP4_THRES   0xfff

Definition at line 1596 of file regs.h.

#define M_DIP4ERRORCNT   0xfff

Definition at line 1536 of file regs.h.

#define M_DIP4ERRORCNTSHADOW   0xfff

Definition at line 1541 of file regs.h.

#define M_DROP_TICKS_CNT   0x3ffffff

Definition at line 1252 of file regs.h.

#define M_DUP_THRESH   0xf

Definition at line 985 of file regs.h.

#define M_ECN   0x3

Definition at line 859 of file regs.h.

#define M_ELEMENT0   0xff

Definition at line 940 of file regs.h.

#define M_ELEMENT1   0xff

Definition at line 945 of file regs.h.

#define M_ELEMENT2   0xff

Definition at line 950 of file regs.h.

#define M_ELEMENT3   0xff

Definition at line 955 of file regs.h.

#define M_FAST_FINWAIT2_TIME   0x3fffffff

Definition at line 1122 of file regs.h.

#define M_FINWAIT2_TIME   0x3fffffff

Definition at line 1115 of file regs.h.

#define M_FL0_POINTER   0xffff

Definition at line 192 of file regs.h.

#define M_FL0_SIZE   0x1ffff

Definition at line 130 of file regs.h.

#define M_FL1_POINTER   0xffff

Definition at line 199 of file regs.h.

#define M_FL1_SIZE   0x1ffff

Definition at line 225 of file regs.h.

#define M_FL_THRESHOLD   0xffff

Definition at line 146 of file regs.h.

#define M_GENERIC_TIMER_RESOLUTION   0x3f

Definition at line 1045 of file regs.h.

#define M_GLOBAL_TIMER_SEPARATOR   0xffff

Definition at line 1235 of file regs.h.

#define M_IDINDEX   0xf

Definition at line 1935 of file regs.h.

#define M_INIT_CONG_WIN   0x7

Definition at line 990 of file regs.h.

#define M_INITIAL_SLOW_START_THRESHOLD   0xffff

Definition at line 997 of file regs.h.

#define M_INITIAL_SRTT   0xffff

Definition at line 1101 of file regs.h.

#define M_INTERRUPT_TIMER_COUNT   0xffffff

Definition at line 167 of file regs.h.

#define M_IP_TTL   0xff

Definition at line 746 of file regs.h.

#define M_KEEP_ALIVE_IDLE_TIME   0x3fffffff

Definition at line 1087 of file regs.h.

#define M_KEEP_ALIVE_INTERVAL_TIME   0x3fffffff

Definition at line 1094 of file regs.h.

#define M_KEEPALIVE_MAX   0xff

Definition at line 1129 of file regs.h.

#define M_L3_VALUE   0x3f

Definition at line 1151 of file regs.h.

#define M_LEARN_RESPONSE_LATENCY   0x1f

Definition at line 1902 of file regs.h.

#define M_LOCAL_IP_RAM_ADDR   0x3f

Definition at line 1885 of file regs.h.

#define M_MASTER_DLL_TAP_COUNT   0xff

Definition at line 367 of file regs.h.

#define M_MASTER_DLL_TAP_COUNT_OFFSET   0x3f

Definition at line 380 of file regs.h.

#define M_MAX_REORDER_FRAGMENTS   0x7

Definition at line 1033 of file regs.h.

#define M_MAX_RX_SIZE   0xffff

Definition at line 1014 of file regs.h.

#define M_MAXBURST1   0xffff

Definition at line 1332 of file regs.h.

#define M_MAXBURST2   0xffff

Definition at line 1337 of file regs.h.

#define M_MAXTRAINALPHA   0xffff

Definition at line 1459 of file regs.h.

#define M_MAXTRAINDATA   0xffff

Definition at line 1464 of file regs.h.

#define M_MC3_BANK_CYCLE   0xf

Definition at line 276 of file regs.h.

#define M_MC3_CE_ADDR   0xfffffff

Definition at line 430 of file regs.h.

#define M_MC3_EXTENDED_MODE   0x3fff

Definition at line 344 of file regs.h.

#define M_MC3_MODE   0x3fff

Definition at line 333 of file regs.h.

#define M_MC3_PARITY_ERR   0xff

Definition at line 492 of file regs.h.

#define M_MC3_UE_ADDR   0xfffffff

Definition at line 442 of file regs.h.

#define M_MC3_WIDTH   0x3

Definition at line 322 of file regs.h.

#define M_MC4_BACK_DOOR_ADDR   0xfffffff

Definition at line 575 of file regs.h.

#define M_MC4_BANK_CYCLE   0x7

Definition at line 510 of file regs.h.

#define M_MC4_CE_ADDR   0xffffff

Definition at line 551 of file regs.h.

#define M_MC4_EXTENDED_MODE   0x7fff

Definition at line 541 of file regs.h.

#define M_MC4_MODE   0x7fff

Definition at line 534 of file regs.h.

#define M_MC4_UE_ADDR   0xffffff

Definition at line 563 of file regs.h.

#define M_MC4A_WIDTH   0x3

Definition at line 523 of file regs.h.

#define M_MODULATION_TIMER_SEPARATOR   0x7fff

Definition at line 1230 of file regs.h.

#define M_MODULE_ADDR   0x3

Definition at line 1650 of file regs.h.

#define M_MONITORED_PORT_NUM   0x3

Definition at line 1613 of file regs.h.

#define M_MONTH   0xf

Definition at line 211 of file regs.h.

#define M_NUM_LIP   0x3f

Definition at line 1838 of file regs.h.

#define M_NUM_PKTS_DROPPED   0xf

Definition at line 1257 of file regs.h.

#define M_OUT_OF_SYNC_COUNT   0xf

Definition at line 1582 of file regs.h.

#define M_PARLAT   0x1f

Definition at line 1914 of file regs.h.

#define M_PCI_MODE_CLK   0x3

Definition at line 2164 of file regs.h.

#define M_PCI_MODE_PCIX_INITPAT   0x7

Definition at line 2155 of file regs.h.

#define M_PERSIST_TIMER_MAX   0x3fffffff

Definition at line 1080 of file regs.h.

#define M_PERSIST_TIMER_MIN   0xffff

Definition at line 1073 of file regs.h.

#define M_PM_PAR_ERR   0xffff

Definition at line 1730 of file regs.h.

#define M_PRECHARGE_CYCLE   0x3

Definition at line 286 of file regs.h.

#define M_READ_DATA   0xff

Definition at line 1667 of file regs.h.

#define M_READ_TO_WRITE_DELAY   0x7

Definition at line 266 of file regs.h.

#define M_RECEIVE_BUFFER_SIZE   0xffff

Definition at line 1002 of file regs.h.

#define M_REFRESH_CYCLE   0xf

Definition at line 281 of file regs.h.

#define M_REFRESH_DIVISOR   0x3fff

Definition at line 356 of file regs.h.

#define M_REGISTER_OFFSET   0xf

Definition at line 1640 of file regs.h.

#define M_RESPQ_CREDIT   0x1ffff

Definition at line 153 of file regs.h.

#define M_RESPQ_SIZE   0x1ffff

Definition at line 137 of file regs.h.

#define M_RETRANSMISSION_MAX   0xff

Definition at line 1139 of file regs.h.

#define M_RETRANSMIT_TIMER_MAX   0x3fffffff

Definition at line 1066 of file regs.h.

#define M_RETRANSMIT_TIMER_MIN   0xffff

Definition at line 1059 of file regs.h.

#define M_RF_PARITY_ERR   0x3

Definition at line 2134 of file regs.h.

#define M_ROUTE_TABLE_INDEX   0xf

Definition at line 1281 of file regs.h.

#define M_RSTMAX   0x1ff

Definition at line 1942 of file regs.h.

#define M_RTTVAR_INIT   0xf

Definition at line 980 of file regs.h.

#define M_RX_COALESCE_SIZE   0xffff

Definition at line 1009 of file regs.h.

#define M_RX_NPORTS   0xff

Definition at line 1424 of file regs.h.

#define M_RX_PKT_OFFSET   0x7

Definition at line 103 of file regs.h.

#define M_RXFIFOOVERFLOW   0x3ff

Definition at line 1481 of file regs.h.

#define M_RXFIFOPARITYERROR   0x3ff

Definition at line 1471 of file regs.h.

#define M_RXPORT0DROPCNT   0xffff

Definition at line 1512 of file regs.h.

#define M_RXPORT1DROPCNT   0xffff

Definition at line 1517 of file regs.h.

#define M_RXPORT2DROPCNT   0xffff

Definition at line 1524 of file regs.h.

#define M_RXPORT3DROPCNT   0xffff

Definition at line 1529 of file regs.h.

#define M_SACK   0x3

Definition at line 854 of file regs.h.

#define M_SACK_ALGORITHM   0x3

Definition at line 864 of file regs.h.

#define M_SCHTOKEN0   0xffff

Definition at line 1381 of file regs.h.

#define M_SCHTOKEN1   0xffff

Definition at line 1388 of file regs.h.

#define M_SCHTOKEN2   0xffff

Definition at line 1395 of file regs.h.

#define M_SCHTOKEN3   0xffff

Definition at line 1402 of file regs.h.

#define M_SEARCH_RESPONSE_LATENCY   0x1f

Definition at line 1897 of file regs.h.

#define M_SIZE   0x3fffff

Definition at line 1864 of file regs.h.

#define M_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT   0x3f

Definition at line 394 of file regs.h.

#define M_SLAVE_DELAY_LINE_TAP_COUNT   0x3f

Definition at line 403 of file regs.h.

#define M_SLAVE_DLL_DELTA   0xf

Definition at line 389 of file regs.h.

#define M_SLEEPING   0xffff

Definition at line 160 of file regs.h.

#define M_SPI4_COMMAND   0xff

Definition at line 1660 of file regs.h.

#define M_SRCHLAT   0x1f

Definition at line 1909 of file regs.h.

#define M_SRTT_GAIN   0xf

Definition at line 975 of file regs.h.

#define M_START_OF_ROUTING_TABLE   0x3fffff

Definition at line 1871 of file regs.h.

#define M_START_OF_SERVER_INDEX   0x3fffff

Definition at line 1878 of file regs.h.

#define M_SYN_COOKIE_PARAMETER   0x3f

Definition at line 813 of file regs.h.

#define M_SYN_ISSUE_MODE   0x3

Definition at line 1825 of file regs.h.

#define M_SYN_MAX   0xff

Definition at line 1144 of file regs.h.

#define M_TCAM_PART_CNT   0x3

Definition at line 1843 of file regs.h.

#define M_TCAM_PART_SIZE   0x3

Definition at line 1853 of file regs.h.

#define M_TCAM_PART_TYPE   0x3

Definition at line 1848 of file regs.h.

#define M_TCAM_SERVER_REGION_USAGE   0x3

Definition at line 751 of file regs.h.

#define M_TIMESTAMP   0x3

Definition at line 844 of file regs.h.

#define M_TP_ACCESS_LATENCY   0xf

Definition at line 904 of file regs.h.

#define M_TP_PC_REV   0x3

Definition at line 933 of file regs.h.

#define M_TPI_ADDRESS   0xffffff

Definition at line 614 of file regs.h.

#define M_TPIPAR   0x7f

Definition at line 637 of file regs.h.

#define M_TRANSACTION_TIMER   0xff

Definition at line 1684 of file regs.h.

#define M_TX_NPORTS   0xff

Definition at line 1429 of file regs.h.

#define M_TXFIFOPARITYERROR   0x3ff

Definition at line 1476 of file regs.h.

#define M_TXPORT0DROPCNT   0xffff

Definition at line 1488 of file regs.h.

#define M_TXPORT1DROPCNT   0xffff

Definition at line 1493 of file regs.h.

#define M_TXPORT2DROPCNT   0xffff

Definition at line 1500 of file regs.h.

#define M_TXPORT3DROPCNT   0xffff

Definition at line 1505 of file regs.h.

#define M_UNCORRECTABLE_ERROR_COUNT   0xff

Definition at line 423 of file regs.h.

#define M_VAR_GAIN   0xf

Definition at line 970 of file regs.h.

#define M_VAR_MULT   0xf

Definition at line 965 of file regs.h.

#define M_VPD_ADDR   0x7fff

Definition at line 2089 of file regs.h.

#define M_WINDOW_SCALE   0x3

Definition at line 849 of file regs.h.

#define M_WINDOWPROBE_MAX   0xff

Definition at line 1134 of file regs.h.

#define M_WRITE_BURST_SIZE   0x3ff

Definition at line 2028 of file regs.h.

#define M_WRITE_DATA   0xff

Definition at line 1635 of file regs.h.

#define M_WRITE_RECOVERY_DELAY   0x3

Definition at line 300 of file regs.h.

#define M_WRITE_TO_READ_DELAY   0x7

Definition at line 271 of file regs.h.

#define S_2MSL   0

Definition at line 1051 of file regs.h.

#define S_5TUPLE_LOOKUP   17

Definition at line 779 of file regs.h.

#define S_ACTIVE_TO_PRECHARGE_DELAY   19

Definition at line 294 of file regs.h.

#define S_ACTIVE_TO_READ_WRITE_DELAY   18

Definition at line 290 of file regs.h.

#define S_ALMOSTEMPTY   0

Definition at line 1408 of file regs.h.

#define S_ALMOSTFULL   0

Definition at line 1415 of file regs.h.

#define S_ATTACK_FILTER   23

Definition at line 800 of file regs.h.

#define S_BACK_DOOR_OPERATION   0

Definition at line 459 of file regs.h.

#define S_BANKS   27

Definition at line 313 of file regs.h.

#define S_BUILD   16

Definition at line 1829 of file regs.h.

#define S_BUNDLE_ADDR   20

Definition at line 1654 of file regs.h.

#define S_BUSY   31

Definition at line 337 of file regs.h.

#define S_CALENDARLENGTH   0

Definition at line 1318 of file regs.h.

#define S_CF_PARITY_ERR   10

Definition at line 2138 of file regs.h.

#define S_CHANNEL_ADDR   12

Definition at line 1644 of file regs.h.

#define S_CLEAR_FIN   8

Definition at line 924 of file regs.h.

#define S_CLK_ENABLE   0

Definition at line 257 of file regs.h.

#define S_CM_MEMMGR_BASE   0

Definition at line 821 of file regs.h.

#define S_CM_MEMMGR_INIT   1

Definition at line 1176 of file regs.h.

#define S_CM_MEMMGR_MAX_PSTRUCT   0

Definition at line 1207 of file regs.h.

#define S_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE   0

Definition at line 1200 of file regs.h.

#define S_CM_MEMMGR_RX_FREE_LIST_BASE   0

Definition at line 1186 of file regs.h.

#define S_CM_MEMMGR_TX_FREE_LIST_BASE   0

Definition at line 1193 of file regs.h.

#define S_CM_TIMER_BASE   0

Definition at line 828 of file regs.h.

#define S_CMDMODE   0

Definition at line 2018 of file regs.h.

#define S_CMDQ0_ENABLE   0

Definition at line 45 of file regs.h.

#define S_CMDQ0_POINTER   0

Definition at line 173 of file regs.h.

#define S_CMDQ0_SIZE   0

Definition at line 122 of file regs.h.

#define S_CMDQ1_ENABLE   1

Definition at line 49 of file regs.h.

#define S_CMDQ1_POINTER   0

Definition at line 184 of file regs.h.

#define S_CMDQ1_SIZE   0

Definition at line 217 of file regs.h.

#define S_CMDQ_PRIORITY   6

Definition at line 69 of file regs.h.

#define S_COMPRESSION_ENABLE   17

Definition at line 1833 of file regs.h.

#define S_CONTINUOUS   3

Definition at line 477 of file regs.h.

#define S_CORRECTABLE_ERROR_COUNT   2

Definition at line 417 of file regs.h.

#define S_CPL_ENABLE   4

Definition at line 61 of file regs.h.

#define S_CPL_OPCODE   0

Definition at line 1288 of file regs.h.

#define S_CSPI_TRAIN_ALPHA   0

Definition at line 1343 of file regs.h.

#define S_CSPI_TRAIN_DATA_MAXT   16

Definition at line 1348 of file regs.h.

#define S_CSPIFRAMINGERROR   1

Definition at line 1299 of file regs.h.

#define S_CURRENT_GENERATION_BIT   16

Definition at line 178 of file regs.h.

#define S_DACK_AUTO_CAREFUL   2

Definition at line 887 of file regs.h.

#define S_DACK_AUTO_MGMT   1

Definition at line 883 of file regs.h.

#define S_DACK_BYTE_THRESHOLD   5

Definition at line 896 of file regs.h.

#define S_DACK_MODE   0

Definition at line 879 of file regs.h.

#define S_DACK_MSS_SELECTOR   3

Definition at line 891 of file regs.h.

#define S_DATA_PATTERN   1

Definition at line 472 of file regs.h.

#define S_DAY   0

Definition at line 205 of file regs.h.

#define S_DBGI_ENABLE   4

Definition at line 1812 of file regs.h.

#define S_DBGI_RSP_ERR   2

Definition at line 2055 of file regs.h.

#define S_DBGI_RSP_ERR_REASON   8

Definition at line 2059 of file regs.h.

#define S_DBGI_RSP_HIT   1

Definition at line 2051 of file regs.h.

#define S_DBGI_RSP_VALID   0

Definition at line 2047 of file regs.h.

#define S_DDP_FC_ENABLE   5

Definition at line 912 of file regs.h.

#define S_DEFAULT_PEER_MSS   16

Definition at line 872 of file regs.h.

#define S_DELAYED_ACK_TIME   0

Definition at line 1107 of file regs.h.

#define S_DELAYED_ACK_TIMER_RESOLUTION   0

Definition at line 1039 of file regs.h.

#define S_DENSITY   24

Definition at line 304 of file regs.h.

#define S_DET_PARITY_ERR   5

Definition at line 2121 of file regs.h.

#define S_DIP2_COUNT_MODE_ENABLE   4

Definition at line 1586 of file regs.h.

#define S_DIP2_ERR_CNT   0

Definition at line 1627 of file regs.h.

#define S_DIP2_PARITY_ERR_THRES   5

Definition at line 1590 of file regs.h.

#define S_DIP2PARITYERR   5

Definition at line 1559 of file regs.h.

#define S_DIP4_THRES   9

Definition at line 1595 of file regs.h.

#define S_DIP4_THRES_ENABLE   21

Definition at line 1600 of file regs.h.

#define S_DIP4ERR   0

Definition at line 1355 of file regs.h.

#define S_DIP4ERRORCNT   0

Definition at line 1535 of file regs.h.

#define S_DIP4ERRORCNTSHADOW   12

Definition at line 1540 of file regs.h.

#define S_DIS_TX_FILL_WIN_PUSH   12

Definition at line 928 of file regs.h.

#define S_DISABLE_CMDQ0_GTS   8

Definition at line 74 of file regs.h.

#define S_DISABLE_CMDQ1_GTS   9

Definition at line 78 of file regs.h.

#define S_DISABLE_FL0_GTS   10

Definition at line 82 of file regs.h.

#define S_DISABLE_FL1_GTS   11

Definition at line 86 of file regs.h.

#define S_DISABLE_PAST_TIMER_INSERTION   0

Definition at line 1225 of file regs.h.

#define S_DISABLE_RX_FLOW_CONTROL   25

Definition at line 808 of file regs.h.

#define S_DROP_TICKS_CNT   4

Definition at line 1251 of file regs.h.

#define S_DUP_THRESH   20

Definition at line 984 of file regs.h.

#define S_DYNAMIC_DESKEW   23

Definition at line 1608 of file regs.h.

#define S_ECC_CHECK_ENABLE   1

Definition at line 413 of file regs.h.

#define S_ECC_GENERATION_ENABLE   0

Definition at line 409 of file regs.h.

#define S_ECN   6

Definition at line 858 of file regs.h.

#define S_EGRS_DATA_PAR_ERR   1

Definition at line 1701 of file regs.h.

#define S_ELEMENT0   0

Definition at line 939 of file regs.h.

#define S_ELEMENT1   8

Definition at line 944 of file regs.h.

#define S_ELEMENT2   16

Definition at line 949 of file regs.h.

#define S_ELEMENT3   24

Definition at line 954 of file regs.h.

#define S_ENABLE_BIG_ENDIAN   12

Definition at line 90 of file regs.h.

#define S_ENABLE_CSPI   1

Definition at line 1270 of file regs.h.

#define S_ENABLE_PCIX   2

Definition at line 1274 of file regs.h.

#define S_ENABLE_TX_DROP   31

Definition at line 1243 of file regs.h.

#define S_ENABLE_TX_ERROR   30

Definition at line 1247 of file regs.h.

#define S_ERROR_ACK   9

Definition at line 1675 of file regs.h.

#define S_ESPI_CMD_BUSY   8

Definition at line 1671 of file regs.h.

#define S_ESPI_RX_CORE_RST   1

Definition at line 1571 of file regs.h.

#define S_ESPI_RX_LNK_RST   0

Definition at line 1567 of file regs.h.

#define S_FAST_FINWAIT2_TIME   0

Definition at line 1121 of file regs.h.

#define S_FAST_PDU_DELIVERY   7

Definition at line 920 of file regs.h.

#define S_FIFOSTATUSENABLE   0

Definition at line 1325 of file regs.h.

#define S_FINWAIT2_TIME   0

Definition at line 1114 of file regs.h.

#define S_FL0_ENABLE   2

Definition at line 53 of file regs.h.

#define S_FL0_POINTER   0

Definition at line 191 of file regs.h.

#define S_FL0_SIZE   0

Definition at line 129 of file regs.h.

#define S_FL1_ENABLE   3

Definition at line 57 of file regs.h.

#define S_FL1_POINTER   0

Definition at line 198 of file regs.h.

#define S_FL1_SIZE   0

Definition at line 224 of file regs.h.

#define S_FL_EXHAUSTED   2

Definition at line 239 of file regs.h.

#define S_FL_SELECTION_CRITERIA   13

Definition at line 94 of file regs.h.

#define S_FL_THRESHOLD   0

Definition at line 145 of file regs.h.

#define S_FORCE_DISABLE_STATUS   22

Definition at line 1604 of file regs.h.

#define S_GENERIC_TIMER_RESOLUTION   16

Definition at line 1044 of file regs.h.

#define S_GLOBAL_TIMER_SEPARATOR   16

Definition at line 1234 of file regs.h.

#define S_HELD_FIN_DISABLE   4

Definition at line 908 of file regs.h.

#define S_HREG_PAR_ERR   0

Definition at line 1697 of file regs.h.

#define S_IDINDEX   0

Definition at line 1934 of file regs.h.

#define S_INGRS_DATA_PAR_ERR   2

Definition at line 1705 of file regs.h.

#define S_INIT_CONG_WIN   24

Definition at line 989 of file regs.h.

#define S_INITIAL_SLOW_START_THRESHOLD   0

Definition at line 996 of file regs.h.

#define S_INITIAL_SRTT   0

Definition at line 1100 of file regs.h.

#define S_INT_DIR   31

Definition at line 630 of file regs.h.

#define S_INTEL1010MODE   4

Definition at line 1451 of file regs.h.

#define S_INTERFACE_TYPE   24

Definition at line 804 of file regs.h.

#define S_INTERRUPT_TIMER_COUNT   0

Definition at line 166 of file regs.h.

#define S_IP_CSUM   13

Definition at line 767 of file regs.h.

#define S_IP_FRAGMENT_DROP   19

Definition at line 784 of file regs.h.

#define S_IP_ID_SPLIT   14

Definition at line 771 of file regs.h.

#define S_IP_TTL   0

Definition at line 745 of file regs.h.

#define S_ISCSI_COALESCE   14

Definition at line 98 of file regs.h.

#define S_KEEP_ALIVE_IDLE_TIME   0

Definition at line 1086 of file regs.h.

#define S_KEEP_ALIVE_INTERVAL_TIME   0

Definition at line 1093 of file regs.h.

#define S_KEEPALIVE_MAX   0

Definition at line 1128 of file regs.h.

#define S_L3_VALUE   0

Definition at line 1150 of file regs.h.

#define S_LEARN_RESPONSE_LATENCY   8

Definition at line 1901 of file regs.h.

#define S_LOCAL_IP_RAM_ADDR   0

Definition at line 1884 of file regs.h.

#define S_LRNVEREN   1

Definition at line 1924 of file regs.h.

#define S_M_BUS_ENABLE   5

Definition at line 1816 of file regs.h.

#define S_MASTER_DLL_LOCKED   9

Definition at line 371 of file regs.h.

#define S_MASTER_DLL_MAX_TAP_COUNT   10

Definition at line 375 of file regs.h.

#define S_MASTER_DLL_RESET   0

Definition at line 362 of file regs.h.

#define S_MASTER_DLL_TAP_COUNT   1

Definition at line 366 of file regs.h.

#define S_MASTER_DLL_TAP_COUNT_OFFSET   11

Definition at line 379 of file regs.h.

#define S_MASTER_PARITY_ERR   0

Definition at line 2101 of file regs.h.

#define S_MAX_REORDER_FRAGMENTS   12

Definition at line 1032 of file regs.h.

#define S_MAX_RX_SIZE   16

Definition at line 1013 of file regs.h.

#define S_MAXBURST1   0

Definition at line 1331 of file regs.h.

#define S_MAXBURST2   16

Definition at line 1336 of file regs.h.

#define S_MAXTRAINALPHA   0

Definition at line 1458 of file regs.h.

#define S_MAXTRAINDATA   16

Definition at line 1463 of file regs.h.

#define S_MC3_ADDR_ERR   10

Definition at line 496 of file regs.h.

#define S_MC3_BANK_CYCLE   8

Definition at line 275 of file regs.h.

#define S_MC3_CE_ADDR   4

Definition at line 429 of file regs.h.

#define S_MC3_CORR_ERR   0

Definition at line 483 of file regs.h.

#define S_MC3_EXTENDED_MODE   0

Definition at line 343 of file regs.h.

#define S_MC3_MODE   0

Definition at line 332 of file regs.h.

#define S_MC3_PARITY_ERR   2

Definition at line 491 of file regs.h.

#define S_MC3_SLOW   31

Definition at line 326 of file regs.h.

#define S_MC3_UE_ADDR   4

Definition at line 441 of file regs.h.

#define S_MC3_UNCORR_ERR   1

Definition at line 487 of file regs.h.

#define S_MC3_WIDTH   29

Definition at line 321 of file regs.h.

#define S_MC4_ADDR_ERR   2

Definition at line 604 of file regs.h.

#define S_MC4_BACK_DOOR_ADDR   0

Definition at line 574 of file regs.h.

#define S_MC4_BANK_CYCLE   8

Definition at line 509 of file regs.h.

#define S_MC4_CE_ADDR   4

Definition at line 550 of file regs.h.

#define S_MC4_CORR_ERR   0

Definition at line 596 of file regs.h.

#define S_MC4_EXTENDED_MODE   0

Definition at line 540 of file regs.h.

#define S_MC4_MODE   0

Definition at line 533 of file regs.h.

#define S_MC4_NARROW   24

Definition at line 514 of file regs.h.

#define S_MC4_SLOW   25

Definition at line 518 of file regs.h.

#define S_MC4_UE_ADDR   4

Definition at line 562 of file regs.h.

#define S_MC4_UNCORR_ERR   1

Definition at line 600 of file regs.h.

#define S_MC4A_SLOW   26

Definition at line 527 of file regs.h.

#define S_MC4A_WIDTH   24

Definition at line 522 of file regs.h.

#define S_MC5_INT_ACTIVE_REGION_FULL   7

Definition at line 1976 of file regs.h.

#define S_MC5_INT_DEL_ACT_EMPTY   18

Definition at line 2008 of file regs.h.

#define S_MC5_INT_DISPATCHQ_PARITY_ERR   17

Definition at line 2004 of file regs.h.

#define S_MC5_INT_HIT_IN_ACTIVE_REGION_ERR   1

Definition at line 1952 of file regs.h.

#define S_MC5_INT_HIT_IN_RT_REGION_ERR   2

Definition at line 1956 of file regs.h.

#define S_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR   0

Definition at line 1948 of file regs.h.

#define S_MC5_INT_LIP0_ERR   4

Definition at line 1964 of file regs.h.

#define S_MC5_INT_LIP_MISS_ERR   5

Definition at line 1968 of file regs.h.

#define S_MC5_INT_MISS_ERR   3

Definition at line 1960 of file regs.h.

#define S_MC5_INT_NFA_SRCH_ERR   8

Definition at line 1980 of file regs.h.

#define S_MC5_INT_PARITY_ERR   6

Definition at line 1972 of file regs.h.

#define S_MC5_INT_REQUESTQ_PARITY_ERR   16

Definition at line 2000 of file regs.h.

#define S_MC5_INT_SYN_COOKIE   9

Definition at line 1984 of file regs.h.

#define S_MC5_INT_SYN_COOKIE_BAD   10

Definition at line 1988 of file regs.h.

#define S_MC5_INT_SYN_COOKIE_OFF   11

Definition at line 1992 of file regs.h.

#define S_MC5_INT_UNKNOWN_CMD   15

Definition at line 1996 of file regs.h.

#define S_MODE   0

Definition at line 1800 of file regs.h.

#define S_MODULATION_TIMER_SEPARATOR   1

Definition at line 1229 of file regs.h.

#define S_MODULE_ADDR   16

Definition at line 1649 of file regs.h.

#define S_MONITORED_DIRECTION   27

Definition at line 1617 of file regs.h.

#define S_MONITORED_INTERFACE   28

Definition at line 1621 of file regs.h.

#define S_MONITORED_PORT_NUM   25

Definition at line 1612 of file regs.h.

#define S_MONTH   5

Definition at line 210 of file regs.h.

#define S_MSS   10

Definition at line 868 of file regs.h.

#define S_NUM_LIP   18

Definition at line 1837 of file regs.h.

#define S_NUM_PKTS_DROPPED   0

Definition at line 1256 of file regs.h.

#define S_OFFLOAD_DISABLE   14

Definition at line 693 of file regs.h.

#define S_OP   0

Definition at line 468 of file regs.h.

#define S_OPERATION   0

Definition at line 586 of file regs.h.

#define S_ORGANIZATION   26

Definition at line 309 of file regs.h.

#define S_OUT_OF_SYNC_COUNT   0

Definition at line 1581 of file regs.h.

#define S_PACKET_MISMATCH   4

Definition at line 247 of file regs.h.

#define S_PACKET_TOO_BIG   3

Definition at line 243 of file regs.h.

#define S_PARITY_ENABLE   6

Definition at line 1820 of file regs.h.

#define S_PARLAT   8

Definition at line 1913 of file regs.h.

#define S_PATH_MTU   15

Definition at line 775 of file regs.h.

#define S_PCI_MODE_64BIT   0

Definition at line 2146 of file regs.h.

#define S_PCI_MODE_66MHZ   1

Definition at line 2150 of file regs.h.

#define S_PCI_MODE_CLK   6

Definition at line 2163 of file regs.h.

#define S_PCI_MODE_PCIX   5

Definition at line 2159 of file regs.h.

#define S_PCI_MODE_PCIX_INITPAT   2

Definition at line 2154 of file regs.h.

#define S_PERSIST_TIMER_MAX   0

Definition at line 1079 of file regs.h.

#define S_PERSIST_TIMER_MIN   0

Definition at line 1072 of file regs.h.

#define S_PING_DROP   20

Definition at line 788 of file regs.h.

#define S_PIO_PARITY_ERR   6

Definition at line 2125 of file regs.h.

#define S_PL_INTR_CSPI   9

Definition at line 1783 of file regs.h.

#define S_PL_INTR_ESPI   8

Definition at line 1779 of file regs.h.

#define S_PL_INTR_EXT   11

Definition at line 1791 of file regs.h.

#define S_PL_INTR_MC3   2

Definition at line 1755 of file regs.h.

#define S_PL_INTR_MC4   3

Definition at line 1759 of file regs.h.

#define S_PL_INTR_MC5   4

Definition at line 1763 of file regs.h.

#define S_PL_INTR_PCIX   10

Definition at line 1787 of file regs.h.

#define S_PL_INTR_RAT   5

Definition at line 1767 of file regs.h.

#define S_PL_INTR_SGE_DATA   1

Definition at line 1751 of file regs.h.

#define S_PL_INTR_SGE_ERR   0

Definition at line 1747 of file regs.h.

#define S_PL_INTR_TP   6

Definition at line 1771 of file regs.h.

#define S_PL_INTR_ULP   7

Definition at line 1775 of file regs.h.

#define S_PM_C2E_EMPTY_ERR   7

Definition at line 1725 of file regs.h.

#define S_PM_C2E_SYNC_ERR   5

Definition at line 1717 of file regs.h.

#define S_PM_C2E_WRT_FULL   25

Definition at line 1738 of file regs.h.

#define S_PM_E2C_EMPTY_ERR   6

Definition at line 1721 of file regs.h.

#define S_PM_E2C_SYNC_ERR   4

Definition at line 1713 of file regs.h.

#define S_PM_E2C_WRT_FULL   24

Definition at line 1734 of file regs.h.

#define S_PM_INTR   3

Definition at line 1709 of file regs.h.

#define S_PM_PAR_ERR   8

Definition at line 1729 of file regs.h.

#define S_POVEREN   0

Definition at line 1920 of file regs.h.

#define S_POWER_UP   0

Definition at line 505 of file regs.h.

#define S_PRECHARGE_CYCLE   16

Definition at line 285 of file regs.h.

#define S_PROTECT_MODE   21

Definition at line 792 of file regs.h.

#define S_QOS_MAPPING   10

Definition at line 755 of file regs.h.

#define S_RAM_WRITE_ENABLE   8

Definition at line 1889 of file regs.h.

#define S_RAMPARITYERR   4

Definition at line 1371 of file regs.h.

#define S_RCV_MASTER_ABORT   3

Definition at line 2113 of file regs.h.

#define S_RCV_TARGET_ABORT   2

Definition at line 2109 of file regs.h.

#define S_RDMA_ERR_ENABLE   6

Definition at line 916 of file regs.h.

#define S_READ_DATA   0

Definition at line 1666 of file regs.h.

#define S_READ_TO_WRITE_DELAY   2

Definition at line 265 of file regs.h.

#define S_READY   1

Definition at line 261 of file regs.h.

#define S_RECEIVE_BUFFER_SIZE   16

Definition at line 1001 of file regs.h.

#define S_REFRESH_CYCLE   12

Definition at line 280 of file regs.h.

#define S_REFRESH_DIVISOR   1

Definition at line 355 of file regs.h.

#define S_REFRESH_ENABLE   0

Definition at line 351 of file regs.h.

#define S_REGISTER_OFFSET   8

Definition at line 1639 of file regs.h.

#define S_RESPONSE_QUEUE_ENABLE   5

Definition at line 65 of file regs.h.

#define S_RESPQ_CREDIT   0

Definition at line 152 of file regs.h.

#define S_RESPQ_EXHAUSTED   0

Definition at line 231 of file regs.h.

#define S_RESPQ_OVERFLOW   1

Definition at line 235 of file regs.h.

#define S_RESPQ_SIZE   0

Definition at line 136 of file regs.h.

#define S_RETRANSMISSION_MAX   16

Definition at line 1138 of file regs.h.

#define S_RETRANSMIT_TIMER_MAX   0

Definition at line 1065 of file regs.h.

#define S_RETRANSMIT_TIMER_MIN   0

Definition at line 1058 of file regs.h.

#define S_RF_PARITY_ERR   8

Definition at line 2133 of file regs.h.

#define S_ROUTE_TABLE_INDEX   0

Definition at line 1280 of file regs.h.

#define S_RSTMAX   0

Definition at line 1941 of file regs.h.

#define S_RTTVAR_INIT   12

Definition at line 979 of file regs.h.

#define S_RX_CLK_STATUS   2

Definition at line 1575 of file regs.h.

#define S_RX_COALESCE_SIZE   0

Definition at line 1008 of file regs.h.

#define S_RX_COALESCING_ENABLE   1

Definition at line 1024 of file regs.h.

#define S_RX_COALESCING_PSH_DELIVER   0

Definition at line 1020 of file regs.h.

#define S_RX_FREE_LIST_EMPTY   1

Definition at line 1218 of file regs.h.

#define S_RX_NPORTS   0

Definition at line 1423 of file regs.h.

#define S_RX_PKT_OFFSET   15

Definition at line 102 of file regs.h.

#define S_RXDROP   1

Definition at line 1359 of file regs.h.

#define S_RXENDIANMODE   2

Definition at line 1443 of file regs.h.

#define S_RXFIFOOVERFLOW   20

Definition at line 1480 of file regs.h.

#define S_RXFIFOPARITYERROR   0

Definition at line 1470 of file regs.h.

#define S_RXOVERFLOW   3

Definition at line 1367 of file regs.h.

#define S_RXPORT0DROPCNT   0

Definition at line 1511 of file regs.h.

#define S_RXPORT1DROPCNT   16

Definition at line 1516 of file regs.h.

#define S_RXPORT2DROPCNT   0

Definition at line 1523 of file regs.h.

#define S_RXPORT3DROPCNT   16

Definition at line 1528 of file regs.h.

#define S_RXSTATUSENABLE   0

Definition at line 1435 of file regs.h.

#define S_SACK   4

Definition at line 853 of file regs.h.

#define S_SACK_ALGORITHM   8

Definition at line 863 of file regs.h.

#define S_SADRSEL   4

Definition at line 2023 of file regs.h.

#define S_SCHTOKEN0   0

Definition at line 1380 of file regs.h.

#define S_SCHTOKEN1   0

Definition at line 1387 of file regs.h.

#define S_SCHTOKEN2   0

Definition at line 1394 of file regs.h.

#define S_SCHTOKEN3   0

Definition at line 1401 of file regs.h.

#define S_SEARCH_RESPONSE_LATENCY   0

Definition at line 1896 of file regs.h.

#define S_SGEFRAMINGERROR   2

Definition at line 1303 of file regs.h.

#define S_SIG_SYS_ERR   4

Definition at line 2117 of file regs.h.

#define S_SIG_TARGET_ABORT   1

Definition at line 2105 of file regs.h.

#define S_SIZE   0

Definition at line 1863 of file regs.h.

#define S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT   17

Definition at line 393 of file regs.h.

#define S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE   23

Definition at line 398 of file regs.h.

#define S_SLAVE_DELAY_LINE_TAP_COUNT   24

Definition at line 402 of file regs.h.

#define S_SLAVE_DLL_DELTA   12

Definition at line 388 of file regs.h.

#define S_SLAVE_DLL_RESET   11

Definition at line 384 of file regs.h.

#define S_SLEEPING   0

Definition at line 159 of file regs.h.

#define S_SPI4_COMMAND   24

Definition at line 1659 of file regs.h.

#define S_SRCHLAT   0

Definition at line 1908 of file regs.h.

#define S_SRTT_GAIN   8

Definition at line 974 of file regs.h.

#define S_START_OF_ROUTING_TABLE   0

Definition at line 1870 of file regs.h.

#define S_START_OF_SERVER_INDEX   0

Definition at line 1877 of file regs.h.

#define S_SYN_COOKIE_ALGORITHM   22

Definition at line 796 of file regs.h.

#define S_SYN_COOKIE_PARAMETER   26

Definition at line 812 of file regs.h.

#define S_SYN_ISSUE_MODE   7

Definition at line 1824 of file regs.h.

#define S_SYN_MAX   24

Definition at line 1143 of file regs.h.

#define S_TAHOE_ENABLE   2

Definition at line 1028 of file regs.h.

#define S_TCAM_PART_CNT   24

Definition at line 1842 of file regs.h.

#define S_TCAM_PART_SIZE   28

Definition at line 1852 of file regs.h.

#define S_TCAM_PART_TYPE   26

Definition at line 1847 of file regs.h.

#define S_TCAM_PART_TYPE_HI   30

Definition at line 1857 of file regs.h.

#define S_TCAM_READY   2

Definition at line 1808 of file regs.h.

#define S_TCAM_RESET   1

Definition at line 1804 of file regs.h.

#define S_TCAM_SERVER_REGION_USAGE   8

Definition at line 750 of file regs.h.

#define S_TCP_CSUM   11

Definition at line 759 of file regs.h.

#define S_TIMESTAMP   0

Definition at line 843 of file regs.h.

#define S_TP_ACCESS_LATENCY   0

Definition at line 903 of file regs.h.

#define S_TP_IN_CSPI_CHECK_IP_CSUM   5

Definition at line 661 of file regs.h.

#define S_TP_IN_CSPI_CHECK_TCP_CSUM   6

Definition at line 665 of file regs.h.

#define S_TP_IN_CSPI_CPL   3

Definition at line 653 of file regs.h.

#define S_TP_IN_CSPI_ETHERNET   1

Definition at line 649 of file regs.h.

#define S_TP_IN_CSPI_POS   4

Definition at line 657 of file regs.h.

#define S_TP_IN_CSPI_TUNNEL   0

Definition at line 645 of file regs.h.

#define S_TP_IN_ESPI_CHECK_IP_CSUM   12

Definition at line 685 of file regs.h.

#define S_TP_IN_ESPI_CHECK_TCP_CSUM   13

Definition at line 689 of file regs.h.

#define S_TP_IN_ESPI_CPL   10

Definition at line 677 of file regs.h.

#define S_TP_IN_ESPI_ETHERNET   8

Definition at line 673 of file regs.h.

#define S_TP_IN_ESPI_POS   11

Definition at line 681 of file regs.h.

#define S_TP_IN_ESPI_TUNNEL   7

Definition at line 669 of file regs.h.

#define S_TP_OUT_C_ETH   0

Definition at line 699 of file regs.h.

#define S_TP_OUT_CSPI_CPL   2

Definition at line 703 of file regs.h.

#define S_TP_OUT_CSPI_GENERATE_IP_CSUM   4

Definition at line 711 of file regs.h.

#define S_TP_OUT_CSPI_GENERATE_TCP_CSUM   5

Definition at line 715 of file regs.h.

#define S_TP_OUT_CSPI_POS   3

Definition at line 707 of file regs.h.

#define S_TP_OUT_ESPI_CPL   8

Definition at line 727 of file regs.h.

#define S_TP_OUT_ESPI_ETHERNET   6

Definition at line 719 of file regs.h.

#define S_TP_OUT_ESPI_GENERATE_IP_CSUM   10

Definition at line 735 of file regs.h.

#define S_TP_OUT_ESPI_GENERATE_TCP_CSUM   11

Definition at line 739 of file regs.h.

#define S_TP_OUT_ESPI_POS   9

Definition at line 731 of file regs.h.

#define S_TP_OUT_ESPI_TAG_ETHERNET   7

Definition at line 723 of file regs.h.

#define S_TP_PC_REV   30

Definition at line 932 of file regs.h.

#define S_TP_RESET   0

Definition at line 1172 of file regs.h.

#define S_TPFRAMINGERROR   3

Definition at line 1307 of file regs.h.

#define S_TPI_ADDRESS   0

Definition at line 613 of file regs.h.

#define S_TPIPAR   0

Definition at line 636 of file regs.h.

#define S_TPIRDY   1

Definition at line 626 of file regs.h.

#define S_TPIWR   0

Definition at line 622 of file regs.h.

#define S_TRANSACTION_TIMER   16

Definition at line 1683 of file regs.h.

#define S_TRICN_RX_TRAIN_ERR   24

Definition at line 1545 of file regs.h.

#define S_TRICN_RX_TRAIN_OK   26

Definition at line 1553 of file regs.h.

#define S_TRICN_RX_TRAINING   25

Definition at line 1549 of file regs.h.

#define S_TX_FREE_LIST_EMPTY   0

Definition at line 1214 of file regs.h.

#define S_TX_NPORTS   8

Definition at line 1428 of file regs.h.

#define S_TXDROP   2

Definition at line 1363 of file regs.h.

#define S_TXDROPENABLE   1

Definition at line 1439 of file regs.h.

#define S_TXENDIANMODE   3

Definition at line 1447 of file regs.h.

#define S_TXFIFOPARITYERROR   10

Definition at line 1475 of file regs.h.

#define S_TXPORT0DROPCNT   0

Definition at line 1487 of file regs.h.

#define S_TXPORT1DROPCNT   16

Definition at line 1492 of file regs.h.

#define S_TXPORT2DROPCNT   0

Definition at line 1499 of file regs.h.

#define S_TXPORT3DROPCNT   16

Definition at line 1504 of file regs.h.

#define S_UDP_CSUM   12

Definition at line 763 of file regs.h.

#define S_UNCORRECTABLE_ERROR_COUNT   10

Definition at line 422 of file regs.h.

#define S_UNMAPPED_ERR   10

Definition at line 1679 of file regs.h.

#define S_UNREGISTERED   28

Definition at line 317 of file regs.h.

#define S_USE_ROUTE_TABLE   0

Definition at line 1266 of file regs.h.

#define S_VAR_GAIN   4

Definition at line 969 of file regs.h.

#define S_VAR_MULT   0

Definition at line 964 of file regs.h.

#define S_VLAN_XTRACT   18

Definition at line 107 of file regs.h.

#define S_VPD_ADDR   0

Definition at line 2088 of file regs.h.

#define S_VPD_OP_FLAG   15

Definition at line 2093 of file regs.h.

#define S_VWVEREN   2

Definition at line 1928 of file regs.h.

#define S_WF_PARITY_ERR   7

Definition at line 2129 of file regs.h.

#define S_WINDOW_SCALE   2

Definition at line 848 of file regs.h.

#define S_WINDOWPROBE_MAX   8

Definition at line 1133 of file regs.h.

#define S_WRITE_BURST_SIZE   22

Definition at line 2027 of file regs.h.

#define S_WRITE_DATA   0

Definition at line 1634 of file regs.h.

#define S_WRITE_RECOVERY_DELAY   22

Definition at line 299 of file regs.h.

#define S_WRITE_TO_READ_DELAY   5

Definition at line 270 of file regs.h.

#define S_ZEROROUTEERROR   0

Definition at line 1295 of file regs.h.

#define V_2MSL (   x)    ((x) << S_2MSL)

Definition at line 1053 of file regs.h.

#define V_5TUPLE_LOOKUP (   x)    ((x) << S_5TUPLE_LOOKUP)

Definition at line 781 of file regs.h.

#define V_ACTIVE_TO_PRECHARGE_DELAY (   x)    ((x) << S_ACTIVE_TO_PRECHARGE_DELAY)

Definition at line 296 of file regs.h.

#define V_ACTIVE_TO_READ_WRITE_DELAY (   x)    ((x) << S_ACTIVE_TO_READ_WRITE_DELAY)

Definition at line 291 of file regs.h.

#define V_ALMOSTEMPTY (   x)    ((x) << S_ALMOSTEMPTY)

Definition at line 1410 of file regs.h.

#define V_ALMOSTFULL (   x)    ((x) << S_ALMOSTFULL)

Definition at line 1417 of file regs.h.

#define V_ATTACK_FILTER (   x)    ((x) << S_ATTACK_FILTER)

Definition at line 801 of file regs.h.

#define V_BACK_DOOR_OPERATION (   x)    ((x) << S_BACK_DOOR_OPERATION)

Definition at line 460 of file regs.h.

#define V_BANKS (   x)    ((x) << S_BANKS)

Definition at line 314 of file regs.h.

#define V_BUILD (   x)    ((x) << S_BUILD)

Definition at line 1830 of file regs.h.

#define V_BUNDLE_ADDR (   x)    ((x) << S_BUNDLE_ADDR)

Definition at line 1656 of file regs.h.

#define V_BUSY (   x)    ((x) << S_BUSY)

Definition at line 338 of file regs.h.

#define V_CALENDARLENGTH (   x)    ((x) << S_CALENDARLENGTH)

Definition at line 1320 of file regs.h.

#define V_CF_PARITY_ERR (   x)    ((x) << S_CF_PARITY_ERR)

Definition at line 2140 of file regs.h.

#define V_CHANNEL_ADDR (   x)    ((x) << S_CHANNEL_ADDR)

Definition at line 1646 of file regs.h.

#define V_CLEAR_FIN (   x)    ((x) << S_CLEAR_FIN)

Definition at line 925 of file regs.h.

#define V_CLK_ENABLE (   x)    ((x) << S_CLK_ENABLE)

Definition at line 258 of file regs.h.

#define V_CM_MEMMGR_BASE (   x)    ((x) << S_CM_MEMMGR_BASE)

Definition at line 823 of file regs.h.

#define V_CM_MEMMGR_INIT (   x)    ((x) << S_CM_MEMMGR_INIT)

Definition at line 1177 of file regs.h.

#define V_CM_MEMMGR_MAX_PSTRUCT (   x)    ((x) << S_CM_MEMMGR_MAX_PSTRUCT)

Definition at line 1209 of file regs.h.

#define V_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE (   x)    ((x) << S_CM_MEMMGR_PSTRUCT_FREE_LIST_BASE)

Definition at line 1202 of file regs.h.

#define V_CM_MEMMGR_RX_FREE_LIST_BASE (   x)    ((x) << S_CM_MEMMGR_RX_FREE_LIST_BASE)

Definition at line 1188 of file regs.h.

#define V_CM_MEMMGR_TX_FREE_LIST_BASE (   x)    ((x) << S_CM_MEMMGR_TX_FREE_LIST_BASE)

Definition at line 1195 of file regs.h.

#define V_CM_TIMER_BASE (   x)    ((x) << S_CM_TIMER_BASE)

Definition at line 830 of file regs.h.

#define V_CMDMODE (   x)    ((x) << S_CMDMODE)

Definition at line 2020 of file regs.h.

#define V_CMDQ0_ENABLE (   x)    ((x) << S_CMDQ0_ENABLE)

Definition at line 46 of file regs.h.

#define V_CMDQ0_POINTER (   x)    ((x) << S_CMDQ0_POINTER)

Definition at line 175 of file regs.h.

#define V_CMDQ0_SIZE (   x)    ((x) << S_CMDQ0_SIZE)

Definition at line 124 of file regs.h.

#define V_CMDQ1_ENABLE (   x)    ((x) << S_CMDQ1_ENABLE)

Definition at line 50 of file regs.h.

#define V_CMDQ1_POINTER (   x)    ((x) << S_CMDQ1_POINTER)

Definition at line 186 of file regs.h.

#define V_CMDQ1_SIZE (   x)    ((x) << S_CMDQ1_SIZE)

Definition at line 219 of file regs.h.

#define V_CMDQ_PRIORITY (   x)    ((x) << S_CMDQ_PRIORITY)

Definition at line 71 of file regs.h.

#define V_COMPRESSION_ENABLE (   x)    ((x) << S_COMPRESSION_ENABLE)

Definition at line 1834 of file regs.h.

#define V_CONTINUOUS (   x)    ((x) << S_CONTINUOUS)

Definition at line 478 of file regs.h.

#define V_CORRECTABLE_ERROR_COUNT (   x)    ((x) << S_CORRECTABLE_ERROR_COUNT)

Definition at line 419 of file regs.h.

#define V_CPL_ENABLE (   x)    ((x) << S_CPL_ENABLE)

Definition at line 62 of file regs.h.

#define V_CPL_OPCODE (   x)    ((x) << S_CPL_OPCODE)

Definition at line 1290 of file regs.h.

#define V_CSPI_TRAIN_ALPHA (   x)    ((x) << S_CSPI_TRAIN_ALPHA)

Definition at line 1345 of file regs.h.

#define V_CSPI_TRAIN_DATA_MAXT (   x)    ((x) << S_CSPI_TRAIN_DATA_MAXT)

Definition at line 1350 of file regs.h.

#define V_CSPIFRAMINGERROR (   x)    ((x) << S_CSPIFRAMINGERROR)

Definition at line 1300 of file regs.h.

#define V_CURRENT_GENERATION_BIT (   x)    ((x) << S_CURRENT_GENERATION_BIT)

Definition at line 179 of file regs.h.

#define V_DACK_AUTO_CAREFUL (   x)    ((x) << S_DACK_AUTO_CAREFUL)

Definition at line 888 of file regs.h.

#define V_DACK_AUTO_MGMT (   x)    ((x) << S_DACK_AUTO_MGMT)

Definition at line 884 of file regs.h.

#define V_DACK_BYTE_THRESHOLD (   x)    ((x) << S_DACK_BYTE_THRESHOLD)

Definition at line 898 of file regs.h.

#define V_DACK_MODE (   x)    ((x) << S_DACK_MODE)

Definition at line 880 of file regs.h.

#define V_DACK_MSS_SELECTOR (   x)    ((x) << S_DACK_MSS_SELECTOR)

Definition at line 893 of file regs.h.

#define V_DATA_PATTERN (   x)    ((x) << S_DATA_PATTERN)

Definition at line 474 of file regs.h.

#define V_DAY (   x)    ((x) << S_DAY)

Definition at line 207 of file regs.h.

#define V_DBGI_ENABLE (   x)    ((x) << S_DBGI_ENABLE)

Definition at line 1813 of file regs.h.

#define V_DBGI_RSP_ERR (   x)    ((x) << S_DBGI_RSP_ERR)

Definition at line 2056 of file regs.h.

#define V_DBGI_RSP_ERR_REASON (   x)    ((x) << S_DBGI_RSP_ERR_REASON)

Definition at line 2061 of file regs.h.

#define V_DBGI_RSP_HIT (   x)    ((x) << S_DBGI_RSP_HIT)

Definition at line 2052 of file regs.h.

#define V_DBGI_RSP_VALID (   x)    ((x) << S_DBGI_RSP_VALID)

Definition at line 2048 of file regs.h.

#define V_DDP_FC_ENABLE (   x)    ((x) << S_DDP_FC_ENABLE)

Definition at line 913 of file regs.h.

#define V_DEFAULT_PEER_MSS (   x)    ((x) << S_DEFAULT_PEER_MSS)

Definition at line 874 of file regs.h.

#define V_DELAYED_ACK_TIME (   x)    ((x) << S_DELAYED_ACK_TIME)

Definition at line 1109 of file regs.h.

#define V_DELAYED_ACK_TIMER_RESOLUTION (   x)    ((x) << S_DELAYED_ACK_TIMER_RESOLUTION)

Definition at line 1041 of file regs.h.

#define V_DENSITY (   x)    ((x) << S_DENSITY)

Definition at line 306 of file regs.h.

#define V_DET_PARITY_ERR (   x)    ((x) << S_DET_PARITY_ERR)

Definition at line 2122 of file regs.h.

#define V_DIP2_COUNT_MODE_ENABLE (   x)    ((x) << S_DIP2_COUNT_MODE_ENABLE)

Definition at line 1587 of file regs.h.

#define V_DIP2_ERR_CNT (   x)    ((x) << S_DIP2_ERR_CNT)

Definition at line 1629 of file regs.h.

#define V_DIP2_PARITY_ERR_THRES (   x)    ((x) << S_DIP2_PARITY_ERR_THRES)

Definition at line 1592 of file regs.h.

#define V_DIP2PARITYERR (   x)    ((x) << S_DIP2PARITYERR)

Definition at line 1560 of file regs.h.

#define V_DIP4_THRES (   x)    ((x) << S_DIP4_THRES)

Definition at line 1597 of file regs.h.

#define V_DIP4_THRES_ENABLE (   x)    ((x) << S_DIP4_THRES_ENABLE)

Definition at line 1601 of file regs.h.

#define V_DIP4ERR (   x)    ((x) << S_DIP4ERR)

Definition at line 1356 of file regs.h.

#define V_DIP4ERRORCNT (   x)    ((x) << S_DIP4ERRORCNT)

Definition at line 1537 of file regs.h.

#define V_DIP4ERRORCNTSHADOW (   x)    ((x) << S_DIP4ERRORCNTSHADOW)

Definition at line 1542 of file regs.h.

#define V_DIS_TX_FILL_WIN_PUSH (   x)    ((x) << S_DIS_TX_FILL_WIN_PUSH)

Definition at line 929 of file regs.h.

#define V_DISABLE_CMDQ0_GTS (   x)    ((x) << S_DISABLE_CMDQ0_GTS)

Definition at line 75 of file regs.h.

#define V_DISABLE_CMDQ1_GTS (   x)    ((x) << S_DISABLE_CMDQ1_GTS)

Definition at line 79 of file regs.h.

#define V_DISABLE_FL0_GTS (   x)    ((x) << S_DISABLE_FL0_GTS)

Definition at line 83 of file regs.h.

#define V_DISABLE_FL1_GTS (   x)    ((x) << S_DISABLE_FL1_GTS)

Definition at line 87 of file regs.h.

#define V_DISABLE_PAST_TIMER_INSERTION (   x)    ((x) << S_DISABLE_PAST_TIMER_INSERTION)

Definition at line 1226 of file regs.h.

#define V_DISABLE_RX_FLOW_CONTROL (   x)    ((x) << S_DISABLE_RX_FLOW_CONTROL)

Definition at line 809 of file regs.h.

#define V_DROP_TICKS_CNT (   x)    ((x) << S_DROP_TICKS_CNT)

Definition at line 1253 of file regs.h.

#define V_DUP_THRESH (   x)    ((x) << S_DUP_THRESH)

Definition at line 986 of file regs.h.

#define V_DYNAMIC_DESKEW (   x)    ((x) << S_DYNAMIC_DESKEW)

Definition at line 1609 of file regs.h.

#define V_ECC_CHECK_ENABLE (   x)    ((x) << S_ECC_CHECK_ENABLE)

Definition at line 414 of file regs.h.

#define V_ECC_GENERATION_ENABLE (   x)    ((x) << S_ECC_GENERATION_ENABLE)

Definition at line 410 of file regs.h.

#define V_ECN (   x)    ((x) << S_ECN)

Definition at line 860 of file regs.h.

#define V_EGRS_DATA_PAR_ERR (   x)    ((x) << S_EGRS_DATA_PAR_ERR)

Definition at line 1702 of file regs.h.

#define V_ELEMENT0 (   x)    ((x) << S_ELEMENT0)

Definition at line 941 of file regs.h.

#define V_ELEMENT1 (   x)    ((x) << S_ELEMENT1)

Definition at line 946 of file regs.h.

#define V_ELEMENT2 (   x)    ((x) << S_ELEMENT2)

Definition at line 951 of file regs.h.

#define V_ELEMENT3 (   x)    ((x) << S_ELEMENT3)

Definition at line 956 of file regs.h.

#define V_ENABLE_BIG_ENDIAN (   x)    ((x) << S_ENABLE_BIG_ENDIAN)

Definition at line 91 of file regs.h.

#define V_ENABLE_CSPI (   x)    ((x) << S_ENABLE_CSPI)

Definition at line 1271 of file regs.h.

#define V_ENABLE_PCIX (   x)    ((x) << S_ENABLE_PCIX)

Definition at line 1275 of file regs.h.

#define V_ENABLE_TX_DROP (   x)    ((x) << S_ENABLE_TX_DROP)

Definition at line 1244 of file regs.h.

#define V_ENABLE_TX_ERROR (   x)    ((x) << S_ENABLE_TX_ERROR)

Definition at line 1248 of file regs.h.

#define V_ERROR_ACK (   x)    ((x) << S_ERROR_ACK)

Definition at line 1676 of file regs.h.

#define V_ESPI_CMD_BUSY (   x)    ((x) << S_ESPI_CMD_BUSY)

Definition at line 1672 of file regs.h.

#define V_ESPI_RX_CORE_RST (   x)    ((x) << S_ESPI_RX_CORE_RST)

Definition at line 1572 of file regs.h.

#define V_ESPI_RX_LNK_RST (   x)    ((x) << S_ESPI_RX_LNK_RST)

Definition at line 1568 of file regs.h.

#define V_FAST_FINWAIT2_TIME (   x)    ((x) << S_FAST_FINWAIT2_TIME)

Definition at line 1123 of file regs.h.

#define V_FAST_PDU_DELIVERY (   x)    ((x) << S_FAST_PDU_DELIVERY)

Definition at line 921 of file regs.h.

#define V_FIFOSTATUSENABLE (   x)    ((x) << S_FIFOSTATUSENABLE)

Definition at line 1326 of file regs.h.

#define V_FINWAIT2_TIME (   x)    ((x) << S_FINWAIT2_TIME)

Definition at line 1116 of file regs.h.

#define V_FL0_ENABLE (   x)    ((x) << S_FL0_ENABLE)

Definition at line 54 of file regs.h.

#define V_FL0_POINTER (   x)    ((x) << S_FL0_POINTER)

Definition at line 193 of file regs.h.

#define V_FL0_SIZE (   x)    ((x) << S_FL0_SIZE)

Definition at line 131 of file regs.h.

#define V_FL1_ENABLE (   x)    ((x) << S_FL1_ENABLE)

Definition at line 58 of file regs.h.

#define V_FL1_POINTER (   x)    ((x) << S_FL1_POINTER)

Definition at line 200 of file regs.h.

#define V_FL1_SIZE (   x)    ((x) << S_FL1_SIZE)

Definition at line 226 of file regs.h.

#define V_FL_EXHAUSTED (   x)    ((x) << S_FL_EXHAUSTED)

Definition at line 240 of file regs.h.

#define V_FL_SELECTION_CRITERIA (   x)    ((x) << S_FL_SELECTION_CRITERIA)

Definition at line 95 of file regs.h.

#define V_FL_THRESHOLD (   x)    ((x) << S_FL_THRESHOLD)

Definition at line 147 of file regs.h.

#define V_FORCE_DISABLE_STATUS (   x)    ((x) << S_FORCE_DISABLE_STATUS)

Definition at line 1605 of file regs.h.

#define V_GENERIC_TIMER_RESOLUTION (   x)    ((x) << S_GENERIC_TIMER_RESOLUTION)

Definition at line 1046 of file regs.h.

#define V_GLOBAL_TIMER_SEPARATOR (   x)    ((x) << S_GLOBAL_TIMER_SEPARATOR)

Definition at line 1236 of file regs.h.

#define V_HELD_FIN_DISABLE (   x)    ((x) << S_HELD_FIN_DISABLE)

Definition at line 909 of file regs.h.

#define V_HREG_PAR_ERR (   x)    ((x) << S_HREG_PAR_ERR)

Definition at line 1698 of file regs.h.

#define V_IDINDEX (   x)    ((x) << S_IDINDEX)

Definition at line 1936 of file regs.h.

#define V_INGRS_DATA_PAR_ERR (   x)    ((x) << S_INGRS_DATA_PAR_ERR)

Definition at line 1706 of file regs.h.

#define V_INIT_CONG_WIN (   x)    ((x) << S_INIT_CONG_WIN)

Definition at line 991 of file regs.h.

#define V_INITIAL_SLOW_START_THRESHOLD (   x)    ((x) << S_INITIAL_SLOW_START_THRESHOLD)

Definition at line 998 of file regs.h.

#define V_INITIAL_SRTT (   x)    ((x) << S_INITIAL_SRTT)

Definition at line 1102 of file regs.h.

#define V_INT_DIR (   x)    ((x) << S_INT_DIR)

Definition at line 631 of file regs.h.

#define V_INTEL1010MODE (   x)    ((x) << S_INTEL1010MODE)

Definition at line 1452 of file regs.h.

#define V_INTERFACE_TYPE (   x)    ((x) << S_INTERFACE_TYPE)

Definition at line 805 of file regs.h.

#define V_INTERRUPT_TIMER_COUNT (   x)    ((x) << S_INTERRUPT_TIMER_COUNT)

Definition at line 168 of file regs.h.

#define V_IP_CSUM (   x)    ((x) << S_IP_CSUM)

Definition at line 768 of file regs.h.

#define V_IP_FRAGMENT_DROP (   x)    ((x) << S_IP_FRAGMENT_DROP)

Definition at line 785 of file regs.h.

#define V_IP_ID_SPLIT (   x)    ((x) << S_IP_ID_SPLIT)

Definition at line 772 of file regs.h.

#define V_IP_TTL (   x)    ((x) << S_IP_TTL)

Definition at line 747 of file regs.h.

#define V_ISCSI_COALESCE (   x)    ((x) << S_ISCSI_COALESCE)

Definition at line 99 of file regs.h.

#define V_KEEP_ALIVE_IDLE_TIME (   x)    ((x) << S_KEEP_ALIVE_IDLE_TIME)

Definition at line 1088 of file regs.h.

#define V_KEEP_ALIVE_INTERVAL_TIME (   x)    ((x) << S_KEEP_ALIVE_INTERVAL_TIME)

Definition at line 1095 of file regs.h.

#define V_KEEPALIVE_MAX (   x)    ((x) << S_KEEPALIVE_MAX)

Definition at line 1130 of file regs.h.

#define V_L3_VALUE (   x)    ((x) << S_L3_VALUE)

Definition at line 1152 of file regs.h.

#define V_LEARN_RESPONSE_LATENCY (   x)    ((x) << S_LEARN_RESPONSE_LATENCY)

Definition at line 1903 of file regs.h.

#define V_LOCAL_IP_RAM_ADDR (   x)    ((x) << S_LOCAL_IP_RAM_ADDR)

Definition at line 1886 of file regs.h.

#define V_LRNVEREN (   x)    ((x) << S_LRNVEREN)

Definition at line 1925 of file regs.h.

#define V_M_BUS_ENABLE (   x)    ((x) << S_M_BUS_ENABLE)

Definition at line 1817 of file regs.h.

#define V_MASTER_DLL_LOCKED (   x)    ((x) << S_MASTER_DLL_LOCKED)

Definition at line 372 of file regs.h.

#define V_MASTER_DLL_MAX_TAP_COUNT (   x)    ((x) << S_MASTER_DLL_MAX_TAP_COUNT)

Definition at line 376 of file regs.h.

#define V_MASTER_DLL_RESET (   x)    ((x) << S_MASTER_DLL_RESET)

Definition at line 363 of file regs.h.

#define V_MASTER_DLL_TAP_COUNT (   x)    ((x) << S_MASTER_DLL_TAP_COUNT)

Definition at line 368 of file regs.h.

#define V_MASTER_DLL_TAP_COUNT_OFFSET (   x)    ((x) << S_MASTER_DLL_TAP_COUNT_OFFSET)

Definition at line 381 of file regs.h.

#define V_MASTER_PARITY_ERR (   x)    ((x) << S_MASTER_PARITY_ERR)

Definition at line 2102 of file regs.h.

#define V_MAX_REORDER_FRAGMENTS (   x)    ((x) << S_MAX_REORDER_FRAGMENTS)

Definition at line 1034 of file regs.h.

#define V_MAX_RX_SIZE (   x)    ((x) << S_MAX_RX_SIZE)

Definition at line 1015 of file regs.h.

#define V_MAXBURST1 (   x)    ((x) << S_MAXBURST1)

Definition at line 1333 of file regs.h.

#define V_MAXBURST2 (   x)    ((x) << S_MAXBURST2)

Definition at line 1338 of file regs.h.

#define V_MAXTRAINALPHA (   x)    ((x) << S_MAXTRAINALPHA)

Definition at line 1460 of file regs.h.

#define V_MAXTRAINDATA (   x)    ((x) << S_MAXTRAINDATA)

Definition at line 1465 of file regs.h.

#define V_MC3_ADDR_ERR (   x)    ((x) << S_MC3_ADDR_ERR)

Definition at line 497 of file regs.h.

#define V_MC3_BANK_CYCLE (   x)    ((x) << S_MC3_BANK_CYCLE)

Definition at line 277 of file regs.h.

#define V_MC3_CE_ADDR (   x)    ((x) << S_MC3_CE_ADDR)

Definition at line 431 of file regs.h.

#define V_MC3_CORR_ERR (   x)    ((x) << S_MC3_CORR_ERR)

Definition at line 484 of file regs.h.

#define V_MC3_EXTENDED_MODE (   x)    ((x) << S_MC3_EXTENDED_MODE)

Definition at line 345 of file regs.h.

#define V_MC3_MODE (   x)    ((x) << S_MC3_MODE)

Definition at line 334 of file regs.h.

#define V_MC3_PARITY_ERR (   x)    ((x) << S_MC3_PARITY_ERR)

Definition at line 493 of file regs.h.

#define V_MC3_SLOW (   x)    ((x) << S_MC3_SLOW)

Definition at line 327 of file regs.h.

#define V_MC3_UE_ADDR (   x)    ((x) << S_MC3_UE_ADDR)

Definition at line 443 of file regs.h.

#define V_MC3_UNCORR_ERR (   x)    ((x) << S_MC3_UNCORR_ERR)

Definition at line 488 of file regs.h.

#define V_MC3_WIDTH (   x)    ((x) << S_MC3_WIDTH)

Definition at line 323 of file regs.h.

#define V_MC4_ADDR_ERR (   x)    ((x) << S_MC4_ADDR_ERR)

Definition at line 605 of file regs.h.

#define V_MC4_BACK_DOOR_ADDR (   x)    ((x) << S_MC4_BACK_DOOR_ADDR)

Definition at line 576 of file regs.h.

#define V_MC4_BANK_CYCLE (   x)    ((x) << S_MC4_BANK_CYCLE)

Definition at line 511 of file regs.h.

#define V_MC4_CE_ADDR (   x)    ((x) << S_MC4_CE_ADDR)

Definition at line 552 of file regs.h.

#define V_MC4_CORR_ERR (   x)    ((x) << S_MC4_CORR_ERR)

Definition at line 597 of file regs.h.

#define V_MC4_EXTENDED_MODE (   x)    ((x) << S_MC4_EXTENDED_MODE)

Definition at line 542 of file regs.h.

#define V_MC4_MODE (   x)    ((x) << S_MC4_MODE)

Definition at line 535 of file regs.h.

#define V_MC4_NARROW (   x)    ((x) << S_MC4_NARROW)

Definition at line 515 of file regs.h.

#define V_MC4_SLOW (   x)    ((x) << S_MC4_SLOW)

Definition at line 519 of file regs.h.

#define V_MC4_UE_ADDR (   x)    ((x) << S_MC4_UE_ADDR)

Definition at line 564 of file regs.h.

#define V_MC4_UNCORR_ERR (   x)    ((x) << S_MC4_UNCORR_ERR)

Definition at line 601 of file regs.h.

#define V_MC4A_SLOW (   x)    ((x) << S_MC4A_SLOW)

Definition at line 528 of file regs.h.

#define V_MC4A_WIDTH (   x)    ((x) << S_MC4A_WIDTH)

Definition at line 524 of file regs.h.

#define V_MC5_INT_ACTIVE_REGION_FULL (   x)    ((x) << S_MC5_INT_ACTIVE_REGION_FULL)

Definition at line 1977 of file regs.h.

#define V_MC5_INT_DEL_ACT_EMPTY (   x)    ((x) << S_MC5_INT_DEL_ACT_EMPTY)

Definition at line 2009 of file regs.h.

#define V_MC5_INT_DISPATCHQ_PARITY_ERR (   x)    ((x) << S_MC5_INT_DISPATCHQ_PARITY_ERR)

Definition at line 2005 of file regs.h.

#define V_MC5_INT_HIT_IN_ACTIVE_REGION_ERR (   x)    ((x) << S_MC5_INT_HIT_IN_ACTIVE_REGION_ERR)

Definition at line 1953 of file regs.h.

#define V_MC5_INT_HIT_IN_RT_REGION_ERR (   x)    ((x) << S_MC5_INT_HIT_IN_RT_REGION_ERR)

Definition at line 1957 of file regs.h.

#define V_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR (   x)    ((x) << S_MC5_INT_HIT_OUT_ACTIVE_REGION_ERR)

Definition at line 1949 of file regs.h.

#define V_MC5_INT_LIP0_ERR (   x)    ((x) << S_MC5_INT_LIP0_ERR)

Definition at line 1965 of file regs.h.

#define V_MC5_INT_LIP_MISS_ERR (   x)    ((x) << S_MC5_INT_LIP_MISS_ERR)

Definition at line 1969 of file regs.h.

#define V_MC5_INT_MISS_ERR (   x)    ((x) << S_MC5_INT_MISS_ERR)

Definition at line 1961 of file regs.h.

#define V_MC5_INT_NFA_SRCH_ERR (   x)    ((x) << S_MC5_INT_NFA_SRCH_ERR)

Definition at line 1981 of file regs.h.

#define V_MC5_INT_PARITY_ERR (   x)    ((x) << S_MC5_INT_PARITY_ERR)

Definition at line 1973 of file regs.h.

#define V_MC5_INT_REQUESTQ_PARITY_ERR (   x)    ((x) << S_MC5_INT_REQUESTQ_PARITY_ERR)

Definition at line 2001 of file regs.h.

#define V_MC5_INT_SYN_COOKIE (   x)    ((x) << S_MC5_INT_SYN_COOKIE)

Definition at line 1985 of file regs.h.

#define V_MC5_INT_SYN_COOKIE_BAD (   x)    ((x) << S_MC5_INT_SYN_COOKIE_BAD)

Definition at line 1989 of file regs.h.

#define V_MC5_INT_SYN_COOKIE_OFF (   x)    ((x) << S_MC5_INT_SYN_COOKIE_OFF)

Definition at line 1993 of file regs.h.

#define V_MC5_INT_UNKNOWN_CMD (   x)    ((x) << S_MC5_INT_UNKNOWN_CMD)

Definition at line 1997 of file regs.h.

#define V_MODE (   x)    ((x) << S_MODE)

Definition at line 1801 of file regs.h.

#define V_MODULATION_TIMER_SEPARATOR (   x)    ((x) << S_MODULATION_TIMER_SEPARATOR)

Definition at line 1231 of file regs.h.

#define V_MODULE_ADDR (   x)    ((x) << S_MODULE_ADDR)

Definition at line 1651 of file regs.h.

#define V_MONITORED_DIRECTION (   x)    ((x) << S_MONITORED_DIRECTION)

Definition at line 1618 of file regs.h.

#define V_MONITORED_INTERFACE (   x)    ((x) << S_MONITORED_INTERFACE)

Definition at line 1622 of file regs.h.

#define V_MONITORED_PORT_NUM (   x)    ((x) << S_MONITORED_PORT_NUM)

Definition at line 1614 of file regs.h.

#define V_MONTH (   x)    ((x) << S_MONTH)

Definition at line 212 of file regs.h.

#define V_MSS (   x)    ((x) << S_MSS)

Definition at line 869 of file regs.h.

#define V_NUM_LIP (   x)    ((x) << S_NUM_LIP)

Definition at line 1839 of file regs.h.

#define V_NUM_PKTS_DROPPED (   x)    ((x) << S_NUM_PKTS_DROPPED)

Definition at line 1258 of file regs.h.

#define V_OFFLOAD_DISABLE (   x)    ((x) << S_OFFLOAD_DISABLE)

Definition at line 694 of file regs.h.

#define V_OP (   x)    ((x) << S_OP)

Definition at line 469 of file regs.h.

#define V_OPERATION (   x)    ((x) << S_OPERATION)

Definition at line 587 of file regs.h.

#define V_ORGANIZATION (   x)    ((x) << S_ORGANIZATION)

Definition at line 310 of file regs.h.

#define V_OUT_OF_SYNC_COUNT (   x)    ((x) << S_OUT_OF_SYNC_COUNT)

Definition at line 1583 of file regs.h.

#define V_PACKET_MISMATCH (   x)    ((x) << S_PACKET_MISMATCH)

Definition at line 248 of file regs.h.

#define V_PACKET_TOO_BIG (   x)    ((x) << S_PACKET_TOO_BIG)

Definition at line 244 of file regs.h.

#define V_PARITY_ENABLE (   x)    ((x) << S_PARITY_ENABLE)

Definition at line 1821 of file regs.h.

#define V_PARLAT (   x)    ((x) << S_PARLAT)

Definition at line 1915 of file regs.h.

#define V_PATH_MTU (   x)    ((x) << S_PATH_MTU)

Definition at line 776 of file regs.h.

#define V_PCI_MODE_64BIT (   x)    ((x) << S_PCI_MODE_64BIT)

Definition at line 2147 of file regs.h.

#define V_PCI_MODE_66MHZ (   x)    ((x) << S_PCI_MODE_66MHZ)

Definition at line 2151 of file regs.h.

#define V_PCI_MODE_CLK (   x)    ((x) << S_PCI_MODE_CLK)

Definition at line 2165 of file regs.h.

#define V_PCI_MODE_PCIX (   x)    ((x) << S_PCI_MODE_PCIX)

Definition at line 2160 of file regs.h.

#define V_PCI_MODE_PCIX_INITPAT (   x)    ((x) << S_PCI_MODE_PCIX_INITPAT)

Definition at line 2156 of file regs.h.

#define V_PERSIST_TIMER_MAX (   x)    ((x) << S_PERSIST_TIMER_MAX)

Definition at line 1081 of file regs.h.

#define V_PERSIST_TIMER_MIN (   x)    ((x) << S_PERSIST_TIMER_MIN)

Definition at line 1074 of file regs.h.

#define V_PING_DROP (   x)    ((x) << S_PING_DROP)

Definition at line 789 of file regs.h.

#define V_PIO_PARITY_ERR (   x)    ((x) << S_PIO_PARITY_ERR)

Definition at line 2126 of file regs.h.

#define V_PL_INTR_CSPI (   x)    ((x) << S_PL_INTR_CSPI)

Definition at line 1784 of file regs.h.

#define V_PL_INTR_ESPI (   x)    ((x) << S_PL_INTR_ESPI)

Definition at line 1780 of file regs.h.

#define V_PL_INTR_EXT (   x)    ((x) << S_PL_INTR_EXT)

Definition at line 1792 of file regs.h.

#define V_PL_INTR_MC3 (   x)    ((x) << S_PL_INTR_MC3)

Definition at line 1756 of file regs.h.

#define V_PL_INTR_MC4 (   x)    ((x) << S_PL_INTR_MC4)

Definition at line 1760 of file regs.h.

#define V_PL_INTR_MC5 (   x)    ((x) << S_PL_INTR_MC5)

Definition at line 1764 of file regs.h.

#define V_PL_INTR_PCIX (   x)    ((x) << S_PL_INTR_PCIX)

Definition at line 1788 of file regs.h.

#define V_PL_INTR_RAT (   x)    ((x) << S_PL_INTR_RAT)

Definition at line 1768 of file regs.h.

#define V_PL_INTR_SGE_DATA (   x)    ((x) << S_PL_INTR_SGE_DATA)

Definition at line 1752 of file regs.h.

#define V_PL_INTR_SGE_ERR (   x)    ((x) << S_PL_INTR_SGE_ERR)

Definition at line 1748 of file regs.h.

#define V_PL_INTR_TP (   x)    ((x) << S_PL_INTR_TP)

Definition at line 1772 of file regs.h.

#define V_PL_INTR_ULP (   x)    ((x) << S_PL_INTR_ULP)

Definition at line 1776 of file regs.h.

#define V_PM_C2E_EMPTY_ERR (   x)    ((x) << S_PM_C2E_EMPTY_ERR)

Definition at line 1726 of file regs.h.

#define V_PM_C2E_SYNC_ERR (   x)    ((x) << S_PM_C2E_SYNC_ERR)

Definition at line 1718 of file regs.h.

#define V_PM_C2E_WRT_FULL (   x)    ((x) << S_PM_C2E_WRT_FULL)

Definition at line 1739 of file regs.h.

#define V_PM_E2C_EMPTY_ERR (   x)    ((x) << S_PM_E2C_EMPTY_ERR)

Definition at line 1722 of file regs.h.

#define V_PM_E2C_SYNC_ERR (   x)    ((x) << S_PM_E2C_SYNC_ERR)

Definition at line 1714 of file regs.h.

#define V_PM_E2C_WRT_FULL (   x)    ((x) << S_PM_E2C_WRT_FULL)

Definition at line 1735 of file regs.h.

#define V_PM_INTR (   x)    ((x) << S_PM_INTR)

Definition at line 1710 of file regs.h.

#define V_PM_PAR_ERR (   x)    ((x) << S_PM_PAR_ERR)

Definition at line 1731 of file regs.h.

#define V_POVEREN (   x)    ((x) << S_POVEREN)

Definition at line 1921 of file regs.h.

#define V_POWER_UP (   x)    ((x) << S_POWER_UP)

Definition at line 506 of file regs.h.

#define V_PRECHARGE_CYCLE (   x)    ((x) << S_PRECHARGE_CYCLE)

Definition at line 287 of file regs.h.

#define V_PROTECT_MODE (   x)    ((x) << S_PROTECT_MODE)

Definition at line 793 of file regs.h.

#define V_QOS_MAPPING (   x)    ((x) << S_QOS_MAPPING)

Definition at line 756 of file regs.h.

#define V_RAM_WRITE_ENABLE (   x)    ((x) << S_RAM_WRITE_ENABLE)

Definition at line 1890 of file regs.h.

#define V_RAMPARITYERR (   x)    ((x) << S_RAMPARITYERR)

Definition at line 1372 of file regs.h.

#define V_RCV_MASTER_ABORT (   x)    ((x) << S_RCV_MASTER_ABORT)

Definition at line 2114 of file regs.h.

#define V_RCV_TARGET_ABORT (   x)    ((x) << S_RCV_TARGET_ABORT)

Definition at line 2110 of file regs.h.

#define V_RDMA_ERR_ENABLE (   x)    ((x) << S_RDMA_ERR_ENABLE)

Definition at line 917 of file regs.h.

#define V_READ_DATA (   x)    ((x) << S_READ_DATA)

Definition at line 1668 of file regs.h.

#define V_READ_TO_WRITE_DELAY (   x)    ((x) << S_READ_TO_WRITE_DELAY)

Definition at line 267 of file regs.h.

#define V_READY (   x)    ((x) << S_READY)

Definition at line 262 of file regs.h.

#define V_RECEIVE_BUFFER_SIZE (   x)    ((x) << S_RECEIVE_BUFFER_SIZE)

Definition at line 1003 of file regs.h.

#define V_REFRESH_CYCLE (   x)    ((x) << S_REFRESH_CYCLE)

Definition at line 282 of file regs.h.

#define V_REFRESH_DIVISOR (   x)    ((x) << S_REFRESH_DIVISOR)

Definition at line 357 of file regs.h.

#define V_REFRESH_ENABLE (   x)    ((x) << S_REFRESH_ENABLE)

Definition at line 352 of file regs.h.

#define V_REGISTER_OFFSET (   x)    ((x) << S_REGISTER_OFFSET)

Definition at line 1641 of file regs.h.

#define V_RESPONSE_QUEUE_ENABLE (   x)    ((x) << S_RESPONSE_QUEUE_ENABLE)

Definition at line 66 of file regs.h.

#define V_RESPQ_CREDIT (   x)    ((x) << S_RESPQ_CREDIT)

Definition at line 154 of file regs.h.

#define V_RESPQ_EXHAUSTED (   x)    ((x) << S_RESPQ_EXHAUSTED)

Definition at line 232 of file regs.h.

#define V_RESPQ_OVERFLOW (   x)    ((x) << S_RESPQ_OVERFLOW)

Definition at line 236 of file regs.h.

#define V_RESPQ_SIZE (   x)    ((x) << S_RESPQ_SIZE)

Definition at line 138 of file regs.h.

#define V_RETRANSMISSION_MAX (   x)    ((x) << S_RETRANSMISSION_MAX)

Definition at line 1140 of file regs.h.

#define V_RETRANSMIT_TIMER_MAX (   x)    ((x) << S_RETRANSMIT_TIMER_MAX)

Definition at line 1067 of file regs.h.

#define V_RETRANSMIT_TIMER_MIN (   x)    ((x) << S_RETRANSMIT_TIMER_MIN)

Definition at line 1060 of file regs.h.

#define V_RF_PARITY_ERR (   x)    ((x) << S_RF_PARITY_ERR)

Definition at line 2135 of file regs.h.

#define V_ROUTE_TABLE_INDEX (   x)    ((x) << S_ROUTE_TABLE_INDEX)

Definition at line 1282 of file regs.h.

#define V_RSTMAX (   x)    ((x) << S_RSTMAX)

Definition at line 1943 of file regs.h.

#define V_RTTVAR_INIT (   x)    ((x) << S_RTTVAR_INIT)

Definition at line 981 of file regs.h.

#define V_RX_CLK_STATUS (   x)    ((x) << S_RX_CLK_STATUS)

Definition at line 1576 of file regs.h.

#define V_RX_COALESCE_SIZE (   x)    ((x) << S_RX_COALESCE_SIZE)

Definition at line 1010 of file regs.h.

#define V_RX_COALESCING_ENABLE (   x)    ((x) << S_RX_COALESCING_ENABLE)

Definition at line 1025 of file regs.h.

#define V_RX_COALESCING_PSH_DELIVER (   x)    ((x) << S_RX_COALESCING_PSH_DELIVER)

Definition at line 1021 of file regs.h.

#define V_RX_FREE_LIST_EMPTY (   x)    ((x) << S_RX_FREE_LIST_EMPTY)

Definition at line 1219 of file regs.h.

#define V_RX_NPORTS (   x)    ((x) << S_RX_NPORTS)

Definition at line 1425 of file regs.h.

#define V_RX_PKT_OFFSET (   x)    ((x) << S_RX_PKT_OFFSET)

Definition at line 104 of file regs.h.

#define V_RXDROP (   x)    ((x) << S_RXDROP)

Definition at line 1360 of file regs.h.

#define V_RXENDIANMODE (   x)    ((x) << S_RXENDIANMODE)

Definition at line 1444 of file regs.h.

#define V_RXFIFOOVERFLOW (   x)    ((x) << S_RXFIFOOVERFLOW)

Definition at line 1482 of file regs.h.

#define V_RXFIFOPARITYERROR (   x)    ((x) << S_RXFIFOPARITYERROR)

Definition at line 1472 of file regs.h.

#define V_RXOVERFLOW (   x)    ((x) << S_RXOVERFLOW)

Definition at line 1368 of file regs.h.

#define V_RXPORT0DROPCNT (   x)    ((x) << S_RXPORT0DROPCNT)

Definition at line 1513 of file regs.h.

#define V_RXPORT1DROPCNT (   x)    ((x) << S_RXPORT1DROPCNT)

Definition at line 1518 of file regs.h.

#define V_RXPORT2DROPCNT (   x)    ((x) << S_RXPORT2DROPCNT)

Definition at line 1525 of file regs.h.

#define V_RXPORT3DROPCNT (   x)    ((x) << S_RXPORT3DROPCNT)

Definition at line 1530 of file regs.h.

#define V_RXSTATUSENABLE (   x)    ((x) << S_RXSTATUSENABLE)

Definition at line 1436 of file regs.h.

#define V_SACK (   x)    ((x) << S_SACK)

Definition at line 855 of file regs.h.

#define V_SACK_ALGORITHM (   x)    ((x) << S_SACK_ALGORITHM)

Definition at line 865 of file regs.h.

#define V_SADRSEL (   x)    ((x) << S_SADRSEL)

Definition at line 2024 of file regs.h.

#define V_SCHTOKEN0 (   x)    ((x) << S_SCHTOKEN0)

Definition at line 1382 of file regs.h.

#define V_SCHTOKEN1 (   x)    ((x) << S_SCHTOKEN1)

Definition at line 1389 of file regs.h.

#define V_SCHTOKEN2 (   x)    ((x) << S_SCHTOKEN2)

Definition at line 1396 of file regs.h.

#define V_SCHTOKEN3 (   x)    ((x) << S_SCHTOKEN3)

Definition at line 1403 of file regs.h.

#define V_SEARCH_RESPONSE_LATENCY (   x)    ((x) << S_SEARCH_RESPONSE_LATENCY)

Definition at line 1898 of file regs.h.

#define V_SGEFRAMINGERROR (   x)    ((x) << S_SGEFRAMINGERROR)

Definition at line 1304 of file regs.h.

#define V_SIG_SYS_ERR (   x)    ((x) << S_SIG_SYS_ERR)

Definition at line 2118 of file regs.h.

#define V_SIG_TARGET_ABORT (   x)    ((x) << S_SIG_TARGET_ABORT)

Definition at line 2106 of file regs.h.

#define V_SIZE (   x)    ((x) << S_SIZE)

Definition at line 1865 of file regs.h.

#define V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT (   x)    ((x) << S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT)

Definition at line 395 of file regs.h.

#define V_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE (   x)    ((x) << S_SLAVE_DELAY_LINE_MANUAL_TAP_COUNT_ENABLE)

Definition at line 399 of file regs.h.

#define V_SLAVE_DELAY_LINE_TAP_COUNT (   x)    ((x) << S_SLAVE_DELAY_LINE_TAP_COUNT)

Definition at line 404 of file regs.h.

#define V_SLAVE_DLL_DELTA (   x)    ((x) << S_SLAVE_DLL_DELTA)

Definition at line 390 of file regs.h.

#define V_SLAVE_DLL_RESET (   x)    ((x) << S_SLAVE_DLL_RESET)

Definition at line 385 of file regs.h.

#define V_SLEEPING (   x)    ((x) << S_SLEEPING)

Definition at line 161 of file regs.h.

#define V_SPI4_COMMAND (   x)    ((x) << S_SPI4_COMMAND)

Definition at line 1661 of file regs.h.

#define V_SRCHLAT (   x)    ((x) << S_SRCHLAT)

Definition at line 1910 of file regs.h.

#define V_SRTT_GAIN (   x)    ((x) << S_SRTT_GAIN)

Definition at line 976 of file regs.h.

#define V_START_OF_ROUTING_TABLE (   x)    ((x) << S_START_OF_ROUTING_TABLE)

Definition at line 1872 of file regs.h.

#define V_START_OF_SERVER_INDEX (   x)    ((x) << S_START_OF_SERVER_INDEX)

Definition at line 1879 of file regs.h.

#define V_SYN_COOKIE_ALGORITHM (   x)    ((x) << S_SYN_COOKIE_ALGORITHM)

Definition at line 797 of file regs.h.

#define V_SYN_COOKIE_PARAMETER (   x)    ((x) << S_SYN_COOKIE_PARAMETER)

Definition at line 814 of file regs.h.

#define V_SYN_ISSUE_MODE (   x)    ((x) << S_SYN_ISSUE_MODE)

Definition at line 1826 of file regs.h.

#define V_SYN_MAX (   x)    ((x) << S_SYN_MAX)

Definition at line 1145 of file regs.h.

#define V_TAHOE_ENABLE (   x)    ((x) << S_TAHOE_ENABLE)

Definition at line 1029 of file regs.h.

#define V_TCAM_PART_CNT (   x)    ((x) << S_TCAM_PART_CNT)

Definition at line 1844 of file regs.h.

#define V_TCAM_PART_SIZE (   x)    ((x) << S_TCAM_PART_SIZE)

Definition at line 1854 of file regs.h.

#define V_TCAM_PART_TYPE (   x)    ((x) << S_TCAM_PART_TYPE)

Definition at line 1849 of file regs.h.

#define V_TCAM_PART_TYPE_HI (   x)    ((x) << S_TCAM_PART_TYPE_HI)

Definition at line 1858 of file regs.h.

#define V_TCAM_READY (   x)    ((x) << S_TCAM_READY)

Definition at line 1809 of file regs.h.

#define V_TCAM_RESET (   x)    ((x) << S_TCAM_RESET)

Definition at line 1805 of file regs.h.

#define V_TCAM_SERVER_REGION_USAGE (   x)    ((x) << S_TCAM_SERVER_REGION_USAGE)

Definition at line 752 of file regs.h.

#define V_TCP_CSUM (   x)    ((x) << S_TCP_CSUM)

Definition at line 760 of file regs.h.

#define V_TIMESTAMP (   x)    ((x) << S_TIMESTAMP)

Definition at line 845 of file regs.h.

#define V_TP_ACCESS_LATENCY (   x)    ((x) << S_TP_ACCESS_LATENCY)

Definition at line 905 of file regs.h.

#define V_TP_IN_CSPI_CHECK_IP_CSUM (   x)    ((x) << S_TP_IN_CSPI_CHECK_IP_CSUM)

Definition at line 662 of file regs.h.

#define V_TP_IN_CSPI_CHECK_TCP_CSUM (   x)    ((x) << S_TP_IN_CSPI_CHECK_TCP_CSUM)

Definition at line 666 of file regs.h.

#define V_TP_IN_CSPI_CPL (   x)    ((x) << S_TP_IN_CSPI_CPL)

Definition at line 654 of file regs.h.

#define V_TP_IN_CSPI_ETHERNET (   x)    ((x) << S_TP_IN_CSPI_ETHERNET)

Definition at line 650 of file regs.h.

#define V_TP_IN_CSPI_POS (   x)    ((x) << S_TP_IN_CSPI_POS)

Definition at line 658 of file regs.h.

#define V_TP_IN_CSPI_TUNNEL (   x)    ((x) << S_TP_IN_CSPI_TUNNEL)

Definition at line 646 of file regs.h.

#define V_TP_IN_ESPI_CHECK_IP_CSUM (   x)    ((x) << S_TP_IN_ESPI_CHECK_IP_CSUM)

Definition at line 686 of file regs.h.

#define V_TP_IN_ESPI_CHECK_TCP_CSUM (   x)    ((x) << S_TP_IN_ESPI_CHECK_TCP_CSUM)

Definition at line 690 of file regs.h.

#define V_TP_IN_ESPI_CPL (   x)    ((x) << S_TP_IN_ESPI_CPL)

Definition at line 678 of file regs.h.

#define V_TP_IN_ESPI_ETHERNET (   x)    ((x) << S_TP_IN_ESPI_ETHERNET)

Definition at line 674 of file regs.h.

#define V_TP_IN_ESPI_POS (   x)    ((x) << S_TP_IN_ESPI_POS)

Definition at line 682 of file regs.h.

#define V_TP_IN_ESPI_TUNNEL (   x)    ((x) << S_TP_IN_ESPI_TUNNEL)

Definition at line 670 of file regs.h.

#define V_TP_OUT_C_ETH (   x)    ((x) << S_TP_OUT_C_ETH)

Definition at line 700 of file regs.h.

#define V_TP_OUT_CSPI_CPL (   x)    ((x) << S_TP_OUT_CSPI_CPL)

Definition at line 704 of file regs.h.

#define V_TP_OUT_CSPI_GENERATE_IP_CSUM (   x)    ((x) << S_TP_OUT_CSPI_GENERATE_IP_CSUM)

Definition at line 712 of file regs.h.

#define V_TP_OUT_CSPI_GENERATE_TCP_CSUM (   x)    ((x) << S_TP_OUT_CSPI_GENERATE_TCP_CSUM)

Definition at line 716 of file regs.h.

#define V_TP_OUT_CSPI_POS (   x)    ((x) << S_TP_OUT_CSPI_POS)

Definition at line 708 of file regs.h.

#define V_TP_OUT_ESPI_CPL (   x)    ((x) << S_TP_OUT_ESPI_CPL)

Definition at line 728 of file regs.h.

#define V_TP_OUT_ESPI_ETHERNET (   x)    ((x) << S_TP_OUT_ESPI_ETHERNET)

Definition at line 720 of file regs.h.

#define V_TP_OUT_ESPI_GENERATE_IP_CSUM (   x)    ((x) << S_TP_OUT_ESPI_GENERATE_IP_CSUM)

Definition at line 736 of file regs.h.

#define V_TP_OUT_ESPI_GENERATE_TCP_CSUM (   x)    ((x) << S_TP_OUT_ESPI_GENERATE_TCP_CSUM)

Definition at line 740 of file regs.h.

#define V_TP_OUT_ESPI_POS (   x)    ((x) << S_TP_OUT_ESPI_POS)

Definition at line 732 of file regs.h.

#define V_TP_OUT_ESPI_TAG_ETHERNET (   x)    ((x) << S_TP_OUT_ESPI_TAG_ETHERNET)

Definition at line 724 of file regs.h.

#define V_TP_PC_REV (   x)    ((x) << S_TP_PC_REV)

Definition at line 934 of file regs.h.

#define V_TP_RESET (   x)    ((x) << S_TP_RESET)

Definition at line 1173 of file regs.h.

#define V_TPFRAMINGERROR (   x)    ((x) << S_TPFRAMINGERROR)

Definition at line 1308 of file regs.h.

#define V_TPI_ADDRESS (   x)    ((x) << S_TPI_ADDRESS)

Definition at line 615 of file regs.h.

#define V_TPIPAR (   x)    ((x) << S_TPIPAR)

Definition at line 638 of file regs.h.

#define V_TPIRDY (   x)    ((x) << S_TPIRDY)

Definition at line 627 of file regs.h.

#define V_TPIWR (   x)    ((x) << S_TPIWR)

Definition at line 623 of file regs.h.

#define V_TRANSACTION_TIMER (   x)    ((x) << S_TRANSACTION_TIMER)

Definition at line 1685 of file regs.h.

#define V_TRICN_RX_TRAIN_ERR (   x)    ((x) << S_TRICN_RX_TRAIN_ERR)

Definition at line 1546 of file regs.h.

#define V_TRICN_RX_TRAIN_OK (   x)    ((x) << S_TRICN_RX_TRAIN_OK)

Definition at line 1554 of file regs.h.

#define V_TRICN_RX_TRAINING (   x)    ((x) << S_TRICN_RX_TRAINING)

Definition at line 1550 of file regs.h.

#define V_TX_FREE_LIST_EMPTY (   x)    ((x) << S_TX_FREE_LIST_EMPTY)

Definition at line 1215 of file regs.h.

#define V_TX_NPORTS (   x)    ((x) << S_TX_NPORTS)

Definition at line 1430 of file regs.h.

#define V_TXDROP (   x)    ((x) << S_TXDROP)

Definition at line 1364 of file regs.h.

#define V_TXDROPENABLE (   x)    ((x) << S_TXDROPENABLE)

Definition at line 1440 of file regs.h.

#define V_TXENDIANMODE (   x)    ((x) << S_TXENDIANMODE)

Definition at line 1448 of file regs.h.

#define V_TXFIFOPARITYERROR (   x)    ((x) << S_TXFIFOPARITYERROR)

Definition at line 1477 of file regs.h.

#define V_TXPORT0DROPCNT (   x)    ((x) << S_TXPORT0DROPCNT)

Definition at line 1489 of file regs.h.

#define V_TXPORT1DROPCNT (   x)    ((x) << S_TXPORT1DROPCNT)

Definition at line 1494 of file regs.h.

#define V_TXPORT2DROPCNT (   x)    ((x) << S_TXPORT2DROPCNT)

Definition at line 1501 of file regs.h.

#define V_TXPORT3DROPCNT (   x)    ((x) << S_TXPORT3DROPCNT)

Definition at line 1506 of file regs.h.

#define V_UDP_CSUM (   x)    ((x) << S_UDP_CSUM)

Definition at line 764 of file regs.h.

#define V_UNCORRECTABLE_ERROR_COUNT (   x)    ((x) << S_UNCORRECTABLE_ERROR_COUNT)

Definition at line 424 of file regs.h.

#define V_UNMAPPED_ERR (   x)    ((x) << S_UNMAPPED_ERR)

Definition at line 1680 of file regs.h.

#define V_UNREGISTERED (   x)    ((x) << S_UNREGISTERED)

Definition at line 318 of file regs.h.

#define V_USE_ROUTE_TABLE (   x)    ((x) << S_USE_ROUTE_TABLE)

Definition at line 1267 of file regs.h.

#define V_VAR_GAIN (   x)    ((x) << S_VAR_GAIN)

Definition at line 971 of file regs.h.

#define V_VAR_MULT (   x)    ((x) << S_VAR_MULT)

Definition at line 966 of file regs.h.

#define V_VLAN_XTRACT (   x)    ((x) << S_VLAN_XTRACT)

Definition at line 108 of file regs.h.

#define V_VPD_ADDR (   x)    ((x) << S_VPD_ADDR)

Definition at line 2090 of file regs.h.

#define V_VPD_OP_FLAG (   x)    ((x) << S_VPD_OP_FLAG)

Definition at line 2094 of file regs.h.

#define V_VWVEREN (   x)    ((x) << S_VWVEREN)

Definition at line 1929 of file regs.h.

#define V_WF_PARITY_ERR (   x)    ((x) << S_WF_PARITY_ERR)

Definition at line 2130 of file regs.h.

#define V_WINDOW_SCALE (   x)    ((x) << S_WINDOW_SCALE)

Definition at line 850 of file regs.h.

#define V_WINDOWPROBE_MAX (   x)    ((x) << S_WINDOWPROBE_MAX)

Definition at line 1135 of file regs.h.

#define V_WRITE_BURST_SIZE (   x)    ((x) << S_WRITE_BURST_SIZE)

Definition at line 2029 of file regs.h.

#define V_WRITE_DATA (   x)    ((x) << S_WRITE_DATA)

Definition at line 1636 of file regs.h.

#define V_WRITE_RECOVERY_DELAY (   x)    ((x) << S_WRITE_RECOVERY_DELAY)

Definition at line 301 of file regs.h.

#define V_WRITE_TO_READ_DELAY (   x)    ((x) << S_WRITE_TO_READ_DELAY)

Definition at line 272 of file regs.h.

#define V_ZEROROUTEERROR (   x)    ((x) << S_ZEROROUTEERROR)

Definition at line 1296 of file regs.h.

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