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Data Structures | Macros
sym_defs.h File Reference

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Data Structures

struct  sym_chip
 
struct  sym_reg
 
struct  sym_tblmove
 
struct  sym_tblsel
 

Macros

#define SYM_VERSION   "2.2.3"
 
#define SYM_DRIVER_NAME   "sym-" SYM_VERSION
 
#define FE_LED0   (1<<0)
 
#define FE_WIDE   (1<<1) /* Wide data transfers */
 
#define FE_ULTRA   (1<<2) /* Ultra speed 20Mtrans/sec */
 
#define FE_ULTRA2   (1<<3) /* Ultra 2 - 40 Mtrans/sec */
 
#define FE_DBLR   (1<<4) /* Clock doubler present */
 
#define FE_QUAD   (1<<5) /* Clock quadrupler present */
 
#define FE_ERL   (1<<6) /* Enable read line */
 
#define FE_CLSE   (1<<7) /* Cache line size enable */
 
#define FE_WRIE   (1<<8) /* Write & Invalidate enable */
 
#define FE_ERMP   (1<<9) /* Enable read multiple */
 
#define FE_BOF   (1<<10) /* Burst opcode fetch */
 
#define FE_DFS   (1<<11) /* DMA fifo size */
 
#define FE_PFEN   (1<<12) /* Prefetch enable */
 
#define FE_LDSTR   (1<<13) /* Load/Store supported */
 
#define FE_RAM   (1<<14) /* On chip RAM present */
 
#define FE_VARCLK   (1<<15) /* Clock frequency may vary */
 
#define FE_RAM8K   (1<<16) /* On chip RAM sized 8Kb */
 
#define FE_64BIT   (1<<17) /* 64-bit PCI BUS interface */
 
#define FE_IO256   (1<<18) /* Requires full 256 bytes in PCI space */
 
#define FE_NOPM   (1<<19) /* Scripts handles phase mismatch */
 
#define FE_LEDC   (1<<20) /* Hardware control of LED */
 
#define FE_ULTRA3   (1<<21) /* Ultra 3 - 80 Mtrans/sec DT */
 
#define FE_66MHZ   (1<<22) /* 66MHz PCI support */
 
#define FE_CRC   (1<<23) /* CRC support */
 
#define FE_DIFF   (1<<24) /* SCSI HVD support */
 
#define FE_DFBC   (1<<25) /* Have DFBC register */
 
#define FE_LCKFRQ   (1<<26) /* Have LCKFRQ */
 
#define FE_C10   (1<<27) /* Various C10 core (mis)features */
 
#define FE_U3EN   (1<<28) /* U3EN bit usable */
 
#define FE_DAC   (1<<29) /* Support PCI DAC (64 bit addressing) */
 
#define FE_ISTAT1   (1<<30) /* Have ISTAT1, MBOX0, MBOX1 registers */
 
#define FE_CACHE_SET   (FE_ERL|FE_CLSE|FE_WRIE|FE_ERMP)
 
#define FE_CACHE0_SET   (FE_CACHE_SET & ~FE_ERL)
 
#define ISCON   0x10 /* connected to scsi */
 
#define CRST   0x08 /* force reset */
 
#define IARB   0x02 /* immediate arbitration */
 
#define SDU   0x80 /* cmd: disconnect will raise error */
 
#define CHM   0x40 /* sta: chained mode */
 
#define WSS   0x08 /* sta: wide scsi send [W]*/
 
#define WSR   0x01 /* sta: wide scsi received [W]*/
 
#define EWS   0x08 /* cmd: enable wide scsi [W]*/
 
#define ULTRA   0x80 /* cmd: ULTRA enable */
 
#define RRE   0x40 /* r/w:e enable response to resel. */
 
#define SRE   0x20 /* r/w:e enable response to select */
 
#define CREQ   0x80 /* r/w: SCSI-REQ */
 
#define CACK   0x40 /* r/w: SCSI-ACK */
 
#define CBSY   0x20 /* r/w: SCSI-BSY */
 
#define CSEL   0x10 /* r/w: SCSI-SEL */
 
#define CATN   0x08 /* r/w: SCSI-ATN */
 
#define CMSG   0x04 /* r/w: SCSI-MSG */
 
#define CC_D   0x02 /* r/w: SCSI-C_D */
 
#define CI_O   0x01 /* r/w: SCSI-I_O */
 
#define DFE   0x80 /* sta: dma fifo empty */
 
#define MDPE   0x40 /* int: master data parity error */
 
#define BF   0x20 /* int: script: bus fault */
 
#define ABRT   0x10 /* int: script: command aborted */
 
#define SSI   0x08 /* int: script: single step */
 
#define SIR   0x04 /* int: script: interrupt instruct. */
 
#define IID   0x01 /* int: script: illegal instruct. */
 
#define ILF   0x80 /* sta: data in SIDL register lsb */
 
#define ORF   0x40 /* sta: data in SODR register lsb */
 
#define OLF   0x20 /* sta: data in SODL register lsb */
 
#define AIP   0x10 /* sta: arbitration in progress */
 
#define LOA   0x08 /* sta: arbitration lost */
 
#define WOA   0x04 /* sta: arbitration won */
 
#define IRST   0x02 /* sta: scsi reset signal */
 
#define SDP   0x01 /* sta: scsi parity signal */
 
#define FF3210   0xf0 /* sta: bytes in the scsi fifo */
 
#define ILF1   0x80 /* sta: data in SIDL register msb[W]*/
 
#define ORF1   0x40 /* sta: data in SODR register msb[W]*/
 
#define OLF1   0x20 /* sta: data in SODL register msb[W]*/
 
#define DM   0x04 /* sta: DIFFSENS mismatch (895/6 only) */
 
#define LDSC   0x02 /* sta: disconnect & reconnect */
 
#define CABRT   0x80 /* cmd: abort current operation */
 
#define SRST   0x40 /* mod: reset chip */
 
#define SIGP   0x20 /* r/w: message from host to script */
 
#define SEM   0x10 /* r/w: message between host + script */
 
#define CON   0x08 /* sta: connected to scsi */
 
#define INTF   0x04 /* sta: int on the fly (reset by wr)*/
 
#define SIP   0x02 /* sta: scsi-interrupt */
 
#define DIP   0x01 /* sta: host/script interrupt */
 
#define FLSH   0x04 /* sta: chip is flushing */
 
#define SCRUN   0x02 /* sta: scripts are running */
 
#define SIRQD   0x01 /* r/w: disable INT pin */
 
#define CSIGP   0x40
 
#define FLF   0x08 /* cmd: flush dma fifo */
 
#define CLF   0x04 /* cmd: clear dma fifo */
 
#define FM   0x02 /* mod: fetch pin mode */
 
#define WRIE   0x01 /* mod: write and invalidate enable */
 
#define BDIS   0x80 /* mod: burst disable */
 
#define MPEE   0x08 /* mod: master parity error enable */
 
#define DFS   0x20 /* mod: dma fifo size */
 
#define BL_2   0x80 /* mod: burst length shift value +2 */
 
#define BL_1   0x40 /* mod: burst length shift value +1 */
 
#define ERL   0x08 /* mod: enable read line */
 
#define ERMP   0x04 /* mod: enable read multiple */
 
#define BOF   0x02 /* mod: burst op code fetch */
 
#define CLSE   0x80 /* mod: cache line size enable */
 
#define PFF   0x40 /* cmd: pre-fetch flush */
 
#define PFEN   0x20 /* mod: pre-fetch enable */
 
#define SSM   0x10 /* mod: single step mode */
 
#define IRQM   0x08 /* mod: irq mode (1 = totem pole !) */
 
#define STD   0x04 /* cmd: start dma mode */
 
#define IRQD   0x02 /* mod: irq disable */
 
#define NOCOM   0x01 /* cmd: protect sfbr while reselect */
 
#define SBMC   0x1000/* sta: SCSI Bus Mode Change (895/6 only) */
 
#define STO   0x0400/* sta: timeout (select) */
 
#define GEN   0x0200/* sta: timeout (general) */
 
#define HTH   0x0100/* sta: timeout (handshake) */
 
#define MA   0x80 /* sta: phase mismatch */
 
#define CMP   0x40 /* sta: arbitration complete */
 
#define SEL   0x20 /* sta: selected by another device */
 
#define RSL   0x10 /* sta: reselected by another device*/
 
#define SGE   0x08 /* sta: gross error (over/underflow)*/
 
#define UDC   0x04 /* sta: unexpected disconnect */
 
#define RST   0x02 /* sta: scsi bus reset detected */
 
#define PAR   0x01 /* sta: scsi parity error */
 
#define SCLK   0x80 /* Use the PCI clock as SCSI clock */
 
#define DBLEN   0x08 /* clock doubler running */
 
#define DBLSEL   0x04 /* clock doubler selected */
 
#define ROF   0x40 /* reset scsi offset (after gross error!) */
 
#define EXT   0x02 /* extended filtering */
 
#define TE   0x80 /* c: tolerAnt enable */
 
#define HSC   0x20 /* c: Halt SCSI Clock */
 
#define CSF   0x02 /* c: clear scsi fifo */
 
#define SMODE   0xc0 /* SCSI bus mode (895/6 only) */
 
#define SMODE_HVD   0x40 /* High Voltage Differential */
 
#define SMODE_SE   0x80 /* Single Ended */
 
#define SMODE_LVD   0xc0 /* Low Voltage Differential */
 
#define LCKFRQ   0x20 /* Frequency Lock (895/6 only) */
 
#define ENPMJ   0x80 /* Enable Phase Mismatch Jump */
 
#define PMJCTL   0x40 /* Phase Mismatch Jump Control */
 
#define ENNDJ   0x20 /* Enable Non Data PM Jump */
 
#define DISFC   0x10 /* Disable Auto FIFO Clear */
 
#define DILS   0x02 /* Disable Internal Load/Store */
 
#define DPR   0x01 /* Disable Pipe Req */
 
#define ZMOD   0x80 /* High Impedance Mode */
 
#define DDAC   0x08 /* Disable Dual Address Cycle */
 
#define XTIMOD   0x04 /* 64-bit Table Ind. Indexing Mode */
 
#define EXTIBMV   0x02 /* Enable 64-bit Table Ind. BMOV */
 
#define EXDBMV   0x01 /* Enable 64-bit Direct BMOV */
 
#define U3EN   0x80 /* Enable Ultra 3 */
 
#define AIPCKEN   0x40 /* AIP checking enable */
 
#define XCLKH_DT   0x08 /* Extra clock of data hold on DT edge */
 
#define XCLKH_ST   0x04 /* Extra clock of data hold on ST edge */
 
#define XCLKS_DT   0x02 /* Extra clock of data set on DT edge */
 
#define XCLKS_ST   0x01 /* Extra clock of data set on ST edge */
 
#define DISAIP   0x08 /* Disable AIP generation C10-66 only */
 
#define SNDCRC   0x10 /* Send CRC Request */
 
#define REGJ(p, r)   (offsetof(struct sym_reg, p ## r))
 
#define REG(r)   REGJ (nc_, r)
 
#define SCR_DATA_OUT   0x00000000
 
#define SCR_DATA_IN   0x01000000
 
#define SCR_COMMAND   0x02000000
 
#define SCR_STATUS   0x03000000
 
#define SCR_DT_DATA_OUT   0x04000000
 
#define SCR_DT_DATA_IN   0x05000000
 
#define SCR_MSG_OUT   0x06000000
 
#define SCR_MSG_IN   0x07000000
 
#define SCR_ILG_OUT   0x04000000
 
#define SCR_ILG_IN   0x05000000
 
#define OPC_MOVE   0x08000000
 
#define SCR_MOVE_ABS(l)   ((0x00000000 | OPC_MOVE) | (l))
 
#define SCR_MOVE_TBL   (0x10000000 | OPC_MOVE)
 
#define SCR_CHMOV_ABS(l)   ((0x00000000) | (l))
 
#define SCR_CHMOV_TBL   (0x10000000)
 
#define SCR_SEL_ABS   0x40000000
 
#define SCR_SEL_ABS_ATN   0x41000000
 
#define SCR_SEL_TBL   0x42000000
 
#define SCR_SEL_TBL_ATN   0x43000000
 
#define SCR_JMP_REL   0x04000000
 
#define SCR_ID(id)   (((u32)(id)) << 16)
 
#define SCR_WAIT_DISC   0x48000000
 
#define SCR_WAIT_RESEL   0x50000000
 
#define SCR_SET(f)   (0x58000000 | (f))
 
#define SCR_CLR(f)   (0x60000000 | (f))
 
#define SCR_CARRY   0x00000400
 
#define SCR_TRG   0x00000200
 
#define SCR_ACK   0x00000040
 
#define SCR_ATN   0x00000008
 
#define SCR_NO_FLUSH   0x01000000
 
#define SCR_COPY(n)   (0xc0000000 | SCR_NO_FLUSH | (n))
 
#define SCR_COPY_F(n)   (0xc0000000 | (n))
 
#define SCR_REG_OFS(ofs)   ((((ofs) & 0x7f) << 16ul) + ((ofs) & 0x80))
 
#define SCR_SFBR_REG(reg, op, data)   (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
 
#define SCR_REG_SFBR(reg, op, data)   (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
 
#define SCR_REG_REG(reg, op, data)   (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))
 
#define SCR_LOAD   0x00000000
 
#define SCR_SHL   0x01000000
 
#define SCR_OR   0x02000000
 
#define SCR_XOR   0x03000000
 
#define SCR_AND   0x04000000
 
#define SCR_SHR   0x05000000
 
#define SCR_ADD   0x06000000
 
#define SCR_ADDC   0x07000000
 
#define SCR_SFBR_DATA   (0x00800000>>8ul) /* Use SFBR as data */
 
#define SCR_FROM_REG(reg)   SCR_REG_SFBR(reg,SCR_OR,0)
 
#define SCR_TO_REG(reg)   SCR_SFBR_REG(reg,SCR_OR,0)
 
#define SCR_LOAD_REG(reg, data)   SCR_REG_REG(reg,SCR_LOAD,data)
 
#define SCR_LOAD_SFBR(data)   (SCR_REG_SFBR (gpreg, SCR_LOAD, data))
 
#define SCR_REG_OFS2(ofs)   (((ofs) & 0xff) << 16ul)
 
#define SCR_NO_FLUSH2   0x02000000
 
#define SCR_DSA_REL2   0x10000000
 
#define SCR_LOAD_R(reg, how, n)   (0xe1000000 | how | (SCR_REG_OFS2(REG(reg))) | (n))
 
#define SCR_STORE_R(reg, how, n)   (0xe0000000 | how | (SCR_REG_OFS2(REG(reg))) | (n))
 
#define SCR_LOAD_ABS(reg, n)   SCR_LOAD_R(reg, SCR_NO_FLUSH2, n)
 
#define SCR_LOAD_REL(reg, n)   SCR_LOAD_R(reg, SCR_NO_FLUSH2|SCR_DSA_REL2, n)
 
#define SCR_LOAD_ABS_F(reg, n)   SCR_LOAD_R(reg, 0, n)
 
#define SCR_LOAD_REL_F(reg, n)   SCR_LOAD_R(reg, SCR_DSA_REL2, n)
 
#define SCR_STORE_ABS(reg, n)   SCR_STORE_R(reg, SCR_NO_FLUSH2, n)
 
#define SCR_STORE_REL(reg, n)   SCR_STORE_R(reg, SCR_NO_FLUSH2|SCR_DSA_REL2,n)
 
#define SCR_STORE_ABS_F(reg, n)   SCR_STORE_R(reg, 0, n)
 
#define SCR_STORE_REL_F(reg, n)   SCR_STORE_R(reg, SCR_DSA_REL2, n)
 
#define SCR_NO_OP   0x80000000
 
#define SCR_JUMP   0x80080000
 
#define SCR_JUMP64   0x80480000
 
#define SCR_JUMPR   0x80880000
 
#define SCR_CALL   0x88080000
 
#define SCR_CALLR   0x88880000
 
#define SCR_RETURN   0x90080000
 
#define SCR_INT   0x98080000
 
#define SCR_INT_FLY   0x98180000
 
#define IFFALSE(arg)   (0x00080000 | (arg))
 
#define IFTRUE(arg)   (0x00000000 | (arg))
 
#define WHEN(phase)   (0x00030000 | (phase))
 
#define IF(phase)   (0x00020000 | (phase))
 
#define DATA(D)   (0x00040000 | ((D) & 0xff))
 
#define MASK(D, M)   (0x00040000 | (((M ^ 0xff) & 0xff) << 8ul)|((D) & 0xff))
 
#define CARRYSET   (0x00200000)
 
#define M_COMPLETE   COMMAND_COMPLETE
 
#define M_EXTENDED   EXTENDED_MESSAGE
 
#define M_SAVE_DP   SAVE_POINTERS
 
#define M_RESTORE_DP   RESTORE_POINTERS
 
#define M_DISCONNECT   DISCONNECT
 
#define M_ID_ERROR   INITIATOR_ERROR
 
#define M_ABORT   ABORT_TASK_SET
 
#define M_REJECT   MESSAGE_REJECT
 
#define M_NOOP   NOP
 
#define M_PARITY   MSG_PARITY_ERROR
 
#define M_LCOMPLETE   LINKED_CMD_COMPLETE
 
#define M_FCOMPLETE   LINKED_FLG_CMD_COMPLETE
 
#define M_RESET   TARGET_RESET
 
#define M_ABORT_TAG   ABORT_TASK
 
#define M_CLEAR_QUEUE   CLEAR_TASK_SET
 
#define M_INIT_REC   INITIATE_RECOVERY
 
#define M_REL_REC   RELEASE_RECOVERY
 
#define M_TERMINATE   (0x11)
 
#define M_SIMPLE_TAG   SIMPLE_QUEUE_TAG
 
#define M_HEAD_TAG   HEAD_OF_QUEUE_TAG
 
#define M_ORDERED_TAG   ORDERED_QUEUE_TAG
 
#define M_IGN_RESIDUE   IGNORE_WIDE_RESIDUE
 
#define M_X_MODIFY_DP   EXTENDED_MODIFY_DATA_POINTER
 
#define M_X_SYNC_REQ   EXTENDED_SDTR
 
#define M_X_WIDE_REQ   EXTENDED_WDTR
 
#define M_X_PPR_REQ   EXTENDED_PPR
 
#define PPR_OPT_IU   (0x01)
 
#define PPR_OPT_DT   (0x02)
 
#define PPR_OPT_QAS   (0x04)
 
#define PPR_OPT_MASK   (0x07)
 
#define S_GOOD   SAM_STAT_GOOD
 
#define S_CHECK_COND   SAM_STAT_CHECK_CONDITION
 
#define S_COND_MET   SAM_STAT_CONDITION_MET
 
#define S_BUSY   SAM_STAT_BUSY
 
#define S_INT   SAM_STAT_INTERMEDIATE
 
#define S_INT_COND_MET   SAM_STAT_INTERMEDIATE_CONDITION_MET
 
#define S_CONFLICT   SAM_STAT_RESERVATION_CONFLICT
 
#define S_TERMINATED   SAM_STAT_COMMAND_TERMINATED
 
#define S_QUEUE_FULL   SAM_STAT_TASK_SET_FULL
 
#define S_ILLEGAL   (0xff)
 

Macro Definition Documentation

#define ABRT   0x10 /* int: script: command aborted */

Definition at line 147 of file sym_defs.h.

#define AIP   0x10 /* sta: arbitration in progress */

Definition at line 156 of file sym_defs.h.

#define AIPCKEN   0x40 /* AIP checking enable */

Definition at line 339 of file sym_defs.h.

#define BDIS   0x80 /* mod: burst disable */

Definition at line 213 of file sym_defs.h.

#define BF   0x20 /* int: script: bus fault */

Definition at line 146 of file sym_defs.h.

#define BL_1   0x40 /* mod: burst length shift value +1 */

Definition at line 234 of file sym_defs.h.

#define BL_2   0x80 /* mod: burst length shift value +2 */

Definition at line 233 of file sym_defs.h.

#define BOF   0x02 /* mod: burst op code fetch */

Definition at line 237 of file sym_defs.h.

#define CABRT   0x80 /* cmd: abort current operation */

Definition at line 178 of file sym_defs.h.

#define CACK   0x40 /* r/w: SCSI-ACK */

Definition at line 131 of file sym_defs.h.

#define CARRYSET   (0x00200000)

Definition at line 728 of file sym_defs.h.

#define CATN   0x08 /* r/w: SCSI-ATN */

Definition at line 134 of file sym_defs.h.

#define CBSY   0x20 /* r/w: SCSI-BSY */

Definition at line 132 of file sym_defs.h.

#define CC_D   0x02 /* r/w: SCSI-C_D */

Definition at line 136 of file sym_defs.h.

#define CHM   0x40 /* sta: chained mode */

Definition at line 107 of file sym_defs.h.

#define CI_O   0x01 /* r/w: SCSI-I_O */

Definition at line 137 of file sym_defs.h.

#define CLF   0x04 /* cmd: clear dma fifo */

Definition at line 204 of file sym_defs.h.

#define CLSE   0x80 /* mod: cache line size enable */

Definition at line 243 of file sym_defs.h.

#define CMP   0x40 /* sta: arbitration complete */

Definition at line 262 of file sym_defs.h.

#define CMSG   0x04 /* r/w: SCSI-MSG */

Definition at line 135 of file sym_defs.h.

#define CON   0x08 /* sta: connected to scsi */

Definition at line 182 of file sym_defs.h.

#define CREQ   0x80 /* r/w: SCSI-REQ */

Definition at line 130 of file sym_defs.h.

#define CRST   0x08 /* force reset */

Definition at line 102 of file sym_defs.h.

#define CSEL   0x10 /* r/w: SCSI-SEL */

Definition at line 133 of file sym_defs.h.

#define CSF   0x02 /* c: clear scsi fifo */

Definition at line 293 of file sym_defs.h.

#define CSIGP   0x40

Definition at line 199 of file sym_defs.h.

#define DATA (   D)    (0x00040000 | ((D) & 0xff))

Definition at line 725 of file sym_defs.h.

#define DBLEN   0x08 /* clock doubler running */

Definition at line 282 of file sym_defs.h.

#define DBLSEL   0x04 /* clock doubler selected */

Definition at line 283 of file sym_defs.h.

#define DDAC   0x08 /* Disable Dual Address Cycle */

Definition at line 316 of file sym_defs.h.

#define DFE   0x80 /* sta: dma fifo empty */

Definition at line 144 of file sym_defs.h.

#define DFS   0x20 /* mod: dma fifo size */

Definition at line 217 of file sym_defs.h.

#define DILS   0x02 /* Disable Internal Load/Store */

Definition at line 311 of file sym_defs.h.

#define DIP   0x01 /* sta: host/script interrupt */

Definition at line 185 of file sym_defs.h.

#define DISAIP   0x08 /* Disable AIP generation C10-66 only */

Definition at line 347 of file sym_defs.h.

#define DISFC   0x10 /* Disable Auto FIFO Clear */

Definition at line 310 of file sym_defs.h.

#define DM   0x04 /* sta: DIFFSENS mismatch (895/6 only) */

Definition at line 169 of file sym_defs.h.

#define DPR   0x01 /* Disable Pipe Req */

Definition at line 312 of file sym_defs.h.

#define ENNDJ   0x20 /* Enable Non Data PM Jump */

Definition at line 309 of file sym_defs.h.

#define ENPMJ   0x80 /* Enable Phase Mismatch Jump */

Definition at line 307 of file sym_defs.h.

#define ERL   0x08 /* mod: enable read line */

Definition at line 235 of file sym_defs.h.

#define ERMP   0x04 /* mod: enable read multiple */

Definition at line 236 of file sym_defs.h.

#define EWS   0x08 /* cmd: enable wide scsi [W]*/

Definition at line 112 of file sym_defs.h.

#define EXDBMV   0x01 /* Enable 64-bit Direct BMOV */

Definition at line 319 of file sym_defs.h.

#define EXT   0x02 /* extended filtering */

Definition at line 288 of file sym_defs.h.

#define EXTIBMV   0x02 /* Enable 64-bit Table Ind. BMOV */

Definition at line 318 of file sym_defs.h.

#define FE_64BIT   (1<<17) /* 64-bit PCI BUS interface */

Definition at line 75 of file sym_defs.h.

#define FE_66MHZ   (1<<22) /* 66MHz PCI support */

Definition at line 80 of file sym_defs.h.

#define FE_BOF   (1<<10) /* Burst opcode fetch */

Definition at line 68 of file sym_defs.h.

#define FE_C10   (1<<27) /* Various C10 core (mis)features */

Definition at line 85 of file sym_defs.h.

#define FE_CACHE0_SET   (FE_CACHE_SET & ~FE_ERL)

Definition at line 91 of file sym_defs.h.

#define FE_CACHE_SET   (FE_ERL|FE_CLSE|FE_WRIE|FE_ERMP)

Definition at line 90 of file sym_defs.h.

#define FE_CLSE   (1<<7) /* Cache line size enable */

Definition at line 65 of file sym_defs.h.

#define FE_CRC   (1<<23) /* CRC support */

Definition at line 81 of file sym_defs.h.

#define FE_DAC   (1<<29) /* Support PCI DAC (64 bit addressing) */

Definition at line 87 of file sym_defs.h.

#define FE_DBLR   (1<<4) /* Clock doubler present */

Definition at line 62 of file sym_defs.h.

#define FE_DFBC   (1<<25) /* Have DFBC register */

Definition at line 83 of file sym_defs.h.

#define FE_DFS   (1<<11) /* DMA fifo size */

Definition at line 69 of file sym_defs.h.

#define FE_DIFF   (1<<24) /* SCSI HVD support */

Definition at line 82 of file sym_defs.h.

#define FE_ERL   (1<<6) /* Enable read line */

Definition at line 64 of file sym_defs.h.

#define FE_ERMP   (1<<9) /* Enable read multiple */

Definition at line 67 of file sym_defs.h.

#define FE_IO256   (1<<18) /* Requires full 256 bytes in PCI space */

Definition at line 76 of file sym_defs.h.

#define FE_ISTAT1   (1<<30) /* Have ISTAT1, MBOX0, MBOX1 registers */

Definition at line 88 of file sym_defs.h.

#define FE_LCKFRQ   (1<<26) /* Have LCKFRQ */

Definition at line 84 of file sym_defs.h.

#define FE_LDSTR   (1<<13) /* Load/Store supported */

Definition at line 71 of file sym_defs.h.

#define FE_LED0   (1<<0)

Definition at line 58 of file sym_defs.h.

#define FE_LEDC   (1<<20) /* Hardware control of LED */

Definition at line 78 of file sym_defs.h.

#define FE_NOPM   (1<<19) /* Scripts handles phase mismatch */

Definition at line 77 of file sym_defs.h.

#define FE_PFEN   (1<<12) /* Prefetch enable */

Definition at line 70 of file sym_defs.h.

#define FE_QUAD   (1<<5) /* Clock quadrupler present */

Definition at line 63 of file sym_defs.h.

#define FE_RAM   (1<<14) /* On chip RAM present */

Definition at line 72 of file sym_defs.h.

#define FE_RAM8K   (1<<16) /* On chip RAM sized 8Kb */

Definition at line 74 of file sym_defs.h.

#define FE_U3EN   (1<<28) /* U3EN bit usable */

Definition at line 86 of file sym_defs.h.

#define FE_ULTRA   (1<<2) /* Ultra speed 20Mtrans/sec */

Definition at line 60 of file sym_defs.h.

#define FE_ULTRA2   (1<<3) /* Ultra 2 - 40 Mtrans/sec */

Definition at line 61 of file sym_defs.h.

#define FE_ULTRA3   (1<<21) /* Ultra 3 - 80 Mtrans/sec DT */

Definition at line 79 of file sym_defs.h.

#define FE_VARCLK   (1<<15) /* Clock frequency may vary */

Definition at line 73 of file sym_defs.h.

#define FE_WIDE   (1<<1) /* Wide data transfers */

Definition at line 59 of file sym_defs.h.

#define FE_WRIE   (1<<8) /* Write & Invalidate enable */

Definition at line 66 of file sym_defs.h.

#define FF3210   0xf0 /* sta: bytes in the scsi fifo */

Definition at line 163 of file sym_defs.h.

#define FLF   0x08 /* cmd: flush dma fifo */

Definition at line 203 of file sym_defs.h.

#define FLSH   0x04 /* sta: chip is flushing */

Definition at line 188 of file sym_defs.h.

#define FM   0x02 /* mod: fetch pin mode */

Definition at line 205 of file sym_defs.h.

#define GEN   0x0200/* sta: timeout (general) */

Definition at line 259 of file sym_defs.h.

#define HSC   0x20 /* c: Halt SCSI Clock */

Definition at line 292 of file sym_defs.h.

#define HTH   0x0100/* sta: timeout (handshake) */

Definition at line 260 of file sym_defs.h.

#define IARB   0x02 /* immediate arbitration */

Definition at line 103 of file sym_defs.h.

#define IF (   phase)    (0x00020000 | (phase))

Definition at line 723 of file sym_defs.h.

#define IFFALSE (   arg)    (0x00080000 | (arg))

Definition at line 719 of file sym_defs.h.

#define IFTRUE (   arg)    (0x00000000 | (arg))

Definition at line 720 of file sym_defs.h.

#define IID   0x01 /* int: script: illegal instruct. */

Definition at line 150 of file sym_defs.h.

#define ILF   0x80 /* sta: data in SIDL register lsb */

Definition at line 153 of file sym_defs.h.

#define ILF1   0x80 /* sta: data in SIDL register msb[W]*/

Definition at line 166 of file sym_defs.h.

#define INTF   0x04 /* sta: int on the fly (reset by wr)*/

Definition at line 183 of file sym_defs.h.

#define IRQD   0x02 /* mod: irq disable */

Definition at line 249 of file sym_defs.h.

#define IRQM   0x08 /* mod: irq mode (1 = totem pole !) */

Definition at line 247 of file sym_defs.h.

#define IRST   0x02 /* sta: scsi reset signal */

Definition at line 159 of file sym_defs.h.

#define ISCON   0x10 /* connected to scsi */

Definition at line 101 of file sym_defs.h.

#define LCKFRQ   0x20 /* Frequency Lock (895/6 only) */

Definition at line 301 of file sym_defs.h.

#define LDSC   0x02 /* sta: disconnect & reconnect */

Definition at line 170 of file sym_defs.h.

#define LOA   0x08 /* sta: arbitration lost */

Definition at line 157 of file sym_defs.h.

#define M_ABORT   ABORT_TASK_SET

Definition at line 747 of file sym_defs.h.

#define M_ABORT_TAG   ABORT_TASK

Definition at line 754 of file sym_defs.h.

#define M_CLEAR_QUEUE   CLEAR_TASK_SET

Definition at line 755 of file sym_defs.h.

#define M_COMPLETE   COMMAND_COMPLETE

Definition at line 741 of file sym_defs.h.

#define M_DISCONNECT   DISCONNECT

Definition at line 745 of file sym_defs.h.

#define M_EXTENDED   EXTENDED_MESSAGE

Definition at line 742 of file sym_defs.h.

#define M_FCOMPLETE   LINKED_FLG_CMD_COMPLETE

Definition at line 752 of file sym_defs.h.

#define M_HEAD_TAG   HEAD_OF_QUEUE_TAG

Definition at line 760 of file sym_defs.h.

#define M_ID_ERROR   INITIATOR_ERROR

Definition at line 746 of file sym_defs.h.

#define M_IGN_RESIDUE   IGNORE_WIDE_RESIDUE

Definition at line 762 of file sym_defs.h.

#define M_INIT_REC   INITIATE_RECOVERY

Definition at line 756 of file sym_defs.h.

#define M_LCOMPLETE   LINKED_CMD_COMPLETE

Definition at line 751 of file sym_defs.h.

#define M_NOOP   NOP

Definition at line 749 of file sym_defs.h.

#define M_ORDERED_TAG   ORDERED_QUEUE_TAG

Definition at line 761 of file sym_defs.h.

#define M_PARITY   MSG_PARITY_ERROR

Definition at line 750 of file sym_defs.h.

#define M_REJECT   MESSAGE_REJECT

Definition at line 748 of file sym_defs.h.

#define M_REL_REC   RELEASE_RECOVERY

Definition at line 757 of file sym_defs.h.

#define M_RESET   TARGET_RESET

Definition at line 753 of file sym_defs.h.

#define M_RESTORE_DP   RESTORE_POINTERS

Definition at line 744 of file sym_defs.h.

#define M_SAVE_DP   SAVE_POINTERS

Definition at line 743 of file sym_defs.h.

#define M_SIMPLE_TAG   SIMPLE_QUEUE_TAG

Definition at line 759 of file sym_defs.h.

#define M_TERMINATE   (0x11)

Definition at line 758 of file sym_defs.h.

#define M_X_MODIFY_DP   EXTENDED_MODIFY_DATA_POINTER

Definition at line 764 of file sym_defs.h.

#define M_X_PPR_REQ   EXTENDED_PPR

Definition at line 767 of file sym_defs.h.

#define M_X_SYNC_REQ   EXTENDED_SDTR

Definition at line 765 of file sym_defs.h.

#define M_X_WIDE_REQ   EXTENDED_WDTR

Definition at line 766 of file sym_defs.h.

#define MA   0x80 /* sta: phase mismatch */

Definition at line 261 of file sym_defs.h.

#define MASK (   D,
  M 
)    (0x00040000 | (((M ^ 0xff) & 0xff) << 8ul)|((D) & 0xff))

Definition at line 726 of file sym_defs.h.

#define MDPE   0x40 /* int: master data parity error */

Definition at line 145 of file sym_defs.h.

#define MPEE   0x08 /* mod: master parity error enable */

Definition at line 214 of file sym_defs.h.

#define NOCOM   0x01 /* cmd: protect sfbr while reselect */

Definition at line 250 of file sym_defs.h.

#define OLF   0x20 /* sta: data in SODL register lsb */

Definition at line 155 of file sym_defs.h.

#define OLF1   0x20 /* sta: data in SODL register msb[W]*/

Definition at line 168 of file sym_defs.h.

#define OPC_MOVE   0x08000000

Definition at line 424 of file sym_defs.h.

#define ORF   0x40 /* sta: data in SODR register lsb */

Definition at line 154 of file sym_defs.h.

#define ORF1   0x40 /* sta: data in SODR register msb[W]*/

Definition at line 167 of file sym_defs.h.

#define PAR   0x01 /* sta: scsi parity error */

Definition at line 268 of file sym_defs.h.

#define PFEN   0x20 /* mod: pre-fetch enable */

Definition at line 245 of file sym_defs.h.

#define PFF   0x40 /* cmd: pre-fetch flush */

Definition at line 244 of file sym_defs.h.

#define PMJCTL   0x40 /* Phase Mismatch Jump Control */

Definition at line 308 of file sym_defs.h.

#define PPR_OPT_DT   (0x02)

Definition at line 773 of file sym_defs.h.

#define PPR_OPT_IU   (0x01)

Definition at line 772 of file sym_defs.h.

#define PPR_OPT_MASK   (0x07)

Definition at line 775 of file sym_defs.h.

#define PPR_OPT_QAS   (0x04)

Definition at line 774 of file sym_defs.h.

#define REG (   r)    REGJ (nc_, r)

Definition at line 385 of file sym_defs.h.

#define REGJ (   p,
  r 
)    (offsetof(struct sym_reg, p ## r))

Definition at line 384 of file sym_defs.h.

#define ROF   0x40 /* reset scsi offset (after gross error!) */

Definition at line 287 of file sym_defs.h.

#define RRE   0x40 /* r/w:e enable response to resel. */

Definition at line 117 of file sym_defs.h.

#define RSL   0x10 /* sta: reselected by another device*/

Definition at line 264 of file sym_defs.h.

#define RST   0x02 /* sta: scsi bus reset detected */

Definition at line 267 of file sym_defs.h.

#define S_BUSY   SAM_STAT_BUSY

Definition at line 784 of file sym_defs.h.

#define S_CHECK_COND   SAM_STAT_CHECK_CONDITION

Definition at line 782 of file sym_defs.h.

#define S_COND_MET   SAM_STAT_CONDITION_MET

Definition at line 783 of file sym_defs.h.

#define S_CONFLICT   SAM_STAT_RESERVATION_CONFLICT

Definition at line 787 of file sym_defs.h.

#define S_GOOD   SAM_STAT_GOOD

Definition at line 781 of file sym_defs.h.

#define S_ILLEGAL   (0xff)

Definition at line 790 of file sym_defs.h.

#define S_INT   SAM_STAT_INTERMEDIATE

Definition at line 785 of file sym_defs.h.

#define S_INT_COND_MET   SAM_STAT_INTERMEDIATE_CONDITION_MET

Definition at line 786 of file sym_defs.h.

#define S_QUEUE_FULL   SAM_STAT_TASK_SET_FULL

Definition at line 789 of file sym_defs.h.

#define S_TERMINATED   SAM_STAT_COMMAND_TERMINATED

Definition at line 788 of file sym_defs.h.

#define SBMC   0x1000/* sta: SCSI Bus Mode Change (895/6 only) */

Definition at line 257 of file sym_defs.h.

#define SCLK   0x80 /* Use the PCI clock as SCSI clock */

Definition at line 281 of file sym_defs.h.

#define SCR_ACK   0x00000040

Definition at line 528 of file sym_defs.h.

#define SCR_ADD   0x06000000

Definition at line 600 of file sym_defs.h.

#define SCR_ADDC   0x07000000

Definition at line 601 of file sym_defs.h.

#define SCR_AND   0x04000000

Definition at line 598 of file sym_defs.h.

#define SCR_ATN   0x00000008

Definition at line 529 of file sym_defs.h.

#define SCR_CALL   0x88080000

Definition at line 713 of file sym_defs.h.

#define SCR_CALLR   0x88880000

Definition at line 714 of file sym_defs.h.

#define SCR_CARRY   0x00000400

Definition at line 526 of file sym_defs.h.

#define SCR_CHMOV_ABS (   l)    ((0x00000000) | (l))

Definition at line 430 of file sym_defs.h.

#define SCR_CHMOV_TBL   (0x10000000)

Definition at line 432 of file sym_defs.h.

#define SCR_CLR (   f)    (0x60000000 | (f))

Definition at line 524 of file sym_defs.h.

#define SCR_COMMAND   0x02000000

Definition at line 396 of file sym_defs.h.

#define SCR_COPY (   n)    (0xc0000000 | SCR_NO_FLUSH | (n))

Definition at line 553 of file sym_defs.h.

#define SCR_COPY_F (   n)    (0xc0000000 | (n))

Definition at line 554 of file sym_defs.h.

#define SCR_DATA_IN   0x01000000

Definition at line 395 of file sym_defs.h.

#define SCR_DATA_OUT   0x00000000

Definition at line 394 of file sym_defs.h.

#define SCR_DSA_REL2   0x10000000

Definition at line 654 of file sym_defs.h.

#define SCR_DT_DATA_IN   0x05000000

Definition at line 399 of file sym_defs.h.

#define SCR_DT_DATA_OUT   0x04000000

Definition at line 398 of file sym_defs.h.

#define SCR_FROM_REG (   reg)    SCR_REG_SFBR(reg,SCR_OR,0)

Definition at line 622 of file sym_defs.h.

#define SCR_ID (   id)    (((u32)(id)) << 16)

Definition at line 486 of file sym_defs.h.

#define SCR_ILG_IN   0x05000000

Definition at line 404 of file sym_defs.h.

#define SCR_ILG_OUT   0x04000000

Definition at line 403 of file sym_defs.h.

#define SCR_INT   0x98080000

Definition at line 716 of file sym_defs.h.

#define SCR_INT_FLY   0x98180000

Definition at line 717 of file sym_defs.h.

#define SCR_JMP_REL   0x04000000

Definition at line 485 of file sym_defs.h.

#define SCR_JUMP   0x80080000

Definition at line 710 of file sym_defs.h.

#define SCR_JUMP64   0x80480000

Definition at line 711 of file sym_defs.h.

#define SCR_JUMPR   0x80880000

Definition at line 712 of file sym_defs.h.

#define SCR_LOAD   0x00000000

Definition at line 594 of file sym_defs.h.

#define SCR_LOAD_ABS (   reg,
  n 
)    SCR_LOAD_R(reg, SCR_NO_FLUSH2, n)

Definition at line 662 of file sym_defs.h.

#define SCR_LOAD_ABS_F (   reg,
  n 
)    SCR_LOAD_R(reg, 0, n)

Definition at line 664 of file sym_defs.h.

#define SCR_LOAD_R (   reg,
  how,
  n 
)    (0xe1000000 | how | (SCR_REG_OFS2(REG(reg))) | (n))

Definition at line 656 of file sym_defs.h.

#define SCR_LOAD_REG (   reg,
  data 
)    SCR_REG_REG(reg,SCR_LOAD,data)

Definition at line 628 of file sym_defs.h.

#define SCR_LOAD_REL (   reg,
  n 
)    SCR_LOAD_R(reg, SCR_NO_FLUSH2|SCR_DSA_REL2, n)

Definition at line 663 of file sym_defs.h.

#define SCR_LOAD_REL_F (   reg,
  n 
)    SCR_LOAD_R(reg, SCR_DSA_REL2, n)

Definition at line 665 of file sym_defs.h.

#define SCR_LOAD_SFBR (   data)    (SCR_REG_SFBR (gpreg, SCR_LOAD, data))

Definition at line 631 of file sym_defs.h.

#define SCR_MOVE_ABS (   l)    ((0x00000000 | OPC_MOVE) | (l))

Definition at line 426 of file sym_defs.h.

#define SCR_MOVE_TBL   (0x10000000 | OPC_MOVE)

Definition at line 428 of file sym_defs.h.

#define SCR_MSG_IN   0x07000000

Definition at line 401 of file sym_defs.h.

#define SCR_MSG_OUT   0x06000000

Definition at line 400 of file sym_defs.h.

#define SCR_NO_FLUSH   0x01000000

Definition at line 551 of file sym_defs.h.

#define SCR_NO_FLUSH2   0x02000000

Definition at line 653 of file sym_defs.h.

#define SCR_NO_OP   0x80000000

Definition at line 709 of file sym_defs.h.

#define SCR_OR   0x02000000

Definition at line 596 of file sym_defs.h.

#define SCR_REG_OFS (   ofs)    ((((ofs) & 0x7f) << 16ul) + ((ofs) & 0x80))

Definition at line 582 of file sym_defs.h.

#define SCR_REG_OFS2 (   ofs)    (((ofs) & 0xff) << 16ul)

Definition at line 652 of file sym_defs.h.

#define SCR_REG_REG (   reg,
  op,
  data 
)    (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))

Definition at line 590 of file sym_defs.h.

#define SCR_REG_SFBR (   reg,
  op,
  data 
)    (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))

Definition at line 587 of file sym_defs.h.

#define SCR_RETURN   0x90080000

Definition at line 715 of file sym_defs.h.

#define SCR_SEL_ABS   0x40000000

Definition at line 466 of file sym_defs.h.

#define SCR_SEL_ABS_ATN   0x41000000

Definition at line 467 of file sym_defs.h.

#define SCR_SEL_TBL   0x42000000

Definition at line 468 of file sym_defs.h.

#define SCR_SEL_TBL_ATN   0x43000000

Definition at line 469 of file sym_defs.h.

#define SCR_SET (   f)    (0x58000000 | (f))

Definition at line 523 of file sym_defs.h.

#define SCR_SFBR_DATA   (0x00800000>>8ul) /* Use SFBR as data */

Definition at line 603 of file sym_defs.h.

#define SCR_SFBR_REG (   reg,
  op,
  data 
)    (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul))

Definition at line 584 of file sym_defs.h.

#define SCR_SHL   0x01000000

Definition at line 595 of file sym_defs.h.

#define SCR_SHR   0x05000000

Definition at line 599 of file sym_defs.h.

#define SCR_STATUS   0x03000000

Definition at line 397 of file sym_defs.h.

#define SCR_STORE_ABS (   reg,
  n 
)    SCR_STORE_R(reg, SCR_NO_FLUSH2, n)

Definition at line 667 of file sym_defs.h.

#define SCR_STORE_ABS_F (   reg,
  n 
)    SCR_STORE_R(reg, 0, n)

Definition at line 669 of file sym_defs.h.

#define SCR_STORE_R (   reg,
  how,
  n 
)    (0xe0000000 | how | (SCR_REG_OFS2(REG(reg))) | (n))

Definition at line 659 of file sym_defs.h.

#define SCR_STORE_REL (   reg,
  n 
)    SCR_STORE_R(reg, SCR_NO_FLUSH2|SCR_DSA_REL2,n)

Definition at line 668 of file sym_defs.h.

#define SCR_STORE_REL_F (   reg,
  n 
)    SCR_STORE_R(reg, SCR_DSA_REL2, n)

Definition at line 670 of file sym_defs.h.

#define SCR_TO_REG (   reg)    SCR_SFBR_REG(reg,SCR_OR,0)

Definition at line 625 of file sym_defs.h.

#define SCR_TRG   0x00000200

Definition at line 527 of file sym_defs.h.

#define SCR_WAIT_DISC   0x48000000

Definition at line 503 of file sym_defs.h.

#define SCR_WAIT_RESEL   0x50000000

Definition at line 504 of file sym_defs.h.

#define SCR_XOR   0x03000000

Definition at line 597 of file sym_defs.h.

#define SCRUN   0x02 /* sta: scripts are running */

Definition at line 189 of file sym_defs.h.

#define SDP   0x01 /* sta: scsi parity signal */

Definition at line 160 of file sym_defs.h.

#define SDU   0x80 /* cmd: disconnect will raise error */

Definition at line 106 of file sym_defs.h.

#define SEL   0x20 /* sta: selected by another device */

Definition at line 263 of file sym_defs.h.

#define SEM   0x10 /* r/w: message between host + script */

Definition at line 181 of file sym_defs.h.

#define SGE   0x08 /* sta: gross error (over/underflow)*/

Definition at line 265 of file sym_defs.h.

#define SIGP   0x20 /* r/w: message from host to script */

Definition at line 180 of file sym_defs.h.

#define SIP   0x02 /* sta: scsi-interrupt */

Definition at line 184 of file sym_defs.h.

#define SIR   0x04 /* int: script: interrupt instruct. */

Definition at line 149 of file sym_defs.h.

#define SIRQD   0x01 /* r/w: disable INT pin */

Definition at line 190 of file sym_defs.h.

#define SMODE   0xc0 /* SCSI bus mode (895/6 only) */

Definition at line 297 of file sym_defs.h.

#define SMODE_HVD   0x40 /* High Voltage Differential */

Definition at line 298 of file sym_defs.h.

#define SMODE_LVD   0xc0 /* Low Voltage Differential */

Definition at line 300 of file sym_defs.h.

#define SMODE_SE   0x80 /* Single Ended */

Definition at line 299 of file sym_defs.h.

#define SNDCRC   0x10 /* Send CRC Request */

Definition at line 369 of file sym_defs.h.

#define SRE   0x20 /* r/w:e enable response to select */

Definition at line 118 of file sym_defs.h.

#define SRST   0x40 /* mod: reset chip */

Definition at line 179 of file sym_defs.h.

#define SSI   0x08 /* int: script: single step */

Definition at line 148 of file sym_defs.h.

#define SSM   0x10 /* mod: single step mode */

Definition at line 246 of file sym_defs.h.

#define STD   0x04 /* cmd: start dma mode */

Definition at line 248 of file sym_defs.h.

#define STO   0x0400/* sta: timeout (select) */

Definition at line 258 of file sym_defs.h.

#define SYM_DRIVER_NAME   "sym-" SYM_VERSION

Definition at line 44 of file sym_defs.h.

#define SYM_VERSION   "2.2.3"

Definition at line 43 of file sym_defs.h.

#define TE   0x80 /* c: tolerAnt enable */

Definition at line 291 of file sym_defs.h.

#define U3EN   0x80 /* Enable Ultra 3 */

Definition at line 338 of file sym_defs.h.

#define UDC   0x04 /* sta: unexpected disconnect */

Definition at line 266 of file sym_defs.h.

#define ULTRA   0x80 /* cmd: ULTRA enable */

Definition at line 113 of file sym_defs.h.

#define WHEN (   phase)    (0x00030000 | (phase))

Definition at line 722 of file sym_defs.h.

#define WOA   0x04 /* sta: arbitration won */

Definition at line 158 of file sym_defs.h.

#define WRIE   0x01 /* mod: write and invalidate enable */

Definition at line 206 of file sym_defs.h.

#define WSR   0x01 /* sta: wide scsi received [W]*/

Definition at line 109 of file sym_defs.h.

#define WSS   0x08 /* sta: wide scsi send [W]*/

Definition at line 108 of file sym_defs.h.

#define XCLKH_DT   0x08 /* Extra clock of data hold on DT edge */

Definition at line 341 of file sym_defs.h.

#define XCLKH_ST   0x04 /* Extra clock of data hold on ST edge */

Definition at line 342 of file sym_defs.h.

#define XCLKS_DT   0x02 /* Extra clock of data set on DT edge */

Definition at line 343 of file sym_defs.h.

#define XCLKS_ST   0x01 /* Extra clock of data set on ST edge */

Definition at line 344 of file sym_defs.h.

#define XTIMOD   0x04 /* 64-bit Table Ind. Indexing Mode */

Definition at line 317 of file sym_defs.h.

#define ZMOD   0x80 /* High Impedance Mode */

Definition at line 315 of file sym_defs.h.