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power.c
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1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2012 Intel Corporation. All rights reserved.
4  *
5  * Portions of this file are derived from the ipw3945 project, as well
6  * as portions of the ieee80211 subsystem header files.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of version 2 of the GNU General Public License as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful, but WITHOUT
13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15  * more details.
16  *
17  * You should have received a copy of the GNU General Public License along with
18  * this program; if not, write to the Free Software Foundation, Inc.,
19  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20  *
21  * The full GNU General Public License is included in this distribution in the
22  * file called LICENSE.
23  *
24  * Contact Information:
25  * Intel Linux Wireless <[email protected]>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *****************************************************************************/
28 
29 
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/slab.h>
33 #include <linux/init.h>
34 #include <net/mac80211.h>
35 #include "iwl-io.h"
36 #include "iwl-debug.h"
37 #include "iwl-trans.h"
38 #include "iwl-modparams.h"
39 #include "dev.h"
40 #include "agn.h"
41 #include "commands.h"
42 #include "power.h"
43 
44 /*
45  * Setting power level allows the card to go to sleep when not busy.
46  *
47  * We calculate a sleep command based on the required latency, which
48  * we get from mac80211. In order to handle thermal throttling, we can
49  * also use pre-defined power levels.
50  */
51 
52 /*
53  * This defines the old power levels. They are still used by default
54  * (level 1) and for thermal throttle (levels 3 through 5)
55  */
56 
59  u8 no_dtim; /* number of skip dtim */
60 };
61 
62 #define IWL_DTIM_RANGE_0_MAX 2
63 #define IWL_DTIM_RANGE_1_MAX 10
64 
65 #define NOSLP cpu_to_le16(0), 0, 0
66 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
67 #define ASLP (IWL_POWER_POWER_SAVE_ENA_MSK | \
68  IWL_POWER_POWER_MANAGEMENT_ENA_MSK | \
69  IWL_POWER_ADVANCE_PM_ENA_MSK)
70 #define ASLP_TOUT(T) cpu_to_le32(T)
71 #define TU_TO_USEC 1024
72 #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
73 #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
74  cpu_to_le32(X1), \
75  cpu_to_le32(X2), \
76  cpu_to_le32(X3), \
77  cpu_to_le32(X4)}
78 /* default power management (not Tx power) table values */
79 /* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */
80 /* DTIM 0 - 2 */
81 static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
82  {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 1, 2, 2, 0xFF)}, 0},
83  {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
84  {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0},
85  {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1},
86  {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 2, 4, 6, 0xFF)}, 2}
87 };
88 
89 
90 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
91 /* DTIM 3 - 10 */
92 static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = {
93  {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
94  {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
95  {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0},
96  {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1},
97  {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 6, 10, 10)}, 2}
98 };
99 
100 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
101 /* DTIM 11 - */
102 static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
103  {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
104  {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
105  {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
106  {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
107  {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
108 };
109 
110 /* advance power management */
111 /* DTIM 0 - 2 */
112 static const struct iwl_power_vec_entry apm_range_0[IWL_POWER_NUM] = {
113  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
114  SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
115  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
116  SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
117  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
118  SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
119  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
120  SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
121  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
122  SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
123 };
124 
125 
126 /* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
127 /* DTIM 3 - 10 */
128 static const struct iwl_power_vec_entry apm_range_1[IWL_POWER_NUM] = {
129  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
130  SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
131  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
132  SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
133  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
134  SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
135  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
136  SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
137  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
138  SLP_VEC(1, 2, 6, 8, 0xFF), 0}, 2}
139 };
140 
141 /* for DTIM period > IWL_DTIM_RANGE_1_MAX */
142 /* DTIM 11 - */
143 static const struct iwl_power_vec_entry apm_range_2[IWL_POWER_NUM] = {
144  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
145  SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
146  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
147  SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
148  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
149  SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
150  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
151  SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
152  {{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
153  SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
154 };
155 
156 static void iwl_static_sleep_cmd(struct iwl_priv *priv,
157  struct iwl_powertable_cmd *cmd,
158  enum iwl_power_level lvl, int period)
159 {
160  const struct iwl_power_vec_entry *table;
161  int max_sleep[IWL_POWER_VEC_SIZE] = { 0 };
162  int i;
163  u8 skip;
164  u32 slp_itrvl;
165 
166  if (priv->cfg->adv_pm) {
167  table = apm_range_2;
168  if (period <= IWL_DTIM_RANGE_1_MAX)
169  table = apm_range_1;
170  if (period <= IWL_DTIM_RANGE_0_MAX)
171  table = apm_range_0;
172  } else {
173  table = range_2;
174  if (period <= IWL_DTIM_RANGE_1_MAX)
175  table = range_1;
176  if (period <= IWL_DTIM_RANGE_0_MAX)
177  table = range_0;
178  }
179 
180  if (WARN_ON(lvl < 0 || lvl >= IWL_POWER_NUM))
181  memset(cmd, 0, sizeof(*cmd));
182  else
183  *cmd = table[lvl].cmd;
184 
185  if (period == 0) {
186  skip = 0;
187  period = 1;
188  for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
189  max_sleep[i] = 1;
190 
191  } else {
192  skip = table[lvl].no_dtim;
193  for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
194  max_sleep[i] = le32_to_cpu(cmd->sleep_interval[i]);
195  max_sleep[IWL_POWER_VEC_SIZE - 1] = skip + 1;
196  }
197 
198  slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
199  /* figure out the listen interval based on dtim period and skip */
200  if (slp_itrvl == 0xFF)
201  cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
202  cpu_to_le32(period * (skip + 1));
203 
204  slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
205  if (slp_itrvl > period)
206  cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
207  cpu_to_le32((slp_itrvl / period) * period);
208 
209  if (skip)
211  else
213 
214  if (priv->cfg->base_params->shadow_reg_enable)
216  else
218 
219  if (iwl_advanced_bt_coexist(priv)) {
220  if (!priv->cfg->bt_params->bt_sco_disable)
221  cmd->flags |= IWL_POWER_BT_SCO_ENA;
222  else
223  cmd->flags &= ~IWL_POWER_BT_SCO_ENA;
224  }
225 
226 
227  slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
228  if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL)
229  cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
231 
232  /* enforce max sleep interval */
233  for (i = IWL_POWER_VEC_SIZE - 1; i >= 0 ; i--) {
234  if (le32_to_cpu(cmd->sleep_interval[i]) >
235  (max_sleep[i] * period))
236  cmd->sleep_interval[i] =
237  cpu_to_le32(max_sleep[i] * period);
238  if (i != (IWL_POWER_VEC_SIZE - 1)) {
239  if (le32_to_cpu(cmd->sleep_interval[i]) >
240  le32_to_cpu(cmd->sleep_interval[i+1]))
241  cmd->sleep_interval[i] =
242  cmd->sleep_interval[i+1];
243  }
244  }
245 
246  if (priv->power_data.bus_pm)
247  cmd->flags |= IWL_POWER_PCI_PM_MSK;
248  else
249  cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
250 
251  IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n",
252  skip, period);
253  /* The power level here is 0-4 (used as array index), but user expects
254  to see 1-5 (according to spec). */
255  IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1);
256 }
257 
258 static void iwl_power_sleep_cam_cmd(struct iwl_priv *priv,
259  struct iwl_powertable_cmd *cmd)
260 {
261  memset(cmd, 0, sizeof(*cmd));
262 
263  if (priv->power_data.bus_pm)
264  cmd->flags |= IWL_POWER_PCI_PM_MSK;
265 
266  IWL_DEBUG_POWER(priv, "Sleep command for CAM\n");
267 }
268 
269 static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd)
270 {
271  IWL_DEBUG_POWER(priv, "Sending power/sleep command\n");
272  IWL_DEBUG_POWER(priv, "Flags value = 0x%08X\n", cmd->flags);
273  IWL_DEBUG_POWER(priv, "Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
274  IWL_DEBUG_POWER(priv, "Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
275  IWL_DEBUG_POWER(priv, "Sleep interval vector = { %d , %d , %d , %d , %d }\n",
276  le32_to_cpu(cmd->sleep_interval[0]),
277  le32_to_cpu(cmd->sleep_interval[1]),
278  le32_to_cpu(cmd->sleep_interval[2]),
279  le32_to_cpu(cmd->sleep_interval[3]),
280  le32_to_cpu(cmd->sleep_interval[4]));
281 
283  sizeof(struct iwl_powertable_cmd), cmd);
284 }
285 
286 static void iwl_power_build_cmd(struct iwl_priv *priv,
287  struct iwl_powertable_cmd *cmd)
288 {
289  bool enabled = priv->hw->conf.flags & IEEE80211_CONF_PS;
290  int dtimper;
291 
292  dtimper = priv->hw->conf.ps_dtim_period ?: 1;
293 
294  if (priv->wowlan)
295  iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, dtimper);
296  else if (!priv->cfg->base_params->no_idle_support &&
297  priv->hw->conf.flags & IEEE80211_CONF_IDLE)
298  iwl_static_sleep_cmd(priv, cmd, IWL_POWER_INDEX_5, 20);
299  else if (iwl_tt_is_low_power_state(priv)) {
300  /* in thermal throttling low power state */
301  iwl_static_sleep_cmd(priv, cmd,
302  iwl_tt_current_power_mode(priv), dtimper);
303  } else if (!enabled)
304  iwl_power_sleep_cam_cmd(priv, cmd);
305  else if (priv->power_data.debug_sleep_level_override >= 0)
306  iwl_static_sleep_cmd(priv, cmd,
307  priv->power_data.debug_sleep_level_override,
308  dtimper);
309  else {
310  /* Note that the user parameter is 1-5 (according to spec),
311  but we pass 0-4 because it acts as an array index. */
312  if (iwlwifi_mod_params.power_level > IWL_POWER_INDEX_1 &&
313  iwlwifi_mod_params.power_level <= IWL_POWER_NUM)
314  iwl_static_sleep_cmd(priv, cmd,
315  iwlwifi_mod_params.power_level - 1, dtimper);
316  else
317  iwl_static_sleep_cmd(priv, cmd,
318  IWL_POWER_INDEX_1, dtimper);
319  }
320 }
321 
322 int iwl_power_set_mode(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd,
323  bool force)
324 {
325  int ret;
326  bool update_chains;
327 
328  lockdep_assert_held(&priv->mutex);
329 
330  /* Don't update the RX chain when chain noise calibration is running */
331  update_chains = priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE ||
333 
334  if (!memcmp(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
335  return 0;
336 
337  if (!iwl_is_ready_rf(priv))
338  return -EIO;
339 
340  /* scan complete use sleep_power_next, need to be updated */
341  memcpy(&priv->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
342  if (test_bit(STATUS_SCANNING, &priv->status) && !force) {
343  IWL_DEBUG_INFO(priv, "Defer power set mode while scanning\n");
344  return 0;
345  }
346 
348  iwl_dvm_set_pmi(priv, true);
349 
350  ret = iwl_set_power(priv, cmd);
351  if (!ret) {
353  iwl_dvm_set_pmi(priv, false);
354 
355  if (update_chains)
357  else
358  IWL_DEBUG_POWER(priv,
359  "Cannot update the power, chain noise "
360  "calibration running: %d\n",
361  priv->chain_noise_data.state);
362 
363  memcpy(&priv->power_data.sleep_cmd, cmd, sizeof(*cmd));
364  } else
365  IWL_ERR(priv, "set power fail, ret = %d", ret);
366 
367  return ret;
368 }
369 
370 int iwl_power_update_mode(struct iwl_priv *priv, bool force)
371 {
372  struct iwl_powertable_cmd cmd;
373 
374  iwl_power_build_cmd(priv, &cmd);
375  return iwl_power_set_mode(priv, &cmd, force);
376 }
377 
378 /* initialize to default */
379 void iwl_power_initialize(struct iwl_priv *priv)
380 {
381  priv->power_data.bus_pm = priv->trans->pm_support;
382 
383  priv->power_data.debug_sleep_level_override = -1;
384 
385  memset(&priv->power_data.sleep_cmd, 0,
386  sizeof(priv->power_data.sleep_cmd));
387 }