61 #ifdef CONFIG_FB_SIS_300
65 #ifdef CONFIG_FB_SIS_315
69 #if defined(ALLOC_PRAGMA)
70 #pragma alloc_text(PAGE,SiSSetMode)
77 #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
95 SiS_Pr->SiS_HiTVTextTiming = SiS_HiTVTextTiming;
96 SiS_Pr->SiS_HiTVGroup3Text = SiS_HiTVGroup3Text;
145 SiS_Pr->SiS_LVDSCRT11024x600_1 = SiS_LVDSCRT11024x600_1;
146 SiS_Pr->SiS_LVDSCRT11024x600_1_H = SiS_LVDSCRT11024x600_1_H;
147 SiS_Pr->SiS_LVDSCRT11024x600_2 = SiS_LVDSCRT11024x600_2;
148 SiS_Pr->SiS_LVDSCRT11024x600_2_H = SiS_LVDSCRT11024x600_2_H;
159 #ifdef CONFIG_FB_SIS_300
163 InitCommonPointer(SiS_Pr);
236 #ifdef CONFIG_FB_SIS_315
240 InitCommonPointer(SiS_Pr);
320 #ifdef CONFIG_FB_SIS_300
321 InitTo300Pointer(SiS_Pr);
326 #ifdef CONFIG_FB_SIS_315
327 InitTo310Pointer(SiS_Pr);
341 SiS_GetModeID(
int VGAEngine,
unsigned int VBFlags,
int HDisplay,
int VDisplay,
342 int Depth,
bool FSTN,
int LCDwidth,
int LCDheight)
344 unsigned short ModeIndex = 0;
349 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
350 else if(VDisplay == 240) {
352 ModeIndex = ModeIndex_320x240_FSTN[Depth];
354 ModeIndex = ModeIndex_320x240[Depth];
358 if((!(VBFlags &
CRT1_LCDA)) || ((LCDwidth >= 800) && (LCDwidth >= 600))) {
359 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
363 if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 1024) && (LCDwidth >= 768))) {
364 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
368 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
369 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
372 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
373 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
376 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
379 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
380 else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
383 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
386 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
389 if(VGAEngine == SIS_315_VGA) {
390 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
391 else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
395 if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
396 else if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
397 else if(VGAEngine == SIS_300_VGA) {
398 if(VDisplay == 600) ModeIndex = ModeIndex_1024x600[Depth];
402 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
403 if(VGAEngine == SIS_300_VGA) {
404 if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
410 ModeIndex = ModeIndex_1280x720[Depth];
413 if(VGAEngine == SIS_300_VGA) {
414 ModeIndex = ModeIndex_300_1280x768[Depth];
416 ModeIndex = ModeIndex_310_1280x768[Depth];
420 if(VGAEngine == SIS_315_VGA) {
421 ModeIndex = ModeIndex_1280x800[Depth];
425 if(VGAEngine == SIS_315_VGA) {
426 ModeIndex = ModeIndex_1280x854[Depth];
430 ModeIndex = ModeIndex_1280x960[Depth];
433 ModeIndex = ModeIndex_1280x1024[Depth];
438 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
439 if(VGAEngine == SIS_300_VGA) {
440 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
444 if(VGAEngine == SIS_315_VGA) {
445 if(VDisplay == 1050) {
446 ModeIndex = ModeIndex_1400x1050[Depth];
451 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
454 if(VGAEngine == SIS_315_VGA) {
455 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
459 if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
460 else if(VGAEngine == SIS_315_VGA) {
461 if(VDisplay == 1080) ModeIndex = ModeIndex_1920x1080[Depth];
465 if(VDisplay == 1536) {
466 if(VGAEngine == SIS_300_VGA) {
467 ModeIndex = ModeIndex_300_2048x1536[Depth];
469 ModeIndex = ModeIndex_310_2048x1536[Depth];
480 int Depth,
bool FSTN,
unsigned short CustomT,
int LCDwidth,
int LCDheight,
481 unsigned int VBFlags2)
483 unsigned short ModeIndex = 0;
491 if(VDisplay == 200) {
492 if(!FSTN) ModeIndex = ModeIndex_320x200[Depth];
493 }
else if(VDisplay == 240) {
494 if(!FSTN) ModeIndex = ModeIndex_320x240[Depth];
495 else if(VGAEngine == SIS_315_VGA) {
496 ModeIndex = ModeIndex_320x240_FSTN[Depth];
503 if(!((VGAEngine == SIS_300_VGA) && (VBFlags2 &
VB2_TRUMPION))) {
504 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
510 if(!((VGAEngine == SIS_300_VGA) && (VBFlags2 &
VB2_TRUMPION))) {
511 if(LCDwidth >= 1024 && LCDwidth != 1152 && LCDheight >= 768) {
512 if(VDisplay == 384) {
513 ModeIndex = ModeIndex_512x384[Depth];
520 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
521 else if(VDisplay == 400) {
523 ModeIndex = ModeIndex_640x400[Depth];
527 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
531 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
536 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
540 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
541 else if(VGAEngine == SIS_300_VGA) {
542 if((VDisplay == 600) && (LCDheight == 600)) {
543 ModeIndex = ModeIndex_1024x600[Depth];
548 if(VGAEngine == SIS_300_VGA) {
549 if((VDisplay == 768) && (LCDheight == 768)) {
550 ModeIndex = ModeIndex_1152x768[Depth];
555 if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
556 else if(VGAEngine == SIS_315_VGA) {
557 if((VDisplay == 768) && (LCDheight == 768)) {
558 ModeIndex = ModeIndex_310_1280x768[Depth];
563 if(VGAEngine == SIS_300_VGA) {
565 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
569 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
573 if(VGAEngine == SIS_315_VGA) {
574 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
578 if(VGAEngine == SIS_315_VGA) {
579 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
589 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
590 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
593 if(LCDwidth >= 800 && LCDheight >= 600) {
594 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
598 if(LCDwidth >= 1024 && LCDheight >= 768 && LCDwidth != 1152) {
599 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
603 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
604 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
607 if(VGAEngine == SIS_315_VGA) {
608 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
609 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
613 if(VGAEngine == SIS_315_VGA) {
614 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
618 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
619 if(VGAEngine == SIS_315_VGA) {
620 if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
624 if(VGAEngine == SIS_315_VGA) {
625 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
629 if(VGAEngine == SIS_315_VGA) {
630 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
634 if(VGAEngine == SIS_315_VGA) {
635 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
636 else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
640 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
641 if(VGAEngine == SIS_315_VGA) {
642 if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
646 if(VGAEngine == SIS_315_VGA) {
647 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
653 ModeIndex = ModeIndex_1280x720[Depth];
655 if(VGAEngine == SIS_300_VGA) {
656 ModeIndex = ModeIndex_300_1280x768[Depth];
658 ModeIndex = ModeIndex_310_1280x768[Depth];
662 if(VGAEngine == SIS_315_VGA) {
663 ModeIndex = ModeIndex_1280x800[Depth];
667 if(VGAEngine == SIS_315_VGA) {
668 ModeIndex = ModeIndex_1280x854[Depth];
672 ModeIndex = ModeIndex_1280x960[Depth];
675 ModeIndex = ModeIndex_1280x1024[Depth];
680 if(VGAEngine == SIS_315_VGA) {
681 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
685 if(VGAEngine == SIS_315_VGA) {
687 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
692 if(VGAEngine == SIS_315_VGA) {
694 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
698 #ifndef VB_FORBID_CRT2LCD_OVER_1600
700 if(VGAEngine == SIS_315_VGA) {
702 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
707 if(VGAEngine == SIS_315_VGA) {
709 if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
714 if(VGAEngine == SIS_315_VGA) {
716 if(VDisplay == 1536) ModeIndex = ModeIndex_310_2048x1536[Depth];
728 SiS_GetModeID_TV(
int VGAEngine,
unsigned int VBFlags,
int HDisplay,
int VDisplay,
int Depth,
729 unsigned int VBFlags2)
731 unsigned short ModeIndex = 0;
738 if(VGAEngine == SIS_315_VGA) {
739 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
743 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
744 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
747 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
750 if(VGAEngine == SIS_315_VGA) {
751 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
761 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
762 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
765 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
770 ((!(VBFlags & (TV_YPBPR |
TV_PALM))) && (VBFlags &
TV_PAL)) ) {
771 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
775 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
776 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
779 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags &
TV_YPBPR1080I)))) {
780 if(VDisplay == 480) {
781 ModeIndex = ModeIndex_720x480[Depth];
782 }
else if(VDisplay == 576) {
783 if( ((VBFlags & TV_YPBPR) && (VBFlags &
TV_YPBPR750P)) ||
784 ((!(VBFlags & (TV_YPBPR |
TV_PALM))) && (VBFlags & TV_PAL)) )
785 ModeIndex = ModeIndex_720x576[Depth];
790 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
791 if( ((VBFlags & TV_YPBPR) && (VBFlags &
TV_YPBPR750P)) ||
792 ((!(VBFlags & (TV_YPBPR |
TV_PALM))) && (VBFlags & TV_PAL)) ) {
793 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
798 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
799 else if(VDisplay == 480) {
800 if(!((VBFlags & TV_YPBPR) && (VBFlags &
TV_YPBPR750P))) {
801 ModeIndex = ModeIndex_800x480[Depth];
806 if(VGAEngine == SIS_315_VGA) {
807 if(VDisplay == 600) {
808 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
809 ModeIndex = ModeIndex_960x600[Depth];
815 if(VDisplay == 768) {
817 ModeIndex = ModeIndex_1024x768[Depth];
819 }
else if(VDisplay == 576) {
820 if( (VBFlags & TV_HIVISION) ||
821 ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)) ||
823 ((!(VBFlags & (TV_YPBPR |
TV_PALM))) && (VBFlags & TV_PAL))) ) {
824 ModeIndex = ModeIndex_1024x576[Depth];
829 if(VDisplay == 720) {
830 if((VBFlags & TV_HIVISION) ||
831 ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR1080I |
TV_YPBPR750P)))) {
832 ModeIndex = ModeIndex_1280x720[Depth];
834 }
else if(VDisplay == 1024) {
835 if((VBFlags & TV_HIVISION) ||
836 ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
837 ModeIndex = ModeIndex_1280x1024[Depth];
848 unsigned int VBFlags2)
852 if(HDisplay >= 1920)
return 0;
857 if(VDisplay == 1200) {
858 if(VGAEngine != SIS_315_VGA)
return 0;
859 if(!(VBFlags2 &
VB2_30xB))
return 0;
863 if(VDisplay == 1050) {
864 if(VGAEngine != SIS_315_VGA)
return 0;
865 if(!(VBFlags2 &
VB2_30xB))
return 0;
870 return SiS_GetModeID(VGAEngine, 0, HDisplay, VDisplay, Depth,
false, 0, 0);
882 outb(data, port + 1);
907 return inb(port + 1);
934 temp = (temp & (DataAND)) | DataOR;
1035 if((!temp1) || (temp2)) {
1086 #ifdef CONFIG_FB_SIS_300
1105 #ifdef CONFIG_FB_SIS_315
1153 unsigned short temp;
1166 if((temp == 1) || (temp == 2))
return;
1169 #ifdef CONFIG_FB_SIS_300
1176 if((temp == 4) || (temp == 5)) {
1183 #ifdef CONFIG_FB_SIS_315
1233 unsigned short ModeIdIndex)
1237 }
else if(ModeNo <= 0x13) {
1252 unsigned short romversoffs, romvmaj = 1, romvmin = 0;
1261 if((ROMAddr[0x1a] ==
'N') &&
1262 (ROMAddr[0x1b] ==
'e') &&
1263 (ROMAddr[0x1c] ==
'w') &&
1264 (ROMAddr[0x1d] ==
'V')) {
1267 romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8);
1269 if((ROMAddr[romversoffs+1] ==
'.') || (ROMAddr[romversoffs+4] ==
'.')) {
1270 romvmaj = ROMAddr[romversoffs] -
'0';
1271 romvmin = ((ROMAddr[romversoffs+2] -
'0') * 10) + (ROMAddr[romversoffs+3] -
'0');
1274 if((romvmaj != 0) || (romvmin >= 92)) {
1278 if((ROMAddr[0x1a] ==
'N') &&
1279 (ROMAddr[0x1b] ==
'e') &&
1280 (ROMAddr[0x1c] ==
'w') &&
1281 (ROMAddr[0x1d] ==
'V')) {
1292 unsigned short romptr = 0;
1300 if((ROMAddr) && (SiS_Pr->
UseROM)) {
1306 if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a)
1322 if(ROMAddr[romptr + (32 * 16)] == 0xff)
1324 else if(ROMAddr[romptr + (34 * 16)] == 0xff)
1326 else if(ROMAddr[romptr + (36 * 16)] == 0xff)
1328 else if( (ROMAddr[romptr + (38 * 16)] == 0xff) ||
1329 (ROMAddr[0x6F] & 0x01) ) {
1347 unsigned short temp;
1351 temp |= (value >> 4);
1354 temp |= (value & 0x0f);
1361 unsigned short temp;
1365 temp |= (value & 0xf0);
1368 temp |= (value << 4);
1375 SiS_SetSegRegLower(SiS_Pr, value);
1376 SiS_SetSegRegUpper(SiS_Pr, value);
1382 SiS_SetSegmentReg(SiS_Pr, 0);
1388 unsigned short temp = value >> 8;
1391 temp |= (temp << 4);
1393 SiS_SetSegmentReg(SiS_Pr, value);
1397 SiS_ResetSegmentRegOver(
struct SiS_Private *SiS_Pr)
1399 SiS_SetSegmentRegOver(SiS_Pr, 0);
1403 SiS_ResetSegmentRegisters(
struct SiS_Private *SiS_Pr)
1406 SiS_ResetSegmentReg(SiS_Pr);
1407 SiS_ResetSegmentRegOver(SiS_Pr);
1419 unsigned short flag = 0,
rev = 0, nolcd = 0;
1420 unsigned short p4_0f, p4_25, p4_27;
1439 }
else if(flag == 1) {
1442 }
else if(
rev >= 0xB0) {
1456 }
else if(
rev >= 0xD0) {
1481 SiS_CheckMemorySize(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
1482 unsigned short ModeIdIndex)
1484 unsigned short AdapterMemSize = SiS_Pr->
VideoMemorySize / (1024*1024);
1485 unsigned short modeflag =
SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
1488 if(!AdapterMemSize)
return true;
1490 if(AdapterMemSize < memorysize)
return false;
1498 #ifdef CONFIG_FB_SIS_315
1499 static unsigned char
1526 case 0x00: data = 1;
break;
1527 case 0x10: data = 3;
break;
1528 case 0x20: data = 3;
break;
1529 case 0x30: data = 2;
break;
1541 static unsigned short
1545 unsigned short index;
1547 index = SiS_Get310DRAMType(SiS_Pr);
1550 return((
unsigned short)(
SISGETROMW((0x90 + (index * 5) + 3))));
1553 }
else if(index >= 4) {
1566 SiS_ClearBuffer(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo)
1573 if(!memaddr || !memsize)
return;
1580 for(i = 0; i < 0x4000; i++)
writew(0x0000, &pBuffer[i]);
1584 for(i = 0; i < 0x4000; i++)
writew(0x0720, &pBuffer[i]);
1596 unsigned short *ModeIdIndex)
1600 if((*ModeNo) <= 0x13) {
1602 if((*ModeNo) <= 0x05) (*ModeNo) |= 0x01;
1604 for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) {
1606 if(SiS_Pr->
SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == 0xFF)
return false;
1609 if((*ModeNo) == 0x07) {
1610 if(VGAINFO & 0x10) (*ModeIdIndex)++;
1613 if((*ModeNo) <= 0x03) {
1614 if(!(VGAINFO & 0x80)) (*ModeIdIndex)++;
1615 if(VGAINFO & 0x10) (*ModeIdIndex)++;
1622 for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) {
1623 if(SiS_Pr->
SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == (*ModeNo))
break;
1624 if(SiS_Pr->
SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == 0xFF)
return false;
1638 unsigned short index;
1640 if(ModeNo <= 0x13) {
1686 SiS_DoLowModeTest(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo)
1690 if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12))
1701 if(temp2 == 0x55)
return false;
1704 if(temp2 != 0x55)
return true;
1713 SiS_SetLowModeTest(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo)
1715 if(SiS_DoLowModeTest(SiS_Pr, ModeNo)) {
1745 unsigned short temp1 = 0, temp2 = 0;
1749 temp1 = 0xa0; temp2 = 0x08;
1778 unsigned short ModeIdIndex)
1780 static const unsigned short ColorDepth[6] = { 1, 2, 4, 4, 6, 8 };
1781 unsigned short modeflag;
1785 if(ModeNo == 0xfe) {
1787 }
else if(ModeNo <= 0x13) {
1794 if(index < 0) index = 0;
1795 return ColorDepth[
index];
1804 unsigned short ModeIdIndex,
unsigned short RRTI)
1806 unsigned short xres,
temp, colordepth, infoflag;
1821 if(xres % 16) temp += (colordepth >> 1);
1831 SiS_SetSeqRegs(
struct SiS_Private *SiS_Pr,
unsigned short StandTableIndex)
1833 unsigned char SRdata;
1852 for(i = 2; i <= 4; i++) {
1863 SiS_SetMiscRegs(
struct SiS_Private *SiS_Pr,
unsigned short StandTableIndex)
1865 unsigned char Miscdata;
1885 SiS_SetCRTCRegs(
struct SiS_Private *SiS_Pr,
unsigned short StandTableIndex)
1887 unsigned char CRTCdata;
1893 for(i = 0; i <= 0x18; i++) {
1899 SiS_OpenCRTC(SiS_Pr);
1900 for(i = 0x13; i <= 0x14; i++) {
1920 SiS_SetATTRegs(
struct SiS_Private *SiS_Pr,
unsigned short StandTableIndex)
1922 unsigned char ARdata;
1925 for(i = 0; i <= 0x13; i++) {
1980 SiS_SetGRCRegs(
struct SiS_Private *SiS_Pr,
unsigned short StandTableIndex)
1982 unsigned char GRdata;
1985 for(i = 0; i <= 0x08; i++) {
2001 SiS_ClearExt1Regs(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo)
2005 for(i = 0x0A; i <= 0x0E; i++) {
2011 if(ModeNo <= 0x13) {
2012 if(ModeNo == 0x06 || ModeNo >= 0x0e) {
2052 SiS_SetCRT1Sync(
struct SiS_Private *SiS_Pr,
unsigned short RRTI)
2054 unsigned short sync;
2072 SiS_SetCRT1CRTC(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
2073 unsigned short ModeIdIndex,
unsigned short RRTI)
2075 unsigned short temp,
i,
j, modeflag;
2076 unsigned char *crt1data =
NULL;
2091 crt1data = (
unsigned char *)&SiS_Pr->
SiS_CRT1Table[temp].CR[0];
2098 for(i = 0, j = 0; i <= 7; i++, j++) {
2101 for(j = 0x10; i <= 10; i++, j++) {
2104 for(j = 0x15; i <= 12; i++, j++) {
2107 for(j = 0x0A; i <= 15; i++, j++) {
2113 temp = (crt1data[16] & 0x01) << 5;
2121 #ifdef CONFIG_FB_SIS_315
2124 if(!(temp = crt1data[5] & 0x1f)) {
2128 temp = (crt1data[16] >> 5) + 3;
2129 if(temp > 7) temp -= 7;
2142 SiS_SetCRT1Offset(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
2143 unsigned short ModeIdIndex,
unsigned short RRTI)
2145 unsigned short temp, DisplayUnit, infoflag;
2153 DisplayUnit =
SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
2155 temp = (DisplayUnit >> 8) & 0x0f;
2163 temp = (DisplayUnit >> 8) + 1;
2164 if(DisplayUnit & 0xff) temp++;
2166 if(ModeNo == 0x4a || ModeNo == 0x49) temp--;
2176 SiS_SetCRT1VCLK(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
2177 unsigned short ModeIdIndex,
unsigned short RRTI)
2179 unsigned short index = 0, clka, clkb;
2182 clka = SiS_Pr->
CSR2B;
2183 clkb = SiS_Pr->
CSR2C;
2204 #ifdef CONFIG_FB_SIS_315
2211 clkb = (((clkb & 0x1f) << 1) + 1) | (clkb & 0xe0);
2225 #ifdef CONFIG_FB_SIS_300
2227 SiS_GetFIFOThresholdIndex300(
struct SiS_Private *SiS_Pr,
unsigned short *idx1,
2228 unsigned short *idx2)
2231 static const unsigned char ThTiming[8] = {
2232 1, 2, 2, 3, 0, 1, 1, 2
2236 (*idx2) = (
unsigned short)(ThTiming[((temp2 >> 3) |
temp1) & 0x07]);
2242 static unsigned short
2243 SiS_GetFIFOThresholdA300(
unsigned short idx1,
unsigned short idx2)
2245 static const unsigned char ThLowA[8 * 3] = {
2246 61, 3,52, 5,68, 7,100,11,
2247 43, 3,42, 5,54, 7, 78,11,
2248 34, 3,37, 5,47, 7, 67,11
2251 return (
unsigned short)((ThLowA[idx1 + 1] * idx2) + ThLowA[idx1]);
2255 SiS_GetFIFOThresholdB300(
unsigned short idx1,
unsigned short idx2)
2257 static const unsigned char ThLowB[8 * 3] = {
2258 81, 4,72, 6,88, 8,120,12,
2259 55, 4,54, 6,66, 8, 90,12,
2260 42, 4,45, 6,55, 8, 75,12
2263 return (
unsigned short)((ThLowB[idx1 + 1] * idx2) + ThLowB[idx1]);
2266 static unsigned short
2267 SiS_DoCalcDelay(
struct SiS_Private *SiS_Pr,
unsigned short MCLK,
unsigned short VCLK,
2268 unsigned short colordepth,
unsigned short key)
2270 unsigned short idx1, idx2;
2271 unsigned int longtemp = VCLK * colordepth;
2273 SiS_GetFIFOThresholdIndex300(SiS_Pr, &idx1, &idx2);
2276 longtemp *= SiS_GetFIFOThresholdA300(idx1, idx2);
2278 longtemp *= SiS_GetFIFOThresholdB300(idx1, idx2);
2280 idx1 = longtemp % (MCLK * 16);
2281 longtemp /= (MCLK * 16);
2282 if(idx1) longtemp++;
2283 return (
unsigned short)longtemp;
2286 static unsigned short
2287 SiS_CalcDelay(
struct SiS_Private *SiS_Pr,
unsigned short VCLK,
2288 unsigned short colordepth,
unsigned short MCLK)
2292 temp2 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0);
2293 temp1 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1);
2294 if(temp1 < 4) temp1 = 4;
2296 if(temp2 < temp1) temp2 =
temp1;
2301 SiS_SetCRT1FIFO_300(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
2302 unsigned short RefreshRateTableIndex)
2304 unsigned short ThresholdLow = 0;
2306 static const unsigned short colortharray[6] = { 1, 1, 2, 2, 3, 4 };
2329 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK) + 1;
2330 if(ThresholdLow < 0x13)
break;
2332 ThresholdLow = 0x13;
2338 }
else ThresholdLow = 2;
2341 temp = (ThresholdLow << 4) | 0x0f;
2344 temp = (ThresholdLow & 0x10) << 1;
2345 if(ModeNo > 0x13) temp |= 0x40;
2352 temp = ThresholdLow + 3;
2353 if(temp > 0x0f) temp = 0x0f;
2358 SiS_GetLatencyFactor630(
struct SiS_Private *SiS_Pr,
unsigned short index)
2360 static const unsigned char LatencyFactor[] = {
2361 97, 88, 86, 79, 77, 0,
2362 0, 87, 85, 78, 76, 54,
2363 97, 88, 86, 79, 77, 0,
2364 0, 79, 77, 70, 68, 48,
2365 80, 72, 69, 63, 61, 0,
2366 0, 70, 68, 61, 59, 37,
2367 86, 77, 75, 68, 66, 0,
2368 0, 68, 66, 59, 57, 37
2370 static const unsigned char LatencyFactor730[] = {
2379 return (
unsigned short)LatencyFactor730[
index];
2381 return (
unsigned short)LatencyFactor[
index];
2385 static unsigned short
2386 SiS_CalcDelay2(
struct SiS_Private *SiS_Pr,
unsigned char key)
2388 unsigned short index;
2391 index = ((key & 0x0f) * 3) + ((key & 0xc0) >> 6);
2393 index = (key & 0xe0) >> 5;
2394 if(key & 0x10) index += 6;
2395 if(!(key & 0x01)) index += 24;
2398 return SiS_GetLatencyFactor630(SiS_Pr, index);
2402 SiS_SetCRT1FIFO_630(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
2403 unsigned short RefreshRateTableIndex)
2405 unsigned short ThresholdLow = 0;
2406 unsigned short i,
data, VCLK, MCLK16, colorth = 0;
2407 unsigned int templ, datal;
2408 const unsigned char *queuedata =
NULL;
2409 static const unsigned char FQBQData[21] = {
2410 0x01,0x21,0x41,0x61,0x81,
2411 0x31,0x51,0x71,0x91,0xb1,
2412 0x00,0x20,0x40,0x60,0x80,
2413 0x30,0x50,0x70,0x90,0xb0,
2416 static const unsigned char FQBQData730[16] = {
2424 static const unsigned short colortharray[6] = {
2448 queuedata = &FQBQData730[0];
2450 queuedata = &FQBQData[0];
2454 templ = SiS_CalcDelay2(SiS_Pr, queuedata[i]) * VCLK * colorth;
2456 datal = templ % MCLK16;
2457 templ = (templ / MCLK16) + 1;
2461 if(queuedata[i + 1] == 0xFF) {
2462 ThresholdLow = 0x13;
2467 ThresholdLow = templ;
2470 }
while(queuedata[i] != 0xFF);
2475 ThresholdLow = 0x02;
2480 data = ((ThresholdLow & 0x0f) << 4) | 0x0f;
2483 data = (ThresholdLow & 0x10) << 1;
2490 data = ThresholdLow + 3;
2491 if(data > 0x0f) data = 0x0f;
2495 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50);
2499 templ &= 0xfffff9ff;
2500 templ |= ((queuedata[
i] & 0xc0) << 3);
2504 templ &= 0xf0ffffff;
2505 if( (ModeNo <= 0x13) &&
2508 templ |= 0x0b000000;
2510 templ |= ((queuedata[
i] & 0xf0) << 20);
2515 sisfb_write_nbridge_pci_dword(SiS_Pr, 0x50, templ);
2516 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xA0);
2521 templ &= 0x00ffffff;
2522 datal = queuedata[
i] << 8;
2523 templ |= (((datal & 0x0f00) | ((datal & 0x3000) >> 8)) << 20);
2527 templ &= 0xf0ffffff;
2528 templ |= ((queuedata[
i] & 0x0f) << 24);
2532 sisfb_write_nbridge_pci_dword(SiS_Pr, 0xA0, templ);
2536 #ifdef CONFIG_FB_SIS_315
2538 SiS_SetCRT1FIFO_310(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
2540 unsigned short modeflag;
2559 if((!(modeflag & DoubleScanMode)) || (!(modeflag &
HalfDCLK))) {
2573 SiS_SetVCLKState(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
2574 unsigned short RefreshRateTableIndex,
unsigned short ModeIdIndex)
2576 unsigned short data = 0, VCLK = 0, index = 0;
2582 index =
SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2588 #ifdef CONFIG_FB_SIS_300
2589 if(VCLK > 150) data |= 0x80;
2593 if(VCLK >= 150) data |= 0x08;
2597 #ifdef CONFIG_FB_SIS_315
2598 if(VCLK >= 166) data |= 0x0c;
2606 #ifdef CONFIG_FB_SIS_315
2607 if(VCLK >= 200) data |= 0x0c;
2612 if(VCLK < 200) data |= 0x10;
2626 if(VCLK >= 260) data = 0x00;
2627 else if(VCLK >= 160) data = 0x01;
2628 else if(VCLK >= 135) data = 0x02;
2632 if (VCLK < 234) data = 0x02;
2639 if(ModeNo > 0x13) data &= 0xfc;
2648 SiS_SetCRT1ModeRegs(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
2649 unsigned short ModeIdIndex,
unsigned short RRTI)
2651 unsigned short data, infoflag = 0, modeflag, resindex;
2652 #ifdef CONFIG_FB_SIS_315
2677 if(infoflag & InterlaceMode) data |= 0x20;
2683 if(infoflag & InterlaceMode) {
2689 data = hrs - (hto >> 1) + 3;
2713 #ifdef CONFIG_FB_SIS_315
2720 data = SiS_Pr->
SiS_SR15[(2 * 4) + SiS_Get310DRAMType(SiS_Pr)];
2724 data2 =
SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, RRTI) >> 1;
2725 if(infoflag & InterlaceMode) data2 >>= 1;
2727 if(data3) data2 /=
data3;
2737 data = SiS_Get310DRAMType(SiS_Pr);
2739 data = SiS_Pr->
SiS_SR15[(2 * 4) + data];
2756 if(data3) data2 *=
data3;
2758 data2 = ((
unsigned int)(SiS_GetMCLK(SiS_Pr) * 1024)) /
data2;
2762 if (data2 >= 0x19c) data = 0xba;
2763 else if(data2 >= 0x140) data = 0x7a;
2764 else if(data2 >= 0x101) data = 0x3a;
2765 else if(data2 >= 0xf5) data = 0x32;
2766 else if(data2 >= 0xe2) data = 0x2a;
2767 else if(data2 >= 0xc4) data = 0x22;
2768 else if(data2 >= 0xac) data = 0x1a;
2769 else if(data2 >= 0x9e) data = 0x12;
2770 else if(data2 >= 0x8e) data = 0x0a;
2773 if(data2 >= 0x127) data = 0xba;
2777 if (data2 >= 0x190) data = 0xba;
2778 else if(data2 >= 0xff) data = 0x7a;
2779 else if(data2 >= 0xd3) data = 0x3a;
2780 else if(data2 >= 0xa9) data = 0x1a;
2781 else if(data2 >= 0x93) data = 0x0a;
2801 SiS_SetVCLKState(SiS_Pr, ModeNo, RRTI, ModeIdIndex);
2803 #ifdef CONFIG_FB_SIS_315
2822 #ifdef CONFIG_FB_SIS_315
2837 for(i = 0; i <= 4; i++) {
2840 for(i = 0; i <= 8; i++) {
2858 unsigned short dl,
unsigned short ah,
unsigned short al,
unsigned short dh)
2860 unsigned short d1,
d2, d3;
2863 case 0: d1 = dh; d2 =
ah; d3 = al;
break;
2864 case 1: d1 =
ah; d2 = al; d3 = dh;
break;
2865 default: d1 = al; d2 = dh; d3 =
ah;
2876 unsigned short si, di, bx,
sf;
2883 if(data == 0x00) table = SiS_MDA_DAC;
2884 else if(data == 0x08) table = SiS_CGA_DAC;
2885 else if(data == 0x10) table = SiS_EGA_DAC;
2886 else if(data == 0x18) {
2889 table = SiS_VGA_DAC;
2908 for(i = 0; i <
j; i++) {
2910 for(k = 0; k < 3; k++) {
2912 if(data & 0x01) data2 += 0x2A;
2913 if(data & 0x02) data2 += 0x15;
2920 for(i = 16; i < 32; i++) {
2921 data = table[
i] <<
sf;
2925 for(m = 0; m < 9; m++) {
2928 for(n = 0; n < 3; n++) {
2929 for(o = 0; o < 5; o++) {
2930 SiS_WriteDAC(SiS_Pr, DACData, sf, n, table[di], table[bx], table[si]);
2934 for(o = 0; o < 3; o++) {
2935 SiS_WriteDAC(SiS_Pr, DACData, sf, n, table[di], table[si], table[bx]);
2949 SiS_SetCRT1Group(
struct SiS_Private *SiS_Pr,
unsigned short ModeNo,
unsigned short ModeIdIndex)
2951 unsigned short StandTableIndex, RefreshRateTableIndex;
2963 SiS_ResetSegmentRegisters(SiS_Pr);
2965 SiS_SetSeqRegs(SiS_Pr, StandTableIndex);
2966 SiS_SetMiscRegs(SiS_Pr, StandTableIndex);
2967 SiS_SetCRTCRegs(SiS_Pr, StandTableIndex);
2968 SiS_SetATTRegs(SiS_Pr, StandTableIndex);
2969 SiS_SetGRCRegs(SiS_Pr, StandTableIndex);
2970 SiS_ClearExt1Regs(SiS_Pr, ModeNo);
2971 SiS_ResetCRT1VCLK(SiS_Pr);
2986 RefreshRateTableIndex =
SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex);
2992 if(RefreshRateTableIndex != 0xFFFF) {
2993 SiS_SetCRT1Sync(SiS_Pr, RefreshRateTableIndex);
2994 SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2995 SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2996 SiS_SetCRT1VCLK(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3000 #ifdef CONFIG_FB_SIS_300
3002 SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo, RefreshRateTableIndex);
3007 SiS_SetCRT1FIFO_630(SiS_Pr, ModeNo, RefreshRateTableIndex);
3011 #ifdef CONFIG_FB_SIS_315
3013 unsigned char sr2b = 0, sr2c = 0;
3016 case 0x01: sr2b = 0x4e; sr2c = 0xe9;
break;
3019 case 0x0d: sr2b = 0x1b; sr2c = 0xe3;
break;
3027 SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex);
3032 SiS_SetCRT1ModeRegs(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3034 #ifdef CONFIG_FB_SIS_315
3036 SiS_SetupDualChip(SiS_Pr);
3043 SiS_ClearBuffer(SiS_Pr, ModeNo);
3074 #ifdef CONFIG_FB_SIS_315
3076 unsigned short temp;
3082 if(SiS_Pr->
SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
3085 temp = ROMAddr[0x7e] | 0x40;
3086 if(SiS_Pr->
SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
3091 if(SiS_Pr->
SiS_XGIROM) temp |= ROMAddr[0x7e];
3109 #ifdef CONFIG_FB_SIS_315
3130 #ifdef CONFIG_FB_SIS_315
3131 unsigned int somebase;
3140 somebase = sisfb_read_mio_pci_word(SiS_Pr, 0x74);
3143 if(somebase == 0)
return;
3156 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x7e, temp1);
3157 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x8d, temp2);
3171 unsigned short RealModeNo, ModeIdIndex;
3172 unsigned char backupreg = 0;
3173 unsigned short KeepLockReg;
3188 RealModeNo = ModeNo;
3189 if(ModeNo == 0x5b) ModeNo = 0x56;
3193 SiS_GetSysFlags(SiS_Pr);
3200 SiSInitPCIetc(SiS_Pr);
3201 SiSSetLVDSetc(SiS_Pr);
3202 SiSDetermineROMUsage(SiS_Pr);
3212 SiS_GetVBType(SiS_Pr);
3218 SiS_ResetVB(SiS_Pr);
3232 SiS_SetLowModeTest(SiS_Pr, ModeNo);
3235 if(!SiS_CheckMemorySize(SiS_Pr, ModeNo, ModeIdIndex)) {
3239 SiS_OpenCRTC(SiS_Pr);
3252 SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex);
3265 SiS_HandleCRT1(SiS_Pr);
3267 SiS_StrangeStuff(SiS_Pr);
3272 #ifdef CONFIG_FB_SIS_315
3284 #ifdef CONFIG_FB_SIS_315
3296 if((ModeNo == 0x03) || (ModeNo == 0x10)) {
3312 SiS_CloseCRTC(SiS_Pr);
3314 SiS_Handle760(SiS_Pr);
3323 #define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l))
3324 #define GENMASK(mask) BITMASK(1?mask,0?mask)
3325 #define GETBITS(var,mask) (((var) & GENMASK(mask)) >> (0?mask))
3326 #define GETBITSTR(val,from,to) ((GETBITS(val,from)) << (0?to))
3340 (((SiS_Pr->
CHSyncEnd >> 3) + 3) & 0x1F);
3344 | (((SiS_Pr->
CVDisplay - 1) & 0x100) >> 7)
3348 | (((SiS_Pr->
CVTotal - 2) & 0x200) >> 4)
3349 | (((SiS_Pr->
CVDisplay - 1) & 0x200) >> 3)
3387 unsigned short ModeIdIndex)
3389 unsigned short modeflag, tempax, tempbx = 0, remaining = 0;
3398 if(modeflag & HalfDCLK) VGAHDE >>= 1;
3407 #ifdef CONFIG_FB_SIS_300
3412 if(modeflag & HalfDCLK) tempbx >>= 1;
3413 remaining = tempbx % 8;
3416 #ifdef CONFIG_FB_SIS_315
3424 if(modeflag & HalfDCLK) tempbx -= VGAHDE;
3430 #ifdef CONFIG_FB_SIS_300
3434 if(modeflag & HalfDCLK) {
3440 tempbx = (SiS_Pr->
PanelHRS + 1) & ~1;
3441 if(modeflag & HalfDCLK) {
3445 SiS_Pr->
CHSyncStart = (VGAHDE + tempax + tempbx + 7) & ~7;
3447 if(modeflag & HalfDCLK) tempax >>= 1;
3451 if(modeflag & HalfDCLK) {
3462 #ifdef CONFIG_FB_SIS_315
3466 if(modeflag & HalfDCLK) tempbx >>= 1;
3467 tempax += ((tempbx - tempax) >> 1);
3481 #ifdef CONFIG_FB_SIS_300
3484 if((tempax + tempbx) == 438) tempbx += 16;
3496 tempax += (SiS_Pr->
PanelYRes - tempax) >> 1;
3509 SiS_Pr->
CCRT1CRTC[15] |= (remaining << 4);
3514 for(i = 0, j = 0; i <= 7; i++, j++) {
3517 for(j = 0x10; i <= 10; i++, j++) {
3520 for(j = 0x15; i <= 12; i++, j++) {
3523 for(j = 0x0A; i <= 15; i++, j++) {
3530 tempax = (SiS_Pr->
CCRT1CRTC[16] & 0x01) << 5;
3531 if(modeflag & DoubleScanMode) tempax |= 0x80;
3542 unsigned short HRE,
HBE, HRS, HBS,
HDE,
HT;
3543 unsigned short VRE,
VBE, VRS, VBS,
VDE,
VT;
3544 unsigned char sr_data, cr_data, cr_data2;
3547 sr_data = crdata[14];
3550 HT = crdata[0] | ((
unsigned short)(sr_data & 0x03) << 8);
3554 HDE = crdata[1] | ((
unsigned short)(sr_data & 0x0C) << 6);
3558 HRS = crdata[4] | ((
unsigned short)(sr_data & 0xC0) << 2);
3562 HBS = crdata[2] | ((
unsigned short)(sr_data & 0x30) << 4);
3564 sr_data = crdata[15];
3565 cr_data = crdata[5];
3568 HBE = (crdata[3] & 0x1f) |
3569 ((
unsigned short)(cr_data & 0x80) >> 2) |
3570 ((
unsigned short)(sr_data & 0x03) << 6);
3573 HRE = (cr_data & 0x1f) | ((sr_data & 0x04) << 3);
3575 temp = HBE - ((E - 1) & 255);
3576 B = (temp > 0) ? temp : (temp + 256);
3578 temp = HRE - ((E + F + 3) & 63);
3579 C = (temp > 0) ? temp : (temp + 64);
3583 if(writeres) var->
xres = xres = E * 8;
3589 sr_data = crdata[13];
3590 cr_data = crdata[7];
3594 ((
unsigned short)(cr_data & 0x01) << 8) |
3595 ((
unsigned short)(cr_data & 0x20) << 4) |
3596 ((
unsigned short)(sr_data & 0x01) << 10);
3601 ((
unsigned short)(cr_data & 0x02) << 7) |
3602 ((
unsigned short)(cr_data & 0x40) << 3) |
3603 ((
unsigned short)(sr_data & 0x02) << 9);
3608 ((
unsigned short)(cr_data & 0x04) << 6) |
3609 ((
unsigned short)(cr_data & 0x80) << 2) |
3610 ((
unsigned short)(sr_data & 0x08) << 7);
3613 cr_data2 = (crdata[16] & 0x01) << 5;
3617 ((
unsigned short)(cr_data & 0x08) << 5) |
3618 ((
unsigned short)(cr_data2 & 0x20) << 4) |
3619 ((
unsigned short)(sr_data & 0x04) << 8);
3622 VBE = crdata[12] | ((
unsigned short)(sr_data & 0x10) << 4);
3623 temp = VBE - ((E - 1) & 511);
3624 B = (temp > 0) ? temp : (temp + 512);
3627 VRE = (crdata[9] & 0x0f) | ((sr_data & 0x20) >> 1);
3628 temp = VRE - ((E + F - 1) & 31);
3629 C = (temp > 0) ? temp : (temp + 32);
3633 if(writeres) var->
yres = yres = E;
3638 if((xres == 320) && ((yres == 200) || (yres == 240))) {